A hardware acceleration method for network message editing

By introducing hardware acceleration methods into the network processor, the coordinated work of message reception, storage and sending modules is solved, and the performance improvement of network message processing and the implementation of complex functions is achieved.

CN115695588BActive Publication Date: 2025-05-09CHENGDU BEIZHONG NETCORE TECH CO LTD
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Patent Information

Application Number
CN202211180633.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-26
Publication Date
2025-05-09
Estimated Expiration
2042-09-26

AI Technical Summary

Technical Problem

The existing network message processing methods have caused the network processor to be overloaded and cannot effectively process flexible and diverse messages.

Method used

A hardware acceleration method for network message editing is proposed. Through the coordinated work of the message receiving module, storage module and message sending module, the burden on the network processor is reduced and the hardware acceleration of message editing is realized.

Benefits of technology

Through the hardware acceleration method, the load of the network processor is significantly reduced, the performance of network message processing is improved, and the network processor is liberated to achieve more complex functions.

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Abstract

The present invention relates to a hardware acceleration method for network message editing, and belongs to the field of network processors. The interface hardware module of the present invention includes a message receiving module for receiving messages from an Ethernet port; a message sending module for sending data to the Ethernet port, and the message sending module is also responsible for executing message editing commands; a storage module for storing messages to wake up the network processor and receiving editing commands from the network processor. Through the coordinated work of these three modules and the network processor module, the network processor is liberated to realize more complex functions, and the performance of network message processing can be improved. The present invention can greatly reduce the load of the network processor, because the network processor does not need to read the entire packet of messages to the network processor, but transfers this part of the work to the interface hardware module for implementation.
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Description

Technical Field

[0001] The invention belongs to the field of network processors, and in particular relates to a hardware acceleration method for editing network messages. Background Art

[0002] The network is developing rapidly, the network bandwidth is getting higher and higher, and the network protocol is becoming more and more complex. At the same time, many users like to carry the data defined by their own private protocols in Ethernet messages. At this time, the processing of network messages is generally placed in a dedicated network processor. The hardware only provides data paths and does not participate in the parsing of the protocol itself. This approach greatly improves the flexibility of network message processing, but it will increase the burden on the network processor.

[0003] So, the current situation is:

[0004] 1. The messages processed by network processors are becoming more and more flexible and diverse. The hardware only acts as a data path and does not perform protocol analysis.

[0005] 2. The complexity and load of network processors are becoming increasingly heavy, and all processing of a message is completed by the network processor. Summary of the invention

[0006] 1. Technical issues to be resolved

[0007] The technical problem to be solved by the present invention is how to provide a hardware acceleration method for network message editing to solve the problem that the existing message processing method increases the burden on the network processor.

[0008] (II) Technical solution

[0009] In order to solve the above technical problems, the present invention proposes a hardware acceleration method for network message editing, which comprises the following steps:

[0010] Step 1: The message receiving module receives the message from the Ethernet port, classifies and processes it, and generates message indication information for use by subsequent modules;

[0011] Step 2: The message receiving module sends the received message and the indication information of the generated message to the message storage module; the message storage module stores the message in a linked list in the form of cells, and after the whole packet of messages is stored, two blank cells are added to the head of the chain. These two blank cells are used to store the message editing command written by the network processor to the message storage module;

[0012] Step 3: The message storage module sends the stored message and message-related information to the network processor NP, where the message-related information includes the head pointer of the message storage;

[0013] Step 4: The network processor NP parses and preprocesses the message, generates a message editing command that requires hardware assistance, and writes the message editing command into the two blank cells at the head of the message storage chain in the message storage module;

[0014] Step 5: The message storage module sends the message preprocessed by the network processor and the message editing command to the message sending module; the message editing unit of the message sending module first parses the message editing command and extracts the operation instructions for the message, which include deleting, replacing or inserting data, the operation location and the inserted or replaced data; and then edits the message according to the command in turn;

[0015] Step 6: After the message sending module processes the message according to the message editing command, it sends the message out from the Ethernet port.

[0016] Furthermore, the message storage module stores the messages in a linked list in a manner of 128 bytes per cell.

[0017] Furthermore, after the entire packet is stored, two blank cells are added to the head of the chain, for a total of 256 bytes.

[0018] Furthermore, the message editing command includes the position to be edited in the message and the operations to be performed, including replacement, deletion and insertion; if the message is to replace and insert data of a certain length, the message editing command includes not only the position of the corresponding operation but also the data used for replacement and insertion; if the message is to be deleted, the message editing command only includes the deletion position and length, without data.

[0019] Furthermore, the message editing command supports a maximum of 4 operations.

[0020] Furthermore, when the message is edited in step 5, each operation is performed based on the result of the previous operation.

[0021] Furthermore, in the step step 3, the message storage module wakes up the network processor NP before sending the message to the network processor NP.

[0022] Furthermore, the preprocessing in step 4 includes filtering or rewriting the message according to rules.

[0023] Furthermore, in step 4, the network processor NP does not read the entire packet message to the network processor NP.

[0024] Furthermore, the processing steps of the message editing unit of the message sending module include:

[0025] Step 1: The message editing processing unit of the message sending module receives the 256-byte message editing command sent by the message storage module, and parses at least 1 and at most 4 message editing commands in the message editing command format agreed upon by both parties;

[0026] Step 2: The message editing processing unit of the message sending module extracts the message editing command parsed in the first step and prepares to edit the message after 256 bytes;

[0027] Step 3: The message editing processing unit of the message sending module executes the message editing commands one by one to delete, replace and insert the message. Each editing command is edited based on the result of the previous processing.

[0028] (III) Beneficial effects

[0029] The present invention proposes a hardware acceleration method for network message editing. Compared with the prior art, the technical solution proposed by the present invention can greatly reduce the load of the network processor, because the network processor does not need to read the entire packet message to the network processor, but transfers this part of the work to the interface hardware module for implementation. The interface hardware module includes a message receiving module for receiving messages from the Ethernet port; a message sending module for sending data to the Ethernet port, and the message sending module is also responsible for executing the message editing command; a storage module for storing messages to wake up the network processor and receiving the editing command of the network processor. Through the coordinated work of these three modules and the network processor module, it is achieved that the network processor is liberated to realize more complex functions, and at the same time, the performance of network message processing can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a flow chart of the technical solution of the present invention;

[0031] Figure 2 This is the implementation flow chart of message editing. DETAILED DESCRIPTION

[0032] In order to make the purpose, content and advantages of the present invention more clear, the specific implementation methods of the present invention are further described in detail below in conjunction with the drawings and examples.

[0033] The purpose of the present invention is to reduce the load of the network processor and use hardware to assist the network processor in completing the function of editing part of the message.

[0034] The present invention mainly solves the following two difficult problems:

[0035] 1. Provide a channel for communication of message editing commands between the network processor and the hardware;

[0036] 2. The hardware cooperates with the network processor to perform accurate and efficient message editing.

[0037] Figure 1 The flowchart of the technical solution of the present invention and the structure diagram of the three main modules and the network processor are shown in FIG. Figure 1 As shown, the hardware acceleration method for network message editing proposed by the present invention comprises the following steps:

[0038] Step 1: The message receiving module receives the message from the Ethernet port, performs simple classification and processing, and generates some message indication information for use by subsequent modules.

[0039] Step 2: The message receiving module sends the received message and the indication information of the generated message to the message storage module. The message storage module stores the message in a linked list in the form of 128 bytes per cell. After the whole packet of message is stored, two blank cells are added to the head of the chain. These two blank cells are used to store the message editing command written by the network processor to the message storage module, a total of 256 bytes.

[0040] This command includes the editing command that the network processor uses to let the hardware channel module edit the message. The message editing command includes the location to be edited in the message and the operation to be performed, including replacement, deletion and insertion.

[0041] If the message is to be replaced or data of a certain length is to be inserted, then the message editing command includes not only the location of the corresponding operation but also the data to be replaced and inserted.

[0042] If the message is deleted, the message editing command only contains the deleted position and length, without data.

[0043] Step 3: The message storage module sends the stored message and message-related information, including a series of key information such as the message storage head pointer, to the network processor NP; in some embodiments, the message storage module wakes up the network processor NP before sending the message to the network processor NP.

[0044] Step 4: The network processor NP parses and preprocesses the message. The preprocessing can be filtering the message by rules, or rewriting it, and generating a message editing command that requires hardware assistance, and writing the message editing command into the two blank cells at the head of the message storage chain in the message storage module. The network processor NP does not need to read the entire packet of messages to the network processor.

[0045] Step 5: The message storage module sends the message preprocessed by the network processor and the message editing command to the message sending module. The message editing unit of the message sending module first parses the first 256 bytes of the message editing command and extracts the operation instructions for the message, which include deleting, replacing or inserting data, as well as the operation location and the inserted and replaced data. Then the message is edited according to the command. The message editing command supports a maximum of 4 operations. Each operation is based on the result of the previous operation.

[0046] Step 6: After the message sending module processes the message according to the message editing command, it sends the message out from the Ethernet port.

[0047] Figure 2 The technical solution of the present invention is Figure 1 Step 4: Supplement the implementation process of message editing.

[0048] Step 1: The message editing processing unit of the message sending module receives the 256-byte message editing command sent by the message storage module, and parses at least 1 and at most 4 message editing commands in the message editing command format agreed upon by both parties.

[0049] Step 2: The message editing processing unit of the message sending module extracts the message editing command parsed in the first step and prepares to edit the message after 256 bytes.

[0050] Step 3: The message editing processing unit of the message sending module executes the message editing commands one by one, and performs deletion, replacement and insertion of data of the length specified by the editing command on the message. Each editing command is edited based on the result of the previous processing. For example, the original message is 1000 bytes long. The message editing command contains 3 editing commands. The first one is a deletion operation, which deletes 100 bytes of data starting from the 200th byte position of the message. After the first command is executed, the message becomes 900 bytes long. The second command is an insertion operation, which inserts 50 bytes of data starting from the 500th byte position of the message. After the second command is executed, the message changes from 900 bytes to 950 bytes. The third command is a replacement operation, which inserts 80 bytes of data starting from the lower 800 bytes of the message. After the third command is executed, the message becomes 1030 bytes. The operations of these three commands (minimum 1 and maximum 4) can be the same or different, which is determined by the network processor.

[0051] Compared with the prior art, the technical solution proposed in the present invention can greatly reduce the load of the network processor, because the network processor does not need to read the entire packet message to the network processor, but transfers this part of the work to the interface hardware module for implementation. The interface hardware module includes a message receiving module for receiving messages from the Ethernet port; a message sending module for sending data to the Ethernet port, and the message sending module is also responsible for executing the message editing command; a storage module for storing messages to wake up the network processor and receiving the editing command of the network processor. Through the cooperation of these three modules and the network processor module, it is achieved to liberate the network processor to realize more complex functions, and at the same time, it can improve the performance of network message processing.

[0052] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A hardware acceleration method for network message editing, characterized in that: The method comprises the following steps: Step 1: The message receiving module receives the message from the Ethernet port, classifies and processes it, and generates message indication information for use by subsequent modules; Step 2: The message receiving module sends the received message and the indication information of the generated message to the message storage module; the message storage module stores the message in a linked list in the form of cells, and after the whole packet of messages is stored, two blank cells are added to the head of the chain. These two blank cells are used to store the message editing command written by the network processor to the message storage module; Step 3: The message storage module sends the stored message and message-related information to the network processor NP, where the message-related information includes the head pointer of the message storage; Step 4: The network processor NP parses and preprocesses the message, generates a message editing command that requires hardware assistance, and writes the message editing command into the two blank cells at the head of the message storage chain in the message storage module; Step 5: The message storage module sends the message preprocessed by the network processor and the message editing command to the message sending module; the message editing unit of the message sending module first parses the message editing command and extracts the operation instructions for the message; the operation instructions include: the location of the deletion, replacement or insertion operation and the data to be inserted or replaced; and then edits the message in turn according to the command; Step 6: After the message sending module processes the message according to the message editing command, it sends the message out from the Ethernet port.

2. The hardware acceleration method for network message editing according to claim 1, characterized in that: In step 2, the message storage module stores the messages in a linked list in a manner of 128 bytes per cell.

3. The hardware acceleration method for network message editing according to claim 2, characterized in that: After the entire packet is stored, two blank cells are added to the head of the chain, for a total of 256 bytes.

4. The hardware acceleration method for network message editing according to claim 1, characterized in that: The message editing command includes the position to be edited in the message and the operation to be performed, including replacement, deletion and insertion. If the message is to replace or insert data of a certain length, the message editing command includes not only the position of the corresponding operation but also the data to be replaced or inserted. If the message is to be deleted, the message editing command only contains the deleted position and length, without data.

5. The hardware acceleration method for network message editing according to claim 4, characterized in that: The message editing command supports a maximum of 4 operations.

6. The hardware acceleration method for network message editing according to claim 5, characterized in that: When editing the message in step 5, each operation is performed based on the result of the previous operation.

7. The hardware acceleration method for network message editing according to claim 1, characterized in that: In the step step 3, the message storage module wakes up the network processor NP before sending the message to the network processor NP.

8. The hardware acceleration method for network message editing according to claim 1, characterized in that: The preprocessing in step 4 includes filtering or rewriting the message according to rules.

9. The hardware acceleration method for network message editing according to claim 8, characterized in that: In step 4, the network processor NP does not read the entire packet message to the network processor NP.

10. The hardware acceleration method for network message editing according to any one of claims 1 to 9, characterized in that: The processing steps of the message editing unit of the message sending module include: Step 1: The message editing processing unit of the message sending module receives the 256-byte message editing command sent by the message storage module, and parses at least 1 and at most 4 message editing commands in the message editing command format agreed upon by both parties; Step 2: The message editing processing unit of the message sending module extracts the message editing command parsed in the first step and prepares to edit the message after 256 bytes; Step 3: The message editing processing unit of the message sending module executes the message editing commands one by one to delete, replace and insert the message. Each editing command is edited based on the result of the previous processing.

Citation Information

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