A method for realizing continuous writing of a memory

By changing the address mapping order of memory cells in memory, the curing time problem of memory when continuously writing data is solved, continuous writing of memory is realized, data storage efficiency is improved and operation process is simplified.

CN115729475BActive Publication Date: 2025-07-18CHONGQING HANGTIAN IND CO
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Patent Information

Application Number
CN202211585246.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-12-09
Publication Date
2025-07-18
Estimated Expiration
2042-12-09

AI Technical Summary

Technical Problem

When existing memory continuously writes data, it is impossible to operate continuously due to the data solidification time of the storage unit, which increases system cost and data cache requirements of the memory.

Method used

By changing the address mapping of the memory cells in the memory, changing the writing order of the memory cells, and continuously writing of the memory is realized.

Benefits of technology

Improves data storage efficiency, simplifies the implementation process and ensures operational reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a method for realizing continuous writing of a memory, which specifically includes the following steps: S1: Obtain the physical parameters of the memory and the logical address of the data to be written; S2: Map the logical address of the data to be written in S1 to the physical address in the memory; S3: Write data to the memory in the order of the physical addresses corresponding to the logical addresses in S2. When the data generation cycle in the system, the data cache capacity of the storage units in the memory, the data solidification time of the storage units in the memory, and the number of storage units in the memory meet the preset conditions, the present invention achieves changing the writing order of the storage units in the memory by transforming the address mapping of the storage units in the memory, thereby realizing continuous writing of the memory, improving the data storage efficiency, and the method has the characteristics of simple implementation and reliable operation.
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Description

Technical Field

[0001] The present invention relates to the technical field of data processing, and particularly relates to a method for realizing continuous writing of a memory. Background Art

[0002] Currently, a memory cell (such as EEPROM, FLASH, etc., but not limited to these memory cells) that makes up a memory has a data cache inside. When writing a piece of data to the memory cell externally, in fact, it is written into the data cache of the memory cell. When the writing stops or the data cache is full, the memory cell needs a period of time to solidify the data in the cache into the storage medium of the memory cell.

[0003] During this solidification time, the memory cell cannot perform any operation, which causes that after each continuous writing of a piece of data in the memory, it is necessary to stop for a period of time to allow the memory cells in the memory to solidify the data. When there is a large amount of continuous data to be written, a relatively large data cache space must be required to buffer the data generated while waiting for the memory cells inside the memory to solidify the data, thereby increasing the cost of the system. Summary of the Invention

[0004] Aiming at the technical problem that the memory in the prior art cannot continuously write data, resulting in low storage efficiency, the present invention proposes a method for realizing continuous writing of a memory. By changing the address mapping of the memory cells in the memory, the writing order of the memory cells in the memory is changed, thereby realizing continuous writing of the memory and improving the data storage efficiency.

[0005] To achieve the above object, the present invention provides the following technical solutions:

[0006] A method for realizing continuous writing of a memory specifically includes the following steps:

[0007] S1: Obtain the physical parameters of the memory and the logical address of the data to be written;

[0008] S2: Map and transform the logical address of the data to be written in S1 into the physical address in the memory;

[0009] S3: Write data to the memory in the order of the physical addresses corresponding to the logical addresses in S2.

[0010] Preferably, in S1, the memory includes N memory cells, the data cache capacity of each memory cell is R; each memory cell is divided into M memory blocks, and the capacity of each memory block is C; each memory block includes at least one storage medium, and the storage medium is used to store externally written data.

[0011] Preferably, in S1, the physical parameters include the generation period T of external data d, the data cache capacity R of the storage unit and the data solidification time T of the storage unit w , the number of storage units N; and the physical parameters need to satisfy formula (1):

[0012] T d ×R×(N - 1) ≥ T w (1)

[0013] Preferably, in the S2, the calculation formula of the logical address is as follows:

[0014] A l = j×N×C + k×C + i (2)

[0015] In formula (2), A l represents the logical address; N represents the number of storage units in the memory; C represents the cache capacity of the storage blocks in the storage units of the memory.

[0016] Preferably, in the S2, the calculation formula of the physical address of the i-th storage medium in the j-th storage block in the k-th storage unit of the memory is:

[0017] A p = k×M×C + j×C + i (3)

[0018] In formula (3), A p represents the physical address; k represents the k-th storage unit; M represents the number of storage blocks; C represents the cache capacity of the storage blocks in the storage units of the memory; j represents the j-th storage block; i represents the i-th storage medium; where

[0019]

[0020]

[0021]

[0022] In formulas (4), (5), and (6), A l represents the logical address; N represents the number of storage units in the memory; represents rounding down.

[0023] Preferably, in the S3, the timing for writing data to the memory is:

[0024] First write timing: When writing to the first memory block in the first memory cell of the memory, other memory cells are in the idle state; when writing to the first memory block in the second memory cell, the first memory cell is in the internal operation and external prohibition state, and other memory cells are in the idle state; and so on. When writing to the first memory block in the nth memory cell, the first memory block in the first memory cell has been solidified, that is, the second memory block in the first memory cell is in the idle state, and the first memory blocks of other memory cells are still in the internal operation and external prohibition state;

[0025] Write to the second memory block in the first memory cell again, repeating the process of the first write timing until all the storage media in all memory cells have been written.

[0026] In summary, due to the adoption of the above technical solution, compared with the prior art, the present invention has at least the following beneficial effects:

[0027] When the data generation cycle in the system, the data cache capacity of the memory cells in the memory, the data solidification time of the memory cells in the memory, and the number of memory cells in the memory meet certain conditions, by changing the address mapping of the memory cells in the memory, the writing order of the memory cells in the memory is changed, so as to achieve continuous writing of the memory, improve the data storage efficiency, and the method has the characteristics of simple implementation and reliable operation. Description of the Drawings

[0028] Figure 1 It is a schematic diagram of the existing memory structure.

[0029] Figure 2 It is a schematic diagram of a method for realizing continuous writing of a memory according to an exemplary embodiment of the present invention.

[0030] Figure 3 It is a schematic diagram of the timing for writing data to the memory according to an exemplary embodiment of the present invention. Detailed Embodiments

[0031] The present invention will be further described in detail below in conjunction with the embodiments and the specific implementation manners. However, this should not be construed as limiting the scope of the above-mentioned subject matter of the present invention to the following embodiments. Any technology implemented based on the content of the present invention belongs to the scope of the present invention.

[0032] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by the terms "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation to the present invention.

[0033] In the description of the present invention, the generation period of data in the system is the average period of the data, and it is assumed that the parameters of all storage units in the memory are the same, that is, the number of storage blocks, the storage block capacity, the data cache capacity, and the solidification time of all storage units are assumed to be the same, and it is assumed that the storage block capacity and the data cache capacity in each memory are the same. The above regulations are only for the convenience of description and easy reading, and should not be construed as a limitation to the present invention.

[0034] As Figure 1 shown, in the prior art, the actual address of the memory is represented in the memory in the order of storage units, which is described as the physical address. That is, after all the storage media of the first storage unit in the memory are sequentially represented, the second storage unit is represented, and so on, until all the storage media in all storage units are represented.

[0035] For example, there are N storage units in the memory, which are respectively marked as [B(0), B(1)..., B(n - 1)], and the data cache capacity of each storage unit is R; each storage unit is divided into M storage blocks (generally described as "pages" or "blocks" in the prior art), which are respectively marked as [P(0), P(1)..., P(m - 1)], and the capacity of each storage block is C; each storage block includes at least one storage medium (i.e., C > 0), and the storage medium is used to store the data written externally.

[0036] The existing way of writing data into the memory is as follows: when writing data into the memory, first write data into the storage block P(0) of the storage unit B(0). When writing, the data will be first written into the data cache of B(0). After the external writing stops, the storage unit B(0) needs a period of time T w to solidify the data written into the data cache into the storage medium of the storage block P(0), and during the solidification time T w no operation can be performed on B(0). After the solidification is completed, continue to write to the subsequent storage blocks of B(0) until all the storage blocks P(0) to P(m - 1) in B(0) are all written with data, and then write data into the storage block P(0) of the storage unit B(1), and so on. Through the above writing process, it is found that during this process, the memory cannot continue to operate every once in a while, that is, continuous writing of the memory cannot be achieved.

[0037] As Figure 2 shown, the present invention provides a method for realizing continuous writing of a memory, including the following steps:

[0038] S1: Obtain the physical parameters of the memory and the logical address of the data to be written.

[0039] In this embodiment, there are N storage units in the memory, which are respectively marked as [B(0), B(1)..., B(n - 1)], and the data cache capacity of each storage unit is R; each storage unit is divided into M storage blocks, which are respectively marked as [P(0), P(1)..., P(m - 1)], and the capacity of each storage block is C; each storage block includes at least one storage medium, and the storage medium is used to store externally written data.

[0040] In this embodiment, the physical parameters of the memory include that the generation period of external data is T d , the data cache capacity of the storage units in the memory is R, the data solidification time of the storage units in the memory is T w , the number of storage units in the memory is N, and the number of storage blocks in each storage unit is M; the physical parameters of the memory need to satisfy formula (1):

[0041] T d ×R×(N - 1)≥T w (1)

[0042] In formula (1), T d represents the generation period of external data; R represents the data cache capacity of the storage units in the memory; N represents the number of storage units in the memory; T w represents the data solidification time of the storage units in the memory.

[0043] S2: Map the logical address of the data to be written in S1 to the physical address in the memory.

[0044] In this embodiment, in order to be able to write to the memory continuously, it is necessary to adjust the representation method of the logical address to be written in the memory. In this article, the representation order of the logical address is that after all the storage media in the first storage block of the first storage unit are represented, the storage media in the second storage block of the first storage unit are not represented continuously, but the storage media in the first storage block of the second storage unit are represented; until all the storage media in the first storage block of all storage units are represented, then start representing from the storage media in the second storage block of the first storage unit, and so on, until all the storage media in all storage units are represented.

[0045] Therefore, the logical address A of the i-th storage medium in the j-th storage block of the k-th storage unit is as follows: l The calculation formula is as follows:

[0046] A l = j × N × C + k × C + i (2)

[0047] In formula (2), A l represents the logical address to be written; k represents the k-th storage unit, and its value range is (0, 1,..., N - 1); N represents the number of storage units; C represents the storage block capacity of the storage unit in the memory; j represents the j-th storage block, and its value range is (0, 1,..., M - 1); i represents the i-th storage medium, and its value range is (0, 1,..., C - 1).

[0048] In practical applications, generally, the system only gives the logical address A to be written currently l (generally, the system designates the logical address, and then calculates parameters such as k, j, and i through the logical address, and then calculates the actual physical address to be written). If you want to calculate the physical address A in the memory of this embodiment p , you need to first use the logical address A l to calculate the storage unit number k, the storage block number j, and the storage medium number i in the storage block.

[0049] The calculation is as shown in formulas (3), (4), and (5).

[0050]

[0051]

[0052]

[0053] In formulas (3), (4), and (5), A l represents the logical address; k represents the storage unit number in the memory; N represents the number of storage units in the memory; C represents the storage block capacity of the storage unit in the memory; j represents the storage block number in the storage unit in the memory; i represents the storage medium number in the previous storage block; represents rounding down.

[0054] In this embodiment, the physical address A of the i-th storage medium in the j-th storage block of the k-th storage unit is as follows: p The calculation formula is as follows:

[0055] A p = k × M × C + j × C + i (6)

[0056] In formula (6), A pdenote the physical address; k represents the k-th storage unit, with a value range of (0, 1,..., N - 1); M represents the number of storage blocks; C represents the cache capacity of the storage blocks in the storage units of the memory; j represents the j-th storage block, with a value range of (0, 1,..., M - 1); i represents the i-th storage medium, with a value range of (0, 1,..., C - 1).

[0057] The physical address A in the memory can be calculated through formulas (3), (4), (5), and (6). p .

[0058] S3: Write data to the memory in the order of the physical addresses corresponding to the logical addresses in S2.

[0059] In this embodiment, writing data to the memory in the order of the physical addresses corresponding to the logical addresses is specifically manifested as follows:

[0060] First, write all the storage media in the first storage block of the first storage unit, then write the storage media in the first storage block of the second storage unit until all the storage media in the first storage block of all storage units are written. Since the condition described in S1 is met, the data cached in the first storage block of the first storage unit has been successfully written to the corresponding storage media at this time. Therefore, writing can continue from the storage media in the second storage block of the first storage unit, and so on until all the storage media in all storage units are written.

[0061] The timing for writing data to the memory is as follows:

[0062] The first writing timing: When writing to the first storage block of the first storage unit of the memory, other storage units are in an idle state; when writing to the first storage block of the second storage unit, the first storage unit is in an internal operation and external prohibition state, and other storage units are in an idle state; and so on. When writing to the first storage block of the n-th storage unit, the first storage block in the first storage unit has been solidified, that is, the second storage block in the first storage unit is in an idle state, and the first storage blocks of other storage units are still in an internal operation and external prohibition state;

[0063] Write to the second storage block of the first storage unit again, repeating the process of the first writing timing until all the storage media in all storage units are written.

[0064] In this embodiment, for example, the writing timing is as Figure 3 shown:

[0065] When the processor writes to the storage block P(0) of the storage unit B(0), the storage units B(1) to B(n - 1) are in an idle state; when the processor writes to the storage block P(1) of the storage unit B(1), the storage unit B(0) is in an internally solidified state and external operations are not allowed, and the storage units B(2) to B(n - 1) are in an idle state; and so on. When the writing to the storage block P(0) of the storage unit B(n - 1) is completed, the storage units B(1) to B(n - 2) are in an internally solidified state and external operations are not allowed, the P(0) of the storage unit B(0) has been internally solidified and is in an idle state, and writing to P(1) of B(0) is allowed to continue. By repeating this process, the writing of the entire memory can be continuously completed.

[0066] Those of ordinary skill in the art can understand that the above embodiments are specific examples for implementing the present invention, and in practical applications, various changes can be made to them in form and details without departing from the spirit and scope of the present invention.

Claims

1. A method for realizing continuous writing of a memory, characterized in that, Specifically, it includes the following steps: S1: Obtain the physical parameters of the memory and the logical address of the data to be written; In the above S1, the memory includes N storage units, and the data cache capacity of each storage unit is R; each storage unit is divided into M storage blocks, and the capacity of each storage block is C; each storage block includes at least one storage medium, and the storage medium is used to store externally written data; The physical parameters include the generation period T of the external data d , the data cache capacity R of the storage unit, and the data solidification time T of the storage unit w , the number N of storage units; and the physical parameters need to satisfy formula (1): T d ×R×(N - 1) ≥ T w (1); S2: Map the logical address of the data to be written in S1 to the physical address in the memory; S3: Write data to the memory in the order of the physical address corresponding to the logical address in S2; In the above S3, the timing for writing data to the memory is as follows: First write timing: When writing to the first storage block in the first storage unit of the memory, other storage units are in the idle state; When writing to the first storage block in the second storage unit, the first storage unit is in the internal operation and external prohibition state, and other storage units are in the idle state; and so on. When writing to the first storage block in the Nth storage unit, the first storage block in the first storage unit has been solidified, that is, the second storage block in the first storage unit is in the idle state, and the first storage blocks of other storage units are still in the internal operation and external prohibition state; Write to the second storage block in the first storage unit again, and repeat the process of the first write timing until all the storage media in all storage units are written; 2. The method for realizing continuous writing of a memory according to claim 1, wherein In the above S2, the calculation formula of the logical address is as follows: A l = j × N × C + k × C + i (2) In formula (2), A l represents the logical address; N represents the number of storage units in the memory; C represents the cache capacity of the storage blocks in the storage units in the memory; j represents the j-th storage block; i represents the i-th storage medium; k represents the k-th storage unit.

3. The method for implementing continuous writing of a memory according to claim 2, wherein In the above S2, the calculation formula of the physical address of the i-th storage medium in the j-th storage block in the k-th storage unit of the memory is: A p = k × M × C + j × C + i (3) In formula (3), A p represents the physical address; k represents the k-th storage unit; M represents the number of storage blocks; C represents the cache capacity of the storage blocks in the storage units in the memory; j represents the j-th storage block; i represents the i-th storage medium; where In formulas (4), (5), and (6), A l represents the logical address; N represents the number of storage units in the memory; represents rounding down.

Citation Information

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