Method and apparatus for balancing axi bus read and write transactions, electronic device, and medium
By detecting the balance of read and write operations in the AXI bus and configuring the ready signal, the system robustness problem caused by the imbalance of read and write operations is solved, the balanced control of read and write operations is realized, and the signal transmission efficiency of the system is improved.
CN115794713BActive Publication Date: 2026-06-26VERISILICON MICROELECTRONICS (SHANGHAI) CO LTD +2
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- VERISILICON MICROELECTRONICS (SHANGHAI) CO LTD
- Filing Date
- 2022-11-15
- Publication Date
- 2026-06-26
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Figure CN115794713B_ABST
Abstract
The application provides an AXI bus read-write transaction balancing method and device, electronic equipment and medium. The method comprises the following steps: detecting whether the read operation and the write operation in the AXI bus are balanced; if the read operation and the write operation are not balanced, configuring the ready signal of the first target operation as a target value; wherein the first target operation is the operation causing the imbalance in the read operation and the write operation; and the target value is a value representing that the operation is not ready. The application can configure the ready signal of the operation causing the imbalance as the target value, so that the master device can pause the execution of the operation causing the imbalance, thereby balancing the read operation and the write operation in the AXI bus, alleviating the situation that one type of operation occupies the bus all the time in a period of time, and thereby reducing the probability of the situation that after the master device issues a command to execute another type of operation, the relevant command is not answered all the time, and improving the system robustness.
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