A method and circuit for improving dynamic response rate of a primary side feedback converter

Abstract

The application discloses a method and circuit for improving dynamic response rate of primary side feedback converter, and belongs to the technical field of power generation, power transformation or power distribution. The method directly extracts an output capacitor voltage, and isolates and transmits the extracted output capacitor voltage signal to the primary side of the converter; a first closed-loop control signal is generated according to the difference between the extracted output capacitor voltage signal and a closed-loop control reference voltage signal; a second closed-loop control signal is generated according to the difference between a clamping capacitor voltage sampling signal and the closed-loop control reference voltage signal, and the first closed-loop control signal and the second closed-loop control signal are accumulated to obtain a closed-loop control signal. Correspondingly, a circuit containing a signal extraction unit, a feedforward signal generation unit and a main controller is provided. The application can generate a closed-loop control signal responding to load changes rapidly, realize the ripple level drop of the output voltage, greatly improve the tracking bandwidth of the converter, and improve the dynamic response rate of the converter.

Description

Technical Field

[0001] This invention relates to converter technology, and in particular discloses a method and circuit for improving the dynamic response rate of a primary-side feedback converter, belonging to the technical field of power generation, power transformation or power distribution. Background Technology

[0002] For isolated DC / DC converters, to achieve closed-loop control of the secondary output voltage, the secondary output voltage can be sampled for direct control, known as secondary-side feedback control; alternatively, the primary-side signal reflecting the secondary output voltage can be sampled for indirect control, known as primary-side feedback control. Secondary-side feedback converters can achieve better input and load regulation, but the control signal generated on the secondary side needs to be isolated and transmitted to the primary side before it can control the converter, significantly reducing the converter's power density.

[0003] In a primary-side feedback converter, signal sampling and closed-loop control are both completed on the primary side. Compared to a secondary-side feedback converter, this eliminates signal isolation and transmission, significantly improving the converter's power density. However, since the primary-side feedback converter essentially uses indirect control, changes in the secondary-side output voltage require a certain delay before being reflected in the primary-side signal. Therefore, the dynamic response of a primary-side feedback converter is generally worse than that of a secondary-side feedback converter.

[0004] Dual-clamp zero-voltage switching converters are widely used due to their simple structure and high efficiency. They are a typical primary-side feedback converter that indirectly achieves closed-loop control of the secondary-side output voltage by sampling the primary-side clamp capacitor voltage.

[0005] Figure 1 The circuit block diagram of a dual-clamp zero-voltage switching converter and its control system is given, including the first to fifth switching transistors Q1 to Q5, the power transformer T, and the clamping capacitor C. f Output capacitor C o Main controller and synchronous rectifier controller, v A V is the voltage at the connection point of the first switch Q1 and the second switch Q2. B V is the connection point voltage between the third switch Q3 and the fourth switch Q4. c V is the clamping capacitor voltage. o This is the output voltage. The main controller samples the input voltage V. in v c and v B This generates control signals S1 to S4 for the first to fourth switching transistors, and the synchronous rectifier controller samples the drain-source voltage V of the fifth switching transistor Q5. ds The control signal S5 for the fifth switch Q5 is generated.

[0006] By derivation, the output current i of the dual-clamp zero-voltage switching converter is... o The expression is:

[0007]

[0008] Where k is the proportionality coefficient, v err For closed-loop control signal, L m The magnetizing inductance value, v o f is the output voltage of the converter. s Let V be the switching frequency of the converter. Observing equation (1), it can be seen that to speed up the converter's response to a step load, the converter needs to be able to quickly adjust the magnitude of its output current. By adjusting the loop parameters, the tracking bandwidth of the converter can be increased, making the closed-loop control signal v err The adjustment rate is accelerated. However, to ensure system stability across the entire input voltage load range, the converter's tracking bandwidth is typically set low, which limits the converter's response speed to step loads. Furthermore, load current feedforward is the most common method to improve load step response; its basic idea is to sample the converter's output current i. o The information is then superimposed onto the closed-loop control signal to rapidly adjust the closed-loop control signal v. err However, this method requires sampling the load current and transmitting the sampled signal to the primary side of the converter to participate in the converter control, which greatly reduces the power density of the converter. Patent 202210292059.7 proposes a transient frequency conversion control strategy, which accelerates the load step response by rapidly changing the switching frequency of the converter, but this method has the following limitations: (1) it is relatively complex to implement; (2) if the converter is working in critical conduction mode before and after the load change, this strategy cannot accelerate the load step response. Patent 202210496362.9 improves the problem of primary and secondary disconnection of the converter by parallel discharge switching tube with clamping capacitor or segmented drooping strategy, which can effectively improve the response speed of the converter when switching between no-load and full-load, but this method essentially still uses the voltage of clamping capacitor on the primary side of the converter to reflect the output voltage of the secondary side of the converter, and the change of the output voltage of the secondary side of the converter needs a certain delay to be reflected in the voltage of clamping capacitor, thus limiting the response speed of the converter to step load.

[0009] To address the limitations of the aforementioned methods, this invention proposes a method and circuit for improving the dynamic response rate of a primary-side feedback converter, thereby overcoming the aforementioned deficiencies. Summary of the Invention

[0010] The purpose of this invention is to address the shortcomings of the aforementioned background technology by providing a method and circuit for improving the dynamic response rate of a primary-side feedback converter. This involves directly sampling the output capacitor voltage and then isolating and transmitting it to the primary side to obtain a closed-loop control signal. This closed-loop control signal is then combined with the closed-loop control signal obtained from the clamping capacitor voltage to obtain the final closed-loop control signal. This achieves the goal of significantly improving the converter's dynamic response rate while almost without reducing the converter's power density, thus solving the technical problem that existing converter control strategies limit the improvement of the converter's dynamic response rate.

[0011] To achieve the above-mentioned objectives, the present invention employs the following technical solution:

[0012] A method for improving the dynamic response rate of a primary-side feedback converter includes the following steps:

[0013] Step 1: Extract the output capacitor voltage and isolate and transmit the extracted output capacitor voltage signal to the primary side of the converter;

[0014] Step 2: Generate the first closed-loop control signal based on the difference between the closed-loop control reference voltage signal and the extracted output capacitor voltage signal;

[0015] Step 3: Generate a second closed-loop control signal based on the difference between the closed-loop control reference voltage signal and the clamping capacitor voltage sampling signal. Accumulate the first and second closed-loop control signals to obtain the closed-loop control signal. Generate control signals for the four primary-side switches of the converter based on the input voltage, the closed-loop control signal, and the voltage at the midpoint of the bridge arm composed of the third and fourth switches. Generate control signals for the secondary-side switches based on the voltage between the source and drain of the secondary-side switches.

[0016] A circuit for improving the dynamic response rate of a primary-side feedback converter includes: a signal extraction unit, a feedforward signal generation unit, a clamping capacitor voltage sampling unit, and a main controller. The first input port of the signal extraction unit is connected to the positive plate of the output capacitor, the second input port of the signal extraction unit and the negative plate of the output capacitor are connected to the secondary ground, and the third input port is connected to the positive plate of the clamping capacitor. The signal extraction unit transmits the extracted output capacitor voltage signal to the primary side of the converter. The input terminal of the feedforward signal generation unit receives the extracted output capacitor voltage signal, proportionally amplifies the difference between the closed-loop control reference voltage signal and the extracted output capacitor voltage signal, and outputs a first closed-loop control signal. The clamping capacitor voltage sampling unit is connected in parallel between the two plates of the clamping capacitor and outputs a clamping capacitor voltage sampling signal. One input terminal of the main controller is connected to the output terminal of the clamping capacitor voltage sampling unit, and the other input terminal of the main controller receives the first closed-loop control signal. The difference between the closed-loop control reference voltage signal and the clamping capacitor voltage sampling signal is processed to obtain the second closed-loop control signal. The first closed-loop control signal and the second closed-loop control signal are accumulated and the closed-loop control signal is output. The control signals of the four primary-side switches of the converter are generated according to the input voltage, the closed-loop control signal, and the voltage at the midpoint of the bridge arm composed of the third and fourth switches. The control signals of the secondary-side switches are generated according to the voltage between the source and drain of the secondary-side switches.

[0017] As a further optimization scheme for improving the dynamic response rate of the primary-side feedback converter, the signal extraction unit includes: a fifth capacitor, a sixth capacitor, a seventh capacitor, a first resistor, a second resistor, and a Zener diode. The positive plate of the fifth capacitor serves as the first input port and is connected to the positive plate of the output capacitor. The negative plate of the fifth capacitor, one end of the first resistor, one end of the second resistor, the positive plate of the sixth capacitor, and the cathode of the Zener diode are connected to transmit the extracted output capacitor voltage signal to the primary side port of the converter. The other end of the first resistor serves as the third input port and is connected to the positive plate of the clamping capacitor. The other end of the second resistor, the negative plate of the sixth capacitor, the anode of the Zener diode, and the positive plate of the seventh capacitor are all connected to the primary side ground. The negative plate of the seventh capacitor serves as the second input port and is connected to the secondary side ground along with the negative plate of the output capacitor. Both the fifth and seventh capacitors are Y capacitors, and their capacitance values ​​are equal, with the capacitance value of the fifth capacitor being greater than that of the sixth capacitor.

[0018] As a further optimization scheme for improving the dynamic response rate of the primary-side feedback converter, the feedforward signal generation unit includes: a first adder and a proportional amplifier. One input terminal of the first adder is connected to the output terminal of the signal extraction unit, and the other input terminal of the first adder is connected to the closed-loop reference voltage signal. After calculating the difference between the closed-loop reference voltage signal and the output capacitor voltage signal, the difference between the closed-loop control reference voltage signal and the extracted output capacitor voltage signal is output. The input terminal of the proportional amplifier is connected to the output terminal of the first adder. After proportionally amplifying the received signal, the first closed-loop control signal is output.

[0019] As a further optimization scheme for improving the dynamic response rate of the primary-side feedback converter, the clamping capacitor voltage unit circuit includes a third resistor and a fourth resistor. One end of the third resistor is connected to the positive plate of the clamping capacitor, and the other end of the third resistor is connected to one end of the fourth resistor as the output terminal. The other end of the fourth resistor and the negative plate of the clamping capacitor are connected to the primary-side ground.

[0020] As a further optimization scheme for improving the dynamic response rate of the primary-side feedback converter, the main controller includes: a second adder, a voltage regulator, and a third adder. One input of the second adder is connected to the output of the clamping capacitor voltage sampling circuit, and the other input is connected to the closed-loop control reference voltage signal. The difference between the closed-loop control reference voltage signal and the clamping capacitor voltage sampling signal is calculated and output as the difference. The input of the voltage regulator is connected to the output of the second adder. After adjusting the received signal, it outputs the second closed-loop control signal. One input of the third adder is connected to the output of the voltage regulator, and the other input is connected to the output of the feedforward signal generation unit. After accumulating the received signal, it outputs the closed-loop control signal.

[0021] As a further optimization scheme for improving the dynamic response rate of the primary-side feedback converter, the capacitance of the seventh capacitor is less than or equal to 4.7nF, the capacitance of the sixth capacitor is 10pF to 100pF, and the coefficient for proportionally amplifying the difference between the closed-loop control reference voltage signal and the extracted output capacitor voltage signal is selected based on the capacitance of the sixth capacitor.

[0022] As a further optimization scheme for improving the dynamic response rate of the primary-side feedback converter, when the converter is controlled by a digital control circuit, the feedforward signal generation unit is integrated into the main controller.

[0023] The present invention, by adopting the above technical solution, has the following beneficial effects:

[0024] (1) To address the defect that the output voltage change of the dual-clamp zero-voltage switching converter cannot be reflected in the clamping capacitor voltage in a timely manner under extreme operating conditions, the circuit proposed in this invention connects the output capacitor in series to the closed loop connected to the primary side ground, and uses one capacitor in the closed loop to reflect the real-time change of the output voltage. This avoids the disadvantage that the clamping capacitor voltage cannot reflect the output voltage in a real time when the primary and secondary sides are disconnected. The amplified signal of the difference between the clamping capacitor voltage sampling result and the closed-loop control reference voltage is used as one of the closed-loop control signals. Another closed-loop control signal is generated based on the difference between the clamping capacitor voltage sampling value and the closed-loop control reference voltage. After superimposing the two closed-loop control signals, a closed-loop control signal that can quickly respond to load changes can be obtained, thereby reducing the ripple level of the output voltage, significantly improving the tracking bandwidth of the converter, and enhancing the dynamic response rate of the converter.

[0025] (2) The circuit proposed in this invention directly samples the output capacitor voltage through the signal extraction unit and isolates and transmits the sampled output capacitor voltage to the primary side for primary side feedback control. The circuit unit uses a Y capacitor and a small capacitor that reflects the change of the output capacitor voltage to form a loop for sampling the output capacitor voltage. The signal isolation transmission is achieved by connecting the Y capacitor across the primary side ground and the secondary side ground. This can significantly reduce the size of the isolation device and hardly affect the power density of the system. It has the advantages of simple circuit and easy implementation. Each capacitor in the sampling output capacitor voltage loop does not require complex parameter matching and has the advantage of high flexibility in parameter selection.

[0026] (3) When using a digital control converter, the feedforward signal generation unit in the circuit proposed in this invention can be integrated into the main controller without the need for additional hardware circuits. Attached Figure Description

[0027] Figure 1 This is the circuit diagram of a dual-clamp zero-voltage switching converter.

[0028] Figure 2 This is a typical waveform diagram of a dual-clamp zero-voltage switching converter switching from no-load to full-load.

[0029] Figure 3 This is a block diagram of the circuit for improving the dynamic response rate of the primary-side feedback converter proposed in this invention.

[0030] Figure 4 This is a specific implementation circuit of the signal extraction module in the circuit proposed in this invention.

[0031] Figure 5 This is a typical waveform diagram of the output signal of the signal extraction module in the circuit proposed in this invention.

[0032] Figure 6 This is a specific implementation circuit of the feedforward signal generation module in the circuit proposed in this invention.

[0033] Figure 7 This is a complete control block diagram of the circuit proposed in this invention applied to a dual-clamp zero-voltage switching converter.

[0034] Figure 8(a) is a waveform diagram of the dynamic response of the dual-clamp zero-voltage switching converter when the capacitor C6 is 10pF in an embodiment of the present invention. Figure 8(b) is a waveform diagram of the dynamic response of the dual-clamp zero-voltage switching converter when the capacitor C6 is 100pF in an embodiment of the present invention.

[0035] Figure 9 Comparison of amplitude-frequency curves and phase-frequency curves of the open-loop gain of the converter before and after adding the circuit proposed in this invention.

[0036] Figure 10(a) shows the waveform of the converter switching between no-load and full-load before adding the circuit proposed in this invention, and Figure 10(b) shows the waveform of the converter switching between no-load and full-load after adding the circuit proposed in this invention.

[0037] Explanation of the labels in the diagram: Q1 to Q5 are the first to fifth switching transistors, T is the power transformer, and L... r For leakage sensing, C f For clamping capacitor, C o C5 is the output capacitor, C7 is the fifth to seventh capacitor, R1 to R4 is the first to fourth resistor, and Z1 is the Zener diode. Detailed Implementation

[0038] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0039] For primary-side feedback converters, the main reason affecting their dynamic response is that the sampled signal on the primary side cannot reflect changes in the controlled signal on the secondary side in a timely manner. The following explanation uses a dual-clamp zero-voltage switching converter as an example. It is worth noting that the proposed solution is applicable to all primary-side feedback converters. For dual-clamp zero-voltage switching converters, the worst-case operating condition is when the converter's load switches back and forth between no-load and full-load conditions, such as... Figure 2 As shown, at time t0, when the converter switches from full load to no load, the clamping capacitor voltage v c This will result in overshoot, and the amplitude will be higher than the closed-loop voltage V. ref At this time, under the action of the voltage regulator, the conduction time of the first switch Q1 will gradually decrease to 0, and then the first switch Q1 will remain off. Correspondingly, the third switch Q3 and the fifth switch Q5 will also remain off. At this time, the clamping capacitor C... f and output capacitor C o The converter will be in a natural discharge state. Due to the differences in capacity and load between the two, the natural discharge rate will also differ. At time t1, the converter switches from no-load to full-load. Since the clamping capacitor voltage v at this time... c Still higher than the closed-loop voltage Vref The first switch Q1 and the third switch Q3 on the primary side of the converter are still in the off state. At this time, the primary side of the converter will not provide the current required by the load to the secondary side. The load current is supplied by the output capacitor C. o Provides output voltage v o The output capacitance C decreases rapidly. o When the capacity is small, the output voltage v o It may decrease to 0; at time t2, the clamping capacitor voltage v c Natural discharge to closed-loop voltage V ref The first switch Q1 and the third switch Q3 on the primary side begin to operate according to the control logic, clamping the capacitor voltage v. c It will be quickly pulled down to the output voltage V. o The equivalent voltage referred to the primary side based on the turns ratio of the primary and secondary sides of the transformer ( Figure 2 The waveform shown is when the turns ratio of the primary and secondary sides of the transformer is 1, at which point the primary side of the converter begins to transfer energy to the secondary side.

[0040] Depend on Figure 2 It can be seen that during the t1 to t2 stage, the primary clamping capacitor voltage v c It does not reflect the secondary output voltage v o The change in voltage causes the converter to respond slowly to load step changes, resulting in a slower output voltage v. o The signal drops significantly. To enable the primary-side closed-loop control signal to quickly reflect changes in the secondary-side controlled signal and accelerate the converter's response to step loads, this invention proposes a fast dynamic response circuit based on Y-capacitor signal extraction, such as... Figure 3 As shown, it specifically includes a signal extraction unit and a feedforward signal generation unit. The signal extraction unit generates the output voltage v of the converter. o The change information is extracted, and the extracted signal v os The signal is fed into the feedforward signal generation unit, and the output signal v of the feedforward signal generation unit is... comp As one of the control signals of the converter.

[0041] It is worth noting that the reference potential of the input signal to the signal extraction unit is the secondary side ground potential of the converter, while the reference potential of the output signal is the primary side ground potential of the converter. Therefore, the signal extraction unit not only needs to extract the signal but also needs to isolate and transmit it. Typically, signal isolation and transmission require isolation devices such as transformers or optocouplers, but these devices are bulky and significantly reduce the power density of the converter. Therefore, this invention proposes a signal extraction circuit based on a Y-capacitor. The signal extraction circuit is as follows: Figure 4As shown, the circuit consists of resistors R1 and R2, capacitors C5, C6, and C7, and a Zener diode Z1. R1 and R2 are connected in series, with one end of R1 connected to one end of R2. C6 and R2 are connected in parallel. Z1 is connected in reverse parallel between the two terminals of C6. One terminal of C5 is connected to one end of R2, and one terminal of C7 is connected to the other end of R2. The signal extraction circuit has three input ports and one output port. The other terminal of C5 is input port ①, the other terminal of C7 is input port ②, the other end of R1 is input port ③, and the connection point of C6, R2, and Z1 is the output port. Input ports ① and ② are connected to the secondary output capacitor C1. o At both ends, input port ③ is connected to the primary clamping capacitor C. f The positive terminal, the signal output from the output port of the signal extraction circuit is v os , which serves as the input signal for the feedforward signal generation unit.

[0042] When the load of the converter undergoes a step change, the output capacitor C o voltage v o This will change accordingly. As the converter load increases, v o The greater the load change, the lower the value of v. o The faster the rate of decrease, the opposite is true. This is due to the fifth capacitor C5, the sixth capacitor C6, the seventh capacitor C7, and the output capacitor C... o This forms a closed loop. The capacitance values ​​of the fifth capacitor C5 and the seventh capacitor C7 are chosen to be much larger than the capacitance value of the sixth capacitor C6. At this point, the output capacitor C... o Most of the voltage changes will be reflected across the sixth capacitor C6, meaning that the voltage across the sixth capacitor C6 can reflect changes in the converter load and can be used for closed-loop control of the converter.

[0043] It is worth noting that because the capacitance of the sixth capacitor C6 is much smaller than that of the fifth capacitor C5, when the converter undergoes primary-secondary insulation withstand voltage testing, the terminals of the sixth capacitor C6 will be subjected to high voltage, which may cause damage to the device. Therefore, a Zener diode Z1 needs to be connected in parallel across the sixth capacitor C6 to prevent it from experiencing high voltage. The fifth capacitor C5 and the seventh capacitor C7 need to be Y capacitors with higher withstand voltage ratings. The first resistor R1 and the second resistor R2 provide a certain DC bias for the steady-state voltage of the sixth capacitor C6. The steady-state voltage of the sixth capacitor C6 and the closed-loop reference voltage V... ref2 The same applies. The time constants of the first resistor R1 and the sixth capacitor C6 need to be large enough to avoid clamping the capacitor voltage v. c The effect of transient process on the voltage of the sixth capacitor C6.

[0044] Figure 5 The simulation waveform of the signal extraction circuit is given. As shown in the figure, when the converter load switches from no load to full load, the output voltage v o It drops rapidly, while the clamping capacitor voltage v c After t d The output voltage V only becomes apparent after a certain period of time. o The change in t under these simulation conditions d ≈50μs; while the output signal v of the signal extraction circuit os It can quickly and accurately reflect the output voltage v o The drop response speed is much faster than the clamping capacitor voltage v. c The changes.

[0045] Figure 6 The circuit block diagram of the desired feedforward signal generation unit is given, which consists of a difference module and a proportional amplifier module. The difference module generates the closed-loop reference signal V. ref2 and the output signal v of the signal extraction circuit os The difference signal is then fed into a proportional amplifier module, where the amplification factor is K. v Therefore, the output signal v of the proportional amplifier module comp It can be represented as:

[0046] v comp =K v ·(V ref2 -v os (2)

[0047] Figure 7 A complete control block diagram for applying the proposed method to a dual-clamp zero-voltage switching converter is given. The resistor divider network formed by the third resistor R3 and the fourth resistor R4 controls the clamping capacitor voltage v. c Sampling is performed, and the sampling results are compared with the closed-loop reference voltage V. ref2 The difference between the two values ​​is compared and fed into the voltage regulator, whose output v is... err As one of the control signals in the closed loop of the system, v err This is the second closed-loop control signal.

[0048] The voltage division ratio of the first resistor R1 and the second resistor R2 is the same as the voltage division ratio of the third resistor R3 and the fourth resistor R4, that is:

[0049]

[0050] The signal extraction circuit measures the converter output voltage V. o The change information is extracted, and its output signal v osThe signal is fed into the feedforward signal generation circuit, and the output signal v of the feedforward signal generation circuit is... comp As one of the control signals in the closed loop of the system, v comp This is the first closed-loop control signal, and it is related to the output signal v of the voltage regulator. err After addition, the final system closed-loop control signal v is generated. c .

[0051] It is worth noting that when digital control is used, the feedforward signal generation circuit can be integrated into the main controller, thereby further simplifying the implementation circuit of the method proposed in this invention.

[0052] Due to leakage current limitations, the Y capacitor C7 connected between the primary and secondary terminals of the converter is typically selected with a capacitance of 4.7nF or less, while the Y capacitor C5 can be selected with a capacitance of around 1nF. The fifth capacitor C5, the sixth capacitor C6, and the seventh capacitor C7 are connected in series with the output capacitor C. o The voltage is divided to make the output capacitor C o The voltage change is mainly reflected in the sixth capacitor C6. Typically, the capacitance value of C6 is much smaller than that of C5 and C7. The capacitance value of C6 can be selected from 10pF to 100pF. The larger the capacitance value, the higher the corresponding amplification factor K. v It is also necessary to increase the capacitance to achieve a good dynamic response. Figure 8(a) shows the simulated waveform of the output dynamic response of the dual-clamp zero-voltage switching converter when C5 = C7 = 1nF and C6 is 10pF; Figure 8(b) shows the simulated waveform of the output dynamic response of the dual-clamp zero-voltage switching converter when C5 = C7 = 1nF and C6 is 100pF. Comparing Figure 8(a) and Figure 8(b), it can be seen that when C6 is selected with different capacitance values, the amplification factor K needs to be adjusted. v This allows the converter to achieve approximately the same dynamic response. In summary, the method proposed in this invention offers flexible selection of capacitor parameters, eliminating the need for precise parameter matching and facilitating implementation.

[0053] Figure 9 The amplitude-frequency and phase-frequency curves of the open-loop gain of the dual-clamp zero-voltage switching converter before and after incorporating the proposed method are presented. The solid and dashed lines represent the open-loop gains of the dual-clamp zero-voltage switching converter before and after incorporating the proposed method, respectively. The comparison shows that without the proposed method, the converter's cutoff frequency is 10kHz and the phase margin is 37°; after incorporating the proposed method, the cutoff frequency increases to 100kHz, and the phase margin becomes 45°. This indicates that incorporating the proposed method significantly improves the converter's tracking bandwidth and dynamic response.

[0054] To further verify the effectiveness of the proposed method and implementation circuit, a hardware experimental platform was built for verification. The input voltage range of the experimental prototype was 16-50V, the output voltage was 28V, and the full-load power was 320W. Figure 10(a) shows the dynamic waveform of the dual-clamp zero-voltage switching converter when the input voltage is 30V and the no-load / full-load switching occurs without the proposed method. At this time, the output voltage v o The overshoot and sag are 2.3V and 4V, respectively; Figure 10(b) shows the test waveforms under the same test conditions after incorporating the proposed method, and it can be found that the output voltage v o The overshoot and sag were only 0.8V and 1.1V, respectively, significantly reducing the output voltage overshoot and sag, thus verifying the effectiveness of the proposed method and implementation circuit. Compared to the simulation results, the output voltage v o The voltage drop is relatively larger, mainly due to the delay in digital control. Reducing the digital control delay can further reduce the output voltage V. o The magnitude of the drop.

[0055] In summary, the method and circuit proposed in this invention for improving the dynamic response rate of the primary-side feedback converter have the following advantages: (1) It can significantly improve the tracking bandwidth of the converter and enhance the dynamic response rate of the converter; (2) The proposed circuit is simple, easy to implement, and does not require complex parameter matching and selection, and the parameter selection is highly flexible; (3) Compared with the scheme of signal isolation transmission through optocouplers or transformers, the signal isolation transmission method based on Y capacitors proposed in this invention can significantly reduce the size of the isolation device and hardly affect the power density of the system. In particular, when the converter adopts digital control, the feedforward signal generation unit can be directly integrated into the main controller without additional hardware circuits; (4) Compared with the method of sampling the primary-side signal to improve the converter dynamics, the output signal of the signal extraction circuit responds more quickly to the change of the output voltage, and based on this signal, the improvement of the converter dynamics is more obvious.

Claims

1. A method for improving the dynamic response rate of a primary-side feedback converter, the primary-side feedback converter comprising first to fourth switching transistors, secondary-side switching transistors, a power transformer, a clamping capacitor, and an output capacitor, wherein the first and second switching transistors are connected in series to form a first bridge arm, the third and fourth switching transistors are connected in series to form a second bridge arm, the first bridge arm is connected to a DC voltage, the clamping capacitor is connected in parallel across the two ends of the second bridge arm, the primary winding of the power transformer is connected between the midpoint of the first and second bridge arms, and the output capacitor is connected in parallel across the two ends of the branch formed by the secondary winding of the power transformer and the secondary-side switching transistors of the converter, characterized in that... The method is specifically as follows: Extract the output capacitor voltage and isolate and transmit the extracted output capacitor voltage signal to the primary side of the converter. The first closed-loop control signal is generated based on the difference between the closed-loop control reference voltage signal and the extracted output capacitor voltage signal. The second closed-loop control signal is generated based on the difference between the closed-loop control reference voltage signal and the clamping capacitor voltage sampling signal. The first and second closed-loop control signals are summed to obtain the closed-loop control signal. The control signals for the four primary-side switches of the converter are generated based on the input voltage, the closed-loop control signal, and the voltage at the midpoint of the bridge arm composed of the third and fourth switches. The control signals for the secondary-side switches are generated based on the voltage between the source and drain of the secondary-side switches.

2. A circuit for improving the dynamic response rate of a primary-side feedback converter, the primary-side feedback converter comprising first to fourth switching transistors, a secondary-side switching transistor, a power transformer, a clamping capacitor, and an output capacitor, wherein the first and second switching transistors are connected in series to form a first bridge arm, the third and fourth switching transistors are connected in series to form a second bridge arm, the first bridge arm is connected to a DC voltage, the clamping capacitor is connected in parallel across the two ends of the second bridge arm, the primary winding of the power transformer is connected between the midpoint of the first bridge arm and the midpoint of the second bridge arm, and the output capacitor is connected in parallel across the two ends of the branch formed by the secondary winding of the power transformer and the secondary-side switching transistor of the converter, characterized in that... The circuit includes: The signal extraction unit has its first input port connected to the positive plate of the output capacitor, its second input port connected to the secondary ground along with the negative plate of the output capacitor, and its third input port connected to the positive plate of the clamping capacitor, transmitting the extracted output capacitor voltage signal to the primary side of the converter. The feedforward signal generation unit receives the extracted output capacitor voltage signal at its input terminal, performs proportional amplification on the difference between the closed-loop control reference voltage signal and the extracted output capacitor voltage signal, and outputs the first closed-loop control signal. A clamping capacitor voltage sampling unit is connected between the two plates of the clamping capacitor and outputs a clamping capacitor voltage sampling signal; and, The main controller has one input terminal connected to the output terminal of the clamping capacitor voltage sampling unit, and its other input terminal receiving the first closed-loop control signal. It processes the difference between the closed-loop control reference voltage signal and the clamping capacitor voltage sampling signal to obtain the second closed-loop control signal. It accumulates the first closed-loop control signal and the second closed-loop control signal to output the closed-loop control signal. It generates the control signals for the four primary-side switches of the converter based on the input voltage, the closed-loop control signal, and the voltage at the midpoint of the bridge arm composed of the third and fourth switches. It generates the control signals for the secondary-side switches based on the voltage between the source and drain of the secondary-side switches.

3. The circuit for improving the dynamic response rate of a primary-side feedback converter according to claim 2, characterized in that, The signal extraction unit includes: a fifth capacitor, a sixth capacitor, a seventh capacitor, a first resistor, a second resistor, and a Zener diode. The positive plate of the fifth capacitor serves as the first input port and is connected to the positive plate of the output capacitor. The negative plate of the fifth capacitor, one end of the first resistor, one end of the second resistor, the positive plate of the sixth capacitor, and the cathode of the Zener diode are connected to form a port for transmitting the extracted output capacitor voltage signal to the primary side of the converter. The other end of the first resistor serves as the third input port and is connected to the positive plate of the clamping capacitor. The other end of the second resistor, the negative plate of the sixth capacitor, the anode of the Zener diode, and the positive plate of the seventh capacitor are all connected to the primary side ground. The negative plate of the seventh capacitor serves as the second input port and is connected to the secondary side ground along with the negative plate of the output capacitor. Both the fifth and seventh capacitors are Y capacitors, and their capacitance values ​​are equal, with the capacitance value of the fifth capacitor being greater than that of the sixth capacitor.

4. The circuit for improving the dynamic response rate of a primary-side feedback converter according to claim 2 or 3, characterized in that, The feedforward signal generation unit includes: The first adder has one input connected to the output of the signal extraction unit and the other input connected to the closed-loop reference voltage signal. It outputs the difference between the closed-loop control reference voltage signal and the extracted output capacitor voltage signal; and... A proportional amplifier, whose input is connected to the output of the first adder, outputs a first closed-loop control signal.

5. A circuit for improving the dynamic response rate of a primary-side feedback converter according to claim 2 or 3, characterized in that, The clamping capacitor voltage sampling unit includes a third resistor and a fourth resistor. One end of the third resistor is connected to the positive plate of the clamping capacitor, and the other end of the third resistor is connected to one end of the fourth resistor as the output terminal. The other end of the fourth resistor and the negative plate of the clamping capacitor are connected to the primary ground.

6. The circuit for improving the dynamic response rate of a primary-side feedback converter according to claim 2 or 3, characterized in that, The main controller includes: The second adder has one input terminal connected to the output terminal of the clamping capacitor voltage sampling circuit, and the other input terminal connected to the closed-loop control reference voltage signal. It outputs the difference between the closed-loop control reference voltage signal and the clamping capacitor voltage sampling signal. A voltage regulator, whose input is connected to the output of a second adder, outputs a second closed-loop control signal; and, The third adder has one input terminal connected to the output terminal of the voltage regulator and the other input terminal connected to the output terminal of the feedforward signal generation unit. It accumulates the first closed-loop control signal and the second closed-loop control signal and outputs the closed-loop control signal.

7. The circuit for improving the dynamic response rate of a primary-side feedback converter according to claim 3, characterized in that, The capacitance of the seventh capacitor is less than or equal to 4.7nF, and the capacitance of the sixth capacitor is 10pF to 100pF. The coefficient for proportionally amplifying the difference between the closed-loop control reference voltage signal and the extracted output capacitor voltage signal is selected based on the capacitance of the sixth capacitor.

8. The circuit for improving the dynamic response rate of a primary-side feedback converter according to claim 2, characterized in that, When a digital control circuit is used to control the converter, the feedforward signal generation unit is integrated into the main controller.

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