Display panel and display device

Abstract

An embodiment of the present application provides a display panel and a display device. The display panel sets a compensation unit in an invalid pixel area so that the compensation unit can replace the invalid pixels, thereby avoiding increasing the area of ​​the transition area of ​​the display panel. Since the compensation unit is not set in the winding area, the data lines in the winding area can be set in each metal layer for winding, thereby reducing the area of ​​the winding area, further reducing the area of ​​the transition area, and reducing the area of ​​the black border between the display area and the opening area. At the same time, the compensation unit includes a compensation trace set in the second metal layer, so that the projection of the compensation trace on the substrate overlaps with the projection of the first scanning line on the substrate, so that the voltage drop of the first scanning line in the row where the opening area is located can be compensated to avoid uneven display.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the development of display technology, in order to increase the screen-to-body ratio, existing display devices will dig holes in the display devices and set electronic components in the hole area, so that there is no need to set a frame, which can reduce the frame of the display panel and increase the screen-to-body ratio. However, in the display device, since there are no pixels in the hole area, the voltage drop of the scanning line of the pixels in the row where the hole area is located is smaller than the voltage drop of the scanning line of the pixels in the row where the non-hole area is located. When displaying, uneven display will occur due to the different voltage drops of the scanning lines in the hole area and the row where the non-hole area is located. Figure 1 , Figure 2 , Figure 3 As shown, Figure 3 (a) is a perspective view of the compensation unit. Figure 3 (b) is a decomposition diagram of the compensation unit. In order to solve the problem of uneven display, the existing display device 1 sets a compensation unit in the winding area 13 surrounding the hole-punching area 12. By setting a power signal line 142 in the first source-drain layer, the power signal line 142 forms a capacitor with the scanning line 141 of the second gate layer, thereby increasing the voltage drop of the scanning line in the row where the hole-punching area 12 is located, avoiding uneven display. However, this design will cause the compensation unit to occupy too much area of ​​the winding area 13. In order to make the data line 143 avoid the hole-punching area 12, the area of ​​the winding area 13 can only be increased, resulting in a larger width of the winding area 13, thereby resulting in a larger black border between the hole-punching area 12 and the display area 11.

[0003] Therefore, the existing display device has a technical problem that the compensation unit occupies a large area of ​​the winding area, resulting in a large black border between the hole area and the display area. Summary of the invention

[0004] Embodiments of the present application provide a display panel and a display device, which are used to alleviate the technical problem of a large black border between a hole area and a display area caused by a large area of ​​a winding area occupied by a compensation unit in an existing display device.

[0005] An embodiment of the present application provides a display panel, which includes a display area, an opening area, and a transition area between the display area and the opening area. The display panel includes:

[0006] substrate;

[0007] A first metal layer, disposed on one side of the substrate, the first metal layer comprising a first scanning line;

[0008] A second metal layer is disposed on a side of the first metal layer away from the substrate;

[0009] A source-drain electrode layer, arranged on a side of the second metal layer away from the first metal layer;

[0010] The transition area includes an invalid pixel area and a winding area, the winding area is arranged between the invalid pixel area and the opening area, the invalid pixel area is provided with a compensation unit, the compensation unit at least includes a compensation line arranged on the second metal layer, and the projection of the compensation line on the substrate overlaps with the projection of the first scanning line on the substrate

[0011] In some embodiments, the compensation unit further includes a power high potential signal line, at least a portion of the power high potential signal line is disposed in the second metal layer, and the power high potential signal line is connected to the compensation line.

[0012] In some embodiments, the source and drain layer includes a first source and drain layer and a second source and drain layer, the display panel also includes a first planarization layer, the second source and drain layer is arranged on a side of the first source and drain layer away from the second metal layer, the first planarization layer is arranged between the first source and drain layer and the second source and drain layer, the power high-potential signal line includes a first power high-potential signal line located in the second metal layer and a second power high-potential signal line located in the first source and drain layer, the first power high-potential signal line is connected to the compensation routing, and the second power high-potential signal line is connected to the compensation routing through a via in the interlayer insulating layer.

[0013] In some embodiments, the display panel further includes an interlayer insulating layer, wherein the interlayer insulating layer is disposed between the first source and drain electrode layer and the second metal layer, and the compensation unit further includes:

[0014] A second scanning line is disposed in the first metal layer and is insulated from the first scanning line;

[0015] Initialization signal lines, including a first initialization signal line and a second initialization signal line, wherein the first initialization signal line is arranged in the second metal layer, the second initialization signal line is arranged in the first source-drain layer, and the second initialization signal line passes through a via hole in the interlayer insulating layer and is connected to the first initialization signal line;

[0016] A light emitting control signal line, arranged in the first metal layer;

[0017] The first data line is arranged on the second source-drain electrode layer.

[0018] In some embodiments, the display panel also includes a second data line arranged in the winding area, the second data line includes a first part arranged in the second source and drain layer and a second part arranged in the first source and drain layer, and the first part is connected to the second part through a via hole in the first planarization layer.

[0019] In some embodiments, the display panel further includes a first gate insulating layer, a second gate insulating layer and an interlayer insulating layer, the first gate insulating layer is arranged between the first metal layer and the substrate, the second gate insulating layer is arranged between the first metal layer and the second metal layer, the interlayer insulating layer is arranged between the second metal layer and the first source and drain layer, the second data line further includes a third part and a fourth part, the third part is arranged in the second metal layer, the fourth part is arranged in the first metal layer, the second part is connected to the third part through a via hole in the interlayer insulating layer, and the third part is connected to the fourth part through a via hole in the second gate insulating layer.

[0020] In some embodiments, the display area is provided with display pixels, the invalid pixel area is provided with invalid pixels, and the invalid pixels are arranged between the display pixels and the compensation unit.

[0021] In some embodiments, the display panel further includes an active layer, the active layer includes an active pattern, and a projection area of ​​the active pattern in the invalid pixel on the substrate is larger than a projection area of ​​the active pattern in the compensation unit on the substrate.

[0022] In some embodiments, the display area is arranged around the opening area, and the shape of the opening area includes at least one of a racetrack shape, a circular shape, and a square shape.

[0023] In some embodiments, along the setting direction of the first scan line, the compensation unit is arranged at two sides of the opening area.

[0024] In one embodiment, the display panel includes a plurality of rows of first scan lines, and in the transition region, the overlapping areas of projections of the first scan lines of different rows on the substrate and the projections of the compensation lines on the substrate are different.

[0025] In one embodiment, the display panel includes a plurality of rows of first scan lines, and in the transition region, different rows of first scan lines correspond to different numbers of compensation units.

[0026] At the same time, an embodiment of the present application provides a display device, which includes a display panel and an electronic component as described in any of the above embodiments.

[0027] Beneficial effects: The embodiments of the present application provide a display panel and a display device, wherein the display panel includes a display area, an opening area, and a transition area between the display area and the opening area, wherein the display panel includes a substrate, a first metal layer, a second metal layer, and a source-drain layer, wherein the first metal layer is arranged on one side of the substrate, the first metal layer includes a first scanning line, the second metal layer is arranged on a side of the first metal layer away from the substrate, and the source-drain layer is arranged on a side of the second metal layer away from the first metal layer, wherein the transition area includes an invalid pixel area and a winding area, the winding area is arranged between the invalid pixel area and the opening area, the invalid pixel area is provided with a compensation unit, the compensation unit at least includes a compensation trace arranged on the second metal layer, and a projection of the compensation trace on the substrate overlaps with a projection of the first scanning line on the substrate. The present application sets the compensation unit in the invalid pixel area so that the compensation unit can replace the invalid pixels, thereby avoiding increasing the area of ​​the transition zone of the display panel. Since the compensation unit will not be set in the winding area, the data lines in the winding area can be set in each metal layer for winding, thereby reducing the area of ​​the winding area, further reducing the area of ​​the transition zone, and reducing the area of ​​the black border between the display area and the opening area. At the same time, the compensation unit includes a compensation trace set on the second metal layer, so that the projection of the compensation trace on the substrate coincides with the projection of the first scanning line on the substrate, so that the voltage drop of the first scanning line in the row where the opening area is located can be compensated to avoid uneven display. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The technical solution and other beneficial effects of the present application will be made apparent by describing in detail the specific implementation methods of the present application in conjunction with the accompanying drawings.

[0029] Figure 1 A schematic diagram of an existing display device.

[0030] Figure 2 It is a perspective view of a conventional display device.

[0031] Figure 3 The figures are a perspective view and an exploded view of a compensation unit of a conventional display device.

[0032] Figure 4 A schematic diagram of a display panel provided in an embodiment of the present application.

[0033] Figure 5 A cross-sectional view of a display panel provided in an embodiment of the present application.

[0034] Figure 6 A perspective view of a compensation unit of a display panel provided in an embodiment of the present application.

[0035] Figure 7 for Figure 6 Exploded view of the compensation unit in .

[0036] Figure 8A circuit diagram of a pixel driving circuit of a display panel provided in an embodiment of the present application.

[0037] Fig. 9 A perspective view of an invalid pixel of a display panel provided in an embodiment of the present application.

[0038] Fig.10 A perspective view of the upper left side of the opening area of ​​the display panel provided in an embodiment of the present application.

[0039] Fig.11 A perspective view of the lower left side of the opening area of ​​the display panel provided in an embodiment of the present application.

[0040] Fig.12 It is a perspective view of the upper left side of the hole-digging area of ​​a conventional display device.

[0041] Fig.13 It is a perspective view of the lower left side of the hole-digging area of ​​a conventional display device.

[0042] Fig.14 This is a timing diagram of the pixel driving circuit provided in an embodiment of the present application.

[0043] Fig.15 This is a perspective view of an actual product of a conventional display device.

[0044] Fig.16 A perspective view of an actual product of a display panel provided in an embodiment of the present application.

[0045] Fig.17 A comparison diagram of a capacitance change curve of a first scan line of a display panel provided in an embodiment of the present application and a capacitance change curve of a scan line in an existing display device. DETAILED DESCRIPTION

[0046] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0047] In order to solve the technical problem that a compensation unit of an existing display device occupies a large area of ​​the winding area, resulting in a large black border between the hole area and the display area, the embodiments of the present application provide a display panel and a display device to alleviate the above technical problem.

[0048] like Figures 4 to 7As shown, an embodiment of the present application provides a display panel, the display panel 2 includes a display area 411, an opening area 418, and a transition area 412 located between the display area 411 and the opening area 418, and the display panel 2 includes:

[0049] Substrate 21;

[0050] A first metal layer 25 is disposed on one side of the substrate 21, and the first metal layer 25 includes a first scanning line 251;

[0051] A second metal layer 27, disposed on a side of the first metal layer 25 away from the substrate 21;

[0052] A source-drain electrode layer 35 is disposed on a side of the second metal layer 27 away from the first metal layer 25;

[0053] Among them, the transition zone 412 includes an invalid pixel area 413 and a winding area 414, the winding area 414 is arranged between the invalid pixel area 413 and the opening area 418, the invalid pixel area 413 is provided with a compensation unit 42, and the compensation unit 42 at least includes a compensation trace 271 arranged on the second metal layer 27, and the projection of the compensation trace 271 on the substrate 21 overlaps with the projection of the first scanning line 251 on the substrate 21.

[0054] An embodiment of the present application provides a display panel, which sets a compensation unit in an invalid pixel area so that the compensation unit can replace the invalid pixels, thereby avoiding increasing the area of ​​the transition zone of the display panel. Since the compensation unit is not set in the winding area, the data lines in the winding area can be set in each metal layer for winding, thereby reducing the area of ​​the winding area, further reducing the area of ​​the transition area, and reducing the area of ​​the black border between the display area and the opening area. At the same time, the compensation unit includes a compensation trace set on the second metal layer, so that the projection of the compensation trace on the substrate overlaps with the projection of the first scanning line on the substrate, so that the voltage drop of the first scanning line in the row where the opening area is located can be compensated to avoid uneven display.

[0055] Specifically, Figure 7 for Figure 6 Exploded view of the compensation unit in Figure 7 (a) in the equation is Figure 6 Exploded view of the active layer of the compensation unit in Figure 7 (b) in the equation is Figure 6 An exploded view of the first metal layer of the compensation unit in Figure 7 (c) in Figure 6 An exploded view of the second metal layer of the compensation unit in Figure 7 (d) in Figure 6 Exploded view of the vias in the compensation unit, Figure 7 The (e) in Figure 6 An exploded view of the first source-drain layer of the compensation unit in FIG. Figure 7 Where (f) is Figure 6 An exploded view of the second source-drain layer of the compensation unit in FIG.

[0056] It should be noted that, although the structures of the parts of the same routing line in different pixel units or compensation units are different, for example, the structure of the part of the first scanning line 251 located in the compensation unit 42 is different from the structure of the part of the first scanning line 251 located in the invalid pixel 43, since these two parts are just multiple parts of the first scanning line, the routing line is still represented by the same number, for example, Figure 6 In the compensation unit 42, the first scanning line is indicated by reference numeral 251. Fig. 9 The invalid pixel 43 in the first scanning line is also represented by the reference numeral 251. Similarly, for other lines, the same reference numeral is used to represent the same line. At the same time, the same reference numeral is used to represent the same type of line in the embodiment of the present application, for example Figure 6 The compensation unit 42 in the embodiment is denoted by reference numeral 321 as the first data line, Fig. 9 The invalid pixel 43 in the figure is also represented by the first data line with the reference numeral 321. The reference numerals of other lines can be similar to the first scan line and the first data line, and will not be repeated here.

[0057] It should be noted that in order to illustrate the different design from the existing display device, the embodiment of the present application defines the data line that needs to be wound as the second data line, and the data line that does not need to be wound as the first data line, and uses different labels for description. However, it should be noted that both transmit data signals.

[0058] It should be noted that, since the embodiments of the present application respectively illustrate the circuit design in the embodiments of the present application with a circuit diagram and a perspective view, the same routing line will be described with different reference numerals. Figure 6 The first scanning line is indicated by reference numeral 251. Figure 8 The first scan line is represented by the label Scan(n).

[0059] Specifically, Figures 6 to 9 As shown, taking the n-th level gate driving circuit as an example, the first scanning line 251 refers to the scanning line of the n-th level gate driving circuit. Figure 8 The label is Scan (n).

[0060] Specifically, Figure 6 , Figure 8 , Fig. 9 As shown, Figure 5By making the projections of the first scan line 251 and the compensation line 271 on the substrate overlap, the first scan line 251 and the compensation line 271 form a capacitor in the compensation unit, and the impedance of the first scan line is increased by the capacitor to compensate the first scan line 251. Fig. 9 In the embodiment, the first plate of the storage capacitor C is formed by the first metal layer, and the second plate 274 of the storage capacitor is formed by the second metal layer. The plates of the two capacitors are different, so the structures of the two capacitors are different, and the functions of the two capacitors are different. Figure 6 and Fig. 9 It can be seen that the area of ​​the first scan line 251 located in the compensation unit is larger than the area of ​​the first scan line 251 located in the invalid pixel, so the first scan line can be compensated by adjusting the capacitance of the compensation unit.

[0061] It should be noted that in Figure 5 and Figure 8 The structures of some adjacent pixel units or compensation units are shown in FIG. Figure 5 and Figure 8 There will be some repeated structures, such as Figure 5 There are two second scanning lines 252 in the figure. Actually, the two second scanning lines 252 belong to the compensation unit and the compensation unit or pixel unit adjacent to the compensation unit, which will not be described in detail in the following embodiments.

[0062] It should be noted that Fig. 9 The structural design of the invalid pixel is shown in the figure, but it can be understood that the difference between the display pixel and the invalid pixel is that the invalid pixel does not have a light-emitting unit, and the structural design of other film layers of the display pixel in the display area (including the active layer to the second source and drain layer) is the same as the structural design of the invalid pixel. In the following embodiments, the structural design of other film layers of the display pixel is the same as the structural design of the invalid pixel for detailed description.

[0063] In one embodiment, the first scan line extends from the display area to the transition area, and the scan lines on both sides of the opening area are disconnected, the compensation unit includes a compensation capacitor, the compensation capacitor includes a first electrode plate and a second electrode plate, the first scan line includes a first electrode plate that coincides with the projection of the compensation line on the substrate, and the compensation line includes a second electrode plate that coincides with the projection of the first scan line on the substrate. By extending the first scan line upward to form the first electrode plate and the compensation line to form the second electrode plate, the voltage drop of the first scan line in the row where the opening area is located can be compensated by the compensation capacitor to avoid uneven display.

[0064] Specifically, when the first scan line extends from the display area to the transition area and is disconnected in the transition area, the first scan line is extended to both sides to form a first plate of the compensation capacitor, and the compensation line is used to form a second plate of the compensation capacitor. The compensation capacitor is set in the invalid pixel area, and the compensation unit can replace the invalid pixels to avoid increasing the area of ​​the transition area of ​​the display panel. Since the compensation unit will not be set in the winding area, the data lines in the winding area can be set in each metal layer for winding, which reduces the area of ​​the winding area, further reduces the area of ​​the transition area, and reduces the area of ​​the black border between the display area and the opening area.

[0065] Specifically, when the first scan line extends from one side of the display area to one side of the transition area, and winds from one side of the transition area to the other side of the transition area, the first scan line on one side can be disconnected, so that the first scan line extends to both sides to form a first plate of the compensation capacitor, and the compensation line forms a second plate of the compensation capacitor, so that the compensation capacitor is set in the invalid pixel area to compensate for the voltage drop of the first scan line and avoid uneven display.

[0066] Specifically, due to the pixel missing in the row where the opening area is located, no matter the first scan line is disconnected in the transition area or the first scan line is connected by winding in the transition area, the capacitance of the first scan line in the row where the opening area is located is smaller than the capacitance of the first scan line in the row where the non-opening area is located due to the pixel missing, that is, the voltage drop of the first scan line in the row where the opening area is located is smaller than the capacitance of the first scan line in the row where the non-opening area is located. For the above problem, the embodiment of the present application disconnects the first scan line in the invalid pixel area, so that the first scan line and the compensation wiring form a compensation capacitor, and the voltage drop of the first scan line is compensated to avoid uneven display.

[0067] In one embodiment, if Figure 6 , Figure 7 As shown, the compensation unit 42 further includes a power supply high potential signal line 421, at least a portion of which is disposed on the second metal layer 27, and the power supply high potential signal line 421 is connected to the compensation wiring 271. By connecting the power supply high potential signal line to the compensation wiring, when a capacitor is formed with the first scanning line through the compensation wiring, the two plates of the capacitor are respectively connected to the power supply high potential signal line and the first scanning line, and the first scanning line needs to charge the capacitor, thereby increasing the impedance of the first scanning line, so that the impedance of the scanning line in the row where the opening area is located is close to or even the same as that of the scanning lines in other rows, thereby avoiding the problem of uneven display.

[0068] In one embodiment, if Figures 5 to 7As shown, the source-drain layer 35 includes a first source-drain layer 29 and a second source-drain layer 32, the display panel 2 also includes a first planarization layer 31, the second source-drain layer 32 is arranged on the side of the first source-drain layer 29 away from the second metal layer 27, the first planarization layer 31 is arranged between the first source-drain layer 29 and the second source-drain layer 32, the power high-potential signal line 421 includes a first power high-potential signal line 272 located in the second metal layer 27 and a second power high-potential signal line 291 located in the first source-drain layer 29, the first power high-potential signal line 272 is connected to the compensation line 271, and the second power high-potential signal line 291 is connected to the compensation line 271 through the via of the interlayer insulating layer 28. The first power supply high potential signal line is directly connected to the compensation line, and the second power supply high potential signal line is connected to the compensation line through a via, so that the potentials of the compensation line, the first power supply high potential signal line, and the second power supply high potential signal line are the same. The first scanning line is compensated by making the compensation line maintain the potential of the voltage signal output by the power supply high potential signal line, and the setting method of the first power supply high potential signal line and the second power supply high potential signal line is the same as the setting method of the invalid pixel and the normally displayed pixel unit, so as to avoid poor display due to process differences.

[0069] Specifically, Figure 7 (d) in FIG. 4 shows the position of each via hole 431 , but the via hole is not limited to being located in a certain layer. The via hole 431 may be a via hole in the first planarization layer or a via hole in the interlayer insulating layer.

[0070] It should be noted that, although the first power supply high potential signal line and the compensation line are described with different labels, Figure 6 and Figure 7 It can be seen that in actual design, the first power supply high potential signal line 272 and the compensation line 271 are different parts of the same line.

[0071] Specifically, Figures 6 to 9 It can be seen that the setting method of the high-potential power signal line 421 in the compensation unit 42 is the same as the setting method of the high-potential power signal line 421 of the invalid pixel 43, so that when the high-potential power signal line is formed, poor display will not occur due to the difference between the process of the compensation unit and the process of other pixel units, thereby improving the display effect of the display panel.

[0072] In one embodiment, if Figures 5 to 7 As shown, the display panel 2 further includes an interlayer insulating layer 28, and the interlayer insulating layer 28 is arranged between the first source and drain electrode layer 29 and the second metal layer 27, and the compensation unit 42 further includes:

[0073] A second scanning line 252 is disposed on the first metal layer 25 and is insulated from the first scanning line 251;

[0074] The initialization signal line 422 includes a first initialization signal line 273 and a second initialization signal line 292, wherein the first initialization signal line 273 is disposed on the second metal layer 27, the second initialization signal line 292 is disposed on the first source-drain electrode layer 29, and the second initialization signal line 292 passes through a via hole of the interlayer insulating layer 28 and is connected to the first initialization signal line 273;

[0075] A light emitting control signal line 253, provided on the first metal layer 25;

[0076] The first data line 321 is disposed on the second source-drain electrode layer 32 .

[0077] Specifically, the embodiment of the present application designs a second scan line, an initialization signal line, a light control signal line, and a first data line in the compensation unit so that the film layer design of the compensation unit is the same as that of the invalid pixel and the display pixel, thereby avoiding the problem of poor display caused by the different processes of the compensation unit and other pixel units.

[0078] Specifically, from Figure 6 , Figure 8 and Fig. 9 It can be seen that the first scan line 251 and the second scan line 252 are set in the pixel driving circuit to control the transistors respectively. In the embodiment of the present application, the second scan line 252 is set in the compensation unit so that the process of the scan line of the compensation unit is the same as the process of the scan line of other pixel units, thereby avoiding poor display caused by different film thicknesses and different processes.

[0079] Specifically, from Figure 6 , Figure 8 and Fig. 9 It can be seen that the pixel driving circuit includes an initialization signal line, a light-emitting control signal line and a first data line. The embodiment of the present application sets the initialization signal line 422, the light-emitting control signal line 253 and the first data line 321 in the compensation unit, so that the process of the initialization signal line, the light-emitting control signal line and the first data line of the compensation unit is the same as the process of the initialization signal line, the light-emitting control signal line and the first data line of other pixel units, thereby avoiding poor display caused by different film thicknesses and different processes.

[0080] In one embodiment, if Figure 5As shown, the display panel 2 further includes a second data line 322 disposed in the winding area 414, the second data line 322 includes a first portion 322a disposed in the second source-drain electrode layer 32 and a second portion 322b disposed in the first source-drain electrode layer 29, the first portion passing through the via hole of the first planarization layer 31 and connected to the second portion 322b. By providing the first source-drain electrode layer and the second source-drain electrode layer for the second data line, when the second data line is wound, the second data line can be wound from the first source-drain electrode layer and the second source-drain electrode layer, and accordingly the required width for winding can be reduced, thereby reducing the area of ​​the winding area and reducing the black edge between the display area and the opening area.

[0081] Specifically, in Figure 5 The first part 322a and the second part 322b are not connected in the embodiment, but in actual design, for the second data line that needs to be transferred to the first source and drain layer for winding, the first part 322a and the second part 322b can be connected, and for the second data line that is directly wound on the second source and drain layer, it does not need to be transferred to the first source and drain layer, and can be directly wound on the second source and drain layer. Therefore, Figure 5 The first part 322a and the second part 322b are not directly connected, and the first part and the second part can be connected or not connected according to the actual design of the second data line. Similarly, the design of the third part and the fourth part can also refer to the first part and the second part, which will not be repeated here.

[0082] Specifically, in the existing display device, since the compensation unit is arranged in the winding area, the compensation unit will occupy the first source and drain layer and the second metal layer, and the scan line needs to be wound in the winding area, resulting in that the data line can only be wound in the second source and drain layer. The winding area needs to provide space for the compensation unit and the data line, resulting in the width of the winding area being too large. The present application reduces the width of the winding area by arranging the compensation unit in the invalid pixel area, and further allows the second data line to be wound in the first source and drain layer and the second source and drain layer, further reducing the width of the second data line that needs to be wound, and further reducing the width of the winding area, thereby reducing the black border between the display area and the opening area.

[0083] In one embodiment, if Figure 5As shown, the display panel 2 also includes a first gate insulating layer 24, a second gate insulating layer 26 and an interlayer insulating layer 28, the first gate insulating layer 24 is arranged between the first metal layer 25 and the substrate 21, the second gate insulating layer 26 is arranged between the first metal layer 25 and the second metal layer 27, the interlayer insulating layer 28 is arranged between the second metal layer 27 and the first source and drain layer 29, the second data line 322 also includes a third part 322c and a fourth part 322d, the third part 322c is arranged on the second metal layer 27, the fourth part 322d is arranged on the first metal layer 25, the second part 322b is connected to the third part 322c through the via hole of the interlayer insulating layer 28, and the third part 322c is connected to the fourth part 322d through the via hole of the second gate insulating layer 26. By setting the second data line in the first source and drain layer, the second source and drain layer, the first metal layer and the second metal layer, when the second data line is wound, the second data line can be wound from the first source and drain layer, the second source and drain layer, the first metal layer and the second metal layer, which can correspondingly reduce the width required for winding, thereby reducing the area of ​​the winding area and reducing the black border between the display area and the opening area.

[0084] Specifically, the above embodiments are described in detail by taking the example that the second data line is arranged in the first source and drain layer, the second source and drain layer, or the second data line is arranged in the first source and drain layer, the second source and drain layer, the first metal layer and the second metal layer, but the embodiments of the present application are not limited to this. For example, the second data line can be arranged in the first source and drain layer, the second source and drain layer and the first metal layer.

[0085] In one embodiment, if Figure 5 , Fig.10 , Fig.11 As shown, the display area 411 is provided with display pixels 44, the invalid pixel area 413 is provided with invalid pixels 43, and the invalid pixels 43 are arranged between the display pixels 44 and the compensation unit 42. By arranging the invalid pixels between the compensation unit and the display pixels, the invalid pixels can transition the display pixels, thereby avoiding poor display caused by inconsistency of electrical signals, film thickness, etc. between the display area and the non-display area. At the same time, the compensation unit is arranged on the side of the invalid pixel close to the opening area, so that when compensation is performed by the compensation unit, the compensation unit will not affect the transition effect of the invalid pixel, so that the display panel can display normally.

[0086] Specifically, Figures 10 to 13 As shown, Fig.10 A perspective view of the upper left side of the opening area of ​​the display panel provided in an embodiment of the present application, Fig.11 A perspective view of the lower left side of the opening area of ​​the display panel provided in an embodiment of the present application, Fig.12It is a perspective view of the upper left side of the hole area of ​​the existing display device. Fig.13 A perspective view of the lower left side of the hole area of ​​a conventional display device, from Figures 11 to 13 It can be seen that the invalid pixel unit 52 of the existing display device is arranged adjacent to the normal display pixel unit 53, and the compensation unit 51 of the existing display device is arranged in the winding area. The compensation unit 51 needs to occupy the space of the winding area, resulting in a larger width of the winding area. From the perspective view of the display panel provided in the embodiment of the present application, it can be seen that the compensation unit 42 provided in the embodiment of the present application is arranged in the invalid pixel area and is arranged adjacent to the invalid pixel 43, so that the width of the winding area can be reduced, and the compensation unit 42 can replace the invalid pixel 43, and will not increase the width of the invalid pixel area, thereby reducing the black border between the display area and the opening area.

[0087] Specifically, when setting the compensation unit, the number of compensation units can be set according to different compensation effects. Fig.17 Taking the compensation curve shown as an example, except for the compensation capacitor of the last row of scan lines, the compensation capacitors of other rows of scan lines are basically the same. Therefore, the size and number of compensation capacitors of each row of scans can be made consistent. For example, 4 columns of compensation units are set for the 40th to 79th rows of scan lines, and 2 columns of compensation units are set for the 80th row of scan lines, so that the voltage drop of each row of scan lines is consistent, improving the display uniformity. And the compensation units in the same row of scan lines can be set on both sides of the opening area. For example, for the 40th row of scan lines, 2 columns of compensation units can be set on the left side of the opening area, and 2 columns of compensation units can be set on the right side of the opening area.

[0088] The above embodiments are Fig.17 The compensation curve shown is used as an example to illustrate the number of columns of compensation capacitors for each row of scan lines, but the embodiments of the present application are not limited thereto. For example, when the compensation curve changes, the setting position of the compensation unit, the size of each row of compensation units, and the number of compensation units can be adjusted according to the principles shown in the embodiments of the present application to make the voltage drops of scan lines in different rows consistent. For example, the number of columns of compensation units for each row of scan lines ranges from 2 to 4.

[0089] Specifically, taking the display panel with a resolution of 2712*1220 as an example, the display panel includes 1220 columns of pixels, and the pixel design is Fig.11Taking the pixel design shown (blue sub-pixels and red sub-pixels are in the same column, and each column of sub-pixels includes two columns of sub-pixels) as an example, the display panel includes 2440 columns of sub-pixels. Accordingly, the existing display panel will set invalid sub-pixels in the sub-pixels from the 1161th to the 1281th columns close to the opening area. The embodiment of the present application replaces the invalid sub-pixels in the sub-pixels from the 1161th to the 1183th columns with compensation units, and replaces the invalid sub-pixels in the sub-pixels from the 1259th to the 1281st columns with compensation units, thereby avoiding increasing the area of ​​the transition zone of the display panel. Since the compensation unit will not be set in the winding area, the data lines in the winding area can be set in each metal layer for winding, thereby reducing the area of ​​the winding area, further reducing the area of ​​the transition zone, and reducing the area of ​​the black border between the display area and the opening area.

[0090] Specifically, the compensation units are arranged in the sub-pixels from the 1161st to the 1183rd columns, which does not specifically mean that each row includes compensation units located in the sub-pixels from the 1161st to the 1183rd columns, but means that the compensation units located in different rows are arranged in the sub-pixels from the 1161st to the 1183rd columns. For example, from the upper left to the lower right direction of the opening area, the compensation units of the top row will be arranged in the sub-pixels from the 1182nd to the 1183rd columns, and the compensation units of the next row of the top row will be arranged in the sub-pixels from the 1180th to the 1181st columns. Accordingly, the compensation units of different rows are arranged from the sub-pixels from the 1161st to the 1183rd columns.

[0091] Specifically, the embodiment of the present application uses a display panel with a resolution of 2712*1220 and a pixel design of Fig.11 The pixel design shown is used as an example to explain in detail the setting position of the compensation unit, but the embodiments of the present application are not limited to this. For example, when the resolution of the display panel is other resolutions, and / or the pixel design is other pixel designs, based on the principles demonstrated in this embodiment, technical personnel in this field can adjust the setting position of the compensation unit, the size of each row of compensation units, and the number of compensation units to make the voltage drop of scan lines in different rows consistent.

[0092] In one embodiment, each wiring in the compensation unit is connected to each wiring in the invalid pixel. By connecting each wiring in the compensation unit to each wiring in the invalid pixel, when the compensation unit is set, the compensation unit can replace the invalid pixel, and the compensation unit can transition the display pixel.

[0093] Specifically, for example, the portion of the first scan line located in the compensation unit is connected to the portion of the first scan line located in the invalid pixel. It is only necessary to change the width of the first scan line. The position of the first scan line can be set according to the setting position of the invalid pixel. The compensation unit can replace the original invalid pixel portion and transmit the signal of the first scan line without occupying additional space.

[0094] Similarly, the high-potential power signal line, the first data line, the second scan line, the initialization signal line, and the light-emitting control signal line in the compensation unit can also be designed according to the design of the first scan line. For example, if the first data line does not need to be changed, the first data line can be designed in the same way as the invalid pixel, so as to maintain the uniformity of the process and avoid the process difference affecting the display. When the compensation unit replaces the invalid pixel, it can avoid the structure of the compensation unit being too different from the structure of the invalid pixel, resulting in poor display.

[0095] In one embodiment, if Figures 5 to 9 As shown, the display panel further includes an active layer 23, the active layer 23 includes an active pattern 231, and the projection area of ​​the active pattern 231 in the invalid pixel 43 on the substrate 21 is larger than the projection area of ​​the active pattern 231 in the compensation unit 42 on the substrate 21. By making the projection area of ​​the active pattern in the compensation unit on the substrate smaller than the projection area of ​​the active pattern in the invalid pixel on the substrate, the number of transistors in the compensation unit is reduced, the signal in the compensation unit is less, and other signals are prevented from affecting the scan line, and the signal in the compensation unit is prevented from being unstable and causing poor display, thereby improving the stability of the display panel.

[0096] Specifically, Figure 6 , Figure 7 As shown, it can be seen that the active pattern in the compensation unit is only arranged in the area corresponding to the light-emitting control signal line 253, so that the compensation unit does not form a driving transistor and a part of the switching transistor, thereby avoiding the compensation unit from affecting the pixel driving circuit and improving the stability of the display panel.

[0097] In one embodiment, if Figure 4 As shown, the display area 411 is arranged around the opening area 418, and the shape of the opening area 418 includes at least one of a racetrack shape, a circular shape, and a square shape.

[0098] Specifically, the embodiments of the present application are not limited to the shape of the opening area being one of a runway shape, a circular shape, and a square shape. For example, the opening area can be set on the upper side of the display panel so that the opening area contacts the frame. In this case, the opening area can be semicircular or arc-shaped.

[0099] In one embodiment, the compensation unit is disposed on both sides of the opening area along the setting direction of the first scan line. By arranging the compensation unit on both sides of the opening area, the symmetry of the display panel is improved, and during display, the problem of poor display caused by process differences and uniformity differences due to asymmetric design is avoided.

[0100] In one embodiment, the display panel includes a longitudinal symmetry axis from the upper frame to the lower frame, the opening area is symmetrically arranged about the longitudinal symmetry axis of the display panel, and along the setting direction of the first scan line, the capacitance of the compensation unit arranged on the left side of the opening area is equal to the capacitance of the compensation unit arranged on the right side of the opening area. When the opening area is symmetrically arranged about the longitudinal symmetry axis of the display panel, the voltage drops of the scan lines on both sides of the opening area are consistent, so the capacitances of the compensation units on both sides of the opening area can be equal, thereby making the voltage drops of the scan lines on both sides consistent, thereby improving display uniformity.

[0101] Specifically, the capacitance of the compensation units on both sides of the opening area can be equal by making the number of compensation units on both sides of the opening area equal and the capacitance of each compensation unit on both sides of the opening area equal, so that the voltage drop of the scanning lines on both sides of the opening area is consistent, thereby improving display uniformity.

[0102] Specifically, the number of compensation units on both sides of the opening area can be different, the capacitance of each compensation unit on both sides of the opening area can be different, but the total capacitance of the compensation units on both sides of the opening area can be kept equal, so that the voltage drop of the scanning lines on both sides of the opening area is consistent, thereby improving display uniformity.

[0103] Specifically, the compensation unit arranged on the left side of the opening area and the compensation unit arranged on the right side of the opening area can be made symmetrical about the longitudinal symmetry axis of the display panel. By making the compensation units located on both sides of the opening area symmetrical about the longitudinal symmetry axis of the display panel, the voltage drop of the scanning lines located on both sides of the opening area is made consistent, and when the display panel is formed, poor display caused by inconsistent processes can be avoided.

[0104] In one embodiment, the display panel includes a longitudinal symmetry axis from the upper frame to the lower frame, the longitudinal symmetry axis of the opening area is arranged on one side of the longitudinal symmetry axis of the display panel, and along the setting direction of the first scan line, the capacitance of the compensation unit arranged on the side where the longitudinal symmetry axis of the opening area is away from the longitudinal symmetry axis of the display panel is greater than the capacitance of the compensation unit arranged on the side where the longitudinal symmetry axis of the display panel is away from the longitudinal symmetry axis of the opening area. When the opening area is arranged toward one side of the display panel, the distances between the scanning lines on both sides of the opening area and the hole are inconsistent, so the capacitance of the compensation unit on the side with a smaller distance from the hole can be made greater than the capacitance of the compensation unit on the side with a larger distance from the hole, so that the voltage drops of the scanning lines on both sides of the opening area are consistent, thereby avoiding uneven display.

[0105] Specifically, the opening area is biased toward the left side of the display panel as an example for explanation. The display panel includes a longitudinal symmetry axis from the upper frame to the lower frame, and the longitudinal symmetry axis of the opening area is arranged on the left side of the longitudinal symmetry axis of the display panel. Along the setting direction of the first scan line, the capacitance of the compensation unit arranged on the left side of the opening area is greater than the capacitance of the compensation unit arranged on the right side of the opening area. When the opening area is biased toward the left side of the display panel, the impedance of the scan line located on the left side of the opening area will be less than that of the scan line on the right side of the opening area, resulting in uneven display. In the embodiment of the present application, the capacitance of the compensation unit located on the left side of the opening area is greater than that of the compensation unit located on the right side of the opening area, so that the voltage drop of the scan lines on both sides of the opening area is consistent, thereby avoiding uneven display.

[0106] Specifically, when the capacitance of the compensation unit located on the left side of the opening area is made greater than the capacitance of the compensation unit located on the right side of the opening area, the design can be achieved by adjusting the capacitance of each compensation unit in the compensation units on both sides and the number of compensation units. For example, the number of compensation units located on the left side of the opening area is equal to the number of capacitances of the compensation units on the right side of the opening area, but the capacitance of each compensation unit on the left side of the opening area is greater than the capacitance of each compensation unit on the right side of the opening area.

[0107] Specifically, when adjusting the capacitance of each compensation unit, the area of ​​the capacitor plate of the compensation unit can be adjusted, for example, the area of ​​the capacitor plate of the compensation unit on the left side of the opening area is made larger than the area of ​​the capacitor plate of the compensation unit on the right side of the opening area, so that the capacitance of each compensation unit on the left side of the opening area is larger than the capacitance of each compensation unit on the right side of the opening area.

[0108] Specifically, the number of compensation units on the left side of the opening area can be greater than the number of capacitors of the compensation units on the right side of the opening area, so that the capacitance of each compensation unit on the left side of the opening area is equal to the capacitance of each compensation unit on the right side of the opening area, and the capacitance of the compensation unit on the left side of the opening area is greater than the capacitance of the compensation unit on the right side of the opening area.

[0109] Specifically, the above-mentioned embodiments are described in detail using the example of the opening area biased toward the left side of the display panel, but the embodiments of the present application are not limited to this. For example, when the opening area is biased toward the right side of the display panel, the capacitance of the compensation unit located on the right side of the opening area can be made greater than the capacitance of the compensation unit set on the left side of the opening area, so that the voltage drop of the scanning lines located on both sides of the opening area is consistent, thereby avoiding uneven display.

[0110] The above embodiment is described in detail by taking the compensation unit being arranged on both sides of the opening area as an example, but the embodiment of the present application is not limited thereto. For example, the compensation unit may be arranged on only one side of the opening area.

[0111] In one embodiment, the display panel includes a plurality of rows of first scan lines, and in the transition region, the overlapping areas of the projections of the first scan lines of different rows on the substrate and the projections of the compensation lines on the substrate are different. By making the overlapping areas of the projections of the first scan lines of different rows on the substrate different, capacitance compensation of different sizes is performed on different first scan lines, so that the impedances of the first scan lines of each row are consistent.

[0112] Specifically, for example, the opening area is a circular hole, and the positions where the first scan lines in different rows start winding are different, so that the impedances of the first scan lines in different rows are different. Therefore, the capacitance values ​​of the compensation units in different rows can be different, so that the impedances of the first scan lines with different impedances can tend to be consistent or even consistent, avoiding uneven display.

[0113] In one embodiment, the lengths of the first scan lines in different rows on the same side of the opening area are different, and the capacitance of the compensation unit decreases along the direction in which the length of the first scan line increases. When the lengths of the first scan lines in different rows on the same side of the opening area are different, the capacitance of the compensation unit can be reduced as the length of the first scan line increases, so that the voltage drops of the first scan lines in different rows are consistent, thereby improving the display uniformity of the display panel.

[0114] Specifically, the length of the first scan lines of different rows on the same side of the opening area increases from the middle area of ​​the opening area to the upper side of the opening area as an example for explanation. From the middle area of ​​the opening area to the upper side of the opening area, the length of the scan lines of different rows on the same side of the opening area increases, and the capacitance of the compensation unit decreases. By reducing the capacitance of the compensation unit along the direction of increasing length of the first scan lines, the voltage drops of the first scan lines of different rows are made consistent, thereby improving the display uniformity of the display panel.

[0115] Specifically, when the capacitance of the compensation unit is gradually reduced from the middle area of ​​the opening area to the upper side of the opening area, the design can be achieved by adjusting the capacitance of each compensation unit in each row of compensation units and the number of compensation units. For example, the number of compensation units is kept constant from the middle area of ​​the opening area to the upper side of the opening area, but the capacitance of the compensation unit is gradually reduced from the middle area of ​​the opening area to the upper side of the opening area.

[0116] Specifically, when adjusting the capacitance of each compensation unit, the area of ​​the capacitor plate of the compensation unit may be adjusted, for example, from the middle area of ​​the opening area to the upper side of the opening area, so that the capacitance of each compensation unit decreases gradually.

[0117] Specifically, the number of compensation units can be gradually decreased from the middle area of ​​the opening area to the upper side of the opening area, but the capacitance of the compensation units is different from the middle area of ​​the opening area to the upper side of the opening area, so that the capacitance of the compensation units gradually decreases from the middle area of ​​the opening area to the upper side of the opening area.

[0118] The above embodiment is described in detail by taking the example that the capacitance of the compensation unit decreases from the middle area of ​​the opening area to the upper side of the opening area, but the embodiments of the present application are not limited to this. For example, the capacitance of the compensation unit may also decrease from the middle area of ​​the opening area to the lower side of the opening area, so that the impedance of the scanning lines located on the same side of the opening area is consistent, thereby improving the display uniformity of the display panel.

[0119] The above embodiment is described in detail by taking the unequal capacitances of the compensation units of the first scan lines in different rows as an example, but the embodiment of the present application is not limited thereto. For example, the capacitances of the compensation units of the first scan lines in different rows may be equal.

[0120] In one embodiment, the display panel includes a plurality of rows of first scan lines, and in the transition region, different rows of first scan lines correspond to different numbers of compensation units.

[0121] Specifically, by making the number of compensation units of the first scan lines of different rows different, different sizes of capacitance compensation can be used for the first scan lines of different rows, so that the impedance of the first scan lines of each row is consistent. For example, two compensation units are provided on the first scan line of a certain row, and one compensation unit is provided on the first scan line of another row, and the capacitances of the compensation units are equal, then different sizes of capacitance compensation can be performed on the first scan lines of different rows. And the different numbers of compensation units of the first scan lines of different rows do not limit the different sums of the capacitances of the compensation units of the first scan lines of different rows.

[0122] The above embodiment is described in detail by taking the different numbers of compensation units of the first scan lines in different rows as an example, but the embodiment of the present application is not limited thereto. For example, the numbers of compensation units of the first scan lines in different rows are equal.

[0123] In one embodiment, if Figure 8 As shown, the display panel further includes a plurality of light emitting devices LED arranged in an array and a pixel driving circuit for driving the light emitting devices LED, wherein the pixel driving circuit includes:

[0124] A first initialization transistor T4 is connected to the initialization signal line VI and is used to input an initialization signal to the first node Q under the control of the second scanning signal;

[0125] The switch transistor T2 is used for inputting a data signal to the second node A under the control of the first scan signal;

[0126] A driving transistor T1, used for driving the light emitting device LED to emit light under the control of the potential of the first node Q and the second node A;

[0127] a compensation transistor T3, connected to the driving transistor T1 through the first node Q and the third node B, and configured to compensate for a threshold voltage of the driving transistor T1 under the control of a first scanning signal;

[0128] A second initialization transistor T7 is connected to the initialization signal line VI and is used to input an initialization signal to the anode of the light emitting device LED under the control of the first scanning signal;

[0129] A first light-emitting control transistor T5, connected to the driving transistor T1 via a second node A, and configured to conduct the current from the power high-potential signal line VDD to the driving transistor T1 under the control of a light-emitting control signal;

[0130] The second light emitting control transistor T6 is connected to the driving transistor T1 through a third node B, and is used for conducting the current from the driving transistor T1 to flow to the anode of the light emitting device LED under the control of the light emitting control signal.

[0131] In one embodiment, if Figure 8 As shown, the pixel driving circuit further includes a storage capacitor C, one end of the storage capacitor C is connected to the power high potential signal line VDD, and the other end of the storage capacitor C is connected to the first node Q.

[0132] It is understandable that in the embodiments of the present application, Figure 8 As shown, the data line Data transmits a data signal, the initialization signal line VI transmits an initialization signal, the first scan line Scan (n) transmits a first scan signal, the second scan line Scan (n-1) transmits a second scan signal, the light-emitting control signal line EM transmits a light-emitting control signal, and the power low potential signal line VSS transmits a low potential.

[0133] It should be noted that Scan (n-1) and Scan (n) represent two levels of scan lines. At the same time, it can be understood that the pixel driving circuit in the embodiment of the present application is controlled by the scan line of the current level and the scan line of the previous level. Therefore, in the pixel driving circuit of the current level, the first scan line refers to Scan (n), and the second scan line refers to Scan (n-1), and in the pixel driving circuit of the previous level, the first scan line refers to Scan (n-1), and the second scan line refers to Scan (n-2). For other levels of scan lines, they can be determined by referring to the above description and will not be repeated here.

[0134] like Fig.14 As shown, Fig.14The timing diagram of each signal of the pixel driving circuit provided in the embodiment of the present application can control the pixel driving circuit through different signals of the first scanning line Scan (n), the second scanning line Scan (n-1) and the light emitting control signal line EM at different time stages.

[0135] It should be noted that the embodiment of the present application is described in detail with a pixel driving circuit, but the embodiment of the present application is not limited to this. For example, the pixel driving circuit can use multiple initialization signal lines and control them separately through scanning lines. The embodiment of the present application is not limited to this.

[0136] In one embodiment, if Figure 5 As shown, the substrate 21 includes a first flexible layer 211 , a barrier layer 212 and a second flexible layer 213 .

[0137] In one embodiment, if Figure 5 As shown, the display panel 2 further includes a buffer layer 22 , a second planarization layer 33 , a pixel definition layer 34 and an organic layer 36 .

[0138] In one embodiment, the display panel further includes a light-emitting functional layer, and the light-emitting functional layer includes a pixel electrode layer, a light-emitting material layer and a common electrode layer.

[0139] In one embodiment, the display panel may further include a liquid crystal display panel.

[0140] In one embodiment, if Figure 5 As shown, the transition zone 412 also includes a first packaging area 415, a retaining wall area 416 and a second packaging area 417. By forming an undercut structure in the first packaging area 415 and the second packaging area 417, and setting a retaining wall in the retaining wall area 416, when the packaging layer is subsequently formed, the packaging layer can be broken in the first packaging area, the retaining wall area and the second packaging area, thereby improving the packaging effect.

[0141] Specifically, Figure 5 Taking the display panel in the embodiment of the present application as an example, the width of the display panel in the embodiment of the present application is compared with that of the display panel in the prior art. The length and width of the hole area of ​​the existing display device and the hole area of ​​the display panel in the embodiment of the present application are 2400 microns and 1800 microns respectively. Figure 5As shown, the width k of the first packaging area is 210 microns, the spacing D between the bottom cut structure closest to the opening area and the opening area is 88 microns, the spacing C between adjacent bottom cut structures is 15 microns, the width B of the bottom cut structure is 5 microns, the spacing A between the bottom cut structure closest to the barrier wall area and the barrier wall area is 17 microns, the number of bottom cut structures is 6, the width j of the barrier wall area 416 is 36.4 microns, the spacing d between the left side of the bottom cut structure in the first packaging area and the barrier wall area is 17.2 microns, the width f of the bottom cut structure in the first packaging area is 5 microns, the spacing h between the right side of the bottom cut structure in the first packaging area and the winding area is 15 microns, the width u of the winding area is 169.4 microns, the width w of the invalid pixel area is 57 microns, and the width of the transition area is 510 microns.

[0142] Specifically, in the existing display device, when the widths of the first packaging area, the barrier wall area, the second packaging area, and the invalid pixel area remain unchanged, the width of the winding area is 349.4, and the width of the transition zone is 690 microns. That is, the width of the transition zone of the display panel in the embodiment of the present application is reduced compared to the width of the transition zone of the existing display device.

[0143] like Fig.15 , Fig.16 As shown, Fig.15 This is a perspective view of an actual product of an existing display device. Fig.16 A perspective view of an actual product of a display panel provided in an embodiment of the present application, from Fig.15 , Fig.16 It can be seen that the width of the transition zone of the existing display device is 690.45 microns, while the width of the transition zone of the display panel provided in the embodiment of the present application is 512.73 microns. The width of the transition zone of the display panel in the embodiment of the present application is smaller than the width of the transition zone of the existing display device, thereby reducing the black border between the display area and the opening area.

[0144] like Fig.17 As shown, the horizontal axis is the number of scan lines, and the vertical axis is the capacitance of the scan line, and the unit is femtofarad. Curve 01 represents the change in capacitance of the scan line when the scan line of the row where the hole area is located is not compensated in the existing display device. Curve 02 represents the change in capacitance of the scan line when the display panel compensates the scan line of the row where the hole area is located in the embodiment of the present application. It can be seen that curve 01 has a capacitance jump, which causes uneven display. The embodiment of the present application can avoid capacitance jumps and improve the display effect by setting a compensation unit.

[0145] At the same time, an embodiment of the present application provides a display device, which includes a display panel and an electronic component as described in any of the above embodiments.

[0146] In one embodiment, the electronic component includes an under-screen camera.

[0147] According to the above embodiments, it can be seen that:

[0148] An embodiment of the present application provides a display panel and a display device, wherein the display panel includes a display area, an opening area, and a transition area between the display area and the opening area, wherein the display panel includes a substrate, a first metal layer, a second metal layer, and a source-drain layer, wherein the first metal layer is arranged on one side of the substrate, the first metal layer includes a first scanning line, the second metal layer is arranged on a side of the first metal layer away from the substrate, and the source-drain layer is arranged on a side of the second metal layer away from the first metal layer, wherein the transition area includes an invalid pixel area and a winding area, the winding area is arranged between the invalid pixel area and the opening area, the invalid pixel area is provided with a compensation unit, the compensation unit at least includes a compensation routing arranged on the second metal layer, and a projection of the compensation routing on the substrate overlaps with a projection of the first scanning line on the substrate. The present application sets the compensation unit in the invalid pixel area so that the compensation unit can replace the invalid pixels, thereby avoiding increasing the area of ​​the transition zone of the display panel. Since the compensation unit will not be set in the winding area, the data lines in the winding area can be set in each metal layer for winding, thereby reducing the area of ​​the winding area, further reducing the area of ​​the transition zone, and reducing the area of ​​the black border between the display area and the opening area. At the same time, the compensation unit includes a compensation trace set on the second metal layer, so that the projection of the compensation trace on the substrate coincides with the projection of the first scanning line on the substrate, so that the voltage drop of the first scanning line in the row where the opening area is located can be compensated to avoid uneven display.

[0149] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0150] The above is a detailed introduction to a display panel and a display device provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A display panel, characterized in that: The display panel comprises a display area, an opening area, and a transition area between the display area and the opening area, and the display panel comprises: substrate; A first metal layer, disposed on one side of the substrate, the first metal layer comprising a first scanning line; A second metal layer is disposed on a side of the first metal layer away from the substrate; A source-drain electrode layer, arranged on a side of the second metal layer away from the first metal layer; The transition area includes an invalid pixel area and a winding area, the winding area is arranged between the invalid pixel area and the opening area, the invalid pixel area is provided with a compensation unit, the compensation unit at least includes a compensation wiring arranged on the second metal layer, and the projection of the compensation wiring on the substrate overlaps with the projection of the first scanning line on the substrate; The source-drain layer includes a first source-drain layer and a second source-drain layer, the display panel also includes an interlayer insulating layer and a first planarizing layer, the interlayer insulating layer is arranged between the first source-drain layer and the second metal layer, the second source-drain layer is arranged on a side of the first source-drain layer away from the second metal layer, the first planarizing layer is arranged between the first source-drain layer and the second source-drain layer, the compensation unit also includes a power high-potential signal line, at least a portion of the power high-potential signal line is arranged in the second metal layer, and the power high-potential signal line is connected to the compensation line; the power high-potential signal line includes a first power high-potential signal line located in the second metal layer and a second power high-potential signal line located in the first source-drain layer, the first power high-potential signal line is connected to the compensation line, and the second power high-potential signal line is connected to the compensation line through a via hole in the interlayer insulating layer; the display panel also includes a second data line arranged in the winding area, the second data line includes a first portion arranged in the second source-drain layer and a second portion arranged in the first source-drain layer, the first portion is connected to the second portion through a via hole in the first planarizing layer.

2. The display panel according to claim 1, wherein: The compensation unit further includes: A second scanning line is disposed in the first metal layer and is insulated from the first scanning line; Initialization signal lines, including a first initialization signal line and a second initialization signal line, wherein the first initialization signal line is arranged in the second metal layer, the second initialization signal line is arranged in the first source-drain layer, and the second initialization signal line passes through a via hole in the interlayer insulating layer and is connected to the first initialization signal line; A light emitting control signal line is arranged on the first metal layer; The first data line is arranged on the second source-drain layer.

3. The display panel according to claim 1, wherein: The display panel also includes a first gate insulating layer, a second gate insulating layer and an interlayer insulating layer, the first gate insulating layer is arranged between the first metal layer and the substrate, the second gate insulating layer is arranged between the first metal layer and the second metal layer, the interlayer insulating layer is arranged between the second metal layer and the first source and drain layer, the second data line also includes a third part and a fourth part, the third part is arranged in the second metal layer, the fourth part is arranged in the first metal layer, the second part is connected to the third part through a via hole in the interlayer insulating layer, and the third part is connected to the fourth part through a via hole in the second gate insulating layer.

4. The display panel according to claim 1, wherein: The display area is provided with display pixels, the invalid pixel area is provided with invalid pixels, and the invalid pixels are arranged between the display pixels and the compensation unit.

5. The display panel according to claim 4, wherein: The display panel further includes an active layer, the active layer includes an active pattern, and a projection area of ​​the active pattern in the invalid pixel on the substrate is larger than a projection area of ​​the active pattern in the compensation unit on the substrate.

6. The display panel according to claim 1, wherein: The display area is arranged around the opening area, and the shape of the opening area includes at least one of a racetrack shape, a circular shape, and a square shape.

7. The display panel according to claim 1, wherein: Along the setting direction of the first scanning line, the compensation unit is arranged at two sides of the opening area.

8. The display panel according to claim 1, wherein: The display panel comprises a plurality of rows of first scan lines. In the transition region, the projections of the first scan lines of different rows on the substrate and the projections of the compensation lines on the substrate have different overlapping areas.

9. The display panel according to claim 1, wherein: The display panel comprises a plurality of rows of first scan lines. In the transition region, different rows of first scan lines correspond to different numbers of compensation units.

10. A display device, characterized in that: The device comprises a display panel and an electronic component as claimed in any one of claims 1 to 9.

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