Video encoding methods, devices and storage media

Abstract

This disclosure provides a video encoding method, apparatus, and storage medium, relating to the field of communication technology, and capable of improving video encoding speed. The method includes: determining first complexity information of a target image frame; the target image frame being an image frame in a video; the first complexity information being the complexity information of the target image frame at a fixed resolution; the fixed resolution being used for keyframe alignment in the video; determining second complexity information based on the first complexity information; the second complexity information being the complexity information of the target image frame at a preset resolution; the fixed resolution being different from the preset resolution; and performing bitrate control on the target image frame based on the second complexity information. This disclosure is used in the video encoding process.

Description

Technical Field

[0001] This disclosure relates to the field of communication technology, and in particular to a video encoding method, apparatus and storage medium. Background Technology

[0002] In related technologies, video encoding devices typically use fixed frame intervals or fixed resolutions to make frame type decisions to ensure keyframe alignment at different bitrates. However, video frame type decisions require calculating the intra-frame and inter-frame complexity of video image frames. To achieve more accurate bitrate control based on image complexity, taking H.264 encoding as an example, intra-frame complexity needs to be calculated for each of the nine encoding modes, and inter-frame complexity calculation requires motion estimation and complexity analysis of different reference frames. This makes the bitrate control process consume a large amount of computing resources, leading to increased bitrate control complexity and reduced subsequent encoding speed. Therefore, how to reduce the complexity of bitrate control and improve video encoding speed has become an urgent technical problem to be solved. Summary of the Invention

[0003] This application provides a video encoding method, apparatus, and storage medium that can improve video encoding speed.

[0004] To achieve the above objectives, this application adopts the following technical solution:

[0005] In a first aspect, this disclosure provides a video encoding method, comprising: determining first complexity information of a target image frame; the target image frame being an image frame in a video; the first complexity information being the complexity information of the target image frame at a fixed resolution; the fixed resolution being used for keyframe alignment in the video; determining second complexity information based on the first complexity information; the second complexity information being the complexity information of the target image frame at a preset resolution; the fixed resolution being different from the preset resolution; and performing bitrate control on the target image frame based on the second complexity information.

[0006] In conjunction with the first aspect, in one possible implementation, the first complexity information specifically includes: complexity information of multiple first image blocks of the target image at a fixed resolution; determining the second complexity information based on the first complexity information includes: determining a second image block of the target image frame at a preset resolution; the target image frame includes multiple third image blocks at the preset resolution, and the second image block is any one of the multiple image blocks; determining a fourth image block among the multiple first image blocks whose similarity to the second image block satisfies a preset condition; determining the complexity information of the second image block based on the complexity information of the fourth image block; determining the complexity information of each third image block respectively; and determining the second complexity information based on the complexity information of each third image block.

[0007] In conjunction with the first aspect, in one possible implementation, the complexity information includes intra-frame complexity information; determining a fourth image block among multiple first image blocks whose similarity to a second image block meets a preset condition includes: determining the image block among multiple first image blocks that has the most similar image content to the second image block, and the image block with the highest complexity as the fourth image block; determining the complexity information of the second image block based on the complexity information of the fourth image block includes: determining the intra-frame complexity information of the fourth image block as the intra-frame complexity information of the second image block.

[0008] In conjunction with the first aspect, in one possible implementation, the complexity information includes inter-frame complexity information; determining a fourth image block among multiple first image blocks whose similarity to a second image block meets a preset condition includes: determining the image block among multiple first image blocks that has the most similar image content to a second image block as the fourth image block; determining the complexity information of the second image block based on the complexity information of the fourth image block includes: determining the inter-frame complexity information of the fourth image block as the inter-frame complexity information of the second image block.

[0009] In conjunction with the first aspect, one possible implementation includes a complexity information that includes an encoding method; determining a second complexity information based on the complexity information of each third image block includes: determining at least one target encoding method based on the encoding method in the complexity information of each third image block; encoding a target image frame at a preset resolution based on at least one target encoding method to determine the encoding result; determining the target encoding method corresponding to the encoding result that satisfies the encoding conditions to determine the second complexity information.

[0010] Secondly, this disclosure provides a video encoding apparatus, comprising: a processing unit. The processing unit is configured to determine first complexity information of a target image frame; the target image frame is an image frame in a video; the first complexity information is the complexity information of the target image frame at a fixed resolution; the fixed resolution is used for keyframe alignment in the video; the processing unit is further configured to determine second complexity information based on the first complexity information; the second complexity information is the complexity information of the target image frame at a preset resolution; the fixed resolution is different from the preset resolution; the processing unit is further configured to perform bitrate control on the target image frame based on the second complexity information.

[0011] In conjunction with the second aspect, in one possible implementation, the first complexity information specifically includes: complexity information of multiple first image blocks of the target image at a fixed resolution; the processing unit is specifically used to: determine the second complexity information based on the first complexity information, including: determining a second image block of the target image frame at a preset resolution; the target image frame includes multiple third image blocks at the preset resolution, and the second image block is any one of the multiple image blocks; determining a fourth image block among the multiple first image blocks whose similarity to the second image block satisfies a preset condition; determining the complexity information of the second image block based on the complexity information of the fourth image block; determining the complexity information of each third image block respectively; and determining the second complexity information based on the complexity information of each third image block.

[0012] In conjunction with the second aspect, in one possible implementation, the complexity information includes intra-frame complexity information; the processing unit is specifically used for: determining a fourth image block among a plurality of first image blocks whose similarity to the second image block meets a preset condition, including: determining the image block among the plurality of first image blocks that has the most similar image content to the second image block, and the image block with the highest complexity as the fourth image block; determining the complexity information of the second image block based on the complexity information of the fourth image block, including: determining the intra-frame complexity information of the fourth image block as the intra-frame complexity information of the second image block.

[0013] In conjunction with the second aspect, in one possible implementation, the complexity information includes inter-frame complexity information; the processing unit is specifically used for: determining a fourth image block among a plurality of first image blocks whose similarity to the second image block meets a preset condition, including: determining the image block among the plurality of first image blocks with the most similar image content to the second image block as the fourth image block; determining the complexity information of the second image block based on the complexity information of the fourth image block, including: determining the inter-frame complexity information of the fourth image block as the inter-frame complexity information of the second image block.

[0014] In conjunction with the second aspect, in one possible implementation, the complexity information includes an encoding method; the processing unit is specifically used to: determine second complexity information based on the complexity information of each third image block, including: determining at least one target encoding method based on the encoding method in the complexity information of each third image block; encoding a target image frame at a preset resolution based on at least one target encoding method to determine the encoding result; determining the target encoding method corresponding to the encoding result that satisfies the encoding conditions, and determining the second complexity information.

[0015] Thirdly, this disclosure provides a video encoding apparatus, which includes a processor and a memory; wherein the memory is used to store computer execution instructions, and when the video encoding apparatus is running, the processor executes the computer execution instructions stored in the memory to cause the video encoding apparatus to perform the video encoding method as described in the first aspect and any possible implementation thereof.

[0016] Fourthly, this disclosure provides a computer-readable storage medium storing instructions that, when executed by a processor of a video encoding apparatus, enable the video encoding apparatus to perform the video encoding method described in the first aspect and any possible implementation thereof.

[0017] Fifthly, this disclosure provides a computer program product containing instructions that, when run on a video encoding apparatus, cause the video encoding apparatus to perform the video encoding method as described in the first aspect and any possible implementation thereof.

[0018] In a sixth aspect, this disclosure provides a chip including a processor and a communication interface coupled to the processor, the processor being used to run computer programs or instructions to implement the video coding method as described in the first aspect and any possible implementation thereof.

[0019] Specifically, the chip provided in this application embodiment also includes a memory for storing computer programs or instructions.

[0020] In this disclosure, the names of the aforementioned video encoding devices do not limit the devices or functional modules themselves. In actual implementation, these devices or functional modules may appear under other names. As long as the functions of each device or functional module are similar to those of this disclosure, they fall within the scope of the claims of this disclosure and their equivalents.

[0021] These or other aspects of this disclosure will become more readily apparent in the following description.

[0022] The technical solution provided in this disclosure brings at least the following beneficial effects:

[0023] In this scheme, the video encoding device determines the first complexity information of the target image frame at a fixed resolution. Based on the first complexity information at the fixed resolution, the video encoding device determines the second complexity information of the target image frame at a preset resolution. Based on the second complexity information, the video encoding device performs bitrate control on the target image frame. Thus, by reusing the first complexity information at the fixed resolution used by the video encoding device during keyframe alignment, the complexity information of the target image frame at the preset resolution is determined, and bitrate control is then performed based on this complexity information. This reduces the complexity of bitrate control and improves the video encoding speed. Attached Figure Description

[0024] Figure 1 This is a schematic diagram of the hardware structure of a video encoding device provided in an embodiment of this application;

[0025] Figure 2 A flowchart illustrating a conventional multi-bitrate video coding method provided in this application embodiment;

[0026] Figure 3 A flowchart illustrating a video encoding method provided in this application embodiment;

[0027] Figure 4 A schematic diagram of motion estimation for a video encoding device provided in an embodiment of this application;

[0028] Figure 5 This application provides a schematic diagram illustrating the correspondence between target image frames at different resolutions.

[0029] Figure 6 This is another flowchart illustrating a video encoding method provided in an embodiment of this application;

[0030] Figure 7 A schematic diagram illustrating the correspondence between images of different resolutions provided in an embodiment of this application;

[0031] Figure 8 This is another flowchart illustrating a video encoding method provided in an embodiment of this application;

[0032] Figure 9 This is another flowchart illustrating a video encoding method provided in an embodiment of this application;

[0033] Figure 10 This is a schematic diagram of the structure of a video encoding device provided in an embodiment of this application. Detailed Implementation

[0034] The video encoding method, apparatus, and storage medium provided in this disclosure are described in detail below with reference to the accompanying drawings.

[0035] In this article, the term "and / or" is merely a description of the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone.

[0036] The terms "first" and "second," etc., used in the specification and drawings of this application are used to distinguish different objects or to distinguish different treatments of the same object, rather than to describe a specific order of objects.

[0037] Furthermore, the terms "comprising" and "having," and any variations thereof, used in the description of this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may optionally include other steps or units not listed, or may optionally include other steps or units inherent to such process, method, product, or apparatus.

[0038] It should be noted that in the embodiments of this application, the words "exemplary" or "for example" are used to indicate examples, illustrations, or explanations. Any embodiment or design scheme described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design schemes. Specifically, the use of the words "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0039] Figure 1 This is a schematic diagram of the structure of a video encoding device provided in an embodiment of this disclosure. Figure 1 As shown, the video encoding device 100 includes at least one processor 101, a communication line 102, and at least one communication interface 104, and may also include a memory 103. The processor 101, memory 103, and communication interface 104 are connected via the communication line 102.

[0040] The processor 101 may be a central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of this disclosure, such as one or more digital signal processors (DSPs), or one or more field-programmable gate arrays (FPGAs).

[0041] Communication line 102 may include a path for transmitting information between the aforementioned components.

[0042] The communication interface 104 is used to communicate with other devices or communication networks. It can use any transceiver-like device, such as Ethernet, radio access network (RAN), wireless local area network (WLAN), etc.

[0043] The memory 103 may be a read-only memory (ROM) or other type of static storage device capable of storing static information and instructions, random access memory (RAM) or other type of dynamic storage device capable of storing information and instructions, or electrically erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium capable of including or storing desired program code in the form of instructions or data structures and accessible by a computer, but not limited thereto.

[0044] In one possible design, the memory 103 can exist independently of the processor 101, meaning the memory 103 can be an external memory of the processor 101. In this case, the memory 103 can be connected to the processor 101 via a communication line 102 to store execution instructions or application code, and its execution is controlled by the processor 101 to implement the space measurement and determination method provided in the following embodiments of this disclosure. In another possible design, the memory 103 can also be integrated with the processor 101, meaning the memory 103 can be an internal memory of the processor 101. For example, the memory 103 can be a cache, which can be used to temporarily store some data and instruction information.

[0045] As one possible implementation, processor 101 may include one or more CPUs, for example Figure 1 CPU0 and CPU1 in the example. Alternatively, the video encoding apparatus 100 may include multiple processors, such as CPU0 and CPU1. Figure 1 The processors 101 and 107 are included. Alternatively, the video encoding apparatus 100 may also include an output device 105 and an input device 106.

[0046] Through the above description of the implementation methods, those skilled in the art will clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the network node can be divided into different functional modules to complete all or part of the functions described above. The specific working process of the system, modules, and network nodes described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0047] In related technologies, video cloud products typically process video content uniformly in the cloud. To ensure smooth switching of video content under different network environments, a common approach is to use fixed frame intervals or fixed resolutions for frame type decisions. For example... Figure 2 The diagram shows a typical multi-bitrate video encoding flowchart. Typical multi-bitrate video encoding controls the video bitrate through frame type decisions, thereby determining the video encoding resolution. Commonly used video encoding resolutions include 408P, 560P, 720P, and 1080P. To ensure a good user playback experience at different resolutions, typical multi-bitrate video encoding devices usually employ keyframe alignment to ensure that the content time points at video transitions are completely consistent across different resolutions. However, the preprocessed information generated during keyframe alignment is not effectively utilized, leading to significant computational resource consumption in subsequent bitrate control calculations, resulting in slower video encoding speeds and increased cloud resource usage costs. Therefore, how to utilize the preprocessed information generated during keyframe alignment to reduce the complexity of bitrate control and improve video encoding speed has become an urgent technical problem to be solved.

[0048] To accelerate video encoding by utilizing preprocessed information generated during keyframe alignment, this disclosure provides a video encoding method. The video encoding device determines first complexity information of a target image frame at a fixed resolution. Based on the first complexity information at the fixed resolution, the video encoding device determines second complexity information of the target image frame at a preset resolution. Based on the second complexity information, the video encoding device performs bitrate control on the target image frame. Thus, by reusing the first complexity information at the fixed resolution obtained during keyframe alignment, the video encoding device determines the complexity information of the target image frame at the preset resolution, and then performs bitrate control based on this complexity information. This reduces the complexity of bitrate control and improves video encoding speed.

[0049] The video encoding method provided in this disclosure can be applied to, for example, Figure 1 In the video encoding device shown, such as Figure 3As shown, the video encoding method provided in this embodiment can be implemented through the following steps 301 to 303.

[0050] Step 301: The video encoding device determines the first complexity information of the target image frame.

[0051] The target image frame is an image frame in the video; the first complexity information is the complexity information of the target image frame at a fixed resolution; the fixed resolution is used for keyframe alignment in the video.

[0052] In one possible implementation, the video encoding device aligns video keyframes using target image frames at a fixed resolution. The keyframe alignment process involves making frame type decisions using the same fixed resolution, and controlling the video bitrate based on these decisions to ensure complete consistency in the timing of video content at switching points between different resolutions. During keyframe alignment, the video encoding device determines the first complexity information of the target image frame at the fixed resolution. This first complexity information includes: first intra-frame complexity and first inter-frame complexity.

[0053] In one example, the video encoding device performs keyframe alignment on the target image frames of the video using a fixed resolution (e.g., 480*270), and performs calculations on the intra-frame complexity and inter-frame complexity of the target image frames during the keyframe alignment process.

[0054] For example, a video encoding device divides a target image of fixed resolution into multiple image blocks using 8x8 pixels as units, and calculates the values ​​for each image block of the target image frame according to the nine intra-frame coding modes supported by H.264. These nine intra-frame coding modes include: vertical predictive coding mode, horizontal predictive coding mode, DC predictive coding mode, diagonal bottom-left predictive coding mode, diagonal bottom-right predictive coding mode, vertical right predictive coding mode, horizontal down predictive coding mode, vertical left predictive coding mode, and horizontal direction predictive coding mode.

[0055] Optionally, among the nine intra-frame coding modes, the one with the lowest intra-frame complexity is determined as the first intra-frame complexity of the target image frame. Here, the intra-frame complexity is denoted as: intra_cost_fix; the prediction result for each intra-frame coding mode is denoted as: intra_filter_8*8[j][i] (j = 0~7, i = 0~7); and the target image frame at the fixed resolution position is denoted as: pix_fix_8*8[j], where j represents the j-th 8*8 pixel block.

[0056] Furthermore, the intra-frame complexity is defined as `intra_cost_fix = satd(pix_fix_8*8[j], intra_fiter_8x8[j][i])`. Here, `stad` represents the sum of absolute transformation differences, i.e., the sum of the absolute values ​​of the coefficients after performing a Hadamard transform on the residual signal. `satd` satisfies the following formula:

[0057] satd=Σ M Σ M |HXH| Formula 1

[0058] Where H is the Hadamard matrix; X is the residual matrix, i.e. the value of the predicted pixel block after subtracting the original pixel block; and M is the block size, such as M = 8*8 in this embodiment.

[0059] Optionally, the video encoding device uses adjacent frames corresponding to the target image frame at a fixed resolution position, such as... Figure 4 As shown, the target reference block is determined after motion estimation. The first inter-frame complexity information of the target image frame is determined based on the target reference block. The target reference block is denoted as ref_fix_8x8[j]; the first inter-frame complexity is denoted as inter_cost_fix, inter_cost_fix = satd(pix_fix_8*8[j], ref_fix_8x8[j]), and its calculation process is similar to that of Formula 1. For specific calculation, please refer to Formula 1.

[0060] Step 302: The video encoding device determines the second complexity information based on the first complexity information.

[0061] The second complexity information is the complexity information of the target image frame at a preset resolution; the fixed resolution is different from the preset resolution; the second complexity information includes: the second intra-frame complexity and the second inter-frame complexity.

[0062] In one possible implementation, the video encoding device determines the predictive coding mode type and mv information of the corresponding 8*8 blocks of the target image frame at a preset resolution and the target image frame at a fixed resolution, based on the first complexity information at a fixed resolution. The video encoding device reuses the predictive coding mode type and mv information of the corresponding 8*8 blocks to determine the second complexity information.

[0063] In one example, the video encoding device calculates the complexity of the target image frame at the preset resolution using a nearest-neighbor prediction encoding mode based on the predictive coding mode type and mv information of the corresponding 8*8 blocks of the content of the target image frame at a preset resolution and the target image frame at a fixed resolution.

[0064] Specifically, such as Figure 5As shown, for the determination of the same content encoding block, taking a target image frame with a resolution of 1920*1080 as an example, one of the 8*8 content blocks is [0-7] in the x direction and [0-7] in the y direction. Then, the original pixels of the target image frame corresponding to the half resolution of the target image frame are [0-3] in the x direction and [0-3] in the y direction, and the original pixels of the target image frame corresponding to the fixed resolution of the target image frame (such as 380*270) are [0-1] in the x direction and [0-1] in the y direction.

[0065] It should be noted that the intra-frame complexity of each 8*8 pixel block in the target image frame at the preset resolution is calculated using one of the following encoding modes: {v direction, h direction, DC mode, preferred prediction mode, and secondary prediction mode}. The inter-frame complexity of each 8*8 pixel block at the preset resolution is calculated once using the predicted mv.

[0066] Step 303: The video encoding device performs bitrate control on the target image frame based on the second complexity information.

[0067] In one possible implementation, the video encoding device simplifies the calculation process of the target image frame complexity based on the second complexity information and performs bitrate control on the target image frame.

[0068] In one example, when the video encoding device uses motion estimation to predict the best-matching block for inter-frame complexity calculation, it initializes based on the mv information in the second complexity to determine the complexity calculation of the target image frame. The video encoding device then allocates the bitrate of the target image frame based on its complexity, thereby controlling the bitrate of the target image frame.

[0069] The above scheme offers at least the following benefits: The video encoding device determines the first complexity information of the target image frame at a fixed resolution. Based on the first complexity information at the fixed resolution, the video encoding device determines the second complexity information of the target image frame at a preset resolution. Based on the second complexity information, the video encoding device performs bitrate control on the target image frame. Thus, by reusing the first complexity information at the fixed resolution used by the video encoding device during keyframe alignment, the complexity of bitrate control is reduced, and the video encoding speed is improved.

[0070] Combination Figure 3 ,like Figure 6 As shown, step 302 can also be implemented through steps 601-605. Specifically, the first complexity information includes: the complexity information of multiple first image blocks of the target image at a fixed resolution.

[0071] Step 601: The video encoding device determines the second image block of the target image frame at a preset resolution.

[0072] At a preset resolution, the target image frame includes multiple third image blocks, and the second image block is any one of the multiple third image blocks.

[0073] In one possible implementation, the video encoding device divides the target image frame at a preset resolution into multiple 8*8 image blocks, and designates each image block as a third image block. The video encoding device then selects one of the multiple third image blocks and designates it as a second image block.

[0074] Step 602: The video encoding device determines a fourth image block among multiple first image blocks whose similarity to the second image block meets a preset condition.

[0075] In one possible implementation, during keyframe alignment of a target image frame at a fixed resolution, the video encoding device divides the target image frame at that resolution into multiple image blocks of 8*8 pixels for calculation. Each image block is designated as the first image block. The video encoding device then determines the fourth image block from among the multiple first image blocks whose similarity to the second image blocks at a preset resolution meets a preset condition.

[0076] In one example, when determining the intra-frame complexity information of a target image frame, the video encoding device identifies the image block with the most similar image content to the second image block and the image block with the highest complexity among a plurality of first image blocks as the fourth image block. When determining the inter-frame complexity information of the target image, the video encoding device identifies the image block with the most similar content to the second image block and the image block with the highest complexity among a plurality of first image blocks as the fourth image block.

[0077] Specifically, such as Figure 7 The diagram shows the correspondence between multiple first image blocks at a fixed resolution for a second image block with a 1 / 2 resolution. Specifically, when determining the intra-frame complexity information of the second image block, the video encoding device identifies the first image block containing the region S4 with the largest area of ​​similar image content, and identifies the first image block containing the region with the largest complexity among regions S2 and S3 with the same similar image content as the fourth image block.

[0078] Optionally, when determining the inter-frame complexity information of the second image block, the video encoding device may determine the first image block containing the region S4 with the largest area of ​​similar image content as the fourth image block.

[0079] Step 603: The video encoding device determines the complexity information of the second image block based on the complexity information of the fourth image block.

[0080] In one possible implementation, the video encoding device determines the complexity information of the second image block based on the complexity information of the first image block corresponding to the fourth image block.

[0081] In one example, when determining intra-frame complexity information, the video encoding device determines the intra-frame complexity information of the fourth image block as the inter-frame complexity information of the second image block. Similarly, when determining inter-frame complexity information, the video encoding device determines the inter-frame complexity information of the fourth image block as the inter-frame complexity information of the second image block.

[0082] Step 604: Determine the complexity information for each third image block.

[0083] One possible implementation is that the video encoding device repeats steps 601-603 above to determine the complexity information of each third image block at a preset resolution.

[0084] Step 605: The video encoding device determines the second complexity information based on the complexity information of each third image block.

[0085] In one possible implementation, the video encoding device determines the second complexity information at a preset resolution based on the complexity information of each third image.

[0086] The above scheme brings at least the following beneficial effects. The video encoding device determines one of the 8*8 pixel blocks in the target image frame at a preset resolution as the second image block. The video encoding device determines a fourth image block among multiple first image blocks whose similarity satisfies a preset condition. The video encoding device determines the complexity information of the second image block based on the complexity information of the fourth image block. The video encoding device then determines the second complexity information of the target image frame at the preset resolution by considering the fourth image block of each 8*8 pixel block in the target image frame among multiple first image blocks. In this way, the video encoding device determines the second complexity information of the target image frame through the complexity information of the fourth image block, simplifying the calculation process of the second complexity information, reducing the computational difficulty of the second complexity, and lowering the cost of cloud-based video processing.

[0087] Combination Figure 6 ,like Figure 8 As shown, step 605 can be implemented through steps 801-803. The complexity information includes the encoding method.

[0088] Step 801: The video encoding device determines at least one target encoding method based on the encoding method in the complexity information of each third image block.

[0089] In one possible implementation, the video encoding device identifies a fourth image block among a plurality of first image blocks that is similar to a third image block and satisfies preset conditions. The video encoding device then uses the encoding method in the first image block corresponding to the fourth image block as the encoding method in the complexity information of the third image block. Finally, the video encoding device determines at least one target encoding method based on the encoding method in the complexity information of each third image block.

[0090] Step 802: The video encoding device encodes the target image frame at a preset resolution according to at least one target encoding method, and determines the encoding result.

[0091] In one possible implementation, the video encoding device encodes each third image block of the target image frame at a preset resolution, in an 8*8 pixel block unit, according to at least one target encoding method, in a left-to-right, top-to-bottom order, and determines the encoding result.

[0092] Step 803: The video encoding device determines the target encoding method corresponding to the encoding result that meets the encoding conditions, and determines the second complexity information.

[0093] In one possible implementation, the video encoding device determines the target encoding method corresponding to the encoding result that satisfies the encoding conditions, and determines the second complexity information of the target image frame based on the target encoding method.

[0094] The following, combined with Figure 9 This section explains the overall process by which video encoding devices reduce bitrate control complexity and increase video encoding speed:

[0095] Step 901: The video encoding device acquires the target image frame.

[0096] In one possible implementation, the video encoding device obtains the target image frame from the input image frame.

[0097] Step 902: The video encoding device determines the first complexity information of the target image frame.

[0098] The specific implementation of step 902 is similar to that of step 301 above. The specific implementation process can be referred to step 301 above, and will not be repeated here.

[0099] Step 903: The video encoding device performs keyframe alignment on the target image frame.

[0100] In one possible implementation, the video encoding device uses a fixed resolution to calculate the intra-frame complexity and inter-frame complexity of the target image frame, ensuring that the content and time of the keyframes at the video switching points are completely aligned under different resolutions.

[0101] Step 904: The video encoding device determines the type of the target image encoding frame.

[0102] In one possible implementation, the video encoding device determines the type of the target image frame during keyframe alignment. The types of the target image frame include: I-frame, P-frame, and B-frame.

[0103] Step 905: The video encoding device determines the second complexity information based on the first complexity information.

[0104] The specific implementation of step 905 is similar to that of step 302 above. The specific implementation process can be referred to step 302 above, and will not be repeated here.

[0105] Step 906: The video encoding device determines the complexity information of the target image frame based on the second complexity information.

[0106] In one possible implementation, the video encoding device calculates the encoding complexity using nearest neighbor predictive coding mode based on the first complexity information (the specific calculation process can be found in Formula 1) to determine the second complexity information. The video encoding device initializes based on the second complexity information, simplifies, and determines the complexity of the target image frame.

[0107] Step 907: The video encoding device allocates bitrate to the target image frame based on the complexity information of the target image frame and the type of the target image encoding frame.

[0108] The specific implementation of step 907 is similar to that of step 303 above. The specific implementation process can be referred to step 303 above, and will not be repeated here.

[0109] Step 908: The video encoding device outputs the target image frame encoding based on the bitrate allocation result of the target image frame.

[0110] In one possible implementation, the video encoding device outputs the encoding of the target image frame based on the bitrate allocation result of the target image. The video encoding device then feeds back the encoding result of the target image frame to the bitrate control model.

[0111] The above provides a detailed description of the video encoding apparatus and the functions of each device within the video encoding apparatus, as well as the interactions between the devices, as described in the embodiments of this disclosure.

[0112] As can be seen, the above mainly describes the technical solutions provided by the embodiments of this disclosure from a methodological perspective. To achieve the above functions, it includes corresponding hardware structures and / or software modules for executing each function. Those skilled in the art should readily recognize that, in conjunction with the modules and algorithm steps of the various examples described in the embodiments disclosed herein, the embodiments of this disclosure can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this disclosure.

[0113] This disclosure embodiment can divide the video encoding device into functional modules according to the above method example. For example, each function can be divided into its own functional module, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. Optionally, the module division in this disclosure embodiment is illustrative and only represents one logical functional division; other division methods may be used in actual implementation.

[0114] This disclosure embodiment can divide the video encoding device into functional modules according to the above method example. For example, each function can be divided into its own functional module, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. Optionally, the module division in this disclosure embodiment is illustrative and only represents one logical functional division; other division methods may be used in actual implementation.

[0115] This disclosure provides a video encoding apparatus for performing the method required by any device in the aforementioned data integrity determination system. The video encoding apparatus may be the video encoding apparatus described in this disclosure, or a module within a video encoding apparatus; it may also be a chip within a video encoding apparatus, or other apparatus for performing spatial measurement determination methods; this disclosure does not limit the scope of the application.

[0116] like Figure 10 The diagram shown is a structural schematic of a video encoding device provided in an embodiment of this disclosure. The video encoding device includes a processing unit 1001 and a communication unit 1002.

[0117] The processing unit 1001 is used to determine the first complexity information of the target image frame; the target image frame is an image frame in the video; the first complexity information is the complexity information of the target image frame at a fixed resolution; the fixed resolution is used for keyframe alignment in the video.

[0118] Optionally, the processing unit 1001 is further configured to determine second complexity information based on the first complexity information; the second complexity information is the complexity information of the target image frame at a preset resolution; the fixed resolution is different from the preset resolution.

[0119] Optionally, the processing unit 1001 is also used to perform bitrate control on the target image frame based on the second complexity information.

[0120] Optionally, the first complexity information specifically includes: complexity information of multiple first image blocks of the target image at a fixed resolution; the processing unit 1001 is specifically used to: determine the second complexity information based on the first complexity information, including: determining the second image block of the target image frame at a preset resolution; the target image frame includes multiple third image blocks at the preset resolution, and the second image block is any one of the multiple image blocks; determining the fourth image block among the multiple first image blocks whose similarity to the second image block satisfies a preset condition; determining the complexity information of the second image block based on the complexity information of the fourth image block; determining the complexity information of each third image block respectively; and determining the second complexity information based on the complexity information of each third image block.

[0121] Optionally, the complexity information includes intra-frame complexity information; the processing unit 1001 is specifically used to: determine a fourth image block among a plurality of first image blocks whose similarity to the second image block meets a preset condition, including: determining the image block among a plurality of first image blocks that has the most similar image content to the second image block and the image block with the highest complexity as the fourth image block; and determining the complexity information of the second image block based on the complexity information of the fourth image block, including: determining the intra-frame complexity information of the fourth image block as the intra-frame complexity information of the second image block.

[0122] Optionally, the complexity information includes inter-frame complexity information; the processing unit 1001 is specifically used to: determine a fourth image block among a plurality of first image blocks whose similarity to the second image block meets a preset condition, including: determining the image block among a plurality of first image blocks whose image content is most similar to the second image block as the fourth image block; and determining the complexity information of the second image block based on the complexity information of the fourth image block, including: determining the inter-frame complexity information of the fourth image block as the inter-frame complexity information of the second image block.

[0123] Optionally, the complexity information includes an encoding method; the processing unit 1001 is specifically used to: determine second complexity information based on the complexity information of each third image block, including: determining at least one target encoding method based on the encoding method in the complexity information of each third image block; encoding the target image frame at a preset resolution according to at least one target encoding method, and determining the encoding result; determining the target encoding method corresponding to the encoding result that satisfies the encoding conditions, and determining the second complexity information.

[0124] This disclosure provides a video encoding apparatus for executing the method required by any device in the aforementioned data integrity determination system. The video encoding apparatus may be the video encoding apparatus described in this disclosure, or a module within a video encoding apparatus; it may also be a chip within a video encoding apparatus, or other apparatus for executing video encoding methods; this disclosure does not limit the scope of the application.

[0125] This disclosure also provides a computer-readable storage medium storing instructions that, when executed by a computer, perform each step of the method flow shown in the above method embodiments.

[0126] Embodiments of this disclosure provide a computer program product containing instructions that, when executed on a computer, cause the computer to perform the video encoding method described in the above method embodiments.

[0127] Embodiments of this disclosure provide a chip including a processor and a communication interface, the communication interface and the processor being coupled together, the processor being used to run computer programs or instructions to implement the video encoding method as described in the above method embodiments.

[0128] The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), registers, hard disks, optical fibers, compact disc read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing, or any other form of computer-readable storage medium in the art. An exemplary storage medium is coupled to a processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium may also be a component of the processor. The processor and the storage medium may reside in an application-specific integrated circuit (ASIC). In this embodiment of the disclosure, the computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0129] Since the apparatus, devices, computer-readable storage media, and computer program products in the embodiments of this disclosure can be applied to the above methods, the technical effects they can achieve can also be referred to the above method embodiments. The embodiments of this disclosure will not be repeated here.

[0130] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any changes or substitutions within the technical scope disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A method of video coding, the method comprising: The method comprises the following steps: determining first complexity information of a target image frame; the target image frame is an image frame in a video; the first complexity information is complexity information of the target image frame at a fixed resolution; the fixed resolution is used for key frame alignment of the video, and the first complexity information specifically comprises complexity information of a plurality of first image blocks of the target image at the fixed resolution; determining a second image block of the target image frame at a preset resolution; the target image frame comprises a plurality of third image blocks at the preset resolution, and the second image block is any one of the plurality of third image blocks; determining a fourth image block in the plurality of first image blocks, which has a similarity to the second image block satisfying a preset condition; determining complexity information of the second image block according to complexity information of the fourth image block; determining complexity information of each third image block respectively; determining second complexity information according to the complexity information of each third image block; the second complexity information is complexity information of the target image frame at a preset resolution; the fixed resolution is different from the preset resolution; controlling the code rate of the target image frame according to the second complexity information.

2. The method of claim 1, wherein, The complexity information comprises intra-frame complexity information; The step of determining the fourth image block in the plurality of first image blocks, which has a similarity to the second image block satisfying a preset condition, comprises: determining the fourth image block in the plurality of first image blocks, which has the most similar image content to the second image block and has the largest complexity; The step of determining complexity information of the second image block according to complexity information of the fourth image block, comprises: determining the intra-frame complexity information of the fourth image block as the intra-frame complexity information of the second image block.

3. The method of claim 1, wherein, The complexity information comprises inter-frame complexity information; The step of determining the fourth image block in the plurality of first image blocks, which has a similarity to the second image block satisfying a preset condition, comprises: determining the fourth image block in the plurality of first image blocks, which has the most similar image content to the second image block; The step of determining complexity information of the second image block according to complexity information of the fourth image block, comprises: determining the inter-frame complexity information of the fourth image block as the inter-frame complexity information of the second image block.

4. The method according to any one of claims 1 to 3, characterized in that, The complexity information comprises an encoding mode; The step of determining the second complexity information according to the complexity information of each third image block, comprises: determining at least one target encoding mode according to the encoding mode in the complexity information of each third image block; encoding the target image frame at the preset resolution according to the at least one target encoding mode to determine an encoding result; determining the second complexity information by determining a target encoding mode corresponding to the encoding result satisfying an encoding condition.

5. A video encoding apparatus, comprising: The device comprises: a processing unit and a communication unit; the processing unit is configured to determine first complexity information of a target image frame; the target image frame is an image frame in a video; The first complexity information is complexity information of the target image frame at a fixed resolution; The fixed resolution is used for key frame alignment of the video, and the first complexity information specifically includes complexity information of a plurality of first image blocks of the target image at the fixed resolution; The processing unit is further configured to determine a second image block of the target image frame at a preset resolution, wherein the target image frame at the preset resolution includes a plurality of third image blocks, and the second image block is any one of the plurality of third image blocks; The processing unit is further configured to determine a fourth image block from the plurality of first image blocks, wherein a similarity of the fourth image block to the second image block satisfies a preset condition; The processing unit is further configured to determine complexity information of the second image block according to complexity information of the fourth image block; The processing unit is further configured to determine complexity information of each third image block respectively; The processing unit is further configured to determine second complexity information according to the complexity information of each third image block, wherein the second complexity information is complexity information of the target image frame at a preset resolution, and the fixed resolution is different from the preset resolution; The processing unit is further configured to perform rate control on the target image frame according to the second complexity information.

6. The apparatus of claim 5, wherein, The complexity information includes intra-frame complexity information, and the processing unit is specifically configured to: determine, from the plurality of first image blocks, a fourth image block having the most similar image content to the second image block and a fourth image block having the greatest complexity as the fourth image block; determine, from the plurality of first image blocks, a fourth image block having the most similar image content to the second image block as the fourth image block; determine, from the plurality of first image blocks, a fourth image block having the most similar image content to the second image block as the fourth image block; 7. The apparatus of claim 5, wherein, determine, from the plurality of first image blocks, a fourth image block having the most similar image content to the second image block as the fourth image block. The complexity information includes an encoding mode, and the processing unit is specifically configured to: determine, from the plurality of third image blocks, a fourth image block having the most similar image content to the second image block as the fourth image block; determine, from the plurality of third image blocks, a fourth image block having the most similar image content to the second image block as the fourth image block; determine, from the plurality of third image blocks, a fourth image block having the most similar image content to the second image block as the fourth image block; 8. The device of any one of claims 5-7, wherein, determine, from the plurality of third image blocks, a fourth image block having the most similar image content to the second image block as the fourth image block. ​ ​ ​ ​ 9. A video encoding apparatus, comprising: ​ a processor and a communication interface; the communication interface and the processor are coupled, and the processor is configured to run computer programs or instructions to implement the video encoding method as claimed in any one of claims 1-4.

10. A computer-readable storage medium having stored therein instructions, the computer-readable storage medium comprising: When a computer executes the instructions, the computer executes the video encoding method as claimed in any one of claims 1-4.

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