Average current control circuit and method

Abstract

Embodiments of the present disclosure relate to average current control circuits and methods. A control circuit includes a flip-flop having an output configured to be coupled to a control terminal of a transistor and to generate a first signal, a comparator having an output coupled to an input of the flip-flop and first and second inputs to receive first and second voltages, respectively, a transconductance amplifier having an input to receive a sense voltage indicative of a current flowing through the transistor and an output coupled to the first input of the comparator, a zero-crossing detection (ZCD) circuit having inputs configured to be coupled to a first current path terminal of the transistor and an inductor, wherein the ZCD circuit is configured to detect a demagnetization time of the inductor and generate a third signal based on the detected demagnetization time, and a reference generator configured to generate the second voltage based on the first and third signals.

Description

Technical Field

[0001] This disclosure generally relates to an electronic system and method, and in particular embodiments relates to an average current control circuit and method. Background Technology

[0002] A light-emitting diode (LED) driver is configured to provide sufficient current to light up the LED. A switching voltage regulator can be used to drive the LED.

[0003] The intensity of light produced by an LED is related to the average current flowing through it. Generally, the higher the average current flowing through an LED, the higher the intensity of the light produced. Therefore, it is usually desirable to use a current driver to drive the LED in order to accurately control the average current flowing through it.

[0004] LEDs can be dimmed by controlling the average current flowing through them. For example, reducing the light intensity produced by an LED can be achieved by reducing the average current flowing through it.

[0005] Fluctuations in the average current flowing through an LED can cause fluctuations in the light emitted by the LED. Therefore, a switching converter current driver can be used to properly drive the LED by switching at a frequency higher than the flicker fusion threshold.

[0006] LED drivers are typically specified for rated output current (sometimes programmable by the user within a certain range) and output voltage range to power LED strings of different types / lengths. It is worth noting that the rated output current is usually specified with very tight precision, generally less than 5%.

[0007] It is also common for LED lamp drivers to offer dimming capabilities, that is, the ability to reduce the LED current from its rated value to a low value (sometimes less than 1%), so that users can reduce the intensity of the light output from the LED string. It is generally expected that the reduction in LED current and the resulting light modulation will be seamless and flicker-free. Summary of the Invention

[0008] According to an embodiment, a control circuit includes: a driver having an output configured to be coupled to a control terminal of a first transistor; a first flip-flop having a first output coupled to an input of the driver and a first input configured to receive a clock signal, wherein the first flip-flop is configured to generate a first signal at a first output of the first flip-flop; a first comparator having an output coupled to a second input of the first flip-flop, a first input configured to receive a first voltage, and a second input configured to receive a second voltage; and a transconductance amplifier having a first input configured to receive a sensed voltage indicating a current flowing through a current path of the first transistor and a second input configured to receive a reference voltage. The input and output of a first comparator coupled to a first input; an integrating capacitor coupled to the output of a transconductance amplifier and the first input of the first comparator; a first switch coupled across the integrating capacitor, the first switch having a control terminal configured to receive a second signal, the second signal being an inverted version of the first signal; a zero-crossing detection circuit having a first current path terminal configured to be coupled to a first transistor and an input of an inductor, wherein the zero-crossing detection circuit is configured to detect the demagnetization time of the inductor based on the input of the zero-crossing detection circuit and to generate a third signal based on the detected demagnetization time; and a reference generator configured to generate a second voltage based on the first signal and the third signal.

[0009] According to an embodiment, a method includes: turning on a first transistor based on a clock signal, wherein a current path of the first transistor is coupled to an inductor; generating a sense current based on the current flowing through the current path of the first transistor; integrating the sense current using an integrating capacitor to generate a first voltage; injecting the first current into an averaging capacitor to generate a second voltage; turning off the first transistor when the first voltage becomes higher than the second voltage; and discharging the integrating capacitor when the first transistor is turned off.

[0010] According to an embodiment, a switch converter includes: a power transistor; a sensing resistor coupled to a current path of the power transistor; an inductor coupled to a current path of the power transistor; a driver having an output coupled to a control terminal of the power transistor; a flip-flop having a first output coupled to an input of the driver and a first input configured to receive a clock signal, wherein the flip-flop is configured to generate a first signal at its first output, and wherein the flip-flop is configured to turn on the power transistor based on the clock signal and using the first signal; a first comparator having an output coupled to a second input of the flip-flop, a first input configured to receive a first voltage, and a second input configured to receive a second voltage, wherein the flip-flop is configured to turn off the power transistor based on the output of the first comparator and using the first signal. A transconductance amplifier having a first input coupled to an intermediate node, a second input configured to receive a reference voltage, and an output coupled to the first input of a first comparator, the intermediate node being coupled between a current path of a power transistor and a sensing resistor; an integrating capacitor coupled to the output of the transconductance amplifier and the first input of the first comparator; a first switch coupled to the integrating capacitor, the first switch being configured to discharge the integrating capacitor when the power transistor is turned off; a zero-crossing detection circuit having a current path coupled to the power transistor and an input of an inductor, wherein the zero-crossing detection circuit is configured to detect the demagnetization time of the inductor based on the input of the zero-crossing detection circuit and to generate a second signal based on the detected demagnetization time; and a reference generator configured to generate a first voltage based on the first signal and the second signal.

[0011] According to an embodiment, a light-emitting diode (LED) lamp driver includes: an output terminal configured to be coupled to an LED string; a first switching converter configured to receive an AC voltage and generate a DC voltage from the AC voltage at a first power supply terminal; and a second switching converter configured to receive the DC voltage and deliver a regulated current to the LED string, the second switching converter including: a power transistor; a sensing resistor coupled to a current path of the power transistor; an inductor coupled to a current path of the power transistor and an output terminal; a diode coupled between the inductor and the first power supply terminal; a trigger having a first output coupled to a control terminal of the power transistor and a first input configured to receive a clock signal, wherein the trigger is configured to generate a first signal at the first output of the trigger, and wherein the trigger is configured to turn on the power transistor based on the clock signal and using the first signal; and a first comparator having an output coupled to a second input of the trigger and configured to receive the first signal. The system comprises: a first input to a voltage and a second input configured to receive a second voltage, wherein a trigger is configured to turn off a power transistor based on the output of a first comparator using a first signal; a transconductance amplifier having a first input coupled to an intermediate node, a second input coupled to a second power supply terminal, and an output coupled to the first input of the first comparator, the intermediate node being coupled between the current path of the power transistor and a sensing resistor; an integrating capacitor coupled to the output of the transconductance amplifier and the first input of the first comparator; a first switch coupled to the integrating capacitor, the first switch being configured to discharge the integrating capacitor when the power transistor is turned off; a zero-crossing detection circuit having a current path coupled to the power transistor and an input to an inductor, wherein the zero-crossing detection circuit is configured to detect the demagnetization time of the inductor based on the input of the zero-crossing detection circuit and to generate a second signal based on the detected demagnetization time; and a reference generator configured to generate a first voltage based on the first signal and the second signal. Attached Figure Description

[0012] To gain a more complete understanding of the invention and its advantages, reference is now made to the following description taken in conjunction with the accompanying drawings, wherein:

[0013] Figure 1 An LED lamp driver according to an embodiment of the present invention is shown;

[0014] Figure 2 A schematic diagram of a buck converter according to an embodiment of the present invention is shown;

[0015] Figure 3 and Figure 4 An embodiment according to the present invention is shown. Figure 2 A schematic diagram of the interface (I / F) circuit;

[0016] Figure 5 A schematic diagram of a zero-crossing detection (ZCD) circuit according to an embodiment of the present invention is shown;

[0017] Figure 6 A reference generator according to an embodiment of the present invention is shown;

[0018] Figure 7 and Figure 8 An embodiment of the invention is shown with Figure 2 Associated with a buck converter, using Figure 6 The reference generator implements waveforms that operate in continuous conduction mode (CCM) and discontinuous conduction mode (DCM), respectively.

[0019] Figure 9 A schematic diagram of a control circuit according to an embodiment of the present invention is shown;

[0020] Figure 10 and Figure 11 Schematic diagrams of the clock circuit and associated waveforms according to embodiments of the present invention are shown respectively;

[0021] Figure 12 A schematic diagram of a reference generator according to an embodiment of the present invention is shown;

[0022] Figure 13 This illustrates coupling to an embodiment of the invention. Figure 3 A schematic diagram of a portion of the control circuit of the interface circuit;

[0023] Figure 14 This illustrates coupling to an embodiment of the invention. Figure 4 interface circuit Figure 13 A schematic diagram of a portion of the control circuit;

[0024] Figure 15 and Figure 16 An embodiment of the invention is shown with Figure 2 Simulation results associated with the buck converter; and

[0025] Figures 17 to 23 A schematic diagram of a switch converter according to an embodiment of the present invention is shown.

[0026] Unless otherwise indicated, corresponding numbers and symbols in the different figures generally refer to corresponding parts. The figures are drawn to clearly illustrate relevant aspects of the preferred embodiments and are not necessarily drawn to scale. Detailed Implementation

[0027] The making and use of the disclosed embodiments are discussed in detail below. However, it should be understood that the present invention provides many applicable inventive concepts that can be implemented in various specific contexts. The specific embodiments discussed are merely illustrative of specific ways of making and using the invention and do not limit the scope of the invention.

[0028] The following description illustrates various specific details to provide a thorough understanding of several exemplary embodiments according to the description. These embodiments may be obtained without one or more specific details, or by utilizing other methods, components, materials, etc. In other instances, known structures, materials, or operations are not shown or described in detail so as not to obscure different aspects of the embodiments. References to "embodiment" in this description indicate that a particular configuration, structure, or feature described with respect to that embodiment is included in at least one embodiment. Therefore, phrases such as "in one embodiment" that may appear at different points in this description do not necessarily refer exactly to the same embodiment. Furthermore, specific formations, structures, or features may be combined in any suitable manner in one or more embodiments.

[0029] Embodiments of the present invention will be described in a specific context, such as current-switching converters (constant current sources) and LED drivers for solid-state lighting (SSL), for example, for driving one or more LEDs as a load. In some embodiments, the load may not include LEDs. Some embodiments can be implemented in applications other than SSL, such as industrial, consumer, ICT, white goods, etc., "as is" or with minor adaptations. Some embodiments can be used in voltage-switching converters.

[0030] In embodiments of the invention, the average inductor current of the buck converter operating in continuous conduction mode (CCM) is regulated by sensing only the current flowing through the power transistor. Some embodiments are based on a charging mode control core capable of achieving stable CCM operation at a fixed or quasi-fixed switching frequency. In some embodiments, zero-current-sensing (ZCD) circuitry implements discontinuous conduction mode (DCM) operation with a nominally invariant control scheme, which advantageously allows for good accuracy in output current regulation during analog dimming. In some embodiments, voltage feedforward circuitry compensates for propagation delay, making the regulated output current less sensitive to changes in input and output voltage.

[0031] Figure 1 An LED lamp driver 100 according to an embodiment of the present invention is shown. The LED lamp driver 100 includes a switching mode power supply (SMPS) 102 and an SMPS 104 for driving an LED string 106. The switching converter 102 provides a regulated DC output voltage V across an energy storage capacitor 108 that powers the cascaded converter 104. 102 Converter 104 provides regulated output current to power LED string 106.

[0032] In some embodiments, the switching converter 102 can be implemented as a power factor correction (PFC) front-end converter that can draw sinusoidal line voltage V from the power line. mains In-phase sinusoidal current I mains (e.g., 60 Hz, 110 V) rms 50Hz, 220V rms A PFC-equipped converter can be used. Using a PFC-equipped front-end converter can advantageously achieve a high power factor and low distortion of the input current. In some embodiments, using a PFC-equipped switching converter 102 can advantageously help maintain low harmonic emissions, which can advantageously help comply with standards such as IEC 61000-3-2, which sets Class C harmonic emission limits for applications such as LED lamp drivers. In some embodiments, implementing a PFC-equipped converter 102 advantageously helps maintain the input current I... mains Low total harmonic distortion (THD).

[0033] AC / DC switching converter 102 can output current I 102 This introduces ripple. For example, current I... 102 The converter 102 may exhibit ripple with high-frequency components at its switching frequency (typically above 50 kHz) and low-frequency components at twice the frequency of the AC power line (due to the pulsating nature of the power converter 102 drawing from and delivering power to its output from the power line). If supplied to the LED string 106, this low-frequency ripple can cause the average LED current I at a given peak value to be affected. LED This low-frequency ripple can reduce, and may cause, the operating temperature of the LEDs in the LED string 106 to rise, potentially shortening their lifespan. It can also cause light fluctuations (flickering and dimming), which, if perceptible, may be undesirable and have been reported to cause health problems even in imperceptible cases.

[0034] PFC output voltage V 102 It may be affected by the output current I 102 The low-frequency ripple generated by the low-frequency component of the ripple has an impact. Typically, converter 102 regulates the output voltage V through a low-bandwidth control loop. 102 The DC value can be adjusted to achieve a high power factor and low distortion of the input current, but this may not suppress low-frequency output ripple.

[0035] In some embodiments, advantageously, using, such as Figure 1The two-stage power conversion shown (where the front-end PFC converter 102 supplies power to the capacitor 108, and the cascaded regulator-follower converter 104 supplies regulated current to the LED string 106) helps prevent the LED string 106 from being exposed to ripple at the output of the PFC converter 102. For example, in some embodiments, converter 104 provides a DC constant current I... LED The LED string 106 is regulated by a broadband control loop that can suppress low-frequency input voltage ripple, which advantageously optimizes the use of the LED string 106 and provides flicker-free operation of the LED string 106.

[0036] In some embodiments, converter 102 can be implemented as a boost converter, and converter 104 can be implemented as a buck converter. For example, in some embodiments, less than 100 W of power is delivered to the LED string 106 at a voltage V. 102 It can be between, for example, 100 V and 400 V, and the converter 104 provides a voltage V to suit the level of the LED string 106. LED Such as between 30V and 60V. In some embodiments, implementing converter 102 as a boost and converter 104 as a buck can advantageously maintain low current I. 102 (and associated low-frequency ripple), and can advantageously allow the implementation of capacitor 108 without using a large, high-capacity energy storage capacitor. Implementing converters 102 and 104 as boost and buck converters respectively also advantageously helps to meet the requirements of V LED The safety ultra-low voltage (SELV) requirement is limited to 60 V.

[0037] In some embodiments, converter 102 can be implemented as a flyback converter, which can advantageously provide isolation from the trunk line. Isolation from the trunk line can advantageously help to comply with electrical safety standards such as IEC 60950, IEC 62368, and IEC 61347-1.

[0038] Figure 2 A schematic diagram of a buck converter 200 according to an embodiment of the present invention is shown. The buck converter 200 includes a power transistor 202, an interface (I / F) circuit 210, a sense resistor 208, an inductor 204, and a control circuit 220. The control circuit 220 includes a gate driver 218, a zero-current detection (ZCD) circuit 212, a trigger 216, a clock circuit 214, a transconductance amplifier (OTA) 222, a capacitor 230, a switch 228, a comparator 224, and a reference generator 226. SMPS 104 can be implemented as the buck converter 200 (e.g., where node N1 receives voltage V). 102 As V in ).

[0039] Although the LED string 106 is shown as a load driven by the buck converter 200, in some embodiments, a load other than or equivalent to the LED string may be driven by the buck converter 200. For example, in some embodiments, the load 106 may be a rechargeable battery.

[0040] like Figure 2 As shown, in some embodiments, power transistor 202 has a source terminal connected to ground, freewheeling diode 206 is connected to node N1, and load 106 is attached to node N1 in series with inductor 204. This configuration can advantageously allow transistor 202 to be driven more easily than driving a floating power switch, and allows control circuitry 220 to be referred to as ground, which can advantageously allow for a simplified interface connection with lamp controls such as remote on / off, dimming circuitry, etc.

[0041] Converter 202 can operate in continuous conduction mode (CCM). Operating converter 202 in CCM mode advantageously allows for a lower capacitance of output capacitor 232. Using a lower capacitance advantageously allows for the use of ceramic capacitors instead of electrolytic capacitors, which can advantageously lead to higher reliability and a shorter lifespan for converter 202. In some embodiments, output capacitor 232 can be omitted.

[0042] The converter 202 can operate in discontinuous conduction mode (DCM), which advantageously allows current I... LED Good accuracy under light loads (e.g., during analog dimming). As will be described in more detail later, in some embodiments, the ZCD circuit 212 implements DCM operation with a nominally unchanged control scheme (e.g., given by Equation 11).

[0043] During normal operation (e.g., in CCM or DCM mode), power transistor 202 is turned on when a pulse delivered by clock 214 sets flip-flop 216. Power transistor 202 is turned off when flip-flop 216 is reset by comparator 224, and when voltage Vq equals voltage Vq. ref When the clock signal is applied, comparator 224 trips. In some embodiments, the pulse delivered by clock 214 has a fixed switching period T. S .

[0044] The current I delivered to the LED string 106 LED It is the inductor current I L ( t The average value of ) is independent of the operating mode. During the on-time T of power transistor 202 ON During this period, the inductor current I flowing through the power transistor 202 L ( t ) part Isw(t The voltage drop Vcs across the sensing resistor 208 is measured. t The value is read and taken to the non-inverting input of the OTA 222, whose inverting input is connected to ground.

[0045] OTA 222 output and VCS ( t The current Iq is proportional to ) t For example, in some embodiments, the current Iq ( t It can be given by the following:

[0046]

[0047] in g m It is the transconductance of OTA 222.

[0048] Current Iq( t At time T ON During this period, the integrating capacitor 230 is charged. When the power transistor 202 is turned off, the capacitor 230 is reset by the switch 228, and during the switching cycle T... S The remaining portion of the discharge continues, causing Vq to ramp up from 0 V during the next turn-on of power transistor 202.

[0049] During normal operation, regardless of the operating mode (CCM or DCM), the voltage Vq generated across the integrating capacitor 230 can be given by the following...

[0050]

[0051] Where C x T represents the capacitance of capacitor 230. ON Rs indicates the moment when the power transistor 202 is turned off, and Rs represents the resistance of the sensing resistor 208.

[0052] When the buck converter 200 operates in CCM mode, the current Isw flowing through the sensing resistor 208 is... t It can be given by the following:

[0053]

[0054] Among them Isw CCM ( t ) represents the current Isw(t) in CCM mode, I LED_CCM The average current I in CCM mode LED And L represents the inductance of inductor 204.

[0055] From equations 2 and 3, it can be deduced that the voltage Vq in CCM mode can be given by the following...

[0056]

[0057] As will be described in more detail later, since the turn-off condition of power transistor 202 occurs at Vq CCM Equal to Vq ref At that time, the reference generator 226 can generate a reference voltage Vq. ref This design aims to make the current I LED_CCM With voltage V LED Or input voltage V in Irrelevant (making current I) LED_CCM It does not change with voltage V LED Or input voltage V in (And changes). For example, in some embodiments, the current I LED_CCM It can be given by the following

[0058]

[0059] in α It may depend on factors such as internal fixed parameters, such as resistors and / or (multiple) reference currents within the control circuit 220.

[0060] As illustrated in Equation 5, in some embodiments, I LED_CCM It can be configured with user-selectable parameters (such as external resistance Rs) and internal fixed parameters (C). x , g m T S , α The voltage V of the LED string 106 is determined and does not depend on the voltage V. LED It also does not depend on the input voltage V. in Or the inductance L of inductor 204.

[0061] When the buck converter 200 operates in DCM mode, the current Isw flowing through the sensing resistor 208 is... t It can be given by the following:

[0062]

[0063] Among them Isw DCM ( t () represents the current Isw(t) in DCM mode. The current I delivered to the LED string 106 is... LED It can be given by the following

[0064]

[0065] Where I LED_DCM Indicates the average inductor current I in DCM modeLED And T FW Indicates the demagnetization time (e.g., by voltage V). FW instruct).

[0066] Substitute equation 6 into equation 2 and solve for the integral output.

[0067]

[0068] Where Vq DCM Let Vq represent the voltage in DCM mode. Given equation 7, equation 8 can be rewritten as...

[0069]

[0070] As will be described in more detail later, since the turn-off condition of power transistor 202 occurs at Vq CCM Equal to Vq ref At that time, the reference generator 226 can generate a reference voltage Vq. ref This design aims to make the current I LED_CCM With voltage V LED Or input voltage V in Irrelevant (making current I) LED_DCM Not based on voltage V LED Or input voltage V in (Changes due to variations). For example, in some embodiments, the current I... LED_DCM It can be given by the following

[0071]

[0072] This is the same as Equation 5. Therefore, in some embodiments, advantageously, the average current I... LED Regardless of the operating mode (CCM or DCM) of the buck converter 200, as given below

[0073] .

[0074] Some advantages of these embodiments include allowing precise control of the output current I in either CCM or DCM mode. LED Meanwhile, only the current Isw flowing through power transistor 202 is monitored. t Therefore, some embodiments advantageously achieve accurate control of the output current I in a low-cost and low-complexity manner. LED And it does not consume excessive energy. For example, some embodiments advantageously avoid using a resistor connected in series with the inductor to measure the inductor current I. L In some embodiments, avoiding the use of series resistors to measure inductor current can advantageously reduce power consumption, avoid the use of differential sensing with large common-mode dynamics, and / or avoid the use of level shifters.

[0075] Additional advantages of some embodiments include achieving high output current (I0). LED Accuracy, inductance value L, operating mode (DCM or CCM mode), input voltage V in and LED string voltage V LED Insensitivity. Some embodiments advantageously allow adaptation to different V LED It can be set up without the need for external calibration or correction components.

[0076] In some embodiments, the control circuit 220 is implemented in a single (e.g., monolithic) integrated circuit, while components 202, 204, 206, 208, and 210106 are implemented outside the integrated circuit (e.g., such that the integrated circuit may include a means for receiving voltage V). ZCD Demagnetization sensing input, such as Figure 2 (As shown). Therefore, some embodiments advantageously allow the user to precisely control the current I by changing the resistance value Rs of the external component (208). LED In some embodiments, components 206 and 210 are integrated in the same package outside an integrated circuit, which includes control circuitry 220. In some embodiments, components 202 and / or 204 may be integrated in the same package outside an integrated circuit, which includes control circuitry 220.

[0077] In some embodiments, the circuitry of the buck converter 200 can be integrated in different ways. For example, in some embodiments, components 202 and / or 204 can be integrated in the same package as components 206, 210, 212, 214, 216, and 218. In some embodiments, interface circuitry 210 can be implemented within an integrated circuit. In some embodiments, each of components 106, 202, 204, 206, 208, 210, 212, 214, 216, 218, 222, 224, 226, 228, and 230 can be implemented discretely. Other implementations are also possible.

[0078] In some embodiments, the control circuit 220 includes a reference generator 226, a comparator 224, a switch 228, a capacitor 230, a trigger 216, a clock circuit 214, and a transconductance amplifier 222. Other implementations are also possible. For example, in some embodiments, part or all of the reference generator 226 may be implemented outside the control circuit 220.

[0079] In some embodiments, capacitor 234 may be the output capacitor of a previous power stage. For example, in some embodiments, capacitor 108 is connected to node N1, and capacitor 234 may be omitted.

[0080] The power transistor 202 can be implemented as a metal-oxide-semiconductor field-effect transistor (MOSFET). The power transistor 202 can also be implemented in other ways. For example, in some embodiments, the power transistor 202 can be implemented as a gallium nitride (GaN) transistor or as an insulated-gate bipolar transistor (IGBT).

[0081] In some embodiments, clock 214 may be implemented in a conventional manner to generate a fixed-frequency clock signal V. S (e.g., with a period T) S Operating the buck converter 200 at a fixed frequency or substantially fixed frequency advantageously allows the use of optimized inductors that mitigate efficiency degradation at low light levels.

[0082] Interface circuit 210 is configured to operate based on the current I flowing through inductor 204. L Generated voltage V ZCD Voltage V ZCD It can be used to sense the demagnetization time of inductor 204 (e.g., via ZCD circuit 212).

[0083] In some embodiments, the ZCD circuit 212 is configured to sense current I L The voltage ringing at the floating terminal of inductor 204 (drain terminal of power transistor 202) begins when 0 mA is reached (in DCM mode), and generates an indication of the demagnetization time T. FW signal V FW For example, in some embodiments, the ZCD circuit 212 includes a function for receiving voltage V. ZCD The demagnetization sensing input, and based on voltage V ZCD Generate signal V FW This makes the signal V FW It is high during the demagnetization cycle of inductor 204. In some embodiments, ZCD 212 can be implemented in a conventional manner. In some embodiments, in CCM mode, the demagnetization time T is high. FW Equal to the turn-off time T of power transistor 202 OFF .

[0084] Figure 3 A schematic diagram of an interface circuit 300 according to an embodiment of the present invention is shown. Interface circuit 210 can be implemented as interface circuit 300. Interface circuit 300 includes a secondary winding 304 of inductor 204 and resistors 306 and 308 forming a voltage divider.

[0085] In some embodiments, the secondary winding 304 tracks the voltage of the drain terminal of the power transistor 202 and has such that when the power transistor 202 is turned on (at T... ON During this period, its voltage is negative.

[0086] like Figure 3 As shown, the interface circuit 300 is based on the current I flowing through the inductor 204. L Generated voltage V ZCD Voltage V ZCD It can be used to sense the demagnetization time of inductor 204 (e.g., via ZCD circuit 212).

[0087] Figure 4 A schematic diagram of an interface circuit 400 according to an embodiment of the present invention is shown. Interface circuit 210 can be implemented as interface circuit 400. Interface circuit 400 includes a DC blocking capacitor 404 (e.g., connected to the drain terminal of power transistor 202) and resistors 406 and 408 forming a voltage divider. Similar to interface circuit 300, the voltage V... ZCD It can be used to sense the demagnetization time of inductor 204 (e.g., via ZCD circuit 212).

[0088] Figure 5 A schematic diagram of a ZCD circuit 500 according to an embodiment of the present invention is shown. ZCD circuit 212 can be implemented as ZCD circuit 500. ZCD circuit 500 includes a flip-flop 504, a comparator 502, an OR gate 506, and a low-pass filter 512 (including a resistor 510 and a capacitor 508). The low-pass filter 512 and the comparator 502 form a negative reciprocal detector.

[0089] In some embodiments, the ZCD circuit 500 can be used to determine the time from the power transistor 202 being turned off to the current I. L Demagnetization time T to reach 0 mA (in DCM mode) FW For example, such as Figure 5 As shown, the ZCD circuit 500 monitors the voltage V ZCD (For example, generated by interface circuit 300 or 400) to sense the start of voltage ringing at the floating terminal (drain) of power transistor 202, which occurs when the inductor current I... L When it returns to zero. Therefore, in some embodiments, the voltage V FW In current I L It is reset when it reaches zero (e.g., reset to logic low), and when power transistor 202 is turned on (e.g., according to signal V). S ) is set (e.g., set to logic high). For example, in some embodiments (e.g., as shown below) Figure 5 As shown), due to the inverting input voltage V of comparator 502... ZCD The non-inverting input is filtered by a low-pass filter 512 and down-shifted by V. th voltage V ZCD When VZCD When encountering a negative edge, the output of the low-pass filter 512 lags, and when their difference exceeds V... th When the time is reached, comparator 502 is triggered, thereby resetting trigger 504. In some embodiments, in CCM mode, the demagnetization time T FW Equal to the turn-off time T of power transistor 202 OFF .

[0090] In some embodiments, offset V th It can be a constant offset voltage, such as 25 mV. Other voltages (e.g., higher than 25 mV, such as 30 mV or higher, or lower than 25 mV, such as 20 mV or lower) can also be used.

[0091] Figure 6 A reference generator 600 according to an embodiment of the present invention is shown. Reference generator 226 can be implemented as reference generator 600. Reference generator 600 includes a current source 602, switches 604 and 608, a resistor 606, a capacitor 614, an OR gate 610, and an AND gate 612. Figure 6 As shown, the reference generator 600 can be generated by signal V Q and (e.g., from trigger 216) and signal V FW (For example, from ZCD 212) control.

[0092] Figure 7 A waveform 700 associated with a buck converter 200 implemented with a reference generator 600 and operating in CCM mode is shown according to an embodiment of the present invention.

[0093] like Figure 6 and Figure 7 As can be seen, during CCM mode, switch 608 is in clock V S Each clock cycle remains closed, such as signal V. 608 As shown. Switch 604 closes when power transistor 202 is closed and opens when power transistor 202 is open, as indicated by signal V. Q As shown. Assuming a time constant... Much greater than the switching period T S (For example, 10 times or more), so that the voltage Vq is superimposed. ref If the voltage ripple on the DC value is negligible, then Vq ref It can be given by the following

[0094]

[0095] Where R t This indicates the resistance of resistor 606, C. tThis indicates the capacitance of capacitor 614, and I ch This represents the current generated by current source 602.

[0096] Based on equations 4 and 12, in some embodiments, the current I LED_CCM It can be given by the following

[0097]

[0098] in α Given from the following

[0099]

[0100] Figure 8 A waveform 800 associated with a buck converter 200 implemented with a reference generator 600 and operating in DCM mode is shown according to an embodiment of the present invention.

[0101] from Figure 6 and Figure 8 As can be seen, during DCM mode, switch 608 only operates when the inductor current I... L Closed when greater than zero (in time interval T) ON +T FW During the period), and in the switching period T S The remaining part of the process is disconnected, such as signal V. 608 As shown. Switch 604 closes when power transistor 202 is closed and opens when power transistor 202 is open, as indicated by signal V. Q As shown. Assuming a time constant... Much greater than the switching period T S Then Vq ref It can be given by the following

[0102] .

[0103] Based on equations 9 and 15, in some embodiments, the current I LED_DCM It can be given by the following

[0104]

[0105] in α Equation 14 provides the result. As shown, equations 13 and 16 are identical, resulting in the average current I of the buck converter 200 in its operating modes (CCM, DCM). LED Regardless of the control scheme, in some embodiments, this average current I LED Captured by equations 10 and 14.

[0106] In some embodiments, as can be seen in equations 10 and 14, the average current ILED It may depend solely on the resistor Rs (which can be user-selectable) and the internal fixed parameter I. ch R t C x , g m and T S And not dependent on voltage V LED or V in Or inductance L This is independent of the operating mode (CCM, DCM). Some embodiments advantageously utilize a matching current I... ch and transconductance g m (This may depend on the same (or matched) resistor (not shown)), and by generating clock V S So that it has a fixed period T S (The fixed period T) S Based on R t and C x Matching internal resistors and capacitors (not shown) are used to achieve the average current I. LED High-accuracy control.

[0107] In some embodiments, switch 604 can be omitted, for example, by using signal V. Q Control the enable input of the current source 602 or by implementing the current source 602 as controlled by the signal V Q A voltage-controlled current source.

[0108] like Figure 2 As illustrated, a resettable integrated circuit, including switch 228 and capacitor 230, forms the core of the charging mode control, wherein V q With connection time T ON During the switching cycle, the buck converter 200 draws input V... in The drawn charge is proportional. When the buck converter 200 operates in CCM mode and at a fixed frequency (constant T), S During operation, the charging mode control core may exhibit subharmonic instability issues.

[0109] In some embodiments, when the inductor current I L The peak-to-peak ripple is higher than the current I. L When the average value is twice that of the standard, the buck converter 200 transitions from CCM mode to DCM mode, which can advantageously help solve the subharmonic instability problem when the buck converter 200 operates in CCM mode.

[0110] In some embodiments, when the inductor current I L The peak-to-peak ripple is higher than the current I. LWhen the average value is twice that of the CCM mode, the transition from CCM mode to DCM mode may result in a duty cycle of power transistor 202 being less than 50%. In some embodiments, a duty cycle higher than 50% (therefore, V) may cause the duty cycle of power transistor 202 to be less than 50%. LED Higher than V in_min / 2) is possible, while simultaneously achieving an unconditionally stable charging mode control loop through slope compensation. For example, Figure 9 A schematic diagram of a control circuit 900 according to an embodiment of the present invention is shown. The control circuit 900 includes a reference generator 926, a comparator 224, a current source 904, a switch 228, a trigger 216, a gate driver 218, an integrating capacitor 230, and a transconductance amplifier 222. The reference generator 926 includes current generators 902 and 602, switches 604 and 608, a resistor 606, a capacitor 614, an OR gate 610, and an AND gate 612. The control circuit 220 can be implemented as the control circuit 900.

[0111] like Figure 9 As shown, the integrating capacitor 230 is fed by current I q and I sc The sum of charging. In some embodiments, the current I sc Selected to meet the conditions

[0112]

[0113] This ensures that the charging mode control loop remains unconditionally stable.

[0114] In CCM mode, the current I LED_CCM It can be given by the following

[0115]

[0116] Where I sc This represents the current generated by the current generator 904. In some embodiments, the current I... sc With current I ch Matching, which can advantageously reduce or eliminate the current I LED The accuracy exhibited is reduced. In some embodiments, the current I k Can be selected to meet the conditions

[0117]

[0118] This can advantageously enable I LED_CCM Equation 13 provides the solution while still achieving slope compensation. In some embodiments, current generators 902 and 904 are always active, and Equation 18 also applies to DCM mode.

[0119] In some embodiments, since current generator 902 is connected in parallel with current generator 602, current generator 902 can be omitted, and the current generated by generator 602 can be increased by I. k To achieve the same result. In some such embodiments, equation 16 can be achieved by changing I ch Replace with (I) ch -I k Use ) to modify.

[0120] In some embodiments, the buck converter 200 uses fixed-time off-time (FOT) PWM modulation. With FOT PWM modulation, during the switching cycle, when the current I... L When a predetermined value is reached, the power transistor 202 is turned off, and at a predetermined fixed time interval T... OFF (For example, determined by a timer circuit) After that, power transistor 202 is re-energized. This is achieved by controlling the current I... L The peak value, using FOT, can advantageously achieve control over the average inductor current I using CCM operation. LED Control. When the buck converter 200 operates in CCM mode, FOT PWM modulation can advantageously help solve the subharmonic instability problem by making the charging mode control loop unconditionally stable.

[0121] In some embodiments, FOT quasi-fixed frequency (FOT-QFF) modulation is used. FOT-QFF is based on a measurement T... ON And based on T ON Slow modulation T OFF This makes T ON and T OFF The sum is constant or substantially constant. In some embodiments, when the buck converter 200 operates in CCM mode, FOT-QFF modulation can advantageously help solve the subharmonic instability problem by making the charging mode control loop unconditionally stable while keeping the operating frequency substantially fixed. For example, Figure 10 A schematic diagram of a clock circuit 1000 according to an embodiment of the present invention is shown. The clock circuit 214 can be implemented as the clock circuit 1000 and can be used to operate the buck converter 200 with FOT-QFF modulation.

[0122] Figure 11 A waveform 1100 associated with a clock circuit 1100 according to an embodiment of the present invention is shown. Figure 10 and Figure 11 They can be understood together.

[0123] from Figure 10 It can be seen that, assuming a time constant Much greater than the switching period T S(e.g., 10 times or more), voltage reference V th_ramp It can be given by the following

[0124]

[0125] Among them, I osc This represents the current generated by the current generator 1002, and R osc This indicates the resistance of resistor 1004. Because T OFF It can be derived from V th_ramp Cross voltage V ramp If confirmed, then

[0126]

[0127] Where C R This indicates the capacitance of capacitor 1008, and I R This represents the current generated by current generator 1010. The switching period T is deduced using equation 21. S It can be given by the following

[0128] .

[0129] In some embodiments, due to the adjustment of T OFF The mechanism is much larger than the switching period T. S time constant The dynamics of the FOT-QFF control system are basically similar to those of the FOT control system because it responds to disturbances.

[0130] In some embodiments, R t and C x With R osc and C osc Matching advantageously allows for accurate control of the average current I LED .

[0131] Some embodiments allow for continuous variation of current I. LED The adjustment setpoint (analog dimming). In some embodiments, analog dimming is achieved by reducing the current I. ch This is achieved through [the means]. For example, Figure 12 A schematic diagram of a reference generator 1200 according to an embodiment of the present invention is shown. Reference generator 226 can be implemented as reference generator 1200.

[0132] Reference generator 1200 operates in a similar manner to reference generator 600. However, reference generator 1200 includes features for obtaining reference current I. ch Subtract current I dim The current generator 1202. Therefore, in some embodiments, the average current ILED It can be given by the following

[0133]

[0134] Where I dim This represents the current generated by current generator 1202. As shown in Equation 23, the current I... LED It can be reduced to zero (by making I) dim equals I ch In some embodiments, dimming can be achieved by changing the current I. ch And the current I is omitted. dim To achieve this.

[0135] In some embodiments, the current source 1202 may be a voltage-controlled current source, which is based on voltage V. dim Generated current I dim And voltage V dim For example, it can be received from the input terminal of a control circuit (e.g., 220).

[0136] In some embodiments, the reference generator 926 can be modified to be compatible with... Figure 12 A similar approach is shown, including current source 1202.

[0137] In some embodiments, dimming can be achieved by increasing the switching period T. S This can be achieved by increasing the switching period T in some embodiments. S and adjusting current I dim To achieve this, which can advantageously allow in I dim To achieve deeper dimming with limited deviation.

[0138] review Figure 2 From the voltage Vq equals Vq ref The propagation delay ∆T from the time the power transistor 202 is turned off may not be negligible. A delay ∆T in turning off the power transistor 202 could result in a current I... LED The additional inductor current I is greater than, for example, predicted by equations 11 and 23. L (Generated as a result of the additional turn-on time ∆T of power transistor 202) may depend on the applied V in -V LED Therefore, a definition of V was introduced. in and V LED The correlation. For example, suppose the turn-off condition of power transistor 202 occurs at time. t 202_off =T ON When -∆T, then Vq can be... ref_202_off At time t 202_offThe value is calculated as follows:

[0139]

[0140] And I LED (In CCM mode) can be given by the following

[0141]

[0142] Where I LED0 The average current I is determined by, for example, Equation 13. LED .

[0143] In some embodiments, voltage feedforward is used to compensate for propagation delay ∆T. For example, in some embodiments, the voltage feedforward circuit may be based on the voltage V received from interface circuit 210. ZCD Injected current I FF This is added to the current Isw. For example, Figure 13 A schematic diagram of a portion of a control circuit 1300 coupled to an interface circuit 300 according to an embodiment of the present invention is shown. The control circuit 1300 includes a diode 1302, a current mirror 1304, a current generator 1306, a resistor 1308, and a transconductance amplifier 222. Control circuit 220 can be implemented as control circuit 1300.

[0144] In CCM mode, during the on-time T of power transistor 202 ON During this period, the voltage V on the secondary winding 304 304 It can be given by the following

[0145]

[0146] in n This represents the turns ratio between the number of turns in inductor 204 and the number of turns in the secondary winding 304. Current I ZCD It can be given by the following

[0147]

[0148] Where R 306 This indicates the resistance of resistor 306.

[0149] As shown in components 1304 and 1306, current I ZCD Mirrored to generate current I FF This causes the offset V 1308 It can be given by the following

[0150]

[0151] Where R 1308 This represents the resistance of resistor 1308. Therefore, Vqref_202_off It can be given by the following

[0152]

[0153] And the current I LED It can be given by the following

[0154]

[0155] In some embodiments, R 306 Selected as

[0156]

[0157] Make I LED equals I LED0 This is therefore advantageous for compensating for the propagation delay ∆T. The same result also applies advantageously when the buck converter 200 operates in DCM mode.

[0158] like Figure 13 As shown, interface circuit 210 can be implemented as interface circuit 300. Other implementations are also possible. For example, Figure 14 A schematic diagram of a portion of a control circuit 1300 coupled to an interface circuit 400 according to an embodiment of the present invention is shown.

[0159] In CCM mode, during the on-time T of power transistor 202 ON During this period, the voltage V across the DC blocking capacitor 404 404 It can be given by the following

[0160]

[0161] And the current I ZCD It can be given by the following

[0162]

[0163] Where R 406 This indicates the resistance of resistor 406.

[0164] Equations 28 to 30 are similarly applicable Figure 14 The circuit. In some embodiments, R 406 Selected as

[0165]

[0166] Make I LED equals I LED0 This is therefore advantageous for compensating for the propagation delay ∆T. The same result also applies advantageously when the buck converter 200 operates in DCM mode.

[0167] Some of the advantages of these embodiments include enabling lighting engineers to design LED lamp drivers that meet market and regulatory requirements with less effort and at a lower cost.

[0168] Figure 15 and Figure 16 Simulation results associated with a buck converter 200 according to an embodiment of the present invention are shown. The simulated buck converter 200 is implemented using a control circuit 220 including a reference generator 226 (implemented as reference generator 1200), which includes a clock circuit 214 implemented as clock circuit 1000 and as follows Figure 13 The voltage feedforward circuit is shown in the implementation. The simulated buck converter 200 is designed to receive a voltage between 108 V and 132 V. in This generates a voltage V between 30 V and 90 V. LED This generates an output current I of 1 A. LED Furthermore, the dimming range is between 5% and 100%, and the switching cycle T S The current consumption is 7.5 µs, where the inductance L of inductor 204 is 200 µH, the capacitance of output capacitor 232 is 2.2 µF, and the sensing resistance Rs of resistor 208 is 0.2 Ω. Other parameters of the simulated buck converter 200 include a current I of 1 µA. ch A 4 MΩ resistor R t C at 50 pF and 20 pF respectively t and C x The capacitance, 50 µS transconductance gm and 1 / 100 A / A dimming gain.

[0169] Figure 15 The illustration shows the situation according to an embodiment in I LED The range of 5% to 100% is determined by Equation 23 for the minimum V. LED (30V) Nominal V LED (60 V) and maximum V LED (90 V) Captured measurement relationship. Figure 16 The illustration shows the situation according to an embodiment in I LED V in the range of 5% to 100% LED The minimum to maximum change of I LED The deviation. For example Figure 15 and Figure 16 As shown, I LED and I dim The relationship between them is very linear, and I LED For V LED The sensitivity is less than 2%, which may be advantageous in some embodiments.

[0170] In current I ch In some fixed embodiments, equations 13 and 16 can be derived.

[0171]

[0172] in, β It is a constant. Therefore, in some embodiments, the current I... LED With a fixed internally generated current I ch Proportional, where the proportionality coefficient β This can be set by the user by selecting the value of the resistor Rs. As shown previously, the current I... LED The adjustment can be achieved by measuring only the inductor current I. L A portion (the portion flowing through power transistor 202), and based on the turn-on of power transistor 202 (T ON ) and shutdown (T) OFF ) time (in CCM mode) and time based on power transistor 202 (T) ON ) and streaming time (T) FW (In DCM mode) the missing parts are reconstructed to achieve this. In some embodiments, the turn-on and turn-off times of the power transistor 202 and the freewheeling time T are... FW The information is encoded in signal V Q , and V FW In addition, it is used to control the switches of the reference generator 226 (e.g., switches 604, 608) and other switches of the control circuit (e.g., switches 228, 1012, 1014).

[0173] like Figure 2 and Figure 6 As illustrated, in some embodiments, switch 604 can be controlled by signal V. Q Control, and switch 608 can be controlled by signal V Q OR ( and V FW Control to achieve a constant average current I L For example, it is used for LED driving or battery charging (e.g., by replacing LED string 106 with a rechargeable battery).

[0174] The inventors recognized that altering the control logic of some switches (e.g., switches 604, 608) in control circuit 220 could allow the use of control circuit 220 in topologies different from those of a buck converter and / or for purposes other than current regulation. For example, in some embodiments, by altering the control logic of switches 604 and 608, the average inductor current I... LED (or a portion thereof) can be controlled in other topologies (e.g., boost, buck-boost) to serve different purposes.

[0175] The inventors also recognize that, in some embodiments, the current I ch Or I dim It can be controlled by an external feedback loop, for example, to regulate the converter's output voltage (non-isolated or isolated). Therefore, some embodiments use a single error amplifier to implement an average current-mode control scheme.

[0176] Figures 17 to 23 A schematic diagram of a switch converter according to an embodiment of the present invention is shown.

[0177] Figure 17 A schematic diagram of a CCM / DCM boost PFC converter 1700 according to an embodiment of the present invention is shown. The boost converter 1700 includes a control circuit 1720, a power transistor 202, a diode 1710, an output capacitor 1712, an inductor 204, a voltage divider 1706, an interface circuit 210, a frequency compensation circuit 1704, and resistors 208, 1716, and 1714. In some embodiments, the boost converter 1700 is based on a reference voltage V. REF To adjust the output voltage V out .

[0178] like Figure 17 As shown, when reference generator 226 is implemented as reference generator 600, control circuit 1720 operates in a similar manner to control circuit 220. However, control circuit 1720 uses a method based on output voltage V. out and input voltage V 1701 Instead of using a current generator 602, a control loop is used to dynamically control the current I. ch .

[0179] During normal operation, node N 1701 Receive rectified AC signal V 1701 The multiplier circuit 1708 receives voltage V. 1706 (From voltage V) 1701 (scaling) and voltage V 1702 (From error amplifier 1702), and generates current I ch The current I ch It can be given by the following

[0180]

[0181] Therefore, in some embodiments, the current I ch It is shaped into a rectified sine curve. Due to the current I flowing through inductor 204 ch It can be given by the following

[0182]

[0183] Error amplifier 1702 modulation current I ch Make V FB equals V REF Thus, the voltage V out Adjust to reference voltage V REF The target voltage.

[0184] The frequency compensation circuit 1704 provides frequency compensation to the error amplifier 1702 and can be implemented in any manner known in the art.

[0185] The multiplier circuit 1708 is configured to multiply (e.g., in analog mode) the signal V. 1702 and V 1706 It generates a current proportional to the result of this multiplication. The multiplication circuit 1708 can be implemented in any manner known in the art.

[0186] like Figure 17 As shown, some embodiments offer advantages including the use of a single error amplifier to regulate both the average current and the output voltage (as opposed to two error amplifiers, each with its own frequency compensation). For example, in some embodiments, an average capacitor 614 can be used instead of an error amplifier to achieve average current-mode control, advantageously simplifying the control scheme. In some embodiments, the current loop is compensated by the average capacitor 614.

[0187] Figure 18 A schematic diagram of a CCM / DCM boost converter 1800 according to an embodiment of the present invention is shown. The boost converter 1800 includes a control circuit 1820, a power transistor 202, a diode 1710, an output capacitor 1712, an inductor 204, an interface circuit 210, and a resistor 208. In some embodiments, the boost converter 1800 regulates the current I. LED For example, to drive an LED string or recharge a battery while maintaining voltage V. LED Higher than voltage V in In some embodiments, the voltage V in It can be voltage V 102 (For example, received from converter 102).

[0188] like Figure 18 As shown, when reference generator 226 is implemented as reference generator 600, control circuit 1820 operates in a similar manner to control circuit 220. However, control circuit 1820 uses signal V FW Instead of using signal V 608 Control switch 608.

[0189] Figure 19A schematic diagram of a CCM / DCM buck-boost converter 1900 according to an embodiment of the present invention is shown. The buck-boost converter 1900 includes a control circuit 1820, a power transistor 202, a diode 1710, an output capacitor 1712, an inductor 204, an interface circuit 210, and a resistor 208. In some embodiments, the buck-boost converter 1900 regulates the current I. LED This is used, for example, to drive an LED string or recharge a battery. In some embodiments, the voltage V in It can be voltage V 102 (For example, received from converter 102).

[0190] like Figure 19 As shown, by changing the way diode 1710, capacitor 1712 and load 106 are connected, the same control circuit 1820 can be used for buck-boost operation.

[0191] Figure 20 A schematic diagram of a CCM / DCM flyback converter 2000 according to an embodiment of the present invention is shown. The flyback converter 2000 includes a control circuit 1820, a power transistor 202, a diode 1710, an output capacitor 1712, a transformer 2002, an interface circuit 210, and a resistor 208. In some embodiments, the flyback converter 2000 regulates the current I. LED This is used, for example, to drive an LED string or recharge a battery. In some embodiments, the voltage V in It can be voltage V 102 (For example, received from converter 102).

[0192] like Figure 20 As shown, by replacing the inductor 204 with a transformer 2002 and changing the way the diode 1710, capacitor 1712 and load 106 are connected, the same control circuit 1820 can be used for buck-boost operations.

[0193] Figure 21 A schematic diagram of an isolated CCM / DCM flyback PFC converter 2100 according to an embodiment of the present invention is shown. The flyback converter 2100 includes a control circuit 2120, a power transistor 202, a diode 1710, an output capacitor 1712, a transformer 2002, a voltage divider 1706, an interface circuit 210, a feedback circuit 2102, and a resistor 208. The feedback circuit 2102 includes an optocoupler 2104 and a shunt regulator 2106 (e.g., an adjustable precision Zener shunt regulator). In some embodiments, the flyback converter 2100 regulates the output voltage V based on the voltage across the shunt regulator 2106. out .

[0194] like Figure 21As shown, control circuit 2120 operates in a similar manner to control circuit 1720. However, control circuit 2120 is based on feedback current I. FB Generated current I ch The feedback current I FB Based on the output voltage V of the optocoupler 2104 out To generate. Similar to control circuit 1720, current I ch It can be shaped into a rectified sine curve.

[0195] like Figure 21 As shown, in some embodiments, switches 604 and 608 are always closed. Therefore, in some embodiments, switches 604 and 608 can be omitted.

[0196] The converter 2100 can be used for, for example, high-power applications (e.g., 200 W or higher). In some embodiments, the converter 2100 can be used for street lighting applications.

[0197] Figure 22 A schematic diagram of an isolated CCM / DCM flyback PFC converter 2200 according to an embodiment of the present invention is shown. The flyback converter 2200 includes a control circuit 2220, a power transistor 202, a diode 1710, an output capacitor 1712, a transformer 2002, an interface circuit 210, a feedback circuit 2102, and a resistor 208. As shown, the flyback converter 2200 includes a secondary feedback loop, which includes the feedback circuit 2102. In some embodiments, the flyback converter 2100 regulates the output voltage V. out The output voltage V out The target voltage is set based on the adjustment setpoint of the shunt regulator 2106 (the voltage on the shunt regulator 2106). In some embodiments, the flyback converter 2200 adjusts the current I. L This is used, for example, to drive an LED string or to recharge a battery. In some embodiments, the voltage V in It can be voltage V 102 (For example, received from converter 102).

[0198] like Figure 22 As shown, control circuit 2220 operates in a similar manner to control circuit 2120. However, control circuit 2220 draws current I from... ch Subtract current I FB Instead of being based on current I FB The voltage multiplied by the rectified AC voltage V 1701 To modulate current I ch Therefore, in some embodiments, analog dimming can be achieved by changing the current I. FB This is achieved by setting a point.

[0199] Figure 23 A schematic diagram of an isolated forward converter 2300 according to an embodiment of the present invention is shown. The forward converter 2300 includes a control circuit 2320, a power transistor 202, diodes 1710 and 2310, an inductor 2312, an output capacitor 1712, a transformer 2002, an interface circuit 210, a feedback circuit 2102, and a resistor 208. As shown, the forward converter 2300 includes a secondary feedback loop, which includes the feedback circuit 2102. In some embodiments, the forward converter 2300 regulates the output voltage V. out The output voltage V out The target voltage is set based on the adjustment setpoint of the shunt regulator 2106. In some embodiments, the voltage V in It can be voltage V 102 (For example, received from converter 102).

[0200] like Figure 23 As shown, control circuit 2320 operates in a similar manner to control circuit 2220. However, control circuit 2320 uses voltage V 608 Instead of using signal V FW Control switch 608.

[0201] For example Figure 22 and Figure 23 As shown, in some embodiments, only the voltage loop (e.g., including feedback circuit 2102) is frequency compensated, while the current loop is compensated by the average capacitor 614.

[0202] Some advantages of this embodiment include the use of a single-loop system compared to conventional average current-mode control methods that use two nested loops (each requiring frequency compensation). Using a single-loop system can advantageously lead to a simpler and less costly implementation.

[0203] Additional advantages of some embodiments include greater versatility, as some embodiments allow control of the entire inductor current I. L Or only a portion thereof, which can advantageously allow some embodiments to be used for various purposes (e.g., controlling the output voltage V). LED ).

[0204] Exemplary embodiments of the invention are summarized herein. Other embodiments may also be understood from the entirety of this specification and the claims filed herein.

[0205] Example 1. A control circuit includes: a driver having an output configured to be coupled to a control terminal of a first transistor; a first flip-flop having a first output coupled to an input of the driver and a first input configured to receive a clock signal, wherein the first flip-flop is configured to generate a first signal at a first output of the first flip-flop; a first comparator having an output coupled to a second input of the first flip-flop, a first input configured to receive a first voltage, and a second input configured to receive a second voltage; and a transconductance amplifier having a first input configured to receive a sensed voltage indicating a current flowing through a current path of the first transistor and a second input configured to receive a reference voltage. and an output coupled to a first input of a first comparator; an integrating capacitor coupled to the output of a transconductance amplifier and the first input of the first comparator; a first switch coupled across the integrating capacitor, the first switch having a control terminal configured to receive a second signal, the second signal being an inverted version of the first signal; a zero-crossing detection circuit having a first current path terminal configured to be coupled to a first transistor and an input of an inductor, wherein the zero-crossing detection circuit is configured to detect the demagnetization time of the inductor based on the input of the zero-crossing detection circuit and to generate a third signal based on the detected demagnetization time; and a reference generator configured to generate a second voltage based on the first signal and the third signal.

[0206] Example 2. According to the control circuit of Example 1, the reference generator includes: an output terminal configured to deliver a second voltage; an average capacitor coupled to the output terminal of the reference generator; a second switch having a first terminal configured to receive a first current, a second terminal coupled to the output terminal of the reference generator, and a control terminal configured to receive a first signal; a third switch having a first terminal coupled to the second terminal of the second switch, a second terminal configured to receive a reference voltage, and a control terminal configured to be driven based on a third signal; and a first resistor coupled between the second terminal of the second switch and the first terminal of the third switch.

[0207] Example 3. A control circuit based on one of Examples 1 or 2, wherein the control terminal of the third switch is configured to receive a third signal.

[0208] Example 4. A control circuit according to one of Examples 1 to 3, wherein the reference generator further includes: an OR gate having an output coupled to a control terminal of a third switch and a first input configured to receive a first signal; and an AND gate having a first input configured to receive a second signal, a second input configured to receive a third signal, and an output coupled to the second input of the OR gate.

[0209] Example 5. The control circuit according to one of Examples 1 to 4 further includes: a first current generator coupled to a first terminal of a second switch and configured to absorb a second current.

[0210] Example 6. A control circuit according to one of Examples 1 to 5, wherein a transconductance amplifier is configured to inject a first current from the output of the transconductance amplifier into an integrating capacitor, the first current being based on a sensed voltage, and the control circuit further includes a first current generator configured to inject a second current into the integrating capacitor.

[0211] Example 7. A control circuit according to one of Examples 1 to 6, wherein the zero-crossing detection circuit includes: a first terminal configured to be coupled to a first current path terminal of a first transistor via an interface circuit; a second comparator having a first input coupled to the first terminal and a second input coupled to the first terminal via a low-pass filter; and a second flip-flop having a first input configured to receive a second signal, a second input coupled to the output of the second comparator, and an output configured to deliver a third signal.

[0212] Example 8. The control circuit according to one of Examples 1 to 7 further includes: a voltage feedforward circuit including a current mirror configured to inject a first current into a first input of a transconductance amplifier based on a second current flowing through an interface circuit, the interface circuit being coupled to a first current path terminal of a first transistor and an inductor.

[0213] Example 9. A control circuit according to one of Examples 1 to 8, wherein a first input of a first flip-flop corresponds to a setting input, and wherein a second input of a first flip-flop corresponds to a reset input.

[0214] Example 10. A control circuit according to one of Examples 1 to 9, wherein a first input of a transconductance amplifier is coupled to a first terminal of a sensing resistor, the sensing resistor having a second terminal configured to receive a reference voltage.

[0215] Example 11. The control circuit according to one of Examples 1 to 10 further includes: a clock circuit having an output coupled to a first input of a first flip-flop.

[0216] Example 12. A control circuit according to one of Examples 1 to 11, wherein the clock circuit includes: a second switch having a control terminal configured to receive a second signal, a first terminal configured to receive an oscillator current, and a second terminal; a first resistor coupled to the second terminal of the second switch; a second capacitor coupled to the first resistor; a second comparator having a first input coupled to the second terminal of the second switch, a second input, and an output coupled to the first input of a first flip-flop; a third capacitor coupled to the second input of the second comparator; a first current generator coupled to the third capacitor and the second input of the second comparator; and a third switch having a first terminal coupled to the first current generator, a second terminal configured to receive a reference voltage, and a control terminal configured to receive the first signal.

[0217] Example 13. A control circuit based on one of Examples 1 to 12, wherein the clock circuit has a fixed frequency.

[0218] Example 14. A control circuit based on one of Examples 1 to 13, wherein the control circuit is integrated into a single integrated circuit.

[0219] Example 15. A control circuit according to one of Examples 1 to 14, wherein the driver is a gate driver and wherein the first transistor is a power metal-oxide-semiconductor field-effect transistor (MOSFET) or GaN transistor, having a control terminal coupled to the output of the gate driver.

[0220] Example 16. A method comprising: turning on a first transistor based on a clock signal, wherein a current path of the first transistor is coupled to an inductor; generating a sense current based on a current flowing through the current path of the first transistor; integrating the sense current using an integrating capacitor to generate a first voltage; injecting the first current into an averaging capacitor to generate a second voltage; turning off the first transistor when the first voltage becomes higher than the second voltage; and discharging the integrating capacitor when the first transistor is turned off.

[0221] Example 17. The method according to Example 16 further includes: generating a sense voltage based on the current flowing through the current path of the first transistor, wherein generating the sense current includes: generating a sense current based on the sense voltage using a transconductance amplifier.

[0222] Example 18. A method according to one of Examples 16 or 17, wherein injecting a first current into an average capacitor includes: closing a first switch when the first transistor is turned off, and opening the first switch when the first transistor is turned on.

[0223] Example 19. The method according to one of Examples 16 to 18 further includes: detecting the demagnetization time of the inductor; and controlling a second switch based on the detected demagnetization time, the second switch being coupled to the first switch via a first resistor.

[0224] Example 20. The method according to one of Examples 16 to 19 further includes: adjusting the average output current flowing through the load coupled to the inductor based on a first current.

[0225] Example 21. The method of one of Examples 16 to 20, wherein the average output current is proportional to the first current.

[0226] Example 22. The method according to one of Examples 16 to 21 further includes: adjusting the output voltage across the load coupled to the inductor based on a first current.

[0227] Example 23. A switch-converter includes: a power transistor; a sensing resistor coupled to a current path of the power transistor; an inductor coupled to a current path of the power transistor; a driver having an output coupled to a control terminal of the power transistor; a flip-flop having a first output coupled to an input of the driver and a first input configured to receive a clock signal, wherein the flip-flop is configured to generate a first signal at its first output, and wherein the flip-flop is configured to turn on the power transistor based on the clock signal and the first signal; a first comparator having an output coupled to a second input of the flip-flop, a first input configured to receive a first voltage, and a second input configured to receive a second voltage, wherein the flip-flop is configured to turn off the power transistor based on the output of the first comparator and the first signal; and a transconductance. An amplifier having a first input coupled to an intermediate node, a second input configured to receive a reference voltage, and an output coupled to the first input of a first comparator, the intermediate node being coupled between a current path of a power transistor and a sensing resistor; an integrating capacitor coupled to the output of a transconductance amplifier and the first input of the first comparator; a first switch coupled to the integrating capacitor, the first switch being configured to discharge the integrating capacitor when the power transistor is turned off; a zero-crossing detection circuit having a current path coupled to the power transistor and an input of an inductor, wherein the zero-crossing detection circuit is configured to detect the demagnetization time of the inductor based on the input of the zero-crossing detection circuit and to generate a second signal based on the detected demagnetization time; and a reference generator configured to generate a first voltage based on the first signal and the second signal.

[0228] Example 24. The switching converter according to Example 23 further includes: a transformer, including a first winding magnetically coupled to a second winding, the first winding being an inductor.

[0229] Example 25. A switching converter according to one of Examples 23 or 24, further comprising: a diode coupled between a first terminal of the inductor and a power supply terminal; and a first capacitor coupled between a second terminal of the inductor and a power supply terminal.

[0230] Example 26. A switching converter according to one of Examples 23 to 25 further includes: a secondary winding magnetically coupled to an inductor; and a voltage divider coupled between the secondary winding and the input of a zero-crossing detection circuit.

[0231] Example 27. A switching converter according to one of Examples 23 to 26 further includes: a first capacitor coupled to an inductor; and a voltage divider coupled between the first capacitor and the input of a zero-crossing detection circuit.

[0232] Example 28. A switching converter according to one of Examples 23 to 27, wherein the switching converter is configured to operate in continuous conduction mode (CCM) or discontinuous conduction mode (DCM) based on the average output current flowing through the inductor.

[0233] Example 29. A light-emitting diode (LED) lamp driver includes: an output terminal configured to be coupled to an LED string; a first switching converter configured to receive an AC voltage and generate a DC voltage from the AC voltage at a first power supply terminal; and a second switching converter configured to receive the DC voltage and deliver a regulated current to the LED string, the second switching converter including: a power transistor; a sensing resistor coupled to a current path of the power transistor; an inductor coupled to a current path of the power transistor and an output terminal; a diode coupled between the inductor and the first power supply terminal; a trigger having a first output coupled to a control terminal of the power transistor and a first input configured to receive a clock signal, wherein the trigger is configured to generate a first signal at the first output of the trigger, and wherein the trigger is configured to turn on the power transistor based on the clock signal and using the first signal; and a first comparator having an output coupled to a second input of the trigger and configured to receive the first voltage. A first input and a second input configured to receive a second voltage, wherein a trigger is configured to turn off a power transistor based on the output of a first comparator using a first signal; a transconductance amplifier having a first input coupled to an intermediate node, a second input coupled to a second power supply terminal, and an output coupled to the first input of the first comparator, the intermediate node being coupled between the current path of the power transistor and a sensing resistor; an integrating capacitor coupled to the output of the transconductance amplifier and the first input of the first comparator; a first switch coupled to the integrating capacitor, the first switch being configured to discharge the integrating capacitor when the power transistor is turned off; a zero-crossing detection circuit having a current path coupled to the power transistor and an input of an inductor, wherein the zero-crossing detection circuit is configured to detect the demagnetization time of the inductor based on the input of the zero-crossing detection circuit and to generate a second signal based on the detected demagnetization time; and a reference generator configured to generate a first voltage based on the first signal and the second signal.

[0234] Example 30. An LED lamp driver according to Example 29, wherein the first switching converter is a power factor correction (PFC) switching converter.

[0235] Example 31. An LED driver according to one of Examples 29 or 30, wherein the second power supply terminal is coupled to ground.

[0236] While the invention has been described with reference to illustrative embodiments, this description is not intended to be construed as limiting. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to those skilled in the art during the description. Therefore, the appended claims are intended to cover any such modifications or embodiments.

Claims

1. A control circuit, comprising: A driver having an output configured to be coupled to a control terminal of a first transistor; A first flip-flop has a first output coupled to an input of the driver and a first input configured to receive a clock signal, wherein the first flip-flop is configured to generate a first signal at the first output of the first flip-flop; A first comparator has an output coupled to a second input of the first flip-flop, a first input configured to receive a first voltage, and a second input configured to receive a second voltage. A transconductance amplifier having a first input configured to receive a sensed voltage indicating a current flowing through a current path of the first transistor, a second input configured to receive a reference voltage, and an output coupled to the first input of the first comparator; An integrating capacitor is coupled to the output of the transconductance amplifier and the first input of the first comparator; A first switch, coupled across the integrating capacitor, has a control terminal configured to receive a second signal, which is an inverted version of the first signal; A zero-crossing detection circuit has a first current path terminal configured to be coupled to the first transistor and an input to an inductor, wherein the zero-crossing detection circuit is configured to detect the demagnetization time of the inductor based on the input of the zero-crossing detection circuit, and to generate a third signal based on the detected demagnetization time. as well as A reference generator is configured to generate the second voltage based on the first signal and the third signal.

2. The control circuit according to claim 1, wherein the reference generator comprises: The output terminal is configured to deliver the second voltage; An average capacitor is coupled to the output terminal of the reference generator; The second switch has a first terminal configured to receive a first current, a second terminal coupled to the output terminal of the reference generator, and a control terminal configured to receive the first signal. The third switch has a first terminal coupled to the second terminal of the second switch, a second terminal configured to receive the reference voltage, and a control terminal configured to be driven based on the third signal. as well as A first resistor is coupled between the second terminal of the second switch and the first terminal of the third switch.

3. The control circuit according to claim 2, wherein the control terminal of the third switch is configured to receive the third signal.

4. The control circuit according to claim 2, wherein the reference generator further comprises: An OR gate having an output coupled to the control terminal of the third switch and a first input configured to receive the first signal; as well as An AND gate has a first input configured to receive the second signal, a second input configured to receive the third signal, and an output coupled to the second input of the OR gate.

5. The control circuit according to claim 2 further includes: A first current generator is coupled to the first terminal of the second switch and is configured to absorb a second current.

6. The control circuit of claim 1, wherein the transconductance amplifier is configured to inject a first current from the output of the transconductance amplifier into the integrating capacitor, the first current being based on the sensed voltage, and the control circuit further includes a first current generator configured to inject a second current into the integrating capacitor.

7. The control circuit according to claim 1, wherein the zero-crossing detection circuit comprises: The first terminal is configured to be coupled to the first current path terminal of the first transistor via an interface circuit. The second comparator has a first input coupled to the first terminal and a second input coupled to the first terminal via a low-pass filter; as well as The second flip-flop has a first input configured to receive the second signal, a second input coupled to the output of the second comparator, and an output configured to deliver the third signal.

8. The control circuit according to claim 1 further includes: A voltage feedforward circuit includes a current mirror configured to inject a first current into the first input of the transconductance amplifier based on a second current flowing through an interface circuit, the interface circuit being coupled to the first current path terminal of the first transistor and the inductor.

9. The control circuit according to claim 1, wherein the first input of the first trigger corresponds to a setting input, and wherein the second input of the first trigger corresponds to a reset input.

10. The control circuit of claim 1, wherein the first input of the transconductance amplifier is coupled to a first terminal of a sensing resistor, the sensing resistor having a second terminal configured to receive the reference voltage.

11. The control circuit according to claim 1, further comprising: A clock circuit having an output coupled to the first input of the first flip-flop.

12. The control circuit according to claim 11, wherein the clock circuit comprises: The second switch has a control terminal configured to receive the second signal, a first terminal configured to receive oscillator current, and a second terminal. The first resistor is coupled to the second terminal of the second switch; The second capacitor is coupled to the first resistor; The second comparator has a first input and a second input coupled to the second terminal of the second switch, and an output coupled to the first input of the first flip-flop; The third capacitor is coupled to the second input of the second comparator; A first current generator is coupled to the third capacitor and the second input of the second comparator; as well as The third switch has a first terminal coupled to the first current generator, a second terminal configured to receive the reference voltage, and a control terminal configured to receive the first signal.

13. The control circuit according to claim 1, wherein the clock signal has a fixed frequency.

14. The control circuit of claim 1, wherein the control circuit is integrated into a single integrated circuit.

15. The control circuit of claim 1, wherein the driver is a gate driver, and wherein the first transistor is a power metal-oxide-semiconductor field-effect transistor (MOSFET) or a GaN transistor having a control terminal coupled to the output of the gate driver.

16. A method for controlling current, comprising: The first transistor is turned on based on a clock signal, wherein the current path of the first transistor is coupled to an inductor; The sensing current is generated based on the current flowing through the current path of the first transistor. The sensed current is integrated using an integrating capacitor to generate a first voltage; A first current is injected into the average capacitor to generate a second voltage; When the first voltage becomes higher than the second voltage, the first transistor is turned off; as well as When the first transistor is turned off, the integrating capacitor is discharged.

17. The method of claim 16, further comprising: A sensing voltage is generated based on the current flowing through the current path of the first transistor, wherein generating the sensing current includes generating the sensing current based on the sensing voltage using a transconductance amplifier.

18. The method of claim 16, wherein injecting the first current into the average capacitor comprises: When the first transistor is turned off, the first switch is closed; and when the first transistor is turned on, the first switch is opened.

19. The method of claim 18, further comprising: The demagnetization time of the inductor is detected; as well as The second switch is controlled based on the detected demagnetization time, and the second switch is coupled to the first switch via the first resistor.

20. The method of claim 16, further comprising: The average output current flowing through the load coupled to the inductor is adjusted based on the first current.

21. The method of claim 20, wherein the average output current is proportional to the first current.

22. The method of claim 16, further comprising: The output voltage across the load coupled to the inductor is adjusted based on the first current.

23. A switching converter, comprising: Power transistors; The sensing resistor is coupled to the current path of the power transistor; An inductor is coupled to the current path of the power transistor; A driver having an output coupled to the control terminal of the power transistor; A trigger having a first output coupled to an input of the driver and a first input configured to receive a clock signal, wherein the trigger is configured to generate a first signal at the first output of the trigger, and wherein the trigger is configured to turn on the power transistor based on the clock signal and using the first signal. A first comparator has an output coupled to a second input of the flip-flop, a first input configured to receive a first voltage, and a second input configured to receive a second voltage, wherein the flip-flop is configured to cause the power transistor to turn off based on the output of the first comparator using the first signal; A transconductance amplifier having a first input coupled to an intermediate node, a second input configured to receive a reference voltage, and an output coupled to the first input of a first comparator, the intermediate node being coupled between the current path of the power transistor and the sensing resistor; An integrating capacitor is coupled to the output of the transconductance amplifier and the first input of the first comparator; A first switch is coupled to the integrating capacitor, and the first switch is configured to discharge the integrating capacitor when the power transistor is turned off; A zero-crossing detection circuit having a current path coupled to the power transistor and an input to the inductor, wherein the zero-crossing detection circuit is configured to detect the demagnetization time of the inductor based on the input of the zero-crossing detection circuit, and to generate a second signal based on the detected demagnetization time; as well as A reference generator is configured to generate the first voltage based on the first signal and the second signal.

24. The switching converter of claim 23, further comprising: A transformer, comprising a first winding magnetically coupled to a second winding, wherein the first winding is the inductor.

25. The switching converter according to claim 23, further comprising: A diode is coupled between the first terminal of the inductor and the power supply terminal; And a first capacitor, coupled between the second terminal of the inductor and the power supply terminal.

26. The switching converter of claim 23, further comprising: The secondary winding is magnetically coupled to the inductor; And a voltage divider, coupled between the secondary winding and the input of the zero-crossing detection circuit.

27. The switching converter of claim 23, further comprising: A first capacitor is coupled to the inductor; And a voltage divider, coupled between the first capacitor and the input of the zero-crossing detection circuit.

28. The switching converter of claim 23, wherein the switching converter is configured to operate in continuous conduction mode (CCM) or discontinuous conduction mode (DCM) based on the average output current flowing through the inductor.

29. A light-emitting diode (LED) lamp driver, comprising: The output terminal is configured to be coupled to an LED string; A first switching converter is configured to receive an AC voltage and generate a DC voltage from the AC voltage at a first power supply terminal; as well as A second switching converter, configured to receive the DC voltage and deliver regulated current to the LED string, the second switching converter comprising: Power transistors, The sensing resistor is coupled to the current path of the power transistor. An inductor is coupled to the current path of the power transistor and the output terminal. A diode is coupled between the inductor and the first power supply terminal. A trigger has a first output coupled to a control terminal of the power transistor and a first input configured to receive a clock signal, wherein the trigger is configured to generate a first signal at the first output of the trigger, and wherein the trigger is configured to turn on the power transistor based on the clock signal and using the first signal. A first comparator has an output coupled to a second input of the flip-flop, a first input configured to receive a first voltage, and a second input configured to receive a second voltage, wherein the flip-flop is configured to cause the power transistor to turn off based on the output of the first comparator using the first signal. A transconductance amplifier having a first input coupled to an intermediate node, a second input coupled to a second power supply terminal, and an output coupled to the first input of a first comparator, the intermediate node being coupled between the current path of the power transistor and the sensing resistor; An integrating capacitor is coupled to the output of the transconductance amplifier and the first input of the first comparator. A first switch is coupled to the integrating capacitor, and the first switch is configured to discharge the integrating capacitor when the power transistor is turned off. A zero-crossing detection circuit having a current path coupled to the power transistor and an input to the inductor, wherein the zero-crossing detection circuit is configured to detect the demagnetization time of the inductor based on the input of the zero-crossing detection circuit, and to generate a second signal based on the detected demagnetization time; and A reference generator is configured to generate the first voltage based on the first signal and the second signal.

30. The LED lamp driver of claim 29, wherein the first switching converter is a power factor correction (PFC) switching converter.

31. The LED lamp driver of claim 29, wherein the second power terminal is coupled to ground.

32. A control circuit, comprising: The output terminal is configured to be coupled to the control terminal of the power transistor; A trigger having a first output coupled to the output terminal and a first input configured to receive a clock signal, wherein the trigger is configured to generate a first signal at the first output of the trigger, and wherein the trigger is configured to turn on the power transistor based on the clock signal and using the first signal. A comparator having an output coupled to a second input of the flip-flop, a first input configured to receive a first voltage, and a second input configured to receive a second voltage, wherein the flip-flop is configured to cause the power transistor to turn off based on the output of the comparator using the first signal; A transconductance amplifier having a first input configured to receive a sensed voltage indicating a current flowing through a current path of the power transistor, a second input configured to receive a reference voltage, and an output coupled to the first input of the comparator; An integrating capacitor is coupled to the output of the transconductance amplifier and the first input of the comparator; A first switch is coupled across the integrating capacitor, and the first switch is configured to discharge the integrating capacitor when the power transistor is turned off; A zero-crossing detection circuit has a first current path terminal configured to be coupled to the power transistor and an input to an inductor, wherein the zero-crossing detection circuit is configured to detect the demagnetization time of the inductor based on the input of the zero-crossing detection circuit, and to generate a second signal based on the detected demagnetization time. as well as A reference generator is configured to generate the first voltage based on the first signal and the second signal.

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