State control method, device and equipment applied to chip and storage medium

Abstract

The application discloses a state control method and device applied to a chip, equipment and a storage medium. The method comprises the following steps: obtaining a state switching mode of a to-be-controlled chip from a first working state to a second working state; determining estimated to-be-used information corresponding to the state switching mode; determining a target state switching mode based on the estimated to-be-used information and actual business demand conditions of the to-be-controlled chip in the first working state determined based on historical working information of the to-be-controlled chip, so as to switch the working state of the to-be-controlled chip based on the target state switching mode. The method solves the problem that the state switching efficiency is poor in the prior art because the state switching is performed by using a switching script when the state switching is detected, and achieves the effect that the working state of the chip can be accurately switched while ensuring the stable operation of the chip.

Description

Technical Field

[0001] This invention relates to the field of computer processing technology, and in particular to a state control method, apparatus, device, and storage medium applied in chips. Background Technology

[0002] As power systems continue to develop, chips are becoming increasingly capable of performing more complex functions. This means that the same chip may operate in different states in different application scenarios, requiring switching between these states.

[0003] Currently, the existing working state switching method usually involves switching the state using a pre-written switching script when a working state switch is detected. However, when the chip is in the running state, the method of switching the state based on the switching script may have the risk of chip crash or error, which may lead to the problem of state switching failure. Summary of the Invention

[0004] This invention provides a state control method, apparatus, device, and storage medium for use in chips, so as to achieve the technical effect of highly accurate switching of chip working states while ensuring stable chip operation.

[0005] According to one aspect of the present invention, a state control method applied in a chip is provided, the method comprising:

[0006] Obtain the state switching mode of the chip under control when it switches from the first working state to the second working state;

[0007] Determine the estimated information to be used corresponding to the state switching method;

[0008] Based on the estimated usage information and the actual business requirements of the chip to be controlled in the first working state, a target state switching method is determined, so as to switch the working state of the chip to be controlled based on the target state switching method; wherein, the actual business requirements are determined based on the historical working information of the chip to be controlled.

[0009] According to another aspect of the present invention, a state control device for use in a chip is provided, the device comprising:

[0010] The state switching mode acquisition module is used to acquire the state switching mode of the chip under control when it switches from the first working state to the second working state.

[0011] The estimated information to be used determination module is used to determine the estimated information to be used corresponding to the state switching method;

[0012] The working state switching module is used to determine a target state switching method based on the estimated usage information and the actual business demand conditions of the chip to be controlled in the first working state, so as to switch the working state of the chip to be controlled based on the target state switching method; wherein, the actual business demand conditions are determined based on the historical working information of the chip to be controlled.

[0013] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:

[0014] At least one processor; and

[0015] A memory communicatively connected to the at least one processor; wherein,

[0016] The memory stores a computer program that can be executed by the at least one processor, which enables the at least one processor to perform the state control method applied to a chip according to any embodiment of the present invention.

[0017] According to another aspect of the present invention, a computer-readable storage medium is provided, the computer-readable storage medium storing computer instructions for causing a processor to execute and implement the state control method applied to a chip according to any embodiment of the present invention.

[0018] The technical solution of this invention obtains the state switching mode of the chip under control from a first working state to a second working state; determines the estimated usage information corresponding to the state switching mode; and determines the target state switching mode based on the estimated usage information and the actual business requirements of the chip under control in the first working state. The working state of the chip under control is then switched based on the target state switching mode. This solves the problem of poor switching efficiency caused by using a switching script to switch states when a state switch is detected in the prior art. The solution achieves the goal of determining the actual business requirements of the chip under control in each working state based on its historical working information, determining the estimated usage information of the state switching mode to be used during state switching, and judging whether the state switching mode is the target state switching mode by comparing the estimated usage information with the actual business requirements. This ensures that the state switch is performed when the actual business requirements support the execution of the target state switching mode, achieving the technical effect of highly accurate switching of the chip's working state while ensuring stable chip operation.

[0019] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a flowchart of a state control method applied to a chip according to Embodiment 1 of the present invention;

[0022] Figure 2 This is a flowchart of a state control method applied to a chip according to Embodiment 2 of the present invention;

[0023] Figure 3 This is a schematic diagram of a state control device applied in a chip according to Embodiment 4 of the present invention;

[0024] Figure 4 This is a schematic diagram of the structure of an electronic device that implements the state control method applied to a chip according to the embodiments of the present invention. Detailed Implementation

[0025] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0026] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0027] Example 1

[0028] Figure 1This is a flowchart of a state control method applied to a chip according to Embodiment 1 of the present invention. This embodiment is applicable to controlling the working state of a chip. The method can be executed by a state control device applied to the chip, which can be implemented in hardware and / or software and can be configured in a computing device. Figure 1 As shown, the method includes:

[0029] S110. Obtain the state switching mode of the chip to be controlled from the first working state to the second working state.

[0030] The chip to be controlled refers to the chip whose operating state needs to be controlled, such as a power chip. The chip to be controlled can have multiple operating states, such as normal operation, stop / standby, sleep, and safety protection. In normal operation, all modules inside the chip work normally, resulting in relatively high power consumption. In stop / standby, some modules stop working (e.g., the watchdog timer is off), resulting in relatively low power consumption. In sleep mode, only some modules are still working (e.g., the wake-up module), resulting in the lowest power consumption. In safety protection mode, only some modules (e.g., the failure signal output module) are still working; the failure signal output module can output a failure signal to activate other safety protection modules in the system to enter a specific safety state. The first operating state refers to the current operating state. The second operating state refers to the operating state to which the chip needs to switch. For example, switching from state A to state B can use state A as the first operating state and state B as the second operating state. The state switching method refers to the switching control strategy executed when controlling the state switch, such as the strategy used when switching from state A to state B.

[0031] It should be noted that in practical applications, state switching can be controlled through external circuit configuration, SPI (Serial Peripheral Interface) communication, or preset wake-up functions. SPI communication is more flexible but requires software control and pre-compiled calling scripts. The wake-up function can be used not only to exit the chip's sleep state but also in normal operation and standby states. For example, the chip can provide wake-up functionality in normal operation, standby, sleep, and safety protection states; however, the wake-up event depends on the chip's current operating state. If the chip is in normal operation or standby state, the wake-up event is an interrupt signal output by the chip. If the chip is in sleep or safety protection state, the wake-up event is a reset signal (the chip will restart and enter normal operation). Different wake-up events result in different methods of controlling state switching.

[0032] In this embodiment, when detecting the switching of the working state using the currently adopted control state switching method, the state switching method can be determined so that the chip performance can be judged to meet the switching requirements of the state switching method.

[0033] S120. Determine the estimated information to be used corresponding to the state switching method.

[0034] Among them, the estimated information to be used can be used to characterize the demand for control switching. The estimated information to be used can refer to the expected demand data during the execution of the state switching method. The demand data can include multiple demand items, such as load information, processing time, power consumption, operating frequency, business data traffic, etc.

[0035] Specifically, the required application demand data can be determined based on the business processing information in the state switching mode, and used as the estimated information to be used, so as to judge whether the chip performance can handle the estimated information to be used.

[0036] S130. Based on the estimated usage information and the actual business requirements of the chip to be controlled in the first working state, determine the target state switching method, and switch the working state of the chip to be controlled based on the target state switching method.

[0037] The actual business requirements are determined based on the historical operating information of the chip to be controlled. This historical information includes the chip's operational status in at least one operating state. The actual business requirements can characterize the chip's actual performance, such as load information, processing time, power consumption, operating frequency, and business data traffic.

[0038] In this embodiment, by comparing and analyzing the estimated usage information with the actual business requirements of the controlled chip in its first operating state, it can be determined whether the current actual business performance can handle the estimated usage information. If so, it means that the actual business performance can support the normal execution of the current state switching method, and this state switching method can be used as the target state switching method. Then, the operating state of the controlled chip can be switched based on the target state switching method. If not, it means that the actual business performance cannot meet the requirements of the state switching method. In this case, the state switching method can be changed. When the actual business performance can support the execution of the changed state switching method, the changed state switching method can be used as the target state switching method. For example, if the actual business requirements cannot handle the estimated usage information of the state switching method when switching the operating state using the currently adopted state switching method, it is considered that the switching may fail. In this case, a strategy adjustment can be made to change the state switching method.

[0039] To improve the accuracy of state switching, after changing the state switching method, the estimated usage information for the new state switching method can be determined, and the estimated usage information can be compared and analyzed with the actual business requirements. Optionally, based on the estimated usage information and the actual business requirements of the chip to be controlled in its first operating state, a target state switching method is determined, including: determining the comparison result of the estimated usage information and the actual business requirements under the same performance dimension; if the comparison result indicates that the chip load is exceeded, the state switching method is changed, and the steps of determining the estimated usage information corresponding to the state switching method and determining the target state switching method are re-executed until the last state switching method; if the comparison result indicates that the chip load is not exceeded, the state switching method is taken as the target state switching method.

[0040] Among them, the performance dimension can be used to characterize the requirements.

[0041] In this embodiment, the estimated usage information and the actual business requirements are compared under the same performance dimension to obtain the comparison result. If the comparison result indicates that the chip load is exceeded, the estimated usage information exceeds the constraints of the actual business requirements, and a switching failure may occur. In this case, the state switching method can be changed, and the steps of determining the estimated usage information corresponding to the state switching method and determining the target state switching method can be re-executed until the last state switching method is determined. If the comparison result indicates that the chip load is not exceeded, it means that the state switching method can normally complete the control state switching operation, and the state switching method is then taken as the target state switching method.

[0042] In the technical solution provided by the embodiments of the present invention, the actual business requirements of the chip under control in each working state can be determined by the historical working information of the chip under control, so as to determine whether the current state switching method is the target state switching method based on the corresponding actual business requirements when switching states.

[0043] Optionally, it also includes: acquiring historical working information corresponding to the chip to be controlled; determining the state dwell time and working attribute information of the chip to be controlled in each working state based on the historical working information; for each working state, determining the actual load attribute corresponding to the current working state based on the state dwell time and working attribute information, and determining the actual business requirement conditions of the chip to be controlled in the current working state based on the actual load attribute.

[0044] The operating status includes at least one of the following: normal operation, standby / stop, hibernation, and security protection. Operating attribute information may include operating parameters for the corresponding status, such as status type, operating frequency, and business data traffic. The method for determining the actual load attributes corresponding to each operating status is the same; any one of these operating statuses will be used as the current operating status for description. The actual load attribute can be the load rate.

[0045] In practical applications, historical operating information can be pre-stored in a database or in a cache folder as logs; this technical solution does not limit the specific storage format. Subsequently, data can be retrieved by calling a preset data acquisition interface to obtain the historical operating information. This historical operating information includes the operating information of the chip under control in various operating states. Furthermore, based on the operating information in each operating state, the duration of the chip's stay in each state can be calculated as the state dwell time. The state operating parameters generated in the corresponding operating state can also be used as operating attribute information. Further, based on the state dwell time and operating attribute information of the current operating state, the actual load attribute corresponding to the current operating state can be calculated. Specifically, this can be achieved by: determining the resource utilization attribute corresponding to the current operating state based on the state dwell time and business data traffic; determining the actual power consumption information corresponding to the current operating state based on resource utilization and operating frequency; and determining the actual load attribute of the chip under control in the current operating state based on the actual power consumption information and a preset power consumption value.

[0046] Among them, resource utilization attributes can be used to characterize the utilization of resources, and can be referred to as resource utilization rate.

[0047] Specifically, for the current operating state, the corresponding state dwell time and business data traffic can be divided, and the quotient can be used as the resource utilization rate. Then, the resource utilization rate can be multiplied by the operating frequency, and the product can be used as the actual power consumption information for the current operating state. Furthermore, the ratio between the actual power consumption information and the preset rated power consumption can be used as the actual load rate, i.e., the actual load attribute. Accordingly, the actual load attribute generated by the chip in each operating state can be obtained. After determining the actual load attribute, the actual business performance requirements of the chip, i.e., the actual business requirement conditions, can be determined based on the actual load attribute. This allows for adjustment of the switching method when the estimated usage information of the currently used state switching method exceeds the load of the actual business requirement conditions.

[0048] To ensure that the storage address of historical working information can be found based on the parsed query conditions, and that historical working information can be accurately obtained, the following steps are optional: before obtaining the historical working information corresponding to the chip to be controlled, the following steps are also included: determining the status storage address information based on the information generation period and information identification identifier; determining the target read address based on the status storage address information, so as to read the historical working information based on the target read address.

[0049] Among them, the information identification identifier can be used to characterize the uniqueness of work status information. The status storage address information can be one storage address or multiple storage addresses, and each storage address can correspond to a cache location.

[0050] It should be noted that the information generation period and / or information identification identifier can be pre-associated and bound with the status storage address information, and the historical working information of the chip to be controlled can be stored in the cache or database corresponding to the status storage address information.

[0051] In practical applications, after receiving an information query instruction, the instruction can be parsed to extract the query conditions (including the information generation period and information identification identifier). Then, by utilizing the correlation, the status storage address information corresponding to the query conditions can be determined, and the status storage address information can be used as the target read address and called to read historical work information.

[0052] The technical solution of this embodiment obtains the state switching mode of the chip under control from a first working state to a second working state; determines the estimated usage information corresponding to the state switching mode; and determines the target state switching mode based on the estimated usage information and the actual business requirements of the chip under control in the first working state. The working state of the chip under control is then switched based on the target state switching mode. This solves the problem of poor switching efficiency caused by using a switching script to switch states when a state switch is detected in the prior art. It achieves the goal of determining the actual business requirements of the chip under control in each working state based on its historical working information, determining the estimated usage information of the state switching mode to be used during state switching, and judging whether the state switching mode is the target state switching mode by comparing the estimated usage information with the actual business requirements. This ensures that the state switch is performed when the actual business requirements support the execution of the target state switching mode, achieving the technical effect of highly accurate switching of the chip's working state while ensuring stable chip operation.

[0053] Example 2

[0054] Figure 2This is a flowchart of a state control method applied to a chip according to Embodiment 2 of the present invention. Based on the foregoing embodiments, after determining the operating attribute information of the chip to be controlled, the operating attribute information can be analyzed to determine the risk of chip damage and to provide timely risk warnings. Specific implementation methods can be found in the technical solution of this embodiment. Technical terms that are the same as or corresponding to those in the above embodiments will not be repeated here.

[0055] like Figure 2 As shown, the method specifically includes the following steps:

[0056] S210. Based on the working attribute information, determine the chip damage attribute corresponding to the chip to be controlled.

[0057] Among them, chip damage attributes can be used to characterize the probability of chip damage.

[0058] In this embodiment, feature recognition can be performed on various status parameters of the operating attribute information (such as operating frequency, business data traffic, etc.), and then the probability of damage can be evaluated based on the obtained recognition results to obtain the chip damage attributes. For example, feature calculations can be performed on the obtained status parameters in conjunction with historical chip damage data. If the status parameter data is high-frequency data in historical chip damage data, the probability of chip damage can be considered high; if the status parameter data is low-frequency data in historical chip damage data, the probability of chip damage can be considered low.

[0059] To improve the accuracy of chip damage attribute assessment, the correlation between historical chip damage data and operational attribute information can be analyzed. Correlation refers to the degree of association between two data points. A stronger positive correlation between historical chip damage data and operational attribute information indicates a higher chip damage attribute value, while a weaker negative correlation indicates a lower chip damage attribute value.

[0060] Optionally, based on the operating attribute information, the chip damage attribute corresponding to the chip to be controlled is determined, including: determining the chip damage attribute based on the correlation between the operating attribute information and historical chip damage data, as well as the feature attributes corresponding to the operating attribute information; or, processing the operating attribute information based on a pre-trained feature recognition model to obtain the chip damage attribute.

[0061] The historical chip damage data includes at least one damage event and total usage time corresponding to a damaged chip, as well as the damage frequency corresponding to each damage event. The operational attribute information can contain multiple state parameters, each of which can be considered a feature item. Feature attributes can be feature values ​​or feature ranges. Feature values ​​(or feature ranges) can be used to characterize the correlation between a corresponding feature item and a relevant historical damage event, and the magnitude of the damage frequency covered within that event. For example, if feature item 'a' is associated with a relevant historical damage event, and the higher the damage frequency covered within that event, the larger the feature value is considered, and the more pronounced the damage feature. Feature attributes can be pre-stored in a feature list or calculated in real-time using the historical chip damage data. The feature recognition model can be a pre-trained neural network model used to identify the correlation between operational attribute information and historical chip damage data.

[0062] In this embodiment, correlation analysis technology can be used to analyze the degree of correlation between various state parameters in the working attribute information and various data in the historical chip damage data, thereby obtaining the correlation between each state parameter and each historical data. Alternatively, the characteristic attributes of the current state parameter can be determined by identifying the historical damage events associated with the current state parameter and the damage frequency covered by these events; or, the characteristic attributes corresponding to each state parameter can be obtained from a pre-constructed feature list. Furthermore, the total characteristic attribute can be determined by combining the characteristic attributes of each state parameter. For example, the mean of the characteristic attributes of each state parameter can be used as the total characteristic attribute; or the minimum value of the characteristic attribute can be used as the total characteristic attribute; or, the total characteristic attribute can be determined by averaging the characteristic values ​​based on the maximum and minimum boundary values ​​of each characteristic attribute; or, the characteristic slope can be calculated based on the maximum and minimum boundary values ​​of the characteristic, and then, combined with the characteristic slope and a preset slope reference value, the average value of the characteristic value can be estimated to obtain the total characteristic attribute. The total characteristic attribute can be used as the characteristic attribute corresponding to the working attribute information. Furthermore, feature calculations can be performed based on the correlation between each state parameter and historical data, as well as the characteristic attributes of the working attribute information, according to the set calculation logic, to obtain the chip damage attributes. Alternatively, a pre-trained neural network model can be used, with the acquired state parameters input into the model, and feature recognition performed based on the correlation between each state parameter and historical chip damage event data, historical damage frequency data, and total usage time data. The technical solutions mentioned in the embodiments of this invention do not limit the type of model used or the model training method.

[0063] It should be noted that a corresponding feature list can be constructed by combining historical chip damage data and deriving variables. The feature list can be constructed as follows: for each feature item to be used, determine the historical damage events associated with the current feature item to be used; based on the loss probability corresponding to the historical damage event, determine the selectable feature attributes corresponding to the current feature item to be used; and construct the feature list based on each feature item to be used and the corresponding selectable feature attributes.

[0064] The features to be used can be chip operating information, such as operating frequency, service data traffic, power consumption, load, usage time, etc. The features to be selected can be feature values ​​or feature ranges. Feature values ​​can be expressed as percentages or decimals, and feature ranges can be expressed as decimals within the range [0,1]. The method for determining the selectable feature attributes for each feature to be used is the same; any one of the features to be used can be used as the current feature to be used.

[0065] Specifically, correlation analysis can be performed between the current feature to be used and historical damage events in historical chip damage data to identify historical damage events associated with the current feature to be used, such as identifying historical damage events with association values ​​higher than a preset threshold. Furthermore, the damage frequency covered by the historical damage events can be determined; the higher the damage frequency, the more obvious the damage feature is considered, and the larger the feature value. For example, the feature value can be calculated based on a pre-set feature calculation logic to determine the estimated feature value and thus determine the candidate feature attributes for the current feature to be used. The technical solution provided in this embodiment does not specifically limit the feature calculation logic. For example, the feature value can be estimated by averaging the determined maximum and minimum boundary values. Alternatively, the feature slope can be calculated based on the maximum and minimum boundary values, and then combined with the feature slope and a preset slope reference value to estimate the average feature value. The average estimation information can be used as the candidate feature attribute.

[0066] S220. If the chip damage attribute is greater than the preset damage attribute threshold, then the damage level is determined.

[0067] The damage attribute threshold can be a preset damage probability value. This technical solution does not limit this value and can be determined by technical personnel based on actual working conditions. The damage level can be used to characterize the probability of the chip being damaged. For example, level 1, level 2, and level 3. The higher the damage level, the greater the probability of the chip being damaged. Specifically, it can be determined according to the actual situation.

[0068] In this embodiment, chip damage attributes and damage attribute thresholds can be compared and analyzed. If the chip damage attribute is greater than the damage attribute threshold, the risk of the chip being damaged is considered high. In this case, the damage level can be determined based on the difference between the chip damage attribute and the damage attribute threshold, or the chip damage attribute itself. For example, if the difference is within the highest level range (e.g., [0.6, 0.7]), the damage level is considered to be the highest level; if the difference is within the lowest level range (e.g., [0.1, 0.2]), the damage level is considered to be the lowest level.

[0069] S230. Determine the early warning information corresponding to the damage level.

[0070] The warning information includes at least one of acoustic, optical, and message prompts. Acoustic prompts can be achieved through voice broadcasting devices (such as buzzers), while optical prompts can be achieved through light alarm devices (such as LED lights). Message prompts can be pop-ups on the interface, or they can be SMS or email notifications. For example, a message corresponding to the damage level can be sent to the terminal device, which can be a mobile phone, tablet, wearable device, etc.

[0071] It should be noted that, to improve the effectiveness of early warning prompts, different levels of damage can be used to differentiate warning information. Different damage levels correspond to different warning messages. For example, the highest damage level, meaning the highest probability of damage, can be indicated by a combination of audible and visual alarms, such as configuring LED lights to illuminate and deactivate in conjunction with a buzzer to achieve a warning effect. Alternatively, different preset colors of LED lights and varying buzzer volumes can be used to achieve the same warning effect, thus differentiating the urgency of the fault.

[0072] Specifically, when a chip is determined to be at risk of damage, a pre-set warning method can be used for early warning processing. This method can be at least one of the following: a first method of issuing warnings periodically according to a predetermined time; a second method of comparing and issuing warnings based on real-time and historical information; or a method of transmitting warning information via terminal devices. A warning method and warning message corresponding to the damage level can be determined, and the warning message can be sent to the user through the warning method. Alternatively, if the assessed chip damage attribute exceeds the damage attribute threshold, a pre-set warning method can be triggered to prompt maintenance personnel to perform equipment maintenance as soon as possible to avoid affecting the chip's operational stability.

[0073] The technical solution of this embodiment determines the chip damage attribute corresponding to the chip to be controlled by performing feature analysis and calculation on the working attribute information, thereby improving the accuracy of chip damage monitoring. When the chip damage attribute is greater than the preset damage attribute threshold, a warning message corresponding to the corresponding damage level is determined. Based on the warning message, the user is notified that the chip is at risk of damage, which can effectively prevent the chip from being damaged and improve the user's usage needs.

[0074] Example 3

[0075] As an optional embodiment of the above embodiments, specific application scenario examples are provided to enable those skilled in the art to further understand the technical solutions of the embodiments of the present invention. Specifically, please refer to the following detailed content.

[0076] In the technical solution provided by this invention, the chip to be controlled can be a dedicated power chip. In practical applications, the state storage address information is determined based on the chip information generation time and information identification identifier. For example, the information generation time and / or information identification identifier can be pre-associated and bound with the state storage address information. Afterwards, upon receiving an information query instruction, the instruction is first parsed to determine the query conditions (i.e., information generation time and identification identifier). Of course, the query information includes not only the information generation time and identification identifier, achieving optimization based on the query conditions and improving query accuracy. Then, the state storage address information can be queried and retrieved based on the determined query conditions. Based on the state storage address information, the target read address is determined, and historical working information is read based on the target read address. Historical working information generated by the chip within a preset time period can be obtained. This historical working information includes operating information under at least one of the following working states: normal working state, stop / standby state, hibernation state, and safety protection state. Under normal working state, all modules inside the chip can work normally. Under stop / standby state, some modules inside the chip stop working (e.g., the watchdog timer is off), achieving a certain low-power effect. In sleep mode, only some modules within the chip are still operational (such as the wake-up module), achieving minimal power consumption. In safety protection mode, only some modules remain operational, such as the failure signal output module, which can output a failure signal to activate other safety protection modules in the system to enter a specific safety state. Operating status information can be pre-stored in a database or as a log in a cache folder; the specific storage format is not limited. When historical operating information is needed, it can be retrieved by calling a preset data acquisition interface. Furthermore, based on historical operating information, the duration the chip spends in each operating state (i.e., state dwell time) and the generated state parameters (i.e., operating attribute information) can be determined. Operating attribute information includes at least one of operating frequency and business data traffic. Furthermore, if there is a deviation in the switching control strategy (i.e., state switching method) used when switching to a corresponding operating state based on the state dwell time and operating attribute information, the strategy is adjusted to ensure the system can handle current application demands. This ensures system stability while avoiding state switching due to erroneous operations, improving the accuracy of state switching.

[0077] It should be noted that the chip can use SPI communication, external circuit configuration, or a preset wake-up function to set and switch states internally. SPI communication is more flexible, but it requires software control and pre-compiled calling scripts. The wake-up function can be used not only to exit the chip's sleep state, but also in normal operation and standby states. For example, the chip can provide wake-up functionality in normal operation, standby, sleep, and safety protection states. However, the wake-up event generated depends on the chip's current operating state. If the chip is in normal operation or standby state, the wake-up event is an interrupt signal output by the chip. If the chip is in sleep or safety protection state, the wake-up event is a reset signal. The method of controlling state switching differs depending on the wake-up event.

[0078] As can be seen from the above, the power-specific chip operation control method disclosed in this application determines whether there is a deviation in the switching control strategy used when switching to the corresponding operating state based on the obtained duration of the chip in each state and the state parameters, and adjusts the strategy accordingly.

[0079] Based on the above scheme, when a deviation is found in the switching control strategy used when switching to a corresponding working state according to the state dwell time and working attribute information, the strategy adjustment is implemented as follows: The actual load rate (i.e., actual load attribute) generated by the chip in each state is determined based on the state dwell time, working frequency, and service data traffic. For example, resource utilization (i.e., resource utilization attribute) can be determined based on the state dwell time and service data traffic. Then, the actual power consumption generated by the chip in each state is determined based on the product of the working frequency and the resource utilization. Furthermore, the actual load rate generated in that working state is determined based on the ratio between the actual power consumption generated in the corresponding state and the preset rated power consumption. Further, the current actual service performance requirements can be determined based on the actual load rate. When the currently used switching control strategy (i.e., state switching method) is detected, it is determined whether the actual service performance requirements can meet the application requirements required by the switching control strategy. If not, the strategy is adjusted, and the switching control strategy is changed.

[0080] In the technical solution provided in this embodiment of the invention, feature recognition and calculation methods can be combined to perform feature calculation on the acquired state parameters and analyze the chip damage probability. Optionally, damage characteristics can be identified on each state parameter, and the damage probability can be evaluated based on the identification results to obtain the chip damage attributes. Specifically, feature calculation can be performed on the acquired state parameters, such as by combining historical chip damage event data, historical damage frequency data, and total usage time data. Based on the correlation between each state parameter and each historical data, feature values ​​in a feature list constructed through variable derivation are obtained, and then feature calculation is performed according to a preset feature calculation logic. The feature values ​​included in the feature list can be percentages or decimals ranging from [0,1]. Feature values ​​can be calculated based on the correlation strength between a single state parameter and at least one of the corresponding historical chip damage event data, historical damage frequency data, and total usage time data, as well as the magnitude of the data value, or based on multiple parameters. For example, if state parameter 'a' is associated with a corresponding historical damage event, and the higher the damage frequency covered in the event, the more obvious the damage feature is considered, and the larger the feature value is. No specific limitations are placed on the feature calculation logic. For instance, the feature value can be estimated by averaging based on the determined maximum and minimum feature boundary values; alternatively, the feature slope can be calculated based on the maximum and minimum feature boundary values, and then the feature slope and a preset slope reference value are combined to estimate the feature value. Based on the above scheme, a pre-trained neural network model can be used. The acquired state parameters are input into the model, and feature identification is performed based on the correlation between each parameter and historical chip damage event data, historical damage frequency data, and total usage time data to determine the chip damage attribute. This embodiment of the invention does not limit the type of model used or the model training method. If the chip damage attribute is greater than a preset damage attribute threshold, a preset early warning method is triggered to prompt maintenance personnel to perform equipment maintenance as soon as possible to avoid affecting the chip's operational stability. In other words, when the analysis results indicate that a chip is at risk of damage, a pre-set warning method can be used for early warning processing. This warning method includes at least one of the following: a first warning method that issues warnings periodically according to a predetermined time; a second warning method that compares and issues warnings based on real-time and historical information; and a warning information transmission method using terminal devices. It can also incorporate audible and visual alarms. When a warning is needed, a pre-set audible and visual alarm device controls the on / off state of preset LEDs of different colors and the sound of a buzzer based on the acquired control signal to achieve the warning effect. In one embodiment, different colored LEDs can be illuminated and the volume of the buzzer can be controlled to differentiate the urgency of the fault.

[0081] The technical solution of this embodiment obtains the state switching mode of the chip under control from a first working state to a second working state; determines the estimated usage information corresponding to the state switching mode; and determines the target state switching mode based on the estimated usage information and the actual business requirements of the chip under control in the first working state. The working state of the chip under control is then switched based on the target state switching mode. This solves the problem of poor switching efficiency caused by using a switching script to switch states when a state switch is detected in the prior art. It achieves the goal of determining the actual business requirements of the chip under control in each working state based on its historical working information, determining the estimated usage information of the state switching mode to be used during state switching, and judging whether the state switching mode is the target state switching mode by comparing the estimated usage information with the actual business requirements. This ensures that the state switch is performed when the actual business requirements support the execution of the target state switching mode, achieving the technical effect of highly accurate switching of the chip's working state while ensuring stable chip operation.

[0082] Example 4

[0083] Figure 3 This is a schematic diagram of a state control device applied in a chip according to Embodiment 4 of the present invention. Figure 3 As shown, the device includes: a state switching mode determination module 310, an estimated usage information determination module 320, and a working state switching module 330.

[0084] The system includes a state switching mode determination module 310, which acquires the state switching mode of the chip to be controlled from a first working state to a second working state; an estimated usage information determination module 320, which determines the estimated usage information corresponding to the state switching mode; and a working state switching module 330, which determines a target state switching mode based on the estimated usage information and the actual business requirements of the chip to be controlled in the first working state, so as to switch the working state of the chip to be controlled based on the target state switching mode; wherein the actual business requirements are determined based on the historical working information of the chip to be controlled.

[0085] The technical solution of this embodiment obtains the state switching mode of the chip under control from a first working state to a second working state; determines the estimated usage information corresponding to the state switching mode; and determines the target state switching mode based on the estimated usage information and the actual business requirements of the chip under control in the first working state. The working state of the chip under control is then switched based on the target state switching mode. This solves the problem of poor switching efficiency caused by using a switching script to switch states when a state switch is detected in the prior art. It achieves the goal of determining the actual business requirements of the chip under control in each working state based on its historical working information, determining the estimated usage information of the state switching mode to be used during state switching, and judging whether the state switching mode is the target state switching mode by comparing the estimated usage information with the actual business requirements. This ensures that the state switch is performed when the actual business requirements support the execution of the target state switching mode, achieving the technical effect of highly accurate switching of the chip's working state while ensuring stable chip operation.

[0086] Optionally, based on the above-mentioned device, the device may further include an actual business demand condition determination module, which includes a historical work information determination unit, a work attribute information determination unit, and an actual business demand condition determination unit.

[0087] A historical working information determination unit is used to acquire historical working information corresponding to the chip to be controlled; wherein, the historical working information includes the operating information of the chip to be controlled in at least one working state;

[0088] The working attribute information determination unit is used to determine the state dwell time and working attribute information of the chip to be controlled in each working state based on the historical working information; wherein, the working state includes at least one of normal working state, shutdown / standby state, hibernation state, and safety protection state;

[0089] The actual business requirement condition determination unit is used to determine the actual load attribute corresponding to the current working state based on the current working state dwell time and working attribute information for each working state, and to determine the actual business requirement condition of the chip to be controlled in the current working state based on the actual load attribute.

[0090] Based on the above-mentioned device, optionally, the actual business requirement condition determination module further includes: a state storage address information determination unit and a target read address determination unit.

[0091] The status storage address information determination unit is used to determine the status storage address information based on the information generation period and the information identification identifier.

[0092] The target read address determination unit is used to determine the target read address based on the status storage address information, so as to read historical work information based on the target read address.

[0093] Based on the above-mentioned device, optionally, the working attribute information includes the working frequency and service data traffic, and the actual service demand condition determination unit includes a resource utilization attribute determination subunit, an actual power consumption information determination subunit, and an actual load attribute determination subunit.

[0094] The resource utilization attribute determination subunit is used to determine the resource utilization attribute corresponding to the current working state based on the state dwell time and business data traffic of the current working state.

[0095] The actual power consumption information determination subunit is used to determine the actual power consumption information corresponding to the current working state based on the resource utilization rate and the operating frequency.

[0096] The actual load attribute determination subunit is used to determine the actual load attribute of the chip to be controlled in the current working state based on the actual power consumption information and the preset power consumption value.

[0097] Based on the above-mentioned device, optionally, the working state switching module 330 includes: a comparison result determination unit, a state switching mode replacement unit, and a target state switching mode determination unit.

[0098] The comparison result determination unit is used to determine the comparison result of the estimated information to be used and the actual business requirements under the same performance dimension.

[0099] The state switching mode replacement unit is used to change the state switching mode if the comparison result is overloaded chip, and re-execute the steps of determining the estimated information to be used corresponding to the state switching mode and determining the target state switching mode until the last one in the state switching mode.

[0100] The target state switching mode determination unit is used to determine the state switching mode as the target state switching mode if the comparison result is that the chip load is not exceeded.

[0101] Optionally, based on the above-mentioned device, the device may further include: a chip damage attribute determination unit, a damage level determination unit, and a warning prompt information determination unit.

[0102] The chip damage attribute determination unit is used to determine the chip damage attribute corresponding to the chip to be controlled based on the working attribute information.

[0103] The damage level determination unit is used to determine the damage level if the chip damage attribute is greater than a preset damage attribute threshold.

[0104] The warning information determination unit is used to determine the warning information corresponding to the damage level; wherein the warning information includes at least one of acoustic prompts, optical prompts, and message prompts.

[0105] Based on the above-mentioned device, optionally, the chip damage attribute determination unit is further configured to determine the chip damage attribute based on the correlation between the working attribute information and historical chip damage data, and the feature attributes corresponding to the working attribute information; or, to process the working attribute information based on a pre-trained feature recognition model to obtain the chip damage attribute.

[0106] The historical chip damage data includes at least one damage event and total usage time corresponding to a damaged chip, as well as the damage frequency corresponding to each damage event.

[0107] The state control device for chips provided in the embodiments of the present invention can execute the state control method for chips provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of executing the method.

[0108] Example 5

[0109] Figure 4 This is a schematic diagram of an electronic device implementing the state control method applied to a chip according to embodiments of the present invention. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.

[0110] like Figure 4As shown, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer program stored in the ROM 12 or loaded from storage unit 18 into the RAM 13. The RAM 13 may also store various programs and data required for the operation of the electronic device 10. The processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0111] Multiple components in electronic device 10 are connected to I / O interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of displays, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and communication unit 19, such as network card, modem, wireless transceiver, etc. Communication unit 19 allows electronic device 10 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0112] Processor 11 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, digital signal processors (DSPs), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as state control methods applied in the chip.

[0113] In some embodiments, the state control method applied in the chip may be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or mounted on electronic device 10 via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the state control method applied in the chip described above may be performed. Alternatively, in other embodiments, processor 11 may be configured to execute the state control method applied in the chip by any other suitable means (e.g., by means of firmware).

[0114] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0115] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0116] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0117] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0118] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or computing systems that include middleware components (e.g., application servers), or computing systems that include frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0119] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0120] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0121] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A state control method applied in a chip, characterized in that, include: Obtain the state switching mode of the chip under control when it switches from the first working state to the second working state; Determine the estimated information to be used corresponding to the state switching method; Based on the estimated usage information and the actual business requirements of the chip to be controlled in the first working state, a target state switching method is determined, so as to switch the working state of the chip to be controlled based on the target state switching method; wherein, the actual business requirements are determined based on the historical working information of the chip to be controlled. The step of determining the target state switching method based on the estimated usage information and the actual business requirements of the chip to be controlled in the first working state includes: Determine the comparison results between the estimated information to be used and the actual business requirements under the same performance dimension; If the comparison result indicates overload of the chip, the state switching method is changed, and the steps of determining the estimated information to be used corresponding to the state switching method and determining the target state switching method are re-executed until the last state switching method is reached; the state switching method refers to the switching control strategy executed when controlling the switching of working states; the state switching method includes external circuit configuration, serial peripheral interface communication, and preset wake-up function; If the comparison result indicates that the chip load is not exceeded, then the state switching method will be used as the target state switching method.

2. The method according to claim 1, characterized in that, Also includes: Obtain historical operating information corresponding to the chip to be controlled; wherein, the historical operating information includes the operating information of the chip to be controlled in at least one operating state; Based on the historical working information, the duration of state dwell and working attribute information of the chip to be controlled in each working state are determined; wherein, the working state includes at least one of normal working state, shutdown / standby state, hibernation state, and security protection state; For each working state, the actual load attribute corresponding to the current working state is determined based on the state dwell time and working attribute information, and the actual business requirement conditions of the chip to be controlled in the current working state are determined based on the actual load attribute.

3. The method according to claim 2, characterized in that, Before acquiring the historical operating information corresponding to the chip to be controlled, the method further includes: The status storage address information is determined based on the information generation time period and information identification identifier; Based on the state storage address information, a target read address is determined so as to read historical work information based on the target read address.

4. The method according to claim 2, characterized in that, The work attribute information includes work frequency and business data traffic. Determining the actual load attribute corresponding to the current work state based on the current work state dwell time and work attribute information includes: Based on the duration of the current working state and the business data traffic, determine the resource utilization attributes corresponding to the current working state; Based on the resource utilization attributes and operating frequency, determine the actual power consumption information corresponding to the current operating state; Based on the actual power consumption information and the preset power consumption value, the actual load attributes of the chip to be controlled in the current working state are determined.

5. The method according to claim 2, characterized in that, Also includes: Based on the working attribute information, determine the chip damage attribute corresponding to the chip to be controlled; If the chip damage attribute is greater than a preset damage attribute threshold, then the damage level is determined; Determine the warning information corresponding to the damage level; wherein the warning information includes at least one of acoustic prompts, optical prompts, and message prompts.

6. The method according to claim 5, characterized in that, The step of determining the chip damage attribute corresponding to the chip to be controlled based on the working attribute information includes: Based on the correlation between the operational attribute information and historical chip damage data, and the feature attributes corresponding to the operational attribute information, the chip damage attribute is determined; or, The chip damage attributes are obtained by processing the working attribute information based on a pre-trained feature recognition model. The historical chip damage data includes at least one damage event and total usage time corresponding to a damaged chip, as well as the damage frequency corresponding to each damage event.

7. A state control device applied in a chip, characterized in that, include: The state switching mode acquisition module is used to acquire the state switching mode of the chip under control when it switches from the first working state to the second working state. The estimated information to be used determination module is used to determine the estimated information to be used corresponding to the state switching method; The working state switching module is used to determine a target state switching method based on the estimated usage information and the actual business demand conditions of the chip to be controlled in the first working state, so as to switch the working state of the chip to be controlled based on the target state switching method; wherein, the actual business demand conditions are determined based on the historical working information of the chip to be controlled; The working status switching module includes: The comparison result determination unit is used to determine the comparison result of the estimated information to be used and the actual business requirements under the same performance dimension. The state switching mode replacement unit is used to change the state switching mode if the comparison result is overloaded chip, and re-execute the steps of determining the estimated information to be used corresponding to the state switching mode and determining the target state switching mode, until the last state switching mode; the state switching mode refers to the switching control strategy executed when controlling the switching of working states; the state switching mode includes external circuit configuration, serial peripheral interface communication, and preset wake-up function; The target state switching mode determination unit is used to determine the state switching mode as the target state switching mode if the comparison result is that the chip load is not exceeded.

8. An electronic device, characterized in that, The electronic device includes: At least one processor; and A memory communicatively connected to the at least one processor; wherein, The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the state control method applied to the chip according to any one of claims 1-6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that, when executed by a processor, implement the state control method applied to a chip as described in any one of claims 1-6.

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