1553 bus reuse module based on full digital test environment
By using a layered modular architecture for the 1553 bus reuse module, the complexity and time consumption issues in the 1553 bus simulation process are resolved, achieving the universality and ease of use of bus simulation, and improving testing efficiency and effectiveness.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BEIJING AEROSPACE AUTOMATIC CONTROL RES INST
- Filing Date
- 2022-10-13
- Publication Date
- 2026-05-12
AI Technical Summary
In existing technologies, the 1553 bus module in a fully digital test platform has a complex external configuration mode during the construction process, which consumes a lot of time and makes it difficult to guarantee the completeness of functional simulation and the diversity of fault modes.
The 1553 bus reuse module adopts a layered modular architecture, including an application layer, a business layer, and an interface layer. By masking the differences in configuration files and rich test commands, it can hide the detailed differences in the use of the 1553 bus by different objects under test, and realize the universality of bus simulation.
It improves the efficiency of setting up a fully digital testing environment and enhances testing support, thereby increasing the effectiveness and ease of use of testing and reducing reliance on hardware resources.
Smart Images
Figure CN115905093B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of embedded software testing technology, and specifically relates to a 1553 bus reuse module based on a fully digital testing environment. Background Technology
[0002] Embedded software testing environments mainly include three types: integrated testing environments, hardware-in-the-loop (HIL) simulation environments, and fully digital simulation environments. Integrated testing environments and HIL simulation environments heavily rely on hardware resources, making testing difficult when hardware conditions are unavailable. Therefore, the vast majority of embedded software testing in the aerospace field is currently conducted in fully digital simulation environments. Fully digital test platforms are commonly used testing tools in embedded software testing, freeing embedded software testing from dependence on hardware devices. They offer advantages such as high transparency, strong controllability, and ease of injecting test data and faults. They also provide effective support for testing low-probability, safety-critical functions. Furthermore, testers can complete non-intrusive testing without instrumenting the device under test.
[0003] The all-digital test platform provides an address monitoring and callback-based mechanism for environment setup personnel to perform peripheral customization development. However, while the peripheral customization mode can ensure that a test environment can be built for any type of peripheral, for complex peripherals such as the 1553 bus, customization is time-consuming and it is difficult to guarantee the completeness of functional simulation and the diversity of fault modes. Currently, the 1553 bus is the bus type commonly used in aerospace models, and the 1553 chips used in various models are basically the same. For new test objects, similar work still needs to be repeated. Therefore, there is an urgent need to develop a universal 1553 bus reuse module. Summary of the Invention
[0004] This invention overcomes one of the shortcomings of the prior art by providing a 1553 bus reuse module based on a fully digital test environment. It can shield the detailed differences in the use of the 1553 bus by different test objects, realize the universality of bus simulation, and solve the technical problem of having to repeat similar work for new test objects. It can improve the efficiency of building a fully digital test environment, the strength of test support, and the effectiveness of test.
[0005] According to one aspect of this disclosure, a 1553 bus reuse module based on a fully digital test environment is proposed. The module adopts a layered module architecture, including an application layer, a business layer and an interface layer.
[0006] The application layer includes scripts for transmitting and receiving data and injecting faults on the 1553 bus, input and output files for the 1553 bus data source, and configuration files for the 1553 bus, which are used for interaction with the user.
[0007] The business layer includes a configuration management unit, a script parsing unit, a fault management unit, and a core business management unit, which are used to implement 1553 bus data transmission and 1553 bus status monitoring.
[0008] The interface layer is used for message transmission with the all-digital test environment.
[0009] In one possible implementation, the 1553 bus profile is a maskable difference profile used to configure the 1553 bus using differences.
[0010] In one possible implementation, the configuration management unit of the service layer is used to read the 1553 bus configuration file information and automatically set the register and memory addressing mode of the 1553 bus reuse module.
[0011] In one possible implementation, the 1553 bus reuse module supports message modes such as BC->RT, RT->BC, RT->RT, and mode codes.
[0012] In one possible implementation, the 1553 bus reuse module utilizes the address monitoring and callback mechanism of the all-digital test environment to transmit the 1553 bus data.
[0013] In one possible implementation, the 1553 bus reuse module performs initialization operations during the initialization phase of the all-digital test environment. The initialization operations include reading the configuration file, identifying and parsing user configuration information, obtaining register memory addresses and address interval information, and monitoring the read and write operations of the registers and memory addresses.
[0014] In one possible implementation, the 1553 bus reuse module is used to manage the registers and memory space of the 1553 bus and store the register and memory values of the 1553 bus.
[0015] In one possible implementation, the script for transmitting and receiving data and injecting faults on the 1553 bus includes 1553 bus data transmission instructions and fault instructions to implement different 1553 bus operation modes.
[0016] In one possible implementation, during the operation phase of the all-digital test environment, the 1553 bus reuse module is used to monitor user data transmission and reception requests.
[0017] When a user data transmission / reception request is received, the 1553 bus reuse module implements 1553 bus data transmission according to the configuration file information and updates the register and memory values of the 1553 bus in the 1553 bus reuse module.
[0018] This disclosure discloses a 1553 bus reuse module based on a fully digital test environment. The module adopts a layered modular architecture, including an application layer, a business layer, and an interface layer. The application layer includes scripts for 1553 bus data transmission and reception and fault injection, 1553 bus data source input / output files, and a 1553 bus configuration file for user interaction. The business layer includes a configuration management unit, a script parsing unit, a fault management unit, and a core business management unit for 1553 bus data transmission and 1553 bus status monitoring. The interface layer is used for message transmission with the fully digital test environment. This module can shield the detailed differences in 1553 bus usage among different tested objects, achieving universality and ease of use in bus simulation. It solves the technical problem of having to repeat similar work for new tested objects, and improves the efficiency of building a fully digital test environment, test support capabilities, and test effectiveness. Attached Figure Description
[0019] The accompanying drawings are used to provide a further understanding of the technical solutions of this application or the prior art, and constitute a part of the specification. The drawings illustrating embodiments of this application, together with the embodiments of this application, are used to explain the technical solutions of this application, but do not constitute a limitation on the technical solutions of this application.
[0020] Figure 1 A diagram illustrating the architecture of a 1553 bus reuse module based on an all-digital test environment according to an embodiment of the present disclosure is shown.
[0021] Figure 2 A schematic diagram of the workflow of a 1553 bus reuse module based on an all-digital test environment according to an embodiment of the present disclosure is shown.
[0022] Figure 3 A schematic diagram of the operation flow of the object under test in the BC->RT message mode according to an embodiment of the present disclosure is shown;
[0023] Figure 4 A schematic diagram of the operation flow of a 1553 bus reuse module in BC->RT message mode according to an embodiment of the present disclosure is shown. Detailed Implementation
[0024] The embodiments of the present invention will be described in detail below with reference to the accompanying drawings and examples, so that the process of how the present invention uses technical means to solve technical problems and achieve corresponding technical effects can be fully understood and implemented accordingly. The embodiments of this application and the various features in the embodiments can be combined with each other without conflict, and the resulting technical solutions are all within the protection scope of the present invention.
[0025] Furthermore, the steps illustrated in the flowcharts of the accompanying drawings can be executed in a computer, such as a set of computer-executable instructions. Also, although a logical order is shown in the flowcharts, in some cases the steps shown or described may be performed in a different order than that presented here.
[0026] Figure 1 A diagram illustrating the architecture of a 1553 bus reuse module based on a fully digital test environment according to an embodiment of this disclosure is shown. This module employs a hierarchical modular architecture design, improving the effectiveness and completeness of 1553 bus simulation. The 1553 bus reuse module utilizes the address monitoring and callback mechanisms provided by the fully digital test environment to ensure the correct transmission of 1553 bus data and faults.
[0027] like Figure 1 As shown, the 1553 bus reuse module adopts a layered modular architecture, including an application layer, a service layer, and an interface layer. Each layer consists of multiple decoupled functional units. This layered modular architecture makes the 1553 bus reuse module easier to expand and maintain.
[0028] The application layer includes scripts for transmitting and receiving data and injecting faults on the 1553 bus, input and output files for the 1553 bus data source, and configuration files for the 1553 bus, which are used for interaction with the user.
[0029] In one example, the 1553 bus profile is a maskable difference profile, used to configure the 1553 bus to use differences.
[0030] In the aerospace field, the selection of 1553 chips for embedded software is generally consistent. However, the use of the same 1553 bus chip varies across different embedded software applications, such as differences in register addresses, memory addresses and address intervals, bus frequencies, and data storage endianness. To mask these differences, a user-friendly and readable maskable configuration file is used to configure all bus usage variations. The specific configuration of this maskable configuration file is shown in Table 1. As shown in Table 1, the maskable configuration file includes register configuration, memory configuration, and usage configuration. When setting up a fully digital test environment, users can create the configuration shown in Table 1 based on the specific usage of the 1553 bus by the object under test.
[0031]
[0032] Table 1. Maskable Difference Configuration Files
[0033] In one example, the script for transmitting and receiving data and injecting faults on the 1553 bus can include 1553 bus data transmission instructions and fault instructions to implement different 1553 bus operation modes.
[0034] To facilitate the use of the 1553 bus reuse module for different 1553 operating modes, a wealth of highly usable test commands are provided for users through scripts for 1553 bus data transmission and reception and fault injection, as shown in Table 2. Table 2 shows the highly usable test commands, including:
[0035] In RT mode, the command 1553BC_RT is used by BC to send data to RT;
[0036] In RT mode, the command 1553RT_BC is used for BC to collect data from RT;
[0037] In RT mode, commands include 1553CHSEL, used to switch buses;
[0038] Commands in RT mode include 1553B_SET_REG, which is used to set the value of the register;
[0039] Commands in RT mode include 1553B_SET_MEM, which is used to set memory values;
[0040] Commands in RT mode include 1553B_SET_FRAME_DELAY, which is used to set the frame delay;
[0041] Commands in RT mode include 1553B_INJECT_ERROR, used to inject bus faults;
[0042] Commands in BC mode include BC_MSG_Status, which is used to set the BC block status word and RT status word;
[0043] Commands in BC mode include Set_BC_Reg, which is used to set register values;
[0044] Commands in BC mode include RT_ANSWER, which is used to bind to the RT data source;
[0045] Commands in MT mode include RTMT_SEND_MT_DATA, which is used to simulate BC sending data to RT on the bus;
[0046] Commands in MT mode include RTMT_REC_RT_DATA, which is used to simulate data acquisition of RT by BC on the bus.
[0047]
[0048] Table 2 Test Instructions
[0049] The scripts for transmitting and receiving data and injecting faults via the 1553 bus contain a wealth of test commands as shown in Table 2. They not only achieve normal 1553 bus data transmission, but also implement a large number of fault modes, such as link layer faults like RT not in place and RT not responding, as well as protocol layer faults like checksum errors and data errors.
[0050] The business layer, comprising a configuration management unit, a script parsing unit, a fault management unit, and a core business management unit, is used to implement 1553 bus data transmission and 1553 bus status monitoring. For example, the business layer is the specific implementation of user operation processing, 1553 bus data transmission, and status monitoring in the 1553 bus reuse module.
[0051] In one example, the configuration management unit can read the 1553 bus configuration file information and automatically set the registers and memory addressing modes of the 1553 bus reuse module.
[0052] For example, the 1553 bus reuse module configuration management unit reads the 1553 bus configuration file information and automatically sets the addressing modes of registers and memory in the 1553 bus according to the configuration file information. It then executes subsequent simulation operations according to the register and memory addressing modes, thus achieving file-based configuration to shield the subtle differences in how different embedded software uses the 1553 bus. Users can achieve rapid migration and adaptation of the 1553 bus without modifying or recompiling the 1553 bus simulation source code.
[0053] The interface layer is the interface between the 1553 bus reuse module and the basic module of the all-digital test environment, and is used for message transmission with the all-digital test environment.
[0054] This disclosure discloses a 1553 bus reuse module based on a fully digital test environment. The module adopts a layered modular architecture, including an application layer, a business layer, and an interface layer. The application layer includes scripts for 1553 bus data transmission and reception and fault injection, 1553 bus data source input / output files, and a 1553 bus configuration file for user interaction. The business layer includes a configuration management unit, a script parsing unit, a fault management unit, and a core business management unit for 1553 bus data transmission and 1553 bus status monitoring. The interface layer is used for message transmission with the fully digital test environment. This module can shield the detailed differences in 1553 bus usage among different tested objects, achieving universality and ease of use in bus simulation. It solves the technical problem of having to repeat similar work for new tested objects, and improves the efficiency of building a fully digital test environment, test support capabilities, and test effectiveness.
[0055] In one possible implementation, the 1553 bus reuse module performs initialization operations during the initialization phase of the all-digital test environment. The initialization operations include reading the configuration file, identifying and parsing user configuration information, obtaining register memory addresses and address interval information, and monitoring the read and write operations of the registers and memory addresses.
[0056] During the operation phase of the all-digital test environment, the 1553 bus reuse module is used to monitor user data transmission and reception requests. When a user data transmission and reception request exists, the 1553 bus reuse module implements 1553 bus data transmission according to the configuration file information and updates the register and memory values of the 1553 bus in the 1553 bus reuse module.
[0057] Figure 2 A schematic diagram of the workflow of a 1553 bus reuse module based on a fully digital test environment according to an embodiment of the present disclosure is shown.
[0058] For example, during the initialization, test project loading, and execution phases of the all-digital test environment, the 1553 bus reuse module interacts with the basic modules of the all-digital test environment via messages. The 1553 reuse module implements functional simulation based on the all-digital test environment's address monitoring and callback mechanism, such as... Figure 2 As shown, steps 1-9 are operations performed by the 1553 bus reuse module; the remaining operations are performed by the basic module of the all-digital test environment. During the all-digital test initialization phase, the 1553 bus reuse module needs to perform initialization operations, including reading the configuration file, identifying and parsing user configuration information, obtaining register memory addresses, address intervals, and other information, and monitoring read and write operations on registers and memory addresses. Specifically, the 1553 bus reuse module needs to manage the registers and memory space of the 1553 bus; that is, the 1553 bus reuse module has a complete space for storing the register and memory values of the 1553 bus. For example... Figure 1 As shown, step 3 of the 1553 bus reuse module allocates memory space for the bus reuse module. All subsequent operations of the 1553 bus, such as the operation of the tested object on the 1553 bus, the transmission of 1553 bus data, and changes in the state of the tested object, will be reflected in the current space of the 1553 bus reuse module in real time.
[0059] In one possible implementation, the 1553 bus reuse module supports message modes such as BC (Bus Controller) -> RT (Remote Terminal), RT -> BC, RT -> RT, and mode codes, with the implementation mechanism of each bus message type being consistent.
[0060] Message transmission simulation is the core function of 1553 bus simulation. The following example, using the simulation of the test object in BC mode BC->RT single message frame in a fully digital test environment, will be used to introduce the 1553 bus message mode.
[0061] Figure 3 , Figure 4 The diagrams show the operation flow of the object under test and the 1553 bus reuse module in the BC->RT message mode according to an embodiment of the present disclosure.
[0062] In BC mode, such as Figure 3 As shown, after the tested object starts running, it first initializes the 1553 bus, and then actively initiates message transmission after the 1553 bus initialization is complete. The 1553 bus reuse module allocates a space to maintain the 1553 bus register and memory values; therefore, as... Figure 3 Operations such as setting the stack pointer, setting the number of messages to be sent, setting the message block address, writing command control words, and writing data to be sent are all reflected in the memory space of the 1553 bus reuse module in real time.
[0063] When the device under test sends a start / reset register start message (steps numbered in the diagram), the 1553 bus reuse module monitors the write operation to that address and then executes the following... Figure 4 The operation. For example... Figure 4 As shown, when the tested object starts the BC->RT message mode, the 1553 bus reuse module obtains the message descriptor by checking the stack pointer, obtains the message block pointer through the fourth word of the message descriptor, checks the control word, command word and data word of the current message in the message block, identifies the message type, completes the data output, and updates the register memory area, thereby realizing the simulation of BC->RT message transmission and the update of bus status.
[0064] This disclosed 1553 bus reuse module based on a fully digital test environment can achieve correct transmission of bus data and faults; improve the effectiveness and completeness of 1553 bus simulation; shield the detailed differences in the use of the 1553 bus by different test objects to achieve the universality of 1553 bus simulation; and improve the ease of use of the reuse module through various types of test script commands.
[0065] While the embodiments disclosed in this invention are as described above, the content is merely for the purpose of facilitating understanding of the invention and is not intended to limit the invention. Any person skilled in the art to which this invention pertains may make any modifications and variations in form and detail of the implementation without departing from the spirit and scope disclosed herein; however, the scope of patent protection for this invention shall still be determined by the scope defined in the appended claims.
Claims
1. A 1553 bus reuse module based on a fully digital test environment, characterized in that, The 1553 bus reuse module adopts a layered module architecture, including an application layer, a business layer, and an interface layer. The application layer includes scripts for transmitting and receiving data and injecting faults on the 1553 bus, input and output files for the 1553 bus data source, and a 1553 bus configuration file for interaction with the user. The 1553 bus configuration file is a maskable difference configuration file, which includes at least register configuration, memory configuration, and usage configuration for configuring the differences in how different tested objects use the 1553 bus. The business layer includes a configuration management unit, a script parsing unit, a fault management unit, and a core business management unit, used to implement 1553 bus data transmission and 1553 bus status monitoring; the configuration management unit is used to read the 1553 bus configuration file information and automatically set the register and memory addressing mode of the 1553 bus reuse module according to the 1553 bus configuration file information, so as to mask the differences in the use of the 1553 bus by different tested objects; The interface layer is used for message transmission with the all-digital test environment.
2. The 1553 bus reuse module according to claim 1, characterized in that, The 1553 bus reuse module supports message modes such as BC->RT, RT->BC, RT->RT, and mode codes.
3. The 1553 bus reuse module according to claim 1, characterized in that, The 1553 bus reuse module utilizes the address monitoring and callback mechanism of the all-digital test environment to transmit 1553 bus data.
4. The 1553 bus reuse module according to claim 1, characterized in that, The 1553 bus reuse module performs initialization operations during the initialization phase of the all-digital test environment. The initialization operations include reading the configuration file, identifying and parsing user configuration information, obtaining register memory addresses and address interval information, and monitoring the read and write operations of the registers and memory addresses.
5. The 1553 bus reuse module according to claim 1, characterized in that, The 1553 bus reuse module is used to manage the registers and memory space of the 1553 bus and store the register and memory values of the 1553 bus.
6. The 1553 bus reuse module according to claim 5, characterized in that, The scripts for 1553 bus data transmission and reception and fault injection include 1553 bus data transmission instructions and fault instructions, enabling different 1553 bus operation modes.
7. The 1553 bus reuse module according to claim 6, characterized in that, During the operation phase of the all-digital test environment, the 1553 bus reuse module is used to monitor user data transmission and reception requests; When a user data transmission / reception request is received, the 1553 bus reuse module implements 1553 bus data transmission according to the configuration file information and updates the register and memory values of the 1553 bus in the 1553 bus reuse module.