An avalanche photodiode device and a method of fabricating the same

By forming an inverted deep P-well and a highly doped PN region in a silicon substrate, the problems of low responsivity and breakdown in traditional APD structures are solved, realizing an avalanche photodiode with high responsivity and low breakdown voltage, which is suitable for depth information acquisition in autonomous driving systems.

CN115911183BActive Publication Date: 2026-04-17FUDAN UNIVERSITY +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
FUDAN UNIVERSITY
Filing Date
2022-12-16
Publication Date
2026-04-17

AI Technical Summary

Technical Problem

Traditional two-dimensional imaging technology cannot meet the depth information acquisition requirements of autonomous driving systems. The low responsivity and unstable photocurrent of two-dimensional photodiodes affect the accuracy of ToF measurement. The edge breakdown of the pn junction in the APD structure leads to reduced stability.

Method used

Employing a linear-mode avalanche photodiode structure compatible with existing silicon processes, it mitigates edge breakdown, improves responsivity, and reduces breakdown voltage by forming an inverted deep P-well and a highly doped PN region in the silicon substrate, making it suitable for I-ToF modules.

Benefits of technology

A high-response and low-breakdown-voltage avalanche photodiode was achieved, which improved the ability to detect low-intensity light, enhanced the accuracy and stability of the ToF ranging sensor, and reduced the impact of dark counting on ranging accuracy.

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Abstract

This invention discloses an avalanche photodiode device and its fabrication method. The avalanche photodiode device includes: a silicon substrate; a deep P-well with an inverted distribution formed in the silicon substrate, and a P-well formed on top of it. ‑ District; in P ‑ P is formed on one side of the upper part of the area. + District, in P ‑ N is formed on the other side of the upper part of the region. + The region, and adjacent N + District and located in P + District and N + The P-region of the interval; the source and drain are formed on the P-region of the silicon substrate, respectively. + District and N + Above and in contact with the region; an oxide layer covering the silicon substrate surface outside the source and drain electrodes. Compatible with CMOS processes, it can detect low-intensity light and is suitable for ToF ranging sensors.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, specifically to an avalanche photodiode device and its fabrication method. Background Technology

[0002] In systems such as autonomous vehicles that require precise capture and processing of information data, the acquisition of depth information is essential. Traditional two-dimensional imaging technology can no longer meet the requirements of rapidly developing autonomous driving systems, while three-dimensional images can provide not only intensity information on the two-dimensional image plane, but also distance information in the depth direction.

[0003] Time-of-flight (ToF) measurement methods refer to methods that measure the time required for a particle or wave to travel a certain distance, thereby understanding certain properties of the particle or wave. ToF can be divided into direct methods (D-ToF) and indirect methods (I-ToF). In D-ToF measurements, an avalanche photodiode (APD) is typically required to receive the reflected light. In contrast, an I-ToF measurement system usually requires a photodiode (PD) module to receive the reflected light, and the range is measured by the phase difference between the emitted and reflected light. However, PDs have low responsivity, resulting in a relatively short detection distance. Furthermore, the unstable photocurrent (reflected light) of the PD also reduces the accuracy of ToF measurements.

[0004] An APD (Automatic Photovoltaic Device) is a photoelectric conversion device that utilizes the avalanche multiplication effect of charge carriers to improve the photocurrent signal and enhance detection sensitivity. When the electric field in the depletion region is sufficiently large, photogenerated charge carriers are accelerated to very high speeds and collide with atoms in the crystal lattice during propagation. This generates additional electron-hole pairs, which are also accelerated, leading to new collisions and thus generating even more electron-hole pairs.

[0005] APDs typically employ a two-dimensional planar structure, where ions are implanted into the substrate to form a pn junction. In this structure, due to the curvature effect, a large electric field exists at the edge of the pn junction, leading to edge breakdown and reducing the stability of the APD. Summary of the Invention

[0006] This invention proposes a linear mode avalanche photodiode (APD) structure compatible with existing silicon processes and applicable to I-ToF modules. This structure features high response and low breakdown voltage, is simple in structure, has high precision, can detect low intensity light, and is suitable for advanced imaging and sensing technology applications.

[0007] The avalanche photodiode device of the present invention includes: a silicon substrate; a deep P-well with an inverted distribution formed in the silicon substrate, and a P-well formed on top of it. - Region; P is formed on one side of the upper part of region P. +The region, on the other side above the P-region, forms the N region. + The region, and adjacent N + District and located in P + District and N + The P-region of the interval; the source and drain are formed on the P-region of the silicon substrate, respectively. + District and N + Above and in contact with the region; an oxide layer covering the silicon substrate surface outside the source and drain electrodes.

[0008] In the avalanche photodiode device of the present invention, preferably, the thickness of the inverted deep P-well is 100nm to 2000nm.

[0009] In the avalanche photodiode device of the present invention, preferably, the P - The doping concentration of the region is 5×10 16 cm -3 ~1×10 17 cm -3 .

[0010] In the avalanche photodiode device of the present invention, P is preferably used. + The doping concentration in the region is 1.2 × 10⁻⁶. 19 cm -3 ~4.2×10 19 cm -3 N + The doping concentration of the region is 5×10 19 cm -3 ~9×10 19 cm -3 .

[0011] In the avalanche photodiode device of the present invention, preferably, the doping concentration of the P-region is 5 × 10⁻⁶. 17 cm -3 ~9×10 17 cm -3 .

[0012] This invention also discloses a method for fabricating an avalanche photodiode device, comprising the following steps: performing ion implantation on a silicon substrate to form an inverted deep P-well; performing ion implantation to form a P-well above the inverted deep P-well. - Zone; Ion implantation is performed in P - P is formed on one side of the upper part of the area. + Zone; Ion implantation is performed in P - N is formed on the other side of the upper part of the area. + Ion implantation is performed in the P region. + District and N + Between regions, adjacent to N +The process involves forming a P-region; covering the top silicon surface with an oxide layer; defining the source / drain regions using photolithography; removing the oxide layer from the source / drain regions by etching; and then depositing metal electrodes to bond with the P-regions on the silicon substrate. + District and N + Phase contact.

[0013] In the avalanche photodiode device fabrication method of the present invention, preferably, the P - The doping concentration of the region is 5×10 16 cm -3 ~1×10 17 cm -3 .

[0014] In the avalanche photodiode device fabrication method of the present invention, preferably, P + The doping concentration in the region is 1.2 × 10⁻⁶. 19 cm -3 ~4.2×10 19 cm -3 N + The doping concentration of the region is 5×10 19 cm -3 ~9×10 19 cm -3 .

[0015] In the avalanche photodiode device fabrication method of the present invention, preferably, the doping concentration of the P-region is 5 × 10⁻⁶. 17 cm -3 ~9×10 17 cm -3 .

[0016] In the avalanche photodiode device fabrication method of the present invention, preferably, the thickness of the inverted deep P-well is 100nm to 2000nm. Attached Figure Description

[0017] Figure 1 This is a flowchart of the fabrication method for avalanche photodiode devices.

[0018] Figure 2 This is a schematic diagram of an avalanche photodiode device. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions in the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only for explaining this invention and are not intended to limit this invention. The described embodiments are merely some embodiments of this invention, not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0020] In the description of this invention, it should be noted that the terms "upper," "lower," "vertical," and "horizontal," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0021] Furthermore, many specific details of the invention, such as the structure, materials, dimensions, processing techniques, and methods of the device, are described below to provide a clearer understanding of the invention. However, as those skilled in the art will understand, the invention may be implemented without adhering to these specific details. Unless specifically indicated below, various parts of the device may be made of materials known to those skilled in the art, or may employ materials with similar functionality developed in the future.

[0022] Figure 1 This is a flowchart of the fabrication method for avalanche photodiode devices. (For example...) Figure 1 As shown, the fabrication method of the avalanche photodiode device includes the following steps:

[0023] In step S1, an inverted deep P-well (DPW) is formed in the silicon substrate 100 by ion implantation. The DPW can suppress photon diffusion in the substrate, reduce the volume of the loss region, and thus improve the response time.

[0024] Step S2: Ion implantation is performed in the silicon substrate above the inverted deep P-well to form a doping concentration of 1×10⁻⁶. 17 cm -3 P - district.

[0025] Step S3, perform ion implantation on silicon substrate P - A highly doped shallow P-type region is formed on one side of the upper part of the region. + On the other side, a highly doped shallow N region is formed. + The region has a doping concentration of 2.7 × 10⁻⁶. 19 cm-3 and 7.5×10 19 cm -3 Then in P + District and N + Between regions and adjacent to N + Ion implantation in the region resulted in a doping concentration of 7 × 10⁻⁶. 17 cm -3 The P area.

[0026] In the above-mentioned ion implantation, P-type dopants mainly include boron, while N-type dopants mainly include phosphorus and arsenic.

[0027] Step S4, then an oxide layer 101 is deposited on the surface of the silicon substrate 100 to improve responsiveness, mainly including silicon oxide, etc.

[0028] Step S5: Define the source / drain regions using photolithography, etch the oxide layer on the source / drain regions, and then deposit metal electrodes 102 and 103 to form the final device, as shown below. Figure 2 As shown. Figure 2 The dimensions of each part of the device are schematically marked in the diagram, P + The length of the region L1 is 150 nm, P + District and N + The spacing between the regions, L2, is 200 nm; the overall device length, L3, is 500 nm; and the length of the P-region, L4, is 50 nm. The thickness of the silicon substrate, W1, is 1000 nm. - The thickness W2 of the well region is 200 nm, and the thickness W3 of the inverted deep P-well is 100 nm.

[0029] This invention utilizes ion implantation to form an inverted deep P-well (DPW) and two highly doped shallow regions (P-wells). + and N + ), and then in N + Another P-type injection was performed near the region to mitigate edge breakdown and ensure that avalanche multiplication primarily occurred in the PN region. + The device is compatible with CMOS technology and can detect low-intensity light, making it particularly suitable for ToF ranging sensors. Applying a voltage slightly below the breakdown voltage to the APD ensures high responsivity and low response time, while eliminating the influence of dark counting (occurring in Geiger mode) on ranging accuracy.

[0030] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. For example, P - The doping concentration of the region can be 5 × 10⁻⁶. 16 cm -3 ~1×10 17 cm -3 P + The doping concentration of the region can be 1.2 × 10⁻⁶.19 cm -3 ~4.2×10 19 cm -3 N + The doping concentration of the region can be 5 × 10⁻⁶. 19 cm -3 ~9×10 19 cm -3 The doping concentration of the P-region can be 5 × 10⁻⁶. 17 cm -3 ~9×10 17 cm -3 The thickness of the inverted deep P-well can be from 100 nm to 2000 nm. Furthermore, any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this invention should be included within the protection scope of this invention.

Claims

1. An avalanche photodiode device, characterized in that, include: silicon substrate; A deep P well is formed in a silicon substrate with an inverted profile for suppressing the diffusion of photons in the substrate, reducing the volume of the loss region, and thus increasing the response time, on which a P - region is formed. A P - region is formed on one side of the upper portion of the P + region, an N - region is formed on the other side of the upper portion of the P + region, and a P + region is formed adjacent to the N + region and between the P + region and the N + region, for relieving the PN + junction edge breakdown, so that the avalanche multiplication is concentrated in the PN The source and drain are formed on the P-type silicon substrate. + District and N + Above and in contact with the area; An oxide layer covers the silicon substrate surface outside the source and drain electrodes.

2. The avalanche photodiode device according to claim 1, characterized in that, The thickness of the inverted deep P-well is 100 nm to 2000 nm.

3. The avalanche photodiode device according to claim 1, characterized in that, The P - The doping concentration of the region is 5×10 16 cm -3 ~1×10 17 cm -3 .

4. The avalanche photodiode device according to claim 1, characterized in that, P + The doping concentration in the region is 1.2 × 10⁻⁶. 19 cm -3 ~4.2×10 19 cm -3 N + The doping concentration of the region is 5×10 19 cm -3 ~9×10 19 cm -3 .

5. The avalanche photodiode device according to claim 1, characterized in that, The doping concentration of the P-region is 5 × 10⁻⁶. 17 cm -3 ~9×10 17 cm -3 .

6. A method for fabricating an avalanche photodiode device, characterized in that, Includes the following steps: Ion implantation is performed on a silicon substrate to form an inverted deep P-well, which is used to suppress photon diffusion in the substrate, reduce the volume of the loss region, and thus improve the response time. Ion implantation is performed above the inverted distribution deep P-well to form P-type structures. - district; Ion implantation in P - P is formed on one side of the upper part of the area. + district; Ion implantation in P - N is formed on the other side of the upper part of the area. + district, Ion implantation in P + District and N + Between regions, adjacent to N + The region forms a P-region to alleviate PN. + Edge breakdown causes avalanches to multiply and concentrate in PN. + Knot; An oxide layer is applied to the surface of the top silicon layer; Photolithography defines the source and drain regions, etching removes the oxide layer on the source and drain regions, and then metal electrodes are deposited to bond with the P-type silicon substrate. + District and N + Phase contact.

7. The method for fabricating an avalanche photodiode device according to claim 6, characterized in that, The P - The doping concentration of the region is 5×10 16 cm -3 ~1×10 17 cm -3 .

8. The method for fabricating an avalanche photodiode device according to claim 6, characterized in that, P + The doping concentration in the region is 1.2 × 10⁻⁶. 19 cm -3 ~4.2×10 19 cm -3 N + The doping concentration of the region is 5×10 19 cm -3 ~9×10 19 cm -3 .

9. The method for fabricating an avalanche photodiode device according to claim 6, characterized in that, The doping concentration of the P-region is 5 × 10⁻⁶. 17 cm -3 ~9×10 17 cm -3 .

10. The method for fabricating an avalanche photodiode device according to claim 6, characterized in that, The thickness of the inverted deep P-well is 100 nm to 2000 nm.

Citation Information

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