Electronic chip electrostatic discharge potential failure pre-diagnostic system and method

Abstract

The present application relates to a kind of electronic chip electrostatic discharge potential failure pre-diagnosis system and method, potential failure pre-diagnosis system includes: electrostatic discharge module, for the electrostatic discharge of electronic chip pin, to accelerate failure;Accelerated failure effect module, for potential failure to accelerate evolution into immediate failure;Electric performance test characterization module, for the electric performance parameter of electronic chip after being subjected to electrostatic discharge and accelerated failure effect;Multiple electrostatic discharge event detection module, for the online characterization of electrostatic discharge electromagnetic radiation.The present application realizes the online pre-diagnosis of electronic chip electrostatic potential failure, is conducive to reduce the harm of electrostatic potential failure to electronic system, guarantee the electrostatic reliability of electronic system, with important economic and social benefits, and the application conversion prospect is wide.

Description

Technical Field

[0001] This invention relates to the field of electrostatic discharge technology for chips, and in particular to a system and method for early diagnosis of potential electrostatic discharge failures in electronic chips. Background Technology

[0002] Static electricity, due to its unique characteristics, is widely present in various scientific research and production environments. With the rapid development of very large-scale integrated circuit technology, the feature size of microelectronic devices is becoming smaller and smaller, and their resistance to electrostatic discharge (ESD) damage is becoming weaker and weaker, making ESD damage one of the main reliability problems of electronic chips. ESD damage is generally divided into immediate failure and latent failure. Immediate failure is a failure in which one or more electrical parameters of a device suddenly deteriorate, completely losing its intended function. It usually manifests as open circuit, short circuit, and severe drift of electrical parameters. However, if a single ESD pulse is not enough to cause immediate failure of a device, it may cause minor damage inside the device. This damage is cumulative. As the number of ESD pulses increases or as the device ages, its electrical parameter performance gradually deteriorates, which is called latent failure. When an electronic chip experiences latent failure, although its macroscopic electrical characteristics do not change, its breakdown performance, hot carrier performance, radiation resistance, long-term operational reliability, and lifespan will be severely affected. Moreover, because latent failure cannot be directly characterized and screened through macroscopic performance, it is difficult to diagnose in advance. This easily leads to the installation of latently failed chips into the whole machine, which can only be allowed to evolve into complete failure at irregular intervals during use, and the losses are incalculable. However, there is currently no effective method to pre-screen and judge the potential electrostatic discharge failure of electronic chips, and chips with potential electrostatic discharge failure cannot be detected on-site in the first instance, which seriously affects and restricts the reliable application of electronic chips.

[0003] American scholars M. Song et al. studied the relationship between latent ESD / EOS failures, reduced lifetime, and leakage current in CMOS integrated circuits. Their research showed that relatively "obvious" changes in leakage current and IV characteristics can reflect the possibility of potential device failure to a certain extent, but are ineffective in cases without significant changes, thus having significant limitations. Furthermore, the detection of other conventional electrical parameters, such as transconductance and threshold voltage, is not sensitive enough to accurately determine whether a device has potential ESD failures. Because commonly used electrical parameter testing techniques cannot effectively eliminate potentially failing devices, more effective methods for detecting potential ESD failures need to be explored. French scholars N. Guirard and D. Tremouilles found that low-frequency noise (LFN) is more effective than measuring leakage current for detecting potential ESD failures, as LFN detection revealed a 20-fold increase in low-frequency noise after ESD exposure, while no leakage current was detected under the same conditions. Lai Ping et al. from the Fifth Research Institute of the Ministry of Industry and Information Technology explored the use of static low-current parameters and port IV characteristics to characterize and diagnose potential ESD damage in CMOS circuits. Researchers Hua Yongxian and Ma Zhongfa from Xi'an University of Electronic Science and Technology, through experimental comparison, found that compared with traditional electrical parameters, the l / f noise of the MOSFET channel current can more sensitively reflect the potential ESD failure in the gate oxide layer. Under the same electrostatic stress conditions, the change in l / f noise is much more sensitive than that of conventional electrical parameters, and its relative rate of change in power spectrum amplitude is more than 6 times greater than the maximum relative rate of change in transconductance. Hu Youzhi et al. from the former Ordnance Engineering College conducted electrostatic discharge (ESD) tests on the high-frequency, low-power silicon bipolar junction transistor (BJT) 2SC3356 and compared the two sets of devices using accelerated temperature lifetime testing. They used the Arrhenius model to calculate and analyze the test results, finding that ESD injection below the damage threshold could shorten the device's lifetime. This indicates that ESD can cause potential failures within high-frequency, low-power BJTs, thus shortening the device's lifetime. Wu Zhancheng et al. studied the potential failures caused by ESD in bipolar silicon devices, finding that DC amplification and reverse leakage current can be used to detect whether bipolar silicon devices are subject to potential ESD damage. Their research shows that ESD can cause event-related and time-related potential failures in bipolar silicon devices. Qi Shufeng et al. applied low-voltage ESD stress to the 2SC3356 transistor from the CB junction and the EB junction, respectively. The results showed that the probability of potential failure caused by applying low-voltage ESD stress from the CB junction was higher than that caused by applying low-voltage ESD stress from the EB junction. That is, the CB junction is more sensitive to potential failures introduced by low-voltage ESD stress than the EB junction. The high-temperature lifetime test showed an annealing effect, which alleviated the potential damage to the device caused by low-voltage ESD stress and enabled the potential damage introduced during electrostatic discharge to self-recover.Comparative analysis revealed that although some research has been conducted both domestically and internationally, the following shortcomings still exist: existing research focuses on characterization methods after potential failures, but no clear analytical method has been given for the analysis of the "threshold characteristics" of potential failures; and no online pre-monitoring and diagnostic method for electrostatic potential failures has been developed, which cannot detect potential failures at the formation stage in the first instance. Summary of the Invention

[0004] To address the technical problems existing in the prior art, the present invention aims to provide a system and method for pre-diagnosing potential electrostatic discharge (ESD) failures of electronic chips. This system identifies the threshold characteristics of potential ESD failures of electronic chips and, through process monitoring, identifies chips with potential ESD failures on-site in the first instance. This achieves pre-screening of potential ESD failures of electronic chips and avoids the unpredictable reliability problems caused by installing potentially faulty electronic chips into the complete machine.

[0005] To achieve the above-mentioned objectives, the present invention provides a system for early diagnosis of potential electrostatic discharge failures in electronic chips, comprising:

[0006] The electrostatic discharge module is used to discharge electrostatic discharge onto the pins of electronic chips to accelerate their failure.

[0007] Accelerated failure module, used to accelerate the evolution of potential failures into immediate failures;

[0008] The electrical performance testing and characterization module is used to test the electrical performance parameters of electronic chips after they have been subjected to electrostatic discharge and accelerated failure.

[0009] Multiple electrostatic discharge event detection modules are used to characterize electrostatic discharge electromagnetic radiation online.

[0010] According to one aspect of the present invention, the electrostatic discharge module includes an HBM model electrostatic discharge module, an MM model electrostatic discharge module, and a CDM model electrostatic discharge module.

[0011] According to one aspect of the present invention, the electrostatic discharge event detection module is arranged in a multi-point layout around the electronic chip.

[0012] According to one aspect of the present invention, the accelerated failure module specifically includes:

[0013] A constant voltage / current is applied to the pins of the electronic chip by a voltage source / current source.

[0014] According to one aspect of the present invention, a method for pre-diagnosing potential electrostatic discharge failures of electronic chips using the diagnostic system described in any one of the above-described technical solutions is provided, characterized by comprising the following steps:

[0015] Step S1: Divide the electronic chips in the same batch into multiple groups, with one group serving as a control group and left unprocessed;

[0016] Step S2: Use the electrostatic discharge module to perform electrostatic discharge on the remaining electronic chips with different electrostatic discharge models, different discharge intensities, and different discharge polarities, and use the electrical performance testing and characterization module to test and determine whether the electronic chips have experienced immediate failure.

[0017] Step S3: Use the accelerated failure module to perform accelerated failure processing on the electronic chips that have not yet failed immediately and the electronic chips in the comparison group.

[0018] Step S4: Use the electrical performance testing and characterization module to test the characteristics of the electronic chip after accelerated failure and determine the potential electrostatic failure voltage threshold.

[0019] Step S5: Utilize the electrostatic discharge event detection module to detect the electrostatic discharge characteristics that occur during the application of electronic chips online, and pre-diagnose and select chips with potential electrostatic failure based on the electrostatic potential failure voltage threshold obtained in step S4.

[0020] According to one aspect of the present invention, step S2 specifically includes:

[0021] Step S21: Use the electrostatic discharge module to perform electrostatic discharge on each group of electronic chips with different electrostatic discharge models, different discharge intensities, and different discharge polarities.

[0022] Step S22: Perform electrical performance tests on each group of electronic chips that have completed electrostatic discharge;

[0023] Step S23: Determine the electrostatic failure characteristics based on its electrical characteristics. The parameters to be determined include leakage current, relative drift of the IV curve, relative drift of the CV curve, and whether the short circuit / open circuit is within the preset range.

[0024] Step S24: If the leakage current, relative drift of the IV curve, relative drift of the CV curve, and short circuit / open circuit are all within the preset range, then it is determined that the electronic chip has not failed immediately; if any of the leakage current, relative drift of the IV curve, relative drift of the CV curve, and short circuit / open circuit are not within the preset range, then it is determined that the electronic chip has failed immediately.

[0025] According to one aspect of the present invention, step S3 specifically includes:

[0026] Apply a constant voltage / current to the pins of the electronic chip using a voltage / current source; or

[0027] The electrostatic discharge module is used to perform electrostatic discharge on the pins of the electronic chip with a preset model, preset intensity, and preset polarity.

[0028] According to one aspect of the present invention, step S4 specifically includes:

[0029] Step S41: Use the electrical performance testing and characterization module to test the characteristics of the electronic chip after accelerated failure;

[0030] Step S42: Compare and analyze the characteristics of the accelerated failure electronic chip with the control group;

[0031] Step S43: Based on leakage current, relative drift of IV curve, relative drift of CV curve, short circuit / open circuit, the failure characteristics of electronic chip are judged to determine the electronic chip that has evolved into immediate failure.

[0032] Step S44: Determine the electrostatic potential failure voltage threshold based on the electrostatic discharge model, intensity, and polarity.

[0033] According to one aspect of the present invention, step S5 specifically includes:

[0034] Step S51: Detect electrostatic discharge (ESD) events online using the electrostatic discharge event detection module during the application of electronic chips, and obtain the display results of the ESD event detection module at different locations;

[0035] Step S52: Obtain electrostatic discharge information based on the display results of the electrostatic discharge event detection module at different locations.

[0036] The electrostatic discharge information includes at least the electrostatic discharge model, electrostatic discharge voltage, electrostatic discharge polarity, and electrostatic discharge location information;

[0037] Step S53: Compare the electrostatic discharge information with the electrostatic potential failure voltage threshold obtained in step S4 to complete the online pre-diagnosis of the electrostatic potential failure chip.

[0038] According to one aspect of the present invention, in step S23, the method for determining the leakage current is as follows: a preset voltage value and a preset leakage current limit value. After the electronic chip undergoes electrostatic discharge, if the change in leakage current generated under the preset voltage value exceeds the preset leakage current limit value, it is determined that the electronic chip has immediately failed.

[0039] The method for judging the relative drift of the IV curve is as follows: Before the electrostatic discharge test, the IV characteristic curve of the chip pin is measured first. When the drift of the IV characteristic curve of the corresponding chip pin exceeds the preset IV drift after electrostatic discharge, it is determined that the electronic chip has failed immediately.

[0040] The method for judging the relative drift of the CV curve is as follows: Before the electrostatic discharge test, the CV characteristic curve of the chip pin is measured first. After the electrostatic discharge is performed, the CV characteristic curve is tested again. When the drift of the CV characteristic curve exceeds the preset CV drift amount, it is determined that the electronic chip has failed immediately.

[0041] The short circuit / open circuit discrimination method is as follows: after electrostatic discharge, the IV curve after the electrostatic discharge test is measured. If a short circuit or open circuit phenomenon occurs, it is determined that the electronic chip has failed immediately.

[0042] Compared with the prior art, the present invention has the following beneficial effects:

[0043] According to the present invention, a system and method for pre-diagnosing potential electrostatic discharge (ESD) failures of electronic chips are proposed. The ESD module can apply different intensity and polarity ESD treatments to the electronic chip based on the ESD sensitivity characterization requirements under different models. The accelerated failure module consists of a voltage source and a current source. The voltage / current source applies a constant voltage / current (generally exceeding its rated value) to the electronic chip pins to accelerate failure, transforming potential failures into immediate failures. Furthermore, accelerated failure can also be achieved by applying specific models, intensities, and polarities of ESD to the electronic chip pins using the ESD module, further accelerating potential failures into immediate failures. The electrical performance testing and characterization module identifies failed chips by testing the electrical performance parameters of the electronic chip after undergoing ESD and accelerated failure treatments. The electrostatic discharge (ESD) event detection module is deployed in multiple locations in actual electronic chip application scenarios. It can characterize ESD electromagnetic radiation online, determine the discharge model, discharge voltage, discharge polarity, and discharge location in real time, and establish a mapping relationship between process detection and potential failure characteristics by comparing and analyzing with the characteristics of potential ESD failure. This enables online pre-diagnosis of potential ESD failures in electronic chips, which helps reduce the harm of potential ESD failures to electronic systems, ensures the ESD reliability of electronic systems, has significant economic and social benefits, and has broad prospects for promotion and application. Attached Figure Description

[0044] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly described below. Obviously, the drawings described below are merely some embodiments of the present invention, and those skilled in the art can obtain other drawings based on these drawings without creative effort.

[0045] Figure 1 This schematic diagram illustrates the structure of a pre-diagnosis system for potential electrostatic discharge failures of electronic chips provided in one embodiment of the present invention.

[0046] Figure 2 This schematic diagram illustrates a flowchart of a method for pre-diagnosing potential electrostatic discharge failures of electronic chips provided in one embodiment of the present invention.

[0047] Figure 3 The flowchart illustrates a method for pre-diagnosing potential electrostatic discharge failures of electronic chips provided in another embodiment of the present invention. Detailed Implementation

[0048] The description of the embodiments in this specification should be taken in conjunction with the accompanying drawings, which should form part of the complete specification. In the drawings, the shape or thickness of the embodiments may be exaggerated and may be indicated in a simplified or convenient manner. Furthermore, parts of the various structures in the drawings will be described separately; it is worth noting that elements not shown in the figures or not described in words are in a form known to those skilled in the art.

[0049] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the accompanying drawings used in the embodiments will be briefly described below. Obviously, the drawings described below are merely some embodiments of the present invention, and those skilled in the art can obtain other drawings based on these drawings without any creative effort.

[0050] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments. The embodiments cannot be described in detail here, but the embodiments of the present invention are not limited to the following embodiments.

[0051] like Figure 1 As shown, the present invention provides a pre-diagnosis system for potential electrostatic discharge failures of electronic chips, comprising:

[0052] The electrostatic discharge module is used to discharge electrostatic discharge onto the pins of electronic chips to accelerate their failure.

[0053] Accelerated failure module, used to accelerate the evolution of potential failures into immediate failures;

[0054] The electrical performance testing and characterization module is used to test the electrical performance parameters of electronic chips after they have been subjected to electrostatic discharge and accelerated failure.

[0055] Multiple electrostatic discharge event detection modules are used to characterize electrostatic discharge electromagnetic radiation online.

[0056] In this embodiment, the electrostatic discharge (ESD) module can employ different models of discharge modules to apply ESD treatments of varying intensities and polarities to the electronic chip, based on the ESD sensitivity characterization requirements under different models. The accelerated failure module consists of a voltage source and a current source, which apply a constant voltage / current (generally exceeding its rated value) to the electronic chip pins to accelerate failure, transforming potential failures into immediate failures. Furthermore, accelerated failure can also be achieved by applying specific models, intensities, and polarities of ESD to the electronic chip pins using the ESD module, further accelerating potential failures into immediate failures. The electrical performance testing and characterization module identifies failed chips by testing the electrical performance parameters of the electronic chip after undergoing ESD and accelerated failure treatments. The electrostatic discharge (ESD) event detection module is deployed in multiple locations in actual electronic chip application scenarios. It can characterize ESD electromagnetic radiation online, determine the discharge model, discharge voltage, discharge polarity, and discharge location in real time, and establish a mapping relationship between process detection and potential failure characteristics by comparing and analyzing with the characteristics of potential ESD failure. This enables online pre-diagnosis of potential ESD failures in electronic chips, which helps reduce the harm of potential ESD failures to electronic systems, ensures the ESD reliability of electronic systems, has significant economic and social benefits, and has broad prospects for promotion and application.

[0057] In one embodiment of the present invention, preferably, the electrostatic discharge module includes an HBM model electrostatic discharge module, an MM model electrostatic discharge module, and a CDM model electrostatic discharge module.

[0058] In this embodiment, the electrostatic discharge module can use different models of discharge modules to perform ESD effects of different intensities and polarities on the electronic chip according to the electrostatic sensitivity characterization requirements under different models.

[0059] In one embodiment of the present invention, preferably, the electrostatic discharge event detection module is arranged in a multi-point layout around the electronic chip.

[0060] In this embodiment, the electrostatic discharge event detection module is deployed in a multi-point layout in the actual application scenario of the electronic chip. It can perform online characterization of electrostatic discharge electromagnetic radiation, and determine the discharge model, discharge voltage, discharge polarity, and discharge location in real time. By comparing and analyzing with the characteristics of electrostatic potential failure threshold, a mapping relationship between process detection and potential failure characteristics is established, thereby realizing online pre-diagnosis of potential electrostatic failures of electronic chips.

[0061] In one embodiment of the present invention, preferably, the accelerated failure module specifically includes:

[0062] A constant voltage / current is applied to the pins of the electronic chip by a voltage source / current source.

[0063] In this embodiment, the accelerated failure module consists of a voltage source and a current source. By applying a constant voltage / current (generally exceeding its rated value) to the pins of the electronic chip through the voltage / current source, it accelerates the failure and transforms potential failures into immediate failures.

[0064] like Figure 2 and Figure 3 As shown, according to one aspect of the present invention, a method for pre-diagnosing potential electrostatic discharge failures of electronic chips using the diagnostic system described in any of the above technical solutions is provided, comprising the following steps:

[0065] Step S1: Divide the electronic chips in the same batch into multiple groups, with one group serving as a control group and left unprocessed;

[0066] Step S2: Use the electrostatic discharge module to perform electrostatic discharge on the remaining electronic chips with different electrostatic discharge models, different discharge intensities, and different discharge polarities, and use the electrical performance testing and characterization module to test and determine whether the electronic chips have experienced immediate failure.

[0067] Step S3: Use the accelerated failure module to perform accelerated failure processing on the electronic chips that have not yet failed immediately and the electronic chips in the comparison group.

[0068] Step S4: Use the electrical performance testing and characterization module to test the characteristics of the electronic chip after accelerated failure and determine the potential electrostatic failure voltage threshold.

[0069] Step S5: Utilize the electrostatic discharge event detection module to detect the electrostatic discharge characteristics that occur during the application of electronic chips online, and pre-diagnose and select chips with potential electrostatic failure based on the electrostatic potential failure voltage threshold obtained in step S4.

[0070] In this embodiment, electronic chips from the same batch are divided into multiple groups. One group serves as a control group and is left untreated. The remaining groups are subjected to electrostatic discharge (ESD) using different ESD models, intensities, and polarities. After ESD, it is determined whether the corresponding electronic chips have experienced immediate failure. For chips that fail immediately, no further processing is performed; they are only used as a reference for the upper limit threshold of potential ESD failure. For electronic chips that do not fail immediately and the control group's chips, accelerated failure is performed to accelerate the potential failure of the corresponding electronic chips into immediate failure. The characteristics of the accelerated-failure electronic chips are tested using an electrical performance testing module. Combined with the characteristics of the control group's electronic chips, the potential ESD failure voltage threshold is determined. Then, an ESD event detection module is used to detect ESD occurring during the application of the electronic chips online. Based on the potential ESD failure voltage threshold, online pre-diagnosis of potential ESD failures of electronic chips is achieved. This helps reduce the harm of potential ESD failures to electronic systems, ensures the ESD reliability of electronic systems, and has significant economic and social benefits, with broad prospects for promotion and application.

[0071] In one embodiment of the present invention, preferably, step S2 specifically includes:

[0072] Step S21: Use the electrostatic discharge module to perform electrostatic discharge on any group of electronic chips with different electrostatic discharge models, different discharge intensities, and different discharge polarities.

[0073] Step S22: Perform electrical performance testing on any group of electronic chips that have completed electrostatic discharge;

[0074] Step S23: Determine the electrostatic failure characteristics based on its electrical characteristics. The parameters to be determined include leakage current, relative drift of the IV curve, relative drift of the CV curve, and whether the short circuit / open circuit is within the preset range.

[0075] Step S24: If the leakage current, relative drift of the IV curve, relative drift of the CV curve, and short circuit / open circuit are all within the preset range, then it is determined that the electronic chip has not failed immediately; if any of the leakage current, relative drift of the IV curve, relative drift of the CV curve, and short circuit / open circuit are not within the preset range, then it is determined that the electronic chip has failed immediately.

[0076] In one embodiment of the present invention, preferably, step S3 specifically includes:

[0077] Apply a constant voltage / current to the pins of the electronic chip using a voltage / current source; or

[0078] The electrostatic discharge module is used to perform electrostatic discharge on the pins of the electronic chip with a preset model, preset intensity, and preset polarity.

[0079] In one embodiment of the present invention, preferably, step S4 specifically includes:

[0080] Step S41: Use the electrical performance testing and characterization module to test the characteristics of the electronic chip after accelerated failure;

[0081] Step S42: Compare and analyze the characteristics of the accelerated failure electronic chip with the control group;

[0082] Step S43: Based on leakage current, relative drift of IV curve, relative drift of CV curve, short circuit / open circuit, the failure characteristics of electronic chip are judged to determine the electronic chip that has evolved into immediate failure.

[0083] Step S44: Determine the electrostatic potential failure voltage threshold based on the electrostatic discharge model, intensity, and polarity.

[0084] In one embodiment of the present invention, preferably, step S5 specifically includes:

[0085] Step S51: Detect electrostatic discharge (ESD) events online using the electrostatic discharge event detection module during the application of electronic chips, and obtain the display results of the ESD event detection module at different locations;

[0086] Step S52: Obtain electrostatic discharge information based on the display results of the electrostatic discharge event detection module at different locations.

[0087] The electrostatic discharge information includes at least the electrostatic discharge model, electrostatic discharge voltage, electrostatic discharge polarity, and electrostatic discharge location information;

[0088] Step S53: Compare the electrostatic discharge information with the electrostatic potential failure voltage threshold obtained in step S4 to complete the online pre-diagnosis of the electrostatic potential failure chip.

[0089] In one embodiment of the present invention, preferably, in step S23, the method for determining the leakage current is: a preset voltage value and a preset leakage current limit value. After the electronic chip undergoes electrostatic discharge, if the change in leakage current generated under the preset voltage value exceeds the preset leakage current limit value, it is determined that the electronic chip has failed immediately.

[0090] The method for judging the relative drift of the IV curve is as follows: Before the electrostatic discharge test, the IV characteristic curve of the chip pin is measured first. When the drift of the IV characteristic curve of the corresponding chip pin exceeds the preset IV drift after electrostatic discharge, it is determined that the electronic chip has failed immediately.

[0091] The method for judging the relative drift of the CV curve is as follows: Before the electrostatic discharge test, the CV characteristic curve of the chip pin is measured first. After the electrostatic discharge is performed, the CV characteristic curve is tested again. When the drift of the CV characteristic curve exceeds the preset CV drift amount, it is determined that the electronic chip has failed immediately.

[0092] The short circuit / open circuit discrimination method is as follows: after electrostatic discharge, the IV curve after the electrostatic discharge test is measured. If a short circuit or open circuit phenomenon occurs, it is determined that the electronic chip has failed immediately.

[0093] In this embodiment, the electronic chip is considered to have failed immediately if any of the four judgment methods—leakage current, relative drift of the IV curve, relative drift of the CV curve, and short circuit / open circuit—determines that the electronic chip has failed immediately.

[0094] The specific steps of the method for pre-diagnosing potential electrostatic discharge failures of electronic chips are as follows:

[0095] (1) Select several chip samples from the same batch and divide them into several groups. One group is used as a comparison and is not subjected to electrostatic discharge treatment. The other groups are subjected to electrostatic discharge with different electrostatic discharge models, different discharge intensities, and different discharge polarities using an electrostatic discharge module.

[0096] (2) After each discharge experiment, the samples were subjected to electrical performance tests such as capacitance voltage (CV) and current voltage (IV). Based on their electrical characteristics, electrostatic failure characteristics were determined. The parameters for determination included leakage current, relative drift of the IV curve, relative drift of the CV curve, short circuit / open circuit, etc. a) Leakage current determination method: A specific voltage value and leakage current limit value were first specified. When the leakage current generated at the specified voltage after the chip was subjected to electrostatic discharge exceeded the preset leakage current threshold, it was considered that immediate failure had occurred. b) Relative drift of the IV curve determination method: The IV characteristic curve of the chip pin was measured before the electrostatic discharge test. When the IV characteristic curve of the pin was drifted by more than a certain proportion after electrostatic discharge, it was considered that immediate failure had occurred. c) Relative drift of the CV curve determination method: The CV characteristic curve of the chip pin was measured before the electrostatic discharge test. After electrostatic discharge, the CV characteristic curve was tested again. When the drift exceeded a certain proportion, it was considered that immediate failure had occurred. d) Short Circuit / Open Circuit Determination Method: After electrostatic discharge (ESD), the IV curve is measured. If a short circuit or open circuit occurs, it is considered an immediate failure. The specific value of the "certain proportion" involved will be determined in specific tests based on actual test results and the user's actual usage requirements for the chip. For devices that fail immediately, no further processing is performed; it is only used as a reference for the upper limit threshold of potential ESD failure.

[0097] (3) For devices whose characteristics have not changed significantly (no immediate failure has occurred), accelerated failure methods are adopted to promote the potential failure to amplify and evolve into immediate failure in a short period of time. Accelerated failure modes include applying electrical stress methods such as "specific voltage", "specific current" and "specific electrostatic discharge": applying a constant voltage / current (generally exceeding its rated value) to the chip pins through a voltage source / current source, or performing electrostatic discharge of specific model, specific intensity and specific polarity on the electronic chip pins through an electrostatic discharge module to accelerate failure and accelerate the evolution of potential failure into immediate failure.

[0098] (4) Test the characteristics of the electronic chip after accelerated failure and compare and analyze them with the control group. The chip failure characteristics are judged by the above-mentioned leakage current, relative drift of IV curve, relative drift of CV curve, short circuit / open circuit and other discrimination methods. The chips that evolve into immediate failure are selected. The electrostatic potential failure voltage threshold is determined according to the initial discharge mode.

[0099] (5) The electrostatic discharge event detection module is used to detect electrostatic discharge that occurs during the application of electronic chips online. By displaying the results of the electrostatic discharge event detection module at different locations, information such as electrostatic discharge model, electrostatic discharge voltage, electrostatic discharge polarity, and electrostatic discharge location can be obtained. Then, it can be determined that the chip at a certain location has been subjected to electrostatic discharge of a certain intensity. By comparing the electrostatic discharge information with the chip's potential electrostatic failure voltage threshold, online pre-diagnosis and selection of chips with potential electrostatic failure can be achieved.

[0100] This invention proposes a system and method for pre-diagnosing potential electrostatic discharge (ESD) failures in electronic chips. The system includes an ESD module for accelerating failure by performing ESD on the chip pins; an accelerated failure module to accelerate the evolution of potential failures into immediate failures; an electrical performance testing and characterization module for testing the electrical performance parameters of the electronic chip after undergoing ESD and accelerated failure; and multiple ESD event detection modules for online characterization of ESD electromagnetic radiation. By utilizing the ESD event detection module to detect ESD occurring during the application of electronic chips online, and pre-diagnosing and selecting electronic chips based on the potential ESD failure voltage threshold, this system enables online pre-diagnosis of potential ESD failures in electronic chips. This helps reduce the harm of potential ESD failures to electronic systems, ensures the ESD reliability of electronic systems, and has significant economic and social benefits, with broad prospects for widespread application and commercialization.

[0101] The sequence numbers of the various steps involved in the method of the present invention do not imply the order of execution of the method. The execution order of each step should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0102] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A system for early diagnosis of potential electrostatic discharge failures in electronic chips, characterized in that, include: The electrostatic discharge module is used to discharge electrostatic discharge onto the pins of electronic chips to accelerate their failure. Accelerated failure module, used to accelerate the evolution of potential failures into immediate failures; The electrical performance testing and characterization module is used to test the electrical performance parameters of electronic chips after they have been subjected to electrostatic discharge and accelerated failure. Multiple electrostatic discharge event detection modules are used to characterize electrostatic discharge electromagnetic radiation online; The system is used to perform the following steps: Step S1: Divide the electronic chips in the same batch into multiple groups, with one group serving as a control group and left unprocessed; Step S2: Use the electrostatic discharge module to perform electrostatic discharge on the remaining electronic chips with different electrostatic discharge models, different discharge intensities, and different discharge polarities, and use the electrical performance testing and characterization module to test and determine whether the electronic chips have experienced immediate failure. Step S3: Use the accelerated failure module to perform accelerated failure processing on the electronic chips that have not yet failed immediately and the electronic chips in the comparison group. Step S4: Use the electrical performance testing and characterization module to test the characteristics of the electronic chip after accelerated failure and determine the potential electrostatic failure voltage threshold. Step S5: Utilize the electrostatic discharge event detection module to detect the electrostatic discharge characteristics occurring during the application of electronic chips online. Based on the electrostatic potential failure voltage threshold obtained in step S4, conduct online pre-diagnosis and selection of chips with potential electrostatic failure, specifically including: Step S51: Detect electrostatic discharge (ESD) events online using the electrostatic discharge event detection module during the application of electronic chips, and obtain the display results of the ESD event detection module at different locations; Step S52: Obtain electrostatic discharge information based on the display results of the electrostatic discharge event detection module at different locations. The electrostatic discharge information includes at least the electrostatic discharge model, electrostatic discharge voltage, electrostatic discharge polarity, and electrostatic discharge location information; Step S53: Compare the electrostatic discharge information with the electrostatic potential failure voltage threshold obtained in step S4 to complete the online pre-diagnosis of the electrostatic potential failure chip.

2. The system according to claim 1, characterized in that, The electrostatic discharge module includes an HBM model electrostatic discharge module, an MM model electrostatic discharge module, and a CDM model electrostatic discharge module.

3. The system according to claim 1, characterized in that, The electrostatic discharge event detection module is arranged in a multi-point layout around the electronic chip.

4. The system according to claim 3, characterized in that, The accelerated failure module specifically includes: A constant voltage / current is applied to the pins of the electronic chip by a voltage source / current source.

5. The system according to claim 1, characterized in that, Step S2 specifically includes: Step S21: Use the electrostatic discharge module to perform electrostatic discharge on each group of electronic chips with different electrostatic discharge models, different discharge intensities, and different discharge polarities. Step S22: Perform electrical performance tests on each group of electronic chips that have completed electrostatic discharge; Step S23: Determine the electrostatic failure characteristics based on its electrical characteristics. The parameters to be determined include leakage current, relative drift of the IV curve, relative drift of the CV curve, and whether the short circuit / open circuit is within the preset range. Step S24: If the leakage current, relative drift of the IV curve, relative drift of the CV curve, and short circuit / open circuit are all within the preset range, then it is determined that the electronic chip has not failed immediately; if any of the leakage current, relative drift of the IV curve, relative drift of the CV curve, and short circuit / open circuit are not within the preset range, then it is determined that the electronic chip has failed immediately.

6. The system according to claim 1, characterized in that, Step S3 specifically includes: Apply a constant voltage / current to the pins of the electronic chip using a voltage / current source; or The electrostatic discharge module is used to perform electrostatic discharge on the pins of the electronic chip with a preset model, preset intensity, and preset polarity.

7. The system according to claim 1, characterized in that, Step S4 specifically includes: Step S41: Use the electrical performance testing and characterization module to test the characteristics of the electronic chip after accelerated failure; Step S42: Compare and analyze the characteristics of the accelerated failure electronic chip with the control group; Step S43: Based on leakage current, relative drift of IV curve, relative drift of CV curve, short circuit / open circuit, the failure characteristics of electronic chip are judged to determine the electronic chip that has evolved into immediate failure. Step S44: Determine the electrostatic potential failure voltage threshold based on the electrostatic discharge model, intensity, and polarity.

8. The system according to claim 5, characterized in that, In step S23, the method for determining the leakage current is as follows: a preset voltage value and a preset leakage current limit value. After the electronic chip undergoes electrostatic discharge, if the change in leakage current generated under the preset voltage value exceeds the preset leakage current limit value, it is determined that the electronic chip has failed immediately. The method for judging the relative drift of the IV curve is as follows: Before the electrostatic discharge test, the IV characteristic curve of the chip pin is measured first. When the drift of the IV characteristic curve of the corresponding chip pin exceeds the preset IV drift after electrostatic discharge, it is determined that the electronic chip has failed immediately. The method for judging the relative drift of the CV curve is as follows: Before the electrostatic discharge test, the CV characteristic curve of the chip pin is measured first. After the electrostatic discharge is performed, the CV characteristic curve is tested again. When the drift of the CV characteristic curve exceeds the preset CV drift amount, it is determined that the electronic chip has failed immediately. The short circuit / open circuit discrimination method is as follows: after electrostatic discharge, the IV curve after the electrostatic discharge test is measured. If a short circuit or open circuit phenomenon occurs, it is determined that the electronic chip has failed immediately.

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