Method, device, electronic equipment and storage medium for detecting a current source chip

Abstract

The present disclosure provides a method and device for detecting a current source chip, an electronic device and a storage medium. In response to determining that the to-be-detected chip is a current source chip, a current source chip module, an interface circuit module and a test machine module are sequentially electrically connected, wherein the resistance values of three resistors in the interface circuit module are the resistance values of a first sampling resistor, a second sampling resistor and a third voltage stabilizing resistor, respectively; internal data of the current source chip is obtained, the internal data is input into a preset model, and an electrical characteristic test result of the current source chip is obtained. In this way, the detection system for the current source chip can be quickly constructed and the program development can be improved.

Description

Technical Field

[0001] This disclosure relates to the field of detection technology, and in particular to a method, apparatus, electronic device and storage medium for detecting current source chips. Background Technology

[0002] Currently, testing methods for current source chips are limited to manual visual inspection, chip design rule checks, and slice analysis. There is no specific testing method for current source chips, leading to slow design and high development difficulty. Therefore, a solution is needed that can perform current source chip testing, enabling rapid construction and program development, shortening the development cycle, saving development costs, and lowering the development threshold. Summary of the Invention

[0003] In view of this, the purpose of this disclosure is to provide a detection method, apparatus, electronic device and storage medium for current source chips, in order to solve the technical problem of low development efficiency of detection systems for current source chips.

[0004] For the above purposes, this disclosure provides an apparatus for detecting a current source chip, the apparatus comprising a current source chip module, an interface circuit module, and a test bench module connected in sequence, wherein:

[0005] The current source chip module includes an input terminal, a setting terminal, and an output terminal, wherein the input terminal is provided with a constant current source;

[0006] The interface circuit module includes a relay unit and a control unit. The interface circuit module is provided with a first relay and a second relay. The control terminal of the first relay is connected to the setting terminal of the current source chip, and its two contact pins are respectively connected to a first sampling resistor and a second sampling resistor. The control terminal of the second relay is connected to the output terminal of the current source chip. A third voltage-regulating resistor is provided between the second relay and the output terminal. The control unit is electrically connected to the first relay and the second relay.

[0007] The test bench module is connected to the first sampling resistor, the second sampling resistor, and the second relay.

[0008] Furthermore, the control unit includes: a first power supply port, a second power supply port, a first control port, and a second control port;

[0009] The first power supply port is electrically connected to the power supply port of the first relay;

[0010] The second power supply port is electrically connected to the power supply port of the second relay;

[0011] The first control port is electrically connected to the control port of the first relay;

[0012] The second control port is electrically connected to the control port of the second relay;

[0013] The interface circuit module includes a control unit and a first control branch and a second control branch connected in parallel. The first control branch is provided with a first relay and a sampling resistor connected in series. The sampling resistor includes a first sampling resistor and a second sampling resistor connected in parallel. The second control branch is provided with a third voltage-regulating resistor and a second relay connected in series. The control unit is connected to the first relay and the second relay.

[0014] Based on the same inventive concept, this disclosure also provides a method for detecting a current source chip, comprising:

[0015] In response to determining that the chip under test is a current source chip, the current source chip module, the interface circuit module and the test instrument module are electrically connected in sequence, wherein the resistance values ​​of the three resistors in the interface circuit module are the resistance values ​​of the first sampling resistor, the second sampling resistor and the third voltage regulating resistor, respectively.

[0016] The internal data of the current source chip is acquired and input into a preset model to obtain the electrical characteristic test results of the current source chip.

[0017] Furthermore, the response to determining that the chip under test is a current source chip includes:

[0018] Obtain the chip under test;

[0019] If the chip under test is provided with an input terminal, a setting terminal, an output terminal, and a constant current source, then the chip under test is determined to be a current source chip.

[0020] Furthermore, the resistance values ​​of the three resistors in the interface circuit module are as follows: (The resistance values ​​of the first sampling resistor, the second sampling resistor, and the third voltage-regulating resistor are listed below.)

[0021] The resistance values ​​of the first sampling resistor, the second sampling resistor, and the third voltage regulator resistor are determined based on the preset current value of the constant current source and the preset voltage value of the interface circuit module.

[0022] Further, determining the resistance values ​​of the first sampling resistor, the second sampling resistor, and the third voltage-regulating resistor based on the preset current value of the constant current source and the preset voltage value of the interface circuit module includes:

[0023] Obtain the voltage value of the interface circuit, the current value of the constant current source, and the maximum and minimum load current values ​​of the current source chip;

[0024] The resistance value of the first sampling resistor is the ratio of the voltage value of the interface circuit to the current value of the constant current source;

[0025] The resistance value of the third voltage-regulating resistor is the ratio of the voltage value of the interface circuit to the maximum load current of the current source chip;

[0026] The resistance value of the second sampling resistor is the product of the minimum load current of the current source chip and the resistance value of the third voltage regulator resistor, and then the ratio is obtained by dividing the current value of the constant current source by the resistance value of the third voltage regulator resistor.

[0027] Furthermore, the internal data includes the current value at the input terminal, the current value at the setting terminal, the current value at the output terminal, and the current value of the constant current source.

[0028] Furthermore, after acquiring the internal data of the current source chip, inputting the internal data into a preset model, and obtaining the electrical characteristic test results of the current source chip, the method further includes:

[0029] The electrical characteristic test results are compared with the standard electrical characteristic data of the current source chip to obtain the comparison results;

[0030] The comparison results will determine whether the current source chip meets the standard.

[0031] Based on the same inventive concept, this disclosure also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable by the processor, wherein the processor implements the method described above when executing the computer program.

[0032] Based on the same inventive concept, this disclosure also provides a non-transitory computer-readable storage medium that stores computer instructions for causing a computer to perform the method described above.

[0033] Therefore, the embodiments disclosed herein have the following beneficial effects:

[0034] This disclosure proposes a method, apparatus, electronic device, and storage medium for testing current source chips. In response to determining that the chip under test is a current source chip, a current source chip module, an interface circuit module, and a test bench module are sequentially electrically connected. The interface circuit module contains three resistors whose resistance values ​​are the resistance values ​​of a first sampling resistor, a second sampling resistor, and a third voltage-regulating resistor, respectively. Internal data of the current source chip is acquired and input into a preset model to obtain the electrical characteristic test results of the current source chip. This enables rapid construction and program development of a current source chip testing system, improving the development efficiency of the testing program. Attached Figure Description

[0035] To more clearly illustrate the technical solutions in this disclosure or related technologies, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are only embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0036] Figure 1 A schematic diagram of a device for detecting a current source chip provided in an embodiment of this disclosure;

[0037] Figure 2 This is a schematic diagram showing the connection between the control unit 201 and the relay unit 202;

[0038] Figure 3 A circuit diagram of a current source chip provided for an embodiment of this disclosure;

[0039] Figure 4 A flowchart illustrating a method for detecting a current source chip provided in this disclosure embodiment;

[0040] Figure 5 This is the internal circuit diagram of the current source chip LT3082;

[0041] Figure 6 This is a schematic diagram of a more specific electronic device hardware structure provided in the embodiments of this disclosure.

[0042] Among them, 0 is the PVI0 source pin; 1 is the PVI1 source pin; and 3 is the PVI3 source pin.

[0043] 2. First control port; 4. Second control port; VCC1, power supply port for the first relay;

[0044] VCC2, power supply port for the second relay; VCC3, power supply port for the control unit;

[0045] A. The contact pin of the first relay; B. The other contact pin of the first relay;

[0046] C. The contact pin of the second relay; D. The other contact pin of the second relay;

[0047] CBIT0, first relay control signal input terminal; B1, first control branch;

[0048] CBIT1, Second relay control signal input terminal; B2, Second control branch;

[0049] K1 is the input terminal of the first relay; K2 is the input terminal of the second relay.

[0050] J1 is the power supply port for the first relay; J2 is the power supply port for the second relay. Detailed Implementation

[0051] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.

[0052] It should be noted that, unless otherwise defined, the technical or scientific terms used in the embodiments of this disclosure should have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms "first," "second," and similar terms used in the embodiments of this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0053] As described in the background section, the existing methods for detecting current source chips are still insufficient to meet the need for rapid and accurate detection.

[0054] The main problem with current source chip testing methods is that current methods only rely on manual visual inspection, chip design rule checks, and slice analysis, lacking specific testing methods for current source chips. This leads to slow chip design and high development difficulty. The current source chip should include an input terminal, a setting terminal, and an output terminal, with a constant current source at the input terminal.

[0055] To address the problems existing in the prior art, this disclosure provides a method, apparatus, electronic device, and storage medium for testing current source chips. It can construct a test model based on integrated circuit automatic test equipment and test condition parameters of the current source chip, design and manufacture a test circuit hardware system, and combine it with software to realize the electrical characteristic test of the current source chip.

[0056] Based on this, one or more embodiments of this disclosure provide a method for detecting current source chips, constructing a detection model based on the test parameters of the current source chip to solve the problem of the inability to automatically and efficiently detect current source chips. The embodiments of this disclosure are described in detail below with reference to the accompanying drawings.

[0057] refer to Figure 1The figure is a schematic diagram of a device for detecting a current source chip according to an embodiment of this disclosure. The device includes: a current source chip module 101, an interface circuit module 102, and a test platform module 103 connected in sequence, wherein:

[0058] The current source chip module 101 includes an input terminal, a setting terminal, and an output terminal, wherein the input terminal is provided with a constant current source.

[0059] The interface circuit module 102 includes a relay unit and a control unit. The interface circuit module is provided with a first relay and a second relay. The control terminal of the first relay is connected to the setting terminal of the current source chip, and its two contact pins are respectively connected to a first sampling resistor and a second sampling resistor. The control terminal of the second relay is connected to the output terminal of the current source chip. A third voltage-regulating resistor is provided between the second relay and the output terminal of the current source chip. The control unit is electrically connected to the first relay and the second relay.

[0060] The test bench module 103 is connected to the first sampling resistor, the second sampling resistor, and the second relay.

[0061] In one possible implementation, the control unit includes: a first power supply port, a second power supply port, a first control port, and a second control port.

[0062] See Figure 2 The figure is a schematic diagram of the connection between the control unit 201 and the relay unit 202.

[0063] The relay unit 202 includes a first relay 202a and a second relay 202b.

[0064] The first power supply port is electrically connected to the power supply port of the first relay.

[0065] The second power supply port is electrically connected to the power supply port of the second relay.

[0066] The first control port is electrically connected to the control port of the first relay.

[0067] The second control port is electrically connected to the control port of the second relay.

[0068] Specifically, the first power supply port P1 and the second power supply port P2 of the control unit 201 supply power to the first relay and the second relay respectively. The connection method is that the first power supply port P1 is connected to the power supply port J1 of the first relay, and the second power supply port P2 is connected to the power supply port J2 of the second relay.

[0069] Specifically, the interface circuit module 102 includes a control unit and a first control branch and a second control branch connected in parallel. The first control branch is provided with a first relay and a sampling resistor connected in series. The sampling resistor includes a first sampling resistor and a second sampling resistor connected in parallel. The second control branch is provided with a third voltage-regulating resistor and a second relay connected in series. The control unit is connected to the first relay and the second relay.

[0070] It should be noted that, in order to ensure the stability of the circuit signal, a decoupling circuit is provided at the input end of the current source chip module 101, and a filter circuit is provided at the output end.

[0071] In one possible implementation, an STS8205 chip can be used as the control unit of the interface circuit module. The STS8205 chip operates at 12V. The relay unit includes a first relay and a second relay. The voltage of the relays is provided by the circuit voltage of the STS8205. The first control port of the STS8205 is connected to the control signal input terminal CBIT0 of the first relay, controlling the state of the contact pins of the first relay. The second control port of the STS8205 is connected to the control signal input terminal CBIT1 of the second relay, controlling the state of the contact pins of the second relay. This ensures voltage stability in the interface circuit and allows one chip to control two relays, saving resources from external circuitry.

[0072] It should be noted that the above is only an example. In practical applications, there are no specific limitations on the current source chip, voltage value, and pin connection method. It is understood that other current source chips, power supply voltages, and pin connection methods are also included in the protection scope of this disclosure.

[0073] In one possible implementation, the test equipment module 103 has a built-in testing software program. When the chip under test is determined to be a current source chip, the testing software program does not need to be modified for different models of current source chips; only the values ​​need to be modified according to the specific test conditions. This eliminates the need to design different testing programs for different models of the same type of current source chip, making the testing more efficient.

[0074] Based on the above, once it is confirmed that the chip under test is a current source chip, the device for detecting current source chips provided in this disclosure can simply and efficiently detect the electrical characteristic parameters of the current source chip to detect whether the current source chip is compliant, thereby saving the detection cost of the current source chip and reducing the detection difficulty.

[0075] It should be noted that the chips used above are only examples, and circuit designs implemented with other similar chips are also included within the scope of protection of this disclosure.

[0076] See Figure 3 This is a circuit diagram of a current source chip detection method provided in an embodiment of this disclosure. As an example, in the current source chip module 101 of this embodiment, the current source chip to be detected is LT3082, the main control chip of the control unit 102b is STS8205, the interface circuit module is composed of STS8205 and a first control branch B1 and a second control branch B2 connected in parallel, and the test platform module includes built-in detection code. The detection program can be written after the test platform is connected, or it can be an imported pre-written detection program.

[0077] In this scenario embodiment, the current source chip, voltage value, and pin connection method are only examples and are not specifically limited in actual applications. It is understood that other current source chips, power supply voltages, and pin connection methods are also included in the protection scope of this disclosure.

[0078] As an example, the LT3082's input terminal IN is connected to PVI3 of the floating power voltage and current source derived from the STS8205 and includes a decoupling circuit. The setting terminal SET is connected to PVI0 of the same floating power voltage and current source, and the output terminal OUT is connected to PVI1 of the STS8205 and includes a filtering circuit. All hardware resources are open to the user, and all connections are Kelvin-based. The maximum voltage range of the PVI voltage and current source is ±50V, and the maximum current range is ±1A. The PVI voltage and current source measures the port voltage and port current of the LT3082. PVI0, PVI1, and PVI3 are floating power voltage and current sources derived from the STS8205 chip.

[0079] As an example, based on Figure 3 As shown, the VCC terminal of the STS8205 is connected to a 12V voltage, providing 12V voltage to the first relay 202a and the second relay 202b in the first control branch B1 and the second control branch B2. The power supply ports VCC1 and VCC2 of the first and second relays are connected to the power supply port VCC3 of the control unit 102b. The input terminal K1 of the first relay is connected to the input terminal IN of the LT3082. The contact pin A of the first relay is connected to the first sampling resistor R1, and the contact pin B of the first relay is connected to the second sampling resistor R2. The third regulating resistor R3 is connected to the input pin K3 of the second relay. The control port CBIT0 of the first relay is connected to the first control port 2 of the STS8205, and the control port CBIT1 of the second relay is connected to the second control port 4 of the STS8205.

[0080] The LT3082 chip has a filter circuit at the output terminal and a decoupling circuit at the input terminal IN.

[0081] In this embodiment, by controlling the on / off mode of the relay contact pins through the STS8205, the current data of the first control branch and the second control branch can be obtained, so that the current data of the setting terminal, input terminal and output terminal measured by the PVI source led out by the STS8205 can be sent to the test machine to achieve the detection effect of the current source chip.

[0082] Based on the same inventive concept, corresponding to any of the above-described embodiments, this disclosure also provides a method for detecting a current source chip.

[0083] refer to Figure 4 The figure is a flowchart of a method for detecting a current source chip according to an embodiment of this disclosure. The method for detecting a current source chip includes:

[0084] Step 401: In response to determining that the chip under test is a current source chip, the current source chip module, the interface circuit module, and the test instrument module are electrically connected in sequence, wherein the resistance values ​​of the three resistors in the interface circuit module are the resistance values ​​of the first sampling resistor, the second sampling resistor, and the third voltage regulating resistor, respectively.

[0085] In some embodiments, the response to determining that the chip under test is a current source chip includes:

[0086] Obtain the chip to be tested.

[0087] If the chip under test is provided with an input terminal, a setting terminal, an output terminal, and a constant current source, then the chip under test is determined to be a current source chip.

[0088] In practice, it's necessary to identify the chip under test as a current source chip. A current source chip typically contains input terminals, output terminals, setting terminals, and a constant current source. The internal circuitry of the current source chip can be obtained by consulting its datasheet. (See also...) Figure 5 The figure shows the internal circuit diagram of the current source chip LT3082. The current source chip LT3082 includes IN (input terminal), OUT (output terminal), SET (setting terminal), and a built-in constant current source with a current value of 10μA.

[0089] Based on the above steps, it can be seen that once the chip under test is determined to be a current source chip, a detection circuit can be designed for the current source chip, and determining that the chip under test is a current source chip is the basis for building a chip detection model.

[0090] In some embodiments, the resistance values ​​of the three resistors in the interface circuit module, namely the first sampling resistor, the second sampling resistor, and the third voltage-regulating resistor, include:

[0091] The resistance values ​​of the first sampling resistor, the second sampling resistor, and the third voltage regulator resistor are determined based on the preset current value of the constant current source and the preset voltage value of the interface circuit module.

[0092] In specific implementation, based on Figure 3 The circuit shown is based on I of LT3082. load The load current range is 1mA to 200mA. The voltage VCC provided by STS8205 to the first and second relays is 12V, which can determine the resistance values ​​of the first sampling resistor, the second sampling resistor, and the third voltage regulator resistor.

[0093] In some embodiments, determining the resistance values ​​of the first sampling resistor, the second sampling resistor, and the third voltage-regulating resistor based on the preset current value of the constant current source and the preset voltage value of the interface circuit module includes:

[0094] Obtain the voltage value of the interface circuit, the current value of the constant current source, and the maximum and minimum load current values ​​of the current source chip.

[0095] The resistance value of the first sampling resistor is the ratio of the voltage value of the interface circuit to the current value of the constant current source.

[0096] The resistance value of the third voltage regulator is the ratio of the voltage value of the interface circuit to the maximum load current of the current source chip.

[0097] The resistance value of the second sampling resistor is the product of the minimum load current of the current source chip and the resistance value of the third voltage regulator resistor, and then the ratio is obtained by dividing the current value of the constant current source.

[0098] In specific implementation, I load The formula for calculating (load current value) is: Among them, due to the I of LT3082 load The range is 1mA to 200mA, so we can use the extreme values ​​of 1mA and 200mA for calculation. The calculation process is as follows:

[0099]

[0100]

[0101] As an example, a third voltage regulator resistor R3 with a resistance of 1Ω is selected. Based on the above formula, R1 = 20kΩ and R2 = 100Ω can be calculated. According to the obtained resistance values ​​of R1, R2, and R3, the corresponding resistors are selected to design the first control branch and the second control branch.

[0102] It should be noted that, in this embodiment, the selection of resistance values ​​for R1, R2, and R3 needs to satisfy the current change in the load regulation rate, i.e., I0. load The change in quantity.

[0103] Based on the above steps, once the resistance values ​​of R1, R2, and R3 are determined, an interface circuit module can be designed to detect the current source chip LT3082 in order to obtain the internal data of the current source chip LT3082.

[0104] Step 402: Obtain the internal data of the current source chip, input the internal data into a preset model, and obtain the electrical characteristic test results of the current source chip. The preset model includes a software program for detecting the current source chip.

[0105] In one possible implementation, the internal data includes the current value at the input terminal, the current value at the setting terminal, the current value at the output terminal, and the current value of the constant current source.

[0106] In practice, a measurement delay needs to be reserved in the initialization settings of the preset model to ensure the stability of the test results. The internal data of the current source chip is input into the preset model, which includes software programs designed for the same type of current source chip. When testing different models of current source chips, it is not necessary to modify the software program again. Only the values ​​of the specific test conditions for the chip need to be modified to output the test results and obtain the electrical characteristic test results of the current source chip.

[0107] In one possible implementation, after acquiring the internal data of the current source chip and inputting the internal data into a preset model to obtain the electrical characteristic test results of the current source chip, the method further includes:

[0108] The electrical characteristic test results are compared with the standard electrical characteristic data of the current source chip to obtain the comparison results.

[0109] The comparison results will determine whether the current source chip meets the standard.

[0110] In practice, after obtaining the electrical characteristic results of the current source chip, they are compared with the standard electrical characteristic data so that the current source chip can be judged to meet the standard. If it does not meet the standard, an error is reported.

[0111] Based on the above, it can be seen that after testing the current source chip, comparing it with the standard electrical characteristic data can determine whether the current source chip meets the standard, saving manpower and improving testing efficiency.

[0112] In the above embodiments, the detection principle model of the current source chip LT3082 based on the automatic testing equipment and STS8205 can be constructed by simply adjusting the resistance values ​​of the sampling resistor and the voltage regulator resistor in the hardware circuit according to the constant current source current value and the load current range. Combined with the software program of the preset model, the electrical characteristic parameters of this type of current source chip can be quickly detected and developed.

[0113] It should be noted that the above description describes some embodiments of this disclosure. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in a different order than that shown in the above embodiments and still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require a specific or sequential order to achieve the desired result. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0114] Based on the same inventive concept, corresponding to the methods of any of the above embodiments, this disclosure also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the method of detecting a current source chip as described in any of the above embodiments.

[0115] See Figure 6 This figure is a schematic diagram of a more specific electronic device hardware structure provided in an embodiment of this disclosure. The device may include: a processor 601, a memory 602, an input / output interface 603, a communication interface 604, and a bus 605. The processor 601, memory 602, input / output interface 603, and communication interface 604 are interconnected internally via the bus 605.

[0116] The processor 601 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this specification.

[0117] The memory 602 can be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), static storage device, dynamic storage device, etc. The memory 602 can store the operating system and other application programs. When the technical solutions provided in the embodiments of this specification are implemented by software or firmware, the relevant program code is stored in the memory 602 and is called and executed by the processor 601.

[0118] The input / output interface 603 is used to connect input / output modules to realize information input and output. Input / output modules can be configured as components within the device (not shown in the figure) or externally connected to the device to provide corresponding functions. Input devices may include keyboards, mice, touchscreens, microphones, various sensors, etc., while output devices may include displays, speakers, vibrators, indicator lights, etc.

[0119] Communication interface 604 is used to connect a communication module (not shown in the figure) to enable communication between this device and other devices. The communication module can communicate via wired means (such as USB, Ethernet cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.).

[0120] Bus 605 includes a pathway for transmitting information between various components of the device (e.g., processor 601, memory 602, input / output interface 603, and communication interface 604).

[0121] It should be noted that although the above-described device only shows the processor 601, memory 602, input / output interface 603, communication interface 604, and bus 605, in specific implementations, the device may also include other components necessary for normal operation. Furthermore, those skilled in the art will understand that the above-described device may only include the components necessary for implementing the embodiments of this specification, and not necessarily all the components shown in the figures.

[0122] The electronic devices described above are used to implement the method of the corresponding current source chip in any of the foregoing embodiments, and have the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0123] Based on the same inventive concept, corresponding to the methods of any of the above embodiments, this disclosure also provides a non-transitory computer-readable storage medium storing computer instructions for causing the computer to execute the method of detecting a current source chip as described in any of the above embodiments.

[0124] The computer-readable medium of this embodiment includes permanent and non-permanent, removable and non-removable media, and information storage can be implemented by any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic magnetic disk storage or other magnetic storage devices, or any other non-transfer medium that can be used to store information accessible by a computing device.

[0125] The computer instructions stored in the storage medium of the above embodiments are used to cause the computer to execute the method of detecting the current source chip as described in any of the above embodiments, and have the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0126] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of this disclosure (including the claims) is limited to these examples; within the framework of this disclosure, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of the embodiments of this disclosure as described above, which are not provided in detail for the sake of brevity.

[0127] Additionally, to simplify the description and discussion, and to avoid obscuring the embodiments of this disclosure, the provided drawings may or may not show well-known power / ground connections to integrated circuit (IC) chips and other components. Furthermore, the apparatus may be shown in block diagram form to avoid obscuring the embodiments of this disclosure, and this also takes into account the fact that the details of implementation of these block diagram apparatuses are highly dependent on the platform on which the embodiments of this disclosure will be implemented (i.e., these details should be fully understood by those skilled in the art). While specific details (e.g., circuitry) have been set forth to describe exemplary embodiments of this disclosure, it will be apparent to those skilled in the art that the embodiments of this disclosure may be implemented without these specific details or with variations thereof. Therefore, these descriptions should be considered illustrative rather than restrictive.

[0128] Although this disclosure has been described in conjunction with specific embodiments thereof, many substitutions, modifications, and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may be used with the embodiments discussed.

[0129] This disclosure is intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A device for detecting a current source chip, characterized in that, The device includes a current source chip module, an interface circuit module, and a test bench module that are connected in sequence, wherein: The current source chip module includes an input terminal, a setting terminal, and an output terminal, wherein the input terminal is provided with a constant current source; The interface circuit module includes a control unit and a first control branch and a second control branch connected in parallel. The first control branch is provided with a first relay and a sampling resistor connected in series. The sampling resistor includes a first sampling resistor and a second sampling resistor connected in parallel. The input terminal of the first relay is connected to the input terminal of the current source chip, and the two contact pins of the output terminal of the first relay are respectively connected to the first terminal of the first sampling resistor and the first terminal of the second sampling resistor. The second control branch is provided with a third voltage-regulating resistor and a second relay connected in series. The input terminal of the second relay is connected to the output terminal of the current source chip through the third voltage-regulating resistor. The test bench module is connected to the second end of the first sampling resistor, the second end of the second sampling resistor, and the output end of the second relay, respectively.

2. The apparatus according to claim 1, characterized in that, The control unit includes: a first power supply port, a second power supply port, a first control port, and a second control port; The first power supply port is electrically connected to the power supply port of the first relay; The second power supply port is electrically connected to the power supply port of the second relay; The first control port is electrically connected to the control port of the first relay; The second control port is electrically connected to the control port of the second relay.

3. A method for detecting a current source chip, applied to the apparatus for detecting a current source chip as described in any one of claims 1-2, characterized in that, include: In response to determining that the chip under test is a current source chip, the current source chip module, the interface circuit module, and the test bench module are electrically connected in sequence. The resistance values ​​of the first sampling resistor, the second sampling resistor, and the third voltage regulator resistor are determined according to the preset current value of the constant current source and the preset voltage value of the interface circuit module. The internal data of the current source chip is acquired and input into a preset model to obtain the electrical characteristic test results of the current source chip.

4. The method according to claim 3, characterized in that, The response to determining that the chip under test is a current source chip includes: Obtain the chip under test; If the chip under test is provided with an input terminal, a setting terminal, an output terminal, and a constant current source, then the chip under test is determined to be a current source chip.

5. The method according to claim 3, characterized in that, The step of determining the resistance values ​​of the first sampling resistor, the second sampling resistor, and the third voltage-regulating resistor based on the preset current value of the constant current source and the preset voltage value of the interface circuit module includes: Obtain the voltage value of the interface circuit, the current value of the constant current source, and the maximum and minimum load current values ​​of the current source chip; The resistance value of the first sampling resistor is the ratio of the voltage value of the interface circuit to the current value of the constant current source; The resistance value of the third voltage-regulating resistor is the ratio of the voltage value of the interface circuit to the maximum load current of the current source chip; The resistance value of the second sampling resistor is the product of the minimum load current of the current source chip and the resistance value of the third voltage regulator resistor, and then the ratio is obtained by dividing the current value of the constant current source.

6. The method according to claim 3, characterized in that, The internal data includes the current value at the input terminal of the current source chip, the current value at the setting terminal, the current value at the output terminal, and the current value of the constant current source.

7. The method according to claim 3, characterized in that, After acquiring the internal data of the current source chip, inputting the internal data into a preset model, and obtaining the electrical characteristic test results of the current source chip, the method further includes: The electrical characteristic test results are compared with the standard electrical characteristic data of the current source chip to obtain the comparison results; The comparison results will determine whether the current source chip meets the standard.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the method as described in any one of claims 3 to 7.

9. A non-transitory computer-readable storage medium storing computer instructions, characterized in that, The computer instructions are used to cause the computer to perform the method of any one of claims 3 to 7.

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