An interface switching device, a mainboard interface expansion circuit and a computer equipment

Abstract

The application provides an interface switching device, a mainboard interface expansion circuit and a computer equipment. The interface switching device comprises an RJ45 interface, a first universal serial bus interface and a network signal conversion circuit; the first universal serial bus interface is connected with the RJ45 interface through the network signal conversion circuit; the network signal conversion circuit is used for converting the signal based on the serial gigabit media interface protocol output by the first universal serial bus interface into the signal based on the standard Ethernet protocol, and converting the signal based on the standard Ethernet protocol output by the RJ45 interface into the signal based on the serial gigabit media interface protocol. The application can realize the wired network connection of the computer equipment without the RJ45 interface through the signal conversion.

Description

Technical Field

[0001] This application relates to the field of communication interface technology, and more specifically to an interface adapter, a motherboard interface expansion circuit, and computer equipment. Background Technology

[0002] Most computer devices provide an RJ45 interface for wired network connections. With the development of computer technology, users have increasingly higher demands for portable laptops. However, integrating the RJ45 interface onto the portable laptop motherboard occupies a significant amount of space, making it inconvenient to install other components. Currently, most companies' solution is to include a mini RJ45 interface on the portable laptop and then connect it to a regular RJ45 interface via an adapter. However, this solution increases the number of interfaces on the portable laptop and cannot utilize existing structural designs. Summary of the Invention

[0003] This application is made to address at least one of the aforementioned problems. According to one aspect of this application, an interface adapter is provided, the interface adapter including an RJ45 interface, a first universal serial bus interface, and a network signal conversion circuit;

[0004] The first universal serial bus interface is connected to the RJ45 interface through the network signal conversion circuit.

[0005] The network signal conversion circuit includes a first network interface card (NIC) chip, which is used to convert the signal based on the Serial Gigabit Media Interface (SGIMT) protocol output from the first Universal Serial Bus (USB) interface into a signal based on the standard Ethernet protocol, and to convert the signal based on the standard Ethernet protocol output from the RJ45 interface into a signal based on the Serial Gigabit Media Interface (SGIMT) protocol.

[0006] In one embodiment of this application, the network signal conversion circuit further includes a network transformer; the network transformer connects the first network card chip and the RJ45 interface.

[0007] In one embodiment of this application, the first universal serial bus interface includes a USB-C interface.

[0008] In one embodiment of this application, the first universal serial bus interface is electrically connected to the network signal conversion circuit via a network cable; or

[0009] The first universal serial bus interface is connected to the network signal conversion circuit via an integrated circuit board.

[0010] According to another aspect of this application, a motherboard interface expansion circuit is provided, which includes a second universal serial bus interface, a data selection circuit, a data transmission circuit, and an embedded controller; wherein...

[0011] The second universal serial bus interface is connected to the embedded controller. When the second universal serial bus interface is connected to a USB device, the second universal serial bus interface sends a plug-in status identification signal to the embedded controller.

[0012] The data selection circuit is connected to the second universal serial bus interface, and the data selection circuit determines the plugging status of the USB device according to the first selection instruction sent by the embedded controller.

[0013] The data transmission circuit is connected to the embedded controller, and the data transmission circuit sends data corresponding to the signal type specified by the second selection instruction to the second universal serial bus interface according to the second selection instruction of the embedded controller;

[0014] The embedded controller is connected to the second universal serial bus interface, the data selection circuit and the data transmission circuit. The embedded controller receives the plug-in status identification signal sent by the second universal serial bus interface, sends the first selection command to the data selection circuit according to the plug-in status identification signal, and sends the second selection command to the data transmission circuit according to the signal type transmitted by the second universal serial bus interface.

[0015] The signal types include signals based on the Serial Gigabit Media Interface protocol or signals based on the standard Ethernet protocol.

[0016] In one embodiment of this application, the data transmission circuit includes a second network interface card chip, a data selector, and a demultiplexer;

[0017] The second network interface card (NIC) chip is connected to the data selector and is used to convert external device interconnect bus interface signals into signals based on the serial gigabit media interface protocol.

[0018] The data selector is connected to the demultiplexer. The data selector is used to receive the signal based on the Serial Gigabit Media Interface protocol and the signal based on the standard Ethernet protocol, and to select to output the signal based on the Serial Gigabit Media Interface protocol or the signal based on the standard Ethernet protocol.

[0019] The demultiplexer is connected to the second universal serial bus interface. The demultiplexer is used to process the signal output by the data selector and send the processed signal to the second universal serial bus interface.

[0020] In one embodiment of this application, the second network card chip stores a media access control address corresponding to the computer device.

[0021] In one embodiment of this application, the second universal serial bus interface includes a USB-C interface.

[0022] In one embodiment of this application, the USB-C interface includes at least a CC1 pin, a CC2 pin, an SBU1 pin, an SBU2 pin, a TX pin, and an RX pin;

[0023] The CC1 pin and the CC2 pin are connected to the embedded controller, and the CC1 pin and the CC2 pin are used to transmit the plug-in status signal of the USB-C interface;

[0024] The SBU1 pin and the SBU2 pin are connected to the data selector. The SBU1 pin is used to transmit data signals, and the SBU2 pin is used to transmit clock signals.

[0025] The TX pin and the RX pin are connected to the data transmission circuit. The TX pin is used to send data, and the RX pin is used to receive data.

[0026] According to another aspect of this application, a computer device is provided, the computer device including the motherboard interface expansion circuit as described above.

[0027] According to the interface conversion device of this application, a network signal conversion circuit converts a signal based on the Serial Gigabit Media Interface protocol into a signal based on the standard Ethernet protocol, or converts a signal based on the standard Ethernet protocol into a signal based on the Serial Gigabit Media Interface protocol, so that computer devices without an RJ45 interface can achieve wired network connection through signal conversion.

[0028] In addition, the motherboard interface expansion circuit of this application enables the Universal Serial Bus interface to select between transmitting signals based on the Serial Gigabit Media Interface protocol or signals based on the standard Ethernet protocol through a data selection circuit, thereby avoiding devices with RJ45 interfaces and reducing the design space of the motherboard. Attached Figure Description

[0029] The above and other objects, features, and advantages of this application will become more apparent from the more detailed description of the embodiments of this application in conjunction with the accompanying drawings. The accompanying drawings are used to provide a further understanding of the embodiments of this application and form part of the specification. They are used together with the embodiments of this application to explain this application and do not constitute a limitation thereof. In the accompanying drawings, the same reference numerals generally represent the same components or steps.

[0030] Figure 1 A diagram showing an interface adapter according to an embodiment of this application;

[0031] Figure 2 A schematic diagram of a motherboard interface expansion circuit according to an embodiment of this application is shown;

[0032] Figure 3 A schematic diagram of a USB-C interface according to an embodiment of this application is shown;

[0033] Figure 4 A schematic block diagram of a computer device according to an embodiment of this application is shown. Detailed Implementation

[0034] To make the objectives, technical solutions, and advantages of this application more apparent, exemplary embodiments according to this application will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of this application, and not all embodiments of this application. It should be understood that this application is not limited to the exemplary embodiments described herein. Based on the embodiments of this application described herein, all other embodiments obtained by those skilled in the art without inventive effort should fall within the protection scope of this application.

[0035] To address the aforementioned technical problems, this application provides an interface conversion device, comprising an RJ45 interface, a Universal Serial Bus (USB) interface, and a network signal conversion circuit. The first USB interface is connected to the RJ45 interface via the network signal conversion circuit. The network signal conversion circuit includes a first network interface card (NIC) chip. The network signal conversion circuit is used to convert signals output from the first USB interface based on the Serial Gigabit Media Interface (SGI) protocol into signals based on the standard Ethernet protocol, and to convert signals output from the RJ45 interface based on the standard Ethernet protocol into signals based on the SGI protocol. This application embodiment uses a network signal conversion circuit to convert signals based on the SGI protocol into signals based on the standard Ethernet protocol, or vice versa, enabling computer devices without an RJ45 interface to achieve wired network connections through signal conversion. In addition, the motherboard interface expansion circuit of this application enables the first universal serial bus interface to select to transmit signals based on the serial gigabit media interface protocol or signals based on the standard Ethernet protocol through a data selection circuit, thereby avoiding RJ45 interface devices and reducing the design space of the motherboard.

[0036] The interface switching device scheme according to embodiments of this application will now be described in detail with reference to the accompanying drawings. Without conflict, the features of the various embodiments of this application can be combined with each other.

[0037] Figure 1 A schematic diagram of an interface adapter according to an embodiment of this application is shown; as follows: Figure 1 As shown, the interface adapter 100 according to an embodiment of this application may include an RJ45 interface 11, a first universal serial bus interface 12, and a network signal conversion circuit 13.

[0038] In one embodiment of this application, the Universal Serial Bus (USB) interface 12 is connected to the RJ45 interface 11 through the network signal conversion circuit 13.

[0039] In one example, the first USB interface includes a USB-C interface. The USB-C interface (i.e., USB Type-C interface) is a universal serial bus interface form factor standard that is smaller than both Type-A and Type-B and has a wide range of applications, including desktop computers, laptops, mobile phones, and tablets.

[0040] In one embodiment of this application, the network signal conversion circuit 13 includes a first network card chip 131, which is used to convert the signal output from the first universal serial bus interface 12 based on the Serial Gigabit Media Independent Interface (SGMII) protocol into a signal based on the standard Ethernet protocol, and to convert the signal output from the RJ45 interface 11 based on the standard Ethernet protocol into a signal based on the Serial Gigabit Media Independent Interface (SGMII) protocol.

[0041] The SGMII interface transmits ordinary high-speed serial signals and serves as the connection bus between the Ethernet Media Access Controller (MAC) and the physical layer devices (PHY). Signals based on the standard Ethernet protocol are network signals transmitted through the Medium Dependent Interface (MDI).

[0042] In one example, the network signal conversion circuit 13 further includes a network transformer 132; the network transformer 132 connects the first network card chip 131 and the RJ45 interface 11. The functions of the network transformer are as follows: (1) it can enhance the signal and make its transmission distance longer; (2) it isolates the chip from the outside, greatly enhances the anti-interference ability, and also provides great protection for the chip (such as lightning strike); (3) when connected to network ports with different levels (e.g., some ports have a level of 2.5V and some ports have a level of 3.3V), it will not affect the devices of each other.

[0043] In a specific example, the first network interface chip 131 could be an Intel I210. The Intel I210 chip is a low-power, small-size, single-port gigabit network controller that provides an ideal solution for running tightly controlled media stream synchronization and buffering, while enhancing network connectivity and improving the performance of embedded applications.

[0044] In one example of this application, the first USB interface 12 is electrically connected to the network signal conversion circuit 13 via a network cable. When the device requiring a wired connection is some distance from the network interface, this interface adapter can function as an extension cable.

[0045] In another example of this application, the first USB interface 12 is connected to the network signal conversion circuit 13 via an integrated circuit board. This design makes the interface adapter 100 small in size and easy to carry.

[0046] This application embodiment uses a network signal conversion circuit to convert signals based on the Serial Gigabit Media Interface protocol into signals based on the standard Ethernet protocol, or to convert signals based on the standard Ethernet protocol into signals based on the Serial Gigabit Media Interface protocol, so that computer devices without an RJ45 interface can achieve wired network connection through signal conversion.

[0047] Figure 2 A schematic diagram of a motherboard interface expansion circuit according to an embodiment of this application is shown; as follows: Figure 2 As shown, the motherboard interface expansion circuit 200 according to an embodiment of this application may include a second universal serial bus interface (second USB interface) 21, a data selection circuit 22, a data transmission circuit 23, and an embedded controller (EC) 24.

[0048] In one embodiment of this application, combined with Figure 2The second USB interface 21 is connected to the embedded controller 24. When the second USB interface 21 is connected to a USB device, the second USB interface 21 sends a connection status identification signal to the embedded controller 24.

[0049] The second universal serial bus interface 21 includes a USB-C interface.

[0050] In one embodiment of this application, such as Figure 3 The diagram shows a schematic of a USB-C interface. The USB-C interface in the diagram includes at least the CC1 pin, CC2 pin, SBU1 pin, SBU2 pin, TX pin, and RX pin.

[0051] The CC1 pin and the CC2 pin are connected to the embedded controller, and the CC1 pin and the CC2 pin are used to transmit the plug-in status signal of the USB-C interface;

[0052] The SBU1 pin and the SBU2 pin are connected to the data selector. The SBU1 pin is used to transmit data signals, and the SBU2 pin is used to transmit clock signals.

[0053] The TX pin and the RX pin are connected to the data transmission circuit. The TX pin is used to send data, and the RX pin is used to receive data.

[0054] Continue to combine Figure 3 The USB-C interface in the diagram has 24 pins, of which the GND pin and VBUS pin are the power supply pin and ground pin, respectively. Figure 3 The pins located at positions A1, A4, A9, A12, B1, B4, B9, and B12 (a total of 8 pins) are used to improve current transfer capability. The RX and TX pins (… Figure 3 Pins A2, A3, A10, A11, B2, B3, B10, and B11 in the diagram serve as input / output differential lines, totaling eight pins, used for sending and receiving signals. Pins CC1 and CC2 carry the transmission direction confirmation and reversible insertion confirmation functions during the USB-C interface connection process, as well as the USB PD BCM code signal transmission function, realizing the load's functional configuration. Of the two CC lines, when one CC line is used as the configuration signal for the TYPE-C interface, the other CC line serves as the power supply for the EMARKER chip on the cable. The remaining SBU1 and SBU2 pins are auxiliary signal pins. Additionally, to be compatible with the USB 2.0 interface, USB-C also retains the USB D+ and D- pins (…). Figure 3 The pins located at positions A6, A7, B6, and B7 in the diagram are used by USB 2.0 devices.

[0055] In the embodiments of this application, a USB 3.1 interface can be used. Normally, USB 3.1 only uses two pairs of TX / RX differential lines as data lines; when plugged in correctly, TX1 / RX1 is connected, and when plugged in incorrectly, TX2 / RX2 is connected. It can be seen that in any case, two pairs of differential lines will not be used. The DP alternating mode loads the DP signal onto these two "extra" differential lines, thereby enabling USB 3.1 and DP to work simultaneously. Figure 3 The SBU1 and SBU2 pins in the circuit primarily serve a multiplexing function. The CC1 and CC2 pins are mainly used for communication with the power delivery module, responsible for transmitting key information such as the device's link management layer configuration information (DPCD) and extended display identification data (EDID).

[0056] Additionally, the USB device in this application embodiment can be Figure 1 The interface adapter 100 shown. And when Figure 1 When the USB-C interface of the interface adapter 100 shown is a female interface, then the USB-C interface in this embodiment of the application is a male interface; when Figure 1 When the USB-C interface of the interface adapter 100 shown is a male interface, the USB-C interface in this embodiment of the application is a female interface.

[0057] In one embodiment of this application, the data selection circuit 22 is connected to the second universal serial bus interface 21, and the data selection circuit 22 determines the plugging status of the USB device according to the first selection instruction sent by the embedded controller 24.

[0058] Continue to combine Figure 2 The USB-C interface 21 in the diagram includes CC1 and CC2 pins. In a specific example, when both CC1 and CC2 pins are high, the current insertion state is considered to be the correct insertion state. The embedded controller can send a first selection command to the data selection circuit 22, for example, specifying SBU1 pin as the data pin MDIO_DAT and SBU2 pin as the clock pin MDIO_CLK. When both CC1 and CC2 pins are low, the current insertion state is considered to be the reverse insertion state. The embedded controller can send a first selection command to the data selection circuit, for example, specifying SBU1 pin as the clock pin MDIO_CLK and SBU2 pin as the data pin MDIO_DAT. This ensures accurate data transmission regardless of whether the USB-C interface is correctly or incorrectly inserted.

[0059] In another specific embodiment, the data selection circuit 22 of this application further includes a data selector 221. When the current insertion state is the correct insertion state, the data selector 221 can select to use the SBU1 pin as the clock pin MDIO_CLK and the SBU2 pin as the data pin MDIO_DAT. Alternatively, when the current insertion state is the correct insertion state, the data selector 221 can select to use the SBU2 pin as the clock pin MDIO_CLK and the SBU1 pin as the data pin MDIO_DAT.

[0060] In one embodiment of this application, the following is continued: Figure 2 The data transmission circuit 23 is connected to the embedded controller 24. The data transmission circuit 23 sends data corresponding to the signal type specified by the second selection instruction to the second universal serial bus interface 21 according to the second selection instruction of the embedded controller 24.

[0061] The signal types include signals based on the Serial Gigabit Media (SGMII) interface protocol or signals based on the standard Ethernet protocol. Signals based on the standard Ethernet protocol are transmitted through the MDI interface.

[0062] In this embodiment, the USB-C interface can transmit signals based on the Serial Gigabit Media (SGMII) interface protocol as well as signals based on the standard Ethernet protocol. However, the two types of signals cannot be transmitted simultaneously. Therefore, the embedded controller can determine the data type to be transmitted based on the type of device connected to the USB-C interface and send a second selection command to the data transmission circuit 23 so that the data transmission circuit 23 transmits the corresponding type of data.

[0063] In one example, continue combining Figure 2 The data transmission circuit includes a second network card chip 231, a data selector (MUX) 232, and a demultiplexer (DEMUX) 233.

[0064] The second network interface card chip 231 is connected to the data selector 232, and the second network interface card chip 231 is used to convert the external device interconnect bus interface signal into a signal based on the serial gigabit media interface protocol.

[0065] The data selector 232 is connected to the demultiplexer 233. The data selector 232 is used to receive the signal based on the Serial Gigabit Media Interface protocol and the signal based on the standard Ethernet protocol, and select to output the signal based on the Serial Gigabit Media Interface protocol or the signal based on the standard Ethernet protocol.

[0066] The demultiplexer 233 is connected to the second universal serial bus interface 21. The demultiplexer 233 is used to process the signal output by the data selector 232 and send the processed signal to the second universal serial bus interface 21.

[0067] In this application, the second network card chip stores the Media Access Control Address (MAC) corresponding to the computer device. In this embodiment, the high-speed serial computer extended bus standard signal (Peripheral Component Interconnect Express, PCIE) is converted into an SGMII signal, and the MAC address is stored in the second network card chip to meet the requirement of storing the MAC address on the laptop. Here, PCIE is the data bus directly output by the CPU, and SGMII is an Ethernet-related protocol. In a specific example, the second network card chip could be an RTL8111.

[0068] In a specific example, continue to combine Figure 2 After selecting between a signal based on the Serial Gigabit Media Interface (RGMI) protocol and a signal based on the standard Ethernet protocol, the data selector 232 sends the signal to the demultiplexer. During this process, the signal is processed and compressed. The demultiplexer then restores the received compressed RGMI or Ethernet signal to its original form and sends it to the USB-C interface. When the signal is based on RGMI, it is transmitted via the TX1 / RX1 pins; when the signal is based on the standard Ethernet protocol, it is transmitted via the TX2 / RX2 pins.

[0069] In one embodiment of this application, the following is continued: Figure 2 The embedded controller 24 is connected to the second universal serial bus interface 21, the data selection circuit 22 and the data transmission circuit 23. The embedded controller 24 receives the plug-in status identification signal sent by the second universal serial bus interface 21, sends the first selection command to the data selection circuit 22 according to the plug-in status identification signal, and sends the second selection command to the data transmission circuit 23 according to the signal type transmitted by the second universal serial bus interface 21.

[0070] The motherboard interface expansion circuit of this application enables the first universal serial bus interface to select between transmitting signals based on the serial gigabit media interface protocol or signals based on the standard Ethernet protocol through a data selection circuit, thereby avoiding RJ45 interface devices and reducing the design space of the motherboard.

[0071] The following is combined Figure 4 The computer device described in this application, wherein, Figure 4 A schematic block diagram of a computer device according to an embodiment of this application is shown.

[0072] like Figure 4 As shown, computer device 400 includes, Figure 2 The motherboard interface expansion circuit 41 shown.

[0073] In a specific example, the computer device 400 of this application can be a portable laptop or an ultra-thin laptop. The ultra-thin laptop includes a motherboard interface expansion circuit 41, and the motherboard interface expansion circuit 41 is provided with a USB-C interface. This interface can transmit both SMGMII signals and signals based on the standard Ethernet protocol. Therefore, the ultra-thin laptop does not need to be provided with an RJ45 interface, making the ultra-thin laptop smaller and more portable.

[0074] The computer device 400 of this application embodiment has the same advantages as the aforementioned motherboard interface expansion circuit because it can implement the aforementioned motherboard interface expansion circuit.

[0075] Although exemplary embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above exemplary embodiments are merely illustrative and are not intended to limit the scope of this application. Various changes and modifications can be made therein by those skilled in the art without departing from the scope and spirit of this application. All such changes and modifications are intended to be included within the scope of this application as claimed in the appended claims.

[0076] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of this application may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0077] Similarly, it should be understood that, in order to streamline this application and aid in understanding one or more of the various inventive aspects, features of this application may sometimes be grouped together in a single embodiment, figure, or description thereof in the description of exemplary embodiments of this application. However, this approach should not be construed as reflecting an intention that the claimed application requires more features than are expressly recited in each claim. Rather, as reflected in the corresponding claims, its inventive point lies in solving the corresponding technical problem with features fewer than all features of a single disclosed embodiment. Therefore, the claims following the detailed description are hereby expressly incorporated into that detailed description, wherein each claim itself is a separate embodiment of this application.

[0078] Those skilled in the art will understand that, apart from the mutual exclusion of features, all features disclosed in this specification (including the accompanying claims, abstract, and drawings) and all processes or units of any method or apparatus so disclosed can be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstract, and drawings) may be replaced by an alternative feature that serves the same, equivalent, or similar purpose.

[0079] Furthermore, those skilled in the art will understand that although some embodiments described herein include certain features but not others included in other embodiments, combinations of features from different embodiments are intended to be within the scope of this application and form different embodiments. For example, in the claims, any one of the claimed embodiments can be used in any combination.

[0080] The various component embodiments of this application can be implemented in hardware, or as software modules running on one or more processors, or a combination thereof. Those skilled in the art will understand that microprocessors or digital signal processors (DSPs) can be used in practice to implement some or all of the functions of some modules according to the embodiments of this application. This application can also be implemented as an apparatus program (e.g., a computer program and computer program product) for performing part or all of the methods described herein. Such an implementation of this application can be stored on a computer-readable medium, or can be in the form of one or more signals. Such signals can be downloaded from an Internet website, provided on a carrier signal, or provided in any other form.

[0081] It should be noted that the above embodiments are illustrative of this application and not restrictive, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses should not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. This application can be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third, etc., does not indicate any order. These words can be interpreted as names.

[0082] The above description is merely a specific embodiment or illustration of the embodiments of this application. The scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. The scope of protection of this application shall be determined by the scope of the claims.

Claims

1. A motherboard interface expansion circuit, characterized in that, It includes a second universal serial bus interface, a data selection circuit, a data transmission circuit, and an embedded controller; in The second universal serial bus interface is connected to the embedded controller. When the second universal serial bus interface is connected to a USB device, the second universal serial bus interface sends a plug-in status identification signal to the embedded controller. The data selection circuit is connected to the second universal serial bus interface, and the data selection circuit determines the plugging status of the USB device according to the first selection instruction sent by the embedded controller. The data transmission circuit is connected to the embedded controller, and the data transmission circuit sends data corresponding to the signal type specified by the second selection instruction to the second universal serial bus interface according to the second selection instruction of the embedded controller; The embedded controller is connected to the second universal serial bus interface, the data selection circuit and the data transmission circuit. The embedded controller receives the plug-in status identification signal sent by the second universal serial bus interface, sends the first selection command to the data selection circuit according to the plug-in status identification signal, and sends the second selection command to the data transmission circuit according to the signal type transmitted by the second universal serial bus interface. The signal types include signals based on the Serial Gigabit Media Interface protocol or signals based on the standard Ethernet protocol.

2. The motherboard interface expansion circuit as described in claim 1, characterized in that, The data transmission circuit includes a second network interface card chip, a data selector, and a demultiplexer; The second network interface card (NIC) chip is connected to the data selector and is used to convert external device interconnect bus interface signals into signals based on the serial gigabit media interface protocol. The data selector is connected to the demultiplexer. The data selector is used to receive the signal based on the Serial Gigabit Media Interface protocol and the signal based on the standard Ethernet protocol, and to select to output the signal based on the Serial Gigabit Media Interface protocol or the signal based on the standard Ethernet protocol. The demultiplexer is connected to the second universal serial bus interface. The demultiplexer is used to process the signal output by the data selector and send the processed signal to the second universal serial bus interface.

3. The motherboard interface expansion circuit as described in claim 2, characterized in that, in, The second network card chip stores the media access control address corresponding to the computer device.

4. The motherboard interface expansion circuit as described in any one of claims 1-3, characterized in that, The second universal serial bus interface includes a USB-C interface.

5. The motherboard interface expansion circuit as described in claim 4, characterized in that, The USB-C interface includes at least the CC1 pin, CC2 pin, SBU1 pin, SBU2 pin, TX pin, and RX pin; The CC1 pin and the CC2 pin are connected to the embedded controller, and the CC1 pin and the CC2 pin are used to transmit the plug-in status signal of the USB-C interface; The SBU1 pin and the SBU2 pin are connected to the data selector. The SBU1 pin is used to transmit data signals, and the SBU2 pin is used to transmit clock signals. The TX pin and the RX pin are connected to the data transmission circuit. The TX pin is used to send data, and the RX pin is used to receive data.

6. The motherboard interface expansion circuit as described in claim 1, characterized in that, The USB device is an interface adapter, which includes an RJ45 interface, a first universal serial bus interface, and a network signal conversion circuit. The first universal serial bus interface is connected to the RJ45 interface through the network signal conversion circuit. The network signal conversion circuit includes a first network interface card (NIC) chip, which is used to convert the signal based on the Serial Gigabit Media Interface (SGIMT) protocol output from the first Universal Serial Bus (USB) interface into a signal based on the standard Ethernet protocol, and to convert the signal based on the standard Ethernet protocol output from the RJ45 interface into a signal based on the Serial Gigabit Media Interface (SGIMT) protocol.

7. The motherboard interface expansion circuit as described in claim 6, characterized in that, The network signal conversion circuit also includes a network transformer; the network transformer connects the first network card chip and the RJ45 interface.

8. The motherboard interface expansion circuit as described in claim 6 or 7, characterized in that, The first universal serial bus interface includes a USB-C interface.

9. The motherboard interface expansion circuit as described in claim 6, characterized in that, in, The first universal serial bus interface is electrically connected to the network signal conversion circuit via a network cable; or The first universal serial bus interface is connected to the network signal conversion circuit via an integrated circuit board.

10. A computer device, characterized in that, The computer device includes a motherboard interface expansion circuit as described in any one of claims 1 to 9.

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