Image acquisition system and method based on virtual motherboard and hardware motherboard
Through an image acquisition system based on virtual motherboard and hardware motherboard, the long time and cost problems caused by the need for FPGA or SoC integration after ISP updates in the existing technology are solved, and the effect of quickly obtaining images on virtual motherboards is achieved, supporting the rapid introduction of new ISP versions to the market.
Patent Information
- Application Number
- CN202211669131.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-23
- Publication Date
- 2025-04-29
- Estimated Expiration
- 2042-12-23
AI Technical Summary
The existing camera image processing debugging and embedded software development require FPGA or SoC integration after the internal design and function update of the ISP, resulting in a long time and high cost, and the inability to quickly iterate and update, which drags down the speed of the new ISP version being launched to the market.
An image acquisition system based on virtual motherboard and hardware motherboard is adopted to build a virtual motherboard through a virtualization platform, configure an image acquisition model, signal transmission model, image processing model and peripheral model, and connect it to the hardware motherboard to achieve the speed of obtaining images by virtual motherboard.
It effectively improves the speed of obtaining images on the virtual motherboard, avoids the disadvantage of not being able to capture real images in real time using a virtual platform alone, better utilizes the real-time shooting capabilities of real cameras, and supports rapid iterative updates.
Smart Images

Figure CN115988316B_ABST
Abstract
Description
Technical Field
[0001] The present application belongs to the technical field of system simulation, and in particular, relates to an image acquisition system and method based on a virtual motherboard and a hardware motherboard. Background Art
[0002] Existing camera image processing debugging and embedded software development have the following shortcomings:
[0003] 1) After the internal design and function of the ISP are updated, the FPGA or SoC department needs to integrate the ISP into an FPGA or SoC, so that the operating system can be started, the driver can be loaded, and a series of other tasks can be completed before the real-time image can be captured from the camera and sent to the ISP for processing, testing and optimization.
[0004] 2) It takes a long time and is costly. When ISP versions are frequently updated, it is impossible to quickly iterate and update, which slows down the speed at which new ISP versions are brought to market. Summary of the invention
[0005] The present application provides an image acquisition system and method based on a virtual motherboard and a hardware motherboard, which are used to increase the speed at which the virtual motherboard acquires images.
[0006] In the first aspect, an embodiment of the present application provides an image acquisition system based on a virtual mainboard and a hardware mainboard, comprising: a virtual mainboard and a hardware mainboard connected to the virtual mainboard; wherein: the virtual mainboard is configured with an image acquisition model, a signal transmission model, an image processing model and a peripheral model; the virtual mainboard is constructed through a virtualization platform; the image acquisition model monitors the configuration information of the virtual mainboard on the camera, sends the configuration information of the virtual mainboard on the camera and the request for capturing an image to the hardware mainboard, and receives the image captured by the camera of the hardware mainboard from the hardware mainboard; after receiving the request for capturing an image, the hardware mainboard controls the camera connected to the hardware mainboard to capture an image, and transmits the captured image to the image acquisition model; the signal transmission model is respectively communicated with the virtual mainboard and the image acquisition model, receives the image from the image acquisition model, and forwards the received image to the image processing model; the image processing model is respectively communicated with the virtual mainboard and the signal transmission model, and processes the image received from the signal transmission model.
[0007] In an implementation of the first aspect, the peripheral model includes at least a CPU model, an I2C control model, and a double rate synchronous dynamic random access memory model.
[0008] In an implementation of the first aspect, the hardware mainboard is configured with: a connection module, which is used to establish a communication connection with the virtual mainboard; a configuration information control module, which obtains the configuration information of the virtual mainboard for the camera from the image acquisition model, and writes the configuration information to the camera connected to the hardware mainboard; an image acquisition module, which controls the camera connected to the hardware mainboard to acquire an image after receiving the request to capture an image, and stores the acquired image in the memory of the hardware mainboard; and an image sending module, which reads the image from the memory and sends the image to the image acquisition model.
[0009] In an implementation of the first aspect, the image acquisition model includes: a monitoring module, which monitors the configuration information of the virtual mainboard on the camera, sends the configuration information of the virtual mainboard on the camera and a request to capture an image to the hardware mainboard, and receives the image captured by the camera of the hardware mainboard from the hardware mainboard; a first register sub-module, which simulates camera register configuration and register reading and writing; and an I2C interface sub-module, which simulates communication with the I2C control model to control the register sub-model through the I2C control model.
[0010] In an implementation of the first aspect, the signal transmission model includes: a second register module, simulating serial interface register configuration and register reading and writing; an image forwarding module, receiving the image from the image acquisition model and forwarding the received image to the image processing model.
[0011] In an implementation manner of the first aspect, the image processing model includes at least one of the following modules: an image format conversion module, an automatic white balance adjustment module, an automatic focus module, and a color correction matrix module.
[0012] In an implementation of the first aspect, the virtual motherboard is an embedded SoC virtual motherboard; the operating systems supported by the virtual motherboard include Windows, Linux, FreeRTOS, and VxWorks.
[0013] In an implementation of the first aspect, the virtual mainboard includes a driver loading module for loading drivers of the image acquisition model, the signal transmission model, the image processing model, and the peripheral model.
[0014] In an implementation manner of the first aspect, the virtual mainboard and the hardware mainboard are connected via a network connection, a USB connection, or a PCIe master-slave mode connection.
[0015] In a second aspect, an embodiment of the present application provides a virtualized image processing method, which is applied to the image acquisition system based on a virtual mainboard and a hardware mainboard as described above, and the method includes: an image acquisition model monitors the configuration information of the virtual mainboard on the camera, and sends the configuration information of the virtual mainboard on the camera and a request to capture an image to the hardware mainboard; after receiving the request to capture an image, the hardware mainboard controls the camera connected to the hardware mainboard to capture an image, and transmits the captured image to the image acquisition model; the image acquisition model receives the image captured by the camera of the hardware mainboard from the hardware mainboard, and sends the received image to the signal transmission model; the signal transmission model receives the image from the image acquisition model, and forwards the received image to the image processing model; the image processing model is communicatively connected to the virtual mainboard and the signal transmission model, respectively, and processes the picture received from the signal transmission model.
[0016] The image acquisition system based on the virtual motherboard and the hardware motherboard provided in the embodiment of the present application connects the virtual platform with the real hardware development platform through the network, avoiding the disadvantage of using the virtual platform alone and being unable to capture real images in real time, and better utilizing the advantage of the real camera that can capture images in real time, effectively improving the speed of the virtual motherboard in acquiring images. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 Shown is a schematic diagram of the overall principle structure of the image acquisition system based on the virtual mainboard and the hardware mainboard according to an embodiment of the present application;
[0018] Figure 2 Shown is a schematic diagram of the principle structure of a virtual mainboard in an image acquisition system based on a virtual mainboard and a hardware mainboard according to an embodiment of the present application;
[0019] Figure 3 Shown is a schematic diagram of the principle structure of an image acquisition model in an image acquisition system based on a virtual mainboard and a hardware mainboard according to an embodiment of the present application;
[0020] Figure 4 It shows a schematic diagram of the principle structure of a transmission interface control model in an image acquisition system based on a virtual motherboard and a hardware motherboard according to an embodiment of the present application;
[0021] Figure 5 Shown is a schematic diagram of the principle structure of an image processing model in an image acquisition system based on a virtual mainboard and a hardware mainboard according to an embodiment of the present application;
[0022] Figure 6 Shown is a schematic diagram of the principle structure of a hardware mainboard in an image acquisition system based on a virtual mainboard and a hardware mainboard according to an embodiment of the present application;
[0023] Figure 7 Shown is a flow chart of the virtualized image processing method described in an embodiment of the present application.
[0024] Component number description
[0025] 100 Image acquisition system based on virtual motherboard and hardware motherboard
[0026] 110 Virtual Motherboard
[0027] 120 Image Acquisition Model
[0028] 121 Monitoring Module
[0029] 122 First register submodule
[0030] 123 I2C interface submodule
[0031] 130 Signal Transmission Model
[0032] 131 Second register module
[0033] 132 Image forwarding module
[0034] 140 Image Processing Model
[0035] 141 Image format conversion module
[0036] 142 Automatic white balance adjustment module
[0037] 143 Autofocus module
[0038] 144 Color Correction Matrix Module
[0039] 150 Peripheral Model
[0040] 151 CPU Model
[0041] 152 I2C Control Model
[0042] 153 DDR Model
[0043] 160 Folder for storing pictures
[0044] 170 Hardware Motherboard
[0045] 171 Connection module
[0046] 172 Configuration Information Control Module
[0047] 173 Image acquisition module
[0048] 174 Image sending module
[0049] 101 Electronic Equipment
[0050] 1001 Processor
[0051] 1002 Memory
[0052] S100~S400 steps DETAILED DESCRIPTION
[0053] The following describes the embodiments of the present application through specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. The present application can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.
[0054] It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present application, and thus the drawings only show components related to the present application rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed at will, and the component layout may also be more complicated.
[0055] The following embodiments of the present application provide a virtualized image processing method, system, storage medium and electronic device, which implement the function of camera image processing through a software model.
[0056] Figure 1 The overall principle structure diagram of the image acquisition system 100 based on the virtual motherboard and the hardware motherboard in this embodiment is shown; Figure 1 As shown, this embodiment provides an image acquisition system 100 based on a virtual motherboard and a hardware motherboard, and the image acquisition system 100 based on a virtual motherboard and a hardware motherboard includes: a virtual motherboard 110 and a hardware motherboard 170 connected to the virtual motherboard 110, and the virtual motherboard 110 and the hardware motherboard 170 are connected through, but not limited to, a network connection, a USB connection, or a PCIe master-slave mode. In this embodiment, the virtual motherboard 110 and the hardware motherboard 170 are connected through a network as an example for description.
[0057] Figure 2 The schematic diagram of the principle structure of the virtual mainboard 110 in the image acquisition system 100 based on the virtual mainboard 110 and the hardware mainboard 170 described in this embodiment is shown; Figure 2As shown, the virtual motherboard 110 is configured with an image acquisition model 120, a signal transmission model 130, an image processing model 140 and a peripheral model 150; wherein the peripheral model 150 at least includes a CPU (Central Processing Unit) model 151, an I2C (Inter-Integrated Circuit) control model 152, and a DDR (Double Data Rate) model.
[0058] The virtual mainboard 110 is constructed through a virtualization platform.
[0059] In this embodiment, the virtualization platform is but not limited to QEMU (Quick EMUlator, virtual operating system simulator), SNPS VDK (Synopsys VoIP Development Kit, software development kit), Intel Simics (Intel full system virtual machine), etc. In this embodiment, the virtual motherboard 110 is constructed by the QEMU virtualization platform.
[0060] QEMU is a general-purpose, open-source computer emulator and virtual motherboard 110, which supports full-system emulation and can support x86 (computer language instruction set executed by microprocessors), ARM (Advanced RISC Machine), MIPS (Million Instructions Per Second, average execution speed of single-word fixed-point instructions), PowerPC (Performance Optimization With Enhanced RISC–Performance Computing, a central processing unit with a reduced instruction set (RISC) architecture), RISC-V (an open-source instruction set architecture based on the principle of reduced instruction set), and other architectures. It also supports Windows (Microsoft Windows operating system), Linux (operating system kernel), FreeRTOS (embedded real-time operating system), VxWorks (real-time operating system), and other operating systems. The upper-level software runs on the virtual motherboard 110 without any modification.
[0061] Among them, the QEMU virtualization platform has built-in multiple device model modules for building a virtual motherboard, such as CPU, DDR, interrupt controller, serial port, I2C controller, ISP (Image Signal Processing), MIPICSI (MIPI CSI-2, Camera Serial Interface) controller, camera and other device model modules. When building a virtual motherboard, the required device models such as CPU, DDR, interrupt controller, serial port, I2C controller, ISP, MIPI CSI controller, camera, etc. are connected through corresponding interfaces, and the address space and interrupt number of each device model module are allocated, and finally a virtual motherboard 110 similar to a hardware embedded motherboard is formed.
[0062] Specifically, in this embodiment, the virtual motherboard 110 is an embedded SoC virtual motherboard 110. That is, this embodiment uses QEMU to build a complete embedded SoC virtual motherboard 110, including necessary components such as a CPU model, an I2C control mode, and a DDR model 153.
[0063] The operating systems supported by the virtual motherboard 110 include but are not limited to Windows, Linux, FreeRTOS, and VxWorks.
[0064] In this embodiment, the virtual mainboard 110 includes a driver loading module for loading drivers of the image acquisition model 120 , the signal transmission model 130 , the image processing model 140 and the peripheral model 150 .
[0065] Therefore, the image acquisition system 100 based on the virtual motherboard and the hardware motherboard in this embodiment can start a complete Linux or other operating system such as ARM64 on the virtual motherboard 110, and can also load device drivers such as cameras, I2C controllers, MIPI CSI controllers, ISP, etc. on the virtual motherboard 110.
[0066] In this embodiment, the image acquisition model 120, the signal transmission model 130, the image processing model 140 and other components are developed and constructed using but not limited to the C language, and the image acquisition model 120, the signal transmission model 130, the image processing model 140 and the virtual mainboard 110 are integrated.
[0067] In this embodiment, constructing the image acquisition model 120, the signal transmission model 130, the image processing model 140, etc. is to use software to simulate the functions of the hardware, realize its input and output and register access control, and make its external software interface consistent with the real hardware.
[0068] In this embodiment, the image acquisition model 120 is communicatively connected with the virtual mainboard 110, monitors the configuration information of the camera of the virtual mainboard 110, sends the configuration information of the camera and the request for capturing images of the virtual mainboard 110 to the hardware mainboard 170, and receives the image captured by the camera of the hardware mainboard 170 from the hardware mainboard 170.
[0069] Specifically, in this embodiment, if Figure 3 As shown, the image acquisition model 120 includes: a monitoring module 121, a first register submodule 122, and an I2C interface submodule 123.
[0070] Among them, the monitoring module 121 monitors the configuration information of the camera of the virtual mainboard 110, sends the configuration information of the camera and the request for capturing the image of the virtual mainboard 110 to the hardware mainboard 170, and receives the image captured by the camera of the hardware mainboard 170 from the hardware mainboard 170; the first register submodule 122 simulates the camera register configuration and register reading and writing; the I2C interface submodule 123 is used to simulate the I2C interface to communicate with the I2C control model 152, so as to control the register submodel through the I2C control model 152.
[0071] Therefore, the image acquisition model 120 of this embodiment can realize the following functions:
[0072] 1) Implement TCP client and connect to the hardware mainboard 170;
[0073] 2) Monitor the configuration of the camera by the virtual motherboard 110 and the camera driver, and send the corresponding register configuration to the hardware motherboard 170 via TCP;
[0074] 3) Monitor the configuration of the virtual mainboard 110 for capturing images with the camera, and send the request for capturing images to the hardware mainboard 170 via TCP;
[0075] 4) Obtain the camera captured image transmitted by the hardware mainboard 170 through TCP, send the data to the back-end signal transmission model 130, and the signal transmission model 130 transmits it to the image processing model 140 for image processing.
[0076] Therefore, the image acquisition model 120 of this embodiment can also realize the following functions of the hardware camera:
[0077] 1) Function configuration register
[0078] 2) I2C interface to support the I2C controller to read and write camera registers.
[0079] In this embodiment, the signal transmission model 130 is respectively connected to the virtual mainboard 110 and the image acquisition model 120 for communication, receives the image from the image acquisition model 120 , and forwards the received image to the image processing model 140 .
[0080] In this embodiment, the signal transmission model 130 is, but not limited to, a MIPI CSI controller (MIPI CSI-2, Camera Serial Interface) model. For example, it may also be a DVP (Digital Video Port) or a Serial Peripheral Interface (Serial Peripheral Interface) controller model.
[0081] Specifically, in this embodiment, if Figure 4 As shown, the signal transmission model 130 also includes: a second register module 131 and a picture forwarding module 132 .
[0082] Among them, the second register module 131 simulates serial interface register configuration and register reading and writing; the image forwarding module 132 receives the image from the image acquisition model 120 and forwards the received image to the image processing model 140.
[0083] In this embodiment, the MIPI CSI controller model can implement the following hardware camera serial interface functions:
[0084] 1) Function configuration register;
[0085] 2) Receive the image data sent by the image acquisition model 120 and forward it to the back-end image processing model 140.
[0086] In this embodiment, the image processing model 140 is respectively connected to the virtual motherboard 110 and the signal transmission model 130 for communication, processes the image received from the signal transmission model 130, and sends the processed image to the double rate synchronous dynamic random access memory model for storage.
[0087] Specifically, in this embodiment, if Figure 5 As shown, the image signal processing model 140 includes at least one of the following modules: a picture format conversion module 141 , an automatic white balance adjustment module 142 , an automatic focus module 143 , and a color correction matrix module 144 .
[0088] Therefore, the image processing model 140 of this embodiment can implement the following hardware ISP functions:
[0089] 1) Image format conversion;
[0090] 2) Automatic white balance adjustment;
[0091] 3) Autofocus;
[0092] 4) Color correction matrix.
[0093] like Figure 7 As shown, in this embodiment, the hardware mainboard 170 is configured with: a connection module 171 , a configuration information control module 172 , an image acquisition module 173 and an image sending module 174 .
[0094] In this embodiment, the connection module 171 is used to establish a communication connection with the virtual mainboard 110 .
[0095] In this embodiment, the configuration information control module 172 obtains the configuration information of the virtual mainboard 110 for the camera from the image acquisition model, and writes the configuration information into the camera connected to the hardware mainboard 170 .
[0096] In this embodiment, after receiving the request to capture the image, the image acquisition module 173 controls the camera connected to the hardware mainboard 170 to capture the image, and stores the captured image in the memory (DDR) of the hardware mainboard 170 .
[0097] In this embodiment, the image sending module 174 reads the image from the memory and sends the image to the image acquisition model.
[0098] The working process of the image acquisition system 100 based on the virtual motherboard and the hardware motherboard of this embodiment is as follows:
[0099] 1. Start the Linux operating system on the QEMU ARM64 virtual motherboard 110. The image acquisition model of QEMU implements the following functions:
[0100] 2) Implementing TCP (Transmission Control Protocol) client and connecting to the hardware mainboard 170,
[0101] 3) Monitor the configuration of the camera by the virtual motherboard 110 and the camera driver, and send the corresponding register configuration to the hardware motherboard 170 via TCP
[0102] 4) Monitor the configuration of the virtual motherboard 110 for capturing images with the camera, and send the request for capturing images to the hardware motherboard 170 via TCP
[0103] 5) Obtain the camera captured image transmitted by the hardware mainboard 170 through TCP, and send the data to the back-end MIPICSI->ISP component for image processing.
[0104] 2. Start the Linux operating system on the hardware mainboard 170 and run an application program, which implements the following functions:
[0105] 1) Implement TCP server and connect to QEMU;
[0106] 2) Obtain the camera configuration information sent by the virtual mainboard 110 through TCP, and write the configuration information into the camera by calling the I2C interface;
[0107] 3) Monitor the image capture request sent by the virtual motherboard 110, and put the picture taken by the camera into the DDR buffer based on the MIPI CSI controller, DMA (Direct Memory Access) controller and other components on the configuration hardware development board, and then send the image data to the virtual motherboard 110 through TCP.
[0108] Therefore, the image acquisition system based on the virtual mainboard 110 and the hardware mainboard 170 in this embodiment has the following effects:
[0109] 1) Start Linux on the virtual motherboard 110 and the real hardware, load the driver and connect the virtual motherboard 110 to the real hardware development platform through the network;
[0110] 2) The image captured by the camera on the real hardware can be transmitted to the camera of the virtual mainboard 110 in real time, and further transmitted to the back-end components of the virtual mainboard 110, avoiding the disadvantage of using the virtual mainboard 110 alone and being unable to capture real images in real time, and better utilizing the advantage of the real camera being able to capture images in real time;
[0111] 3) The application of the hardware mainboard 170 isolates and hides the connection and data transmission between the virtual mainboard 110 and the hardware mainboard 170. Therefore, the upper system and application of the virtual mainboard 110 cannot perceive their own camera configuration. Data processing is actually the result of the division of labor between two different platforms. From the perspective of the system software and applications of the virtual mainboard 110, they configure the camera on the virtual mainboard 110 and obtain the real-time image captured by the camera on the virtual mainboard 110. Therefore, it can support complete driver application development and camera tuning.
[0112] 4) Ensure that the developed applications can be ported to other real hardware platforms without modification
[0113] 5) Through time-sharing multiplexing of real hardware, multiple virtual motherboards 110 can be connected and used simultaneously
[0114] like Figure 7 As shown, this embodiment also provides a virtualized image processing method, which is applied to the image acquisition system 100 based on the virtual motherboard and the hardware motherboard as described above, and the method includes:
[0115] Step S100, the image acquisition model monitors the configuration information of the virtual mainboard on the camera, and sends the configuration information of the virtual mainboard on the camera and the request for capturing an image to the hardware mainboard;
[0116] Step S200, after receiving the request to capture an image, the hardware mainboard controls a camera connected to the hardware mainboard to capture an image, and transmits the captured image to the image acquisition model;
[0117] Step S300, the image acquisition model receives an image acquired by a camera of the hardware mainboard from the hardware mainboard, and sends the received image to the signal transmission model;
[0118] Step S400, the signal transmission model receives the image from the image acquisition model, and forwards the received image to the image processing model;
[0119] Step S500, the image processing model is respectively connected to the virtual mainboard and the signal transmission model for communication, processes the image received from the signal transmission model, and sends the processed image to the double rate synchronous dynamic random access memory model for storage.
[0120] In the present application, the image acquisition system 100 based on the virtual motherboard and the hardware motherboard can implement the virtualized image processing method described in this embodiment, so the specific implementation details of the virtualized image processing method refer to the detailed description of the image acquisition system 100 based on the virtual motherboard and the hardware motherboard, which will not be repeated here. However, the implementation system of the virtualized image processing method described in the present invention includes but is not limited to the image acquisition system 100 based on the virtual motherboard and the hardware motherboard listed in this embodiment. The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional units and modules as needed, that is, the internal structure of the system / device is divided into different functional units or modules to complete all or part of the functions described above.
[0121] In the several embodiments provided in the present application, it should be understood that the disclosed system, device or method can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of modules / units is only a logical function division. There may be other division methods in actual implementation, such as multiple modules or units can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or modules or units, which can be electrical, mechanical or other forms.
[0122] The modules / units described as separate components may or may not be physically separated, and the components displayed as modules / units may or may not be physical modules, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules / units may be selected according to actual needs to achieve the purpose of the embodiments of the present application. For example, the functional modules / units in the various embodiments of the present application may be integrated into one processing module, or each module / unit may exist physically separately, or two or more modules / units may be integrated into one module / unit.
[0123] Those of ordinary skill in the art should further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.
[0124] The image acquisition system based on the virtual motherboard and the hardware motherboard provided in the embodiment of the present application can simulate the functions of various hardware components such as the camera, camera serial interface (MIPI CSI), image signal processing (ISP) through the software model, realize the camera image processing function through the software model, and can start various different operating systems on the virtual motherboard, and support complete camera data stream application development.
[0125] The above embodiments are merely illustrative of the principles and effects of the present application and are not intended to limit the present application. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed in the present application shall still be covered by the claims of the present application.
Claims
1. An image acquisition system based on a virtual motherboard and a hardware motherboard, characterized in that: include: A virtual mainboard and a hardware mainboard connected to the virtual mainboard; wherein: The virtual motherboard is configured with an image acquisition model, a signal transmission model, an image processing model and a peripheral model, and the hardware functions are simulated by software to realize the input and output and register access control of the virtual motherboard, so that the external software interface of the virtual motherboard is consistent with the real hardware; The virtual motherboard is constructed through a virtualization platform; The image acquisition model monitors the configuration information of the virtual mainboard on the camera, sends the configuration information of the virtual mainboard on the camera and a request to capture an image to the hardware mainboard, and receives from the hardware mainboard an image captured by the camera of the hardware mainboard; After receiving the request to capture the image, the hardware mainboard controls the camera connected to the hardware mainboard to capture the image, and transmits the captured image to the image acquisition model; The signal transmission model is respectively connected to the virtual mainboard and the image acquisition model for communication, receives the image from the image acquisition model, and forwards the received image to the image processing model; The image processing model is respectively connected to the virtual mainboard and the signal transmission model for communication, and processes the image received from the signal transmission model.
2. The image acquisition system based on a virtual motherboard and a hardware motherboard according to claim 1, characterized in that: The peripheral model at least includes a CPU model, an I2C control model, and a double rate synchronous dynamic random access memory model.
3. The image acquisition system based on virtual motherboard and hardware motherboard according to claim 1, characterized in that: The hardware mainboard is configured with: A connection module, used to establish a communication connection with the virtual mainboard; A configuration information control module, which obtains the configuration information of the virtual mainboard for the camera from the image acquisition model, and writes the configuration information into the camera connected to the hardware mainboard; The image acquisition module controls the camera connected to the hardware mainboard to acquire the image after receiving the request to capture the image, and stores the acquired image in the memory of the hardware mainboard; An image sending module reads the image from the memory and sends the image to the image acquisition model.
4. The image acquisition system based on virtual motherboard and hardware motherboard according to claim 2, characterized in that: The image acquisition model includes: A monitoring module monitors the configuration information of the virtual mainboard on the camera, sends the configuration information of the virtual mainboard on the camera and a request for capturing an image to the hardware mainboard, and receives from the hardware mainboard an image captured by the camera of the hardware mainboard; The first register submodule simulates the camera register configuration and register reading and writing; The I2C interface sub-module simulates communication with the I2C control model to control the register sub-model through the I2C control model.
5. The image acquisition system based on virtual motherboard and hardware motherboard according to claim 2, characterized in that: The signal transmission model includes: The second register module simulates serial interface register configuration and register reading and writing; The image forwarding module receives the image from the image acquisition model and forwards the received image to the image processing model.
6. The image acquisition system based on virtual motherboard and hardware motherboard according to claim 1, characterized in that: The image processing model includes at least one of the following modules: an image format conversion module, an automatic white balance adjustment module, an automatic focus module, and a color correction matrix module.
7. The image acquisition system based on virtual motherboard and hardware motherboard according to claim 1, characterized in that: The virtual motherboard is an embedded SoC virtual motherboard; the operating systems supported by the virtual motherboard include Windows, Linux, FreeRTOS, and VxWorks.
8. The image acquisition system based on virtual motherboard and hardware motherboard according to claim 1, characterized in that: The virtual mainboard includes a driver loading module for loading the drivers of the image acquisition model, the signal transmission model, the image processing model and the peripheral model.
9. The image acquisition system based on virtual motherboard and hardware motherboard according to claim 1, characterized in that: The virtual mainboard and the hardware mainboard are connected via a network connection, a USB connection or a PCIe master-slave mode.
10. A virtualized image processing method, characterized in that: The method applied to the image acquisition system based on the virtual mainboard and the hardware mainboard as claimed in any one of claims 1 to 9 comprises: The image acquisition model monitors the configuration information of the virtual mainboard on the camera, and sends the configuration information of the virtual mainboard on the camera and the request for capturing the image to the hardware mainboard; After receiving the request to capture the image, the hardware mainboard controls the camera connected to the hardware mainboard to capture the image, and transmits the captured image to the image acquisition model; The image acquisition model receives an image acquired by a camera of the hardware mainboard from the hardware mainboard, and sends the received image to the signal transmission model; The signal transmission model receives the image from the image acquisition model and forwards the received image to the image processing model; The image processing model is respectively connected to the virtual mainboard and the signal transmission model for communication, and processes the image received from the signal transmission model.
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