Liquid ejection device and driving circuit substrate

Abstract

The present invention provides a liquid ejection device and a driving circuit substrate. The driving circuit substrate for driving the piezoelectric element of the liquid ejection head comprises: a first driving circuit, which outputs a first driving signal to the first electrode for driving the piezoelectric element to eject liquid; a second driving circuit, which outputs a second driving signal to the first electrode for driving the piezoelectric element to eject liquid; a third driving circuit, which outputs a third driving signal to the first electrode for driving the piezoelectric element not to eject liquid; a reference voltage output circuit, which supplies a reference voltage signal to the second electrode; and a substrate, comprising a first wiring layer having a first wiring for transmitting the first driving signal, a second wiring layer having a second wiring for transmitting the second driving signal, and a third wiring layer located between the first wiring layer and the second wiring layer and having a fourth wiring for transmitting the reference voltage signal, wherein the third wiring for transmitting the third driving signal is arranged in any one of the first wiring layer, the second wiring layer, and the third wiring layer.

Description

Technical Field

[0001] The invention relates to a liquid ejection device and a driving circuit substrate. Background Art

[0002] Among the liquid ejection devices that eject liquid to form a document or image on a medium, there is a known liquid ejection device that uses a piezoelectric element. The piezoelectric element is provided in correspondence with each of a plurality of ejection parts in the print head. In addition, by driving the piezoelectric element according to a driving signal, an amount of liquid corresponding to the driving of the piezoelectric element is ejected from the corresponding ejection part to form a dot on the medium.

[0003] Patent document 1 discloses a liquid ejection device, which drives a piezoelectric element by providing a driving signal to one end of the piezoelectric element and a reference voltage signal to the other end of the piezoelectric element, thereby ejecting liquid from a ejection portion. The liquid ejection device includes a driving circuit substrate, and the driving circuit substrate is configured so that the wiring for transmitting the driving signal overlaps with the wiring for transmitting the reference voltage signal along the normal direction.

[0004] Patent Document 1: Japanese Patent Application Publication No. 2018-099865

[0005] In a driving circuit substrate in which a wiring for transmitting a driving signal and a wiring for transmitting a reference voltage signal overlap along a normal direction as described in Patent Document 1, an inductance component generated by the transmission of the driving signal and an inductance component generated by the transmission of the reference voltage signal VBS cancel each other out. As a result, the possibility of waveform distortion due to the inductance component in the signal waveform of the driving signal is reduced, and as a result, the waveform accuracy of the driving signal can be improved.

[0006] On the other hand, in recent years, in liquid ejection devices, the demand for faster image forming speed for forming images on a medium has increased, and therefore, the dot forming cycle for forming dots of a desired size on a medium by ejecting liquid is required to be faster. In response to such a demand, technical development is being carried out to achieve faster dot forming cycle by shortening the waveform cycle of a drive signal for forming dots on a medium and adding a new drive signal.

[0007] However, for a liquid ejection device that improves the waveform accuracy of a driving signal by having a driving circuit substrate in which wiring for transmitting a driving signal and wiring for transmitting a reference voltage signal overlap along a normal direction as described in Patent Document 1, when a new driving signal is added, in addition to wiring for transmitting the additional driving signal, wiring for transmitting a reference voltage signal corresponding to the driving signal needs to be provided in the driving circuit substrate. As a result, there arises a problem in which the number of stacked layers of the driving circuit substrate may increase. Summary of the invention

[0008] One aspect of the liquid ejection device according to the present invention is characterized by comprising:

[0009] a liquid ejection head including a piezoelectric element having a first electrode and a second electrode, and ejecting liquid by driving the piezoelectric element; and

[0010] A driving circuit substrate drives the piezoelectric element.

[0011] The driving circuit substrate comprises:

[0012] a first driving circuit, outputting to the first electrode a first driving signal for driving the piezoelectric element to cause the liquid ejection head to eject liquid;

[0013] a second driving circuit, outputting to the first electrode a second driving signal for driving the piezoelectric element to cause the liquid ejection head to eject liquid;

[0014] a third driving circuit, outputting a third driving signal to the first electrode to drive the piezoelectric element so that the liquid ejection head does not eject liquid;

[0015] a reference voltage output circuit for supplying a reference voltage signal to the second electrode; and

[0016] A substrate is provided with the first driving circuit, the second driving circuit, the third driving circuit and a reference voltage output circuit,

[0017] The substrate comprises:

[0018] a first wiring, transmitting the first driving signal;

[0019] a second wiring, transmitting the second driving signal;

[0020] A third wiring, transmitting the third driving signal;

[0021] A fourth wiring, transmitting the reference voltage signal;

[0022] A first wiring layer, provided with the first wiring;

[0023] A second wiring layer provided with the second wiring; and

[0024] a third wiring layer, located between the first wiring layer and the second wiring layer along a direction and provided with the fourth wiring,

[0025] The third wiring is provided in any one of the first wiring layer, the second wiring layer, and the third wiring layer.

[0026] One aspect of the driving circuit substrate of the present invention is characterized in that a liquid ejection head is driven, the liquid ejection head includes a piezoelectric element having a first electrode and a second electrode, and the liquid is ejected by driving the piezoelectric element, and the driving circuit substrate comprises:

[0027] a first driving circuit, outputting to the first electrode a first driving signal for driving the piezoelectric element to cause the liquid ejection head to eject liquid;

[0028] a second driving circuit, outputting to the first electrode a second driving signal for driving the piezoelectric element to cause the liquid ejection head to eject liquid;

[0029] a third driving circuit, outputting a third driving signal to the first electrode to drive the piezoelectric element so that the liquid ejection head does not eject liquid;

[0030] a reference voltage output circuit for supplying a reference voltage signal to the second electrode; and

[0031] A substrate is provided with the first driving circuit, the second driving circuit, the third driving circuit and a reference voltage output circuit,

[0032] The substrate comprises:

[0033] a first wiring, transmitting the first driving signal;

[0034] a second wiring, transmitting the second driving signal;

[0035] A third wiring, transmitting the third driving signal;

[0036] A fourth wiring, transmitting the reference voltage signal;

[0037] A first wiring layer, provided with the first wiring;

[0038] A second wiring layer provided with the second wiring; and

[0039] a third wiring layer, located between the first wiring layer and the second wiring layer along a direction and provided with the fourth wiring,

[0040] The third wiring is provided in any one of the first wiring layer, the second wiring layer, and the third wiring layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 It is a diagram showing a schematic structure of a liquid ejecting device.

[0042] Figure 2 It is a diagram showing a schematic configuration of a discharge unit.

[0043] Figure 3 : is a diagram showing an example of the signal waveforms of the drive signals COMA, COMB, and COMC.

[0044] Figure 4 2 is a diagram showing the functional configuration of a drive signal selection circuit.

[0045] Figure 5 This is a diagram showing an example of the decoded content in the decoder.

[0046] Figure 6 This is a diagram showing an example of the configuration of a selection circuit corresponding to one ejection unit.

[0047] Figure 7 It is a diagram for explaining the operation of the drive signal selection circuit.

[0048] Figure 8 It is a diagram showing the configuration of a driving circuit.

[0049] Fig. 9 It is a diagram showing the structure of the liquid ejection module.

[0050] Fig.10 This is a diagram showing an example of the structure of the discharge module.

[0051] Fig.11 It is along Fig.10 The cross-sectional view of the ejection module is shown along line Aa.

[0052] Fig.12 It is a diagram showing an example of the structure of the head driving module.

[0053] Fig.13 This is a diagram showing an example of the electrical connection relationship of the drive circuit substrate.

[0054] Fig.14 This is a diagram showing an example of a cross-sectional structure of a wiring substrate included in a driving circuit substrate.

[0055] Fig.15 This is a diagram showing an example of the structure of the surface 831 of the wiring board.

[0056] Fig.16 This is a diagram showing an example of the structure of the surface 832 of the wiring board.

[0057] Fig.17 This is a diagram showing an example of the structure of the layer 841 of the wiring board.

[0058] Fig.18 This is a diagram showing an example of the structure of the layer 842 of the wiring board.

[0059] Fig.19 This is a diagram showing an example of the structure of the layer 843 of the wiring board.

[0060] Fig. 20 This is a diagram showing an example of the structure of the layer 844 of the wiring board.

[0061] Fig.21 This is a diagram showing an example of the structure of the layer 845 of the wiring board.

[0062] Fig. 22 It is along Figure 15 to Figure 21 The illustrated diagram is a cross-sectional view of the wiring substrate when the wiring substrate is cut along line Bb.

[0063] Fig.23 This is a diagram showing an example of the electrical connection relationship of the drive circuit substrate in the second embodiment.

[0064] Fig.24 is along the equivalent of Figure 15 to Figure 21 The wiring substrate of the third embodiment is shown in a cross-sectional view when the wiring substrate is cut along a line segment of line Bb.

[0065] Fig.25 is along the equivalent of Figure 15 to Figure 21 The wiring substrate of the fourth embodiment is shown in a cross-sectional view when the wiring substrate is cut along a line segment of line Bb.

[0066] Fig.26 is along the equivalent of Figure 15 to Figure 21 The wiring substrate of the fifth embodiment is shown in a cross-sectional view when the wiring substrate is cut along a line segment of line Bb.

[0067] Description of Reference Numerals

[0068] 1 liquid ejection device; 2 control unit; 3 liquid container; 4 conveying unit; 5 ejection unit; 10 head drive module; 20 liquid ejection module; 23 ejection module; 30 connection component; 31 frame; 33 assembly substrate; 34 flow path structure; 35 head substrate; 37 distribution flow path; 39 fixing plate; 41 conveying motor; 42 conveying roller; 50 drive signal output circuit; 52 drive circuit; 53 reference voltage output circuit; 60 piezoelectric element; 100 control circuit; 101 integrated circuit; 120 conversion circuit; 200 drive signal selection circuit; 201 integrated circuit; 210 selection control circuit; 212 shift register; 214 latch circuit; 216 decoder; 220 recovery circuit; 230 selection circuit; 23 2a, 232b, 232c inverters; 234a, 234b, 234c transmission gates; 311 openings; 313 integrated substrate insertion portions; 315 holding components; 330 connecting portions; 341 introduction portions; 343 through holes; 351 openings; 352, 353, 355 cutouts; 371 openings; 373 introduction portions; 388 wiring components; 391 openings; 500 integrated circuits; 510 modulation circuits; 512, 513 adders; 514 comparators; 515 inverters; 516 integral attenuators; 517 attenuators; 520 gate drive circuits; 521, 522 gate drivers; 550 amplifier circuits; 560 demodulation circuits; 570, 572 feedback circuits; 590 power supply circuits ; 600 ejection part; 601 piezoelectric body; 602, 603 electrode; 610 vibration plate; 611 lead electrode; 620 plastic substrate; 621 sealing film; 622 fixed substrate; 623 nozzle plate; 623a liquid ejection surface; 630 connecting plate; 641 protection substrate; 642 flow path forming substrate; through hole; 644 protection space; 660 housing; 661 introduction channel; 662 connection port; 665 recess; 710 heat sink; 711 bottom; 712, 713 side; 714 opening; 715-717 protrusion; 718 fin part; 720 heat conduction component group; 730, 740, 750, 760 heat conduction component; 770 cooling fan; 780 screw; 800 drive circuit substrate; 8 10 wiring substrate; 811-814 edges; 820 through holes; 831, 832 surfaces; 840-845, 852-854, 863 layers; C1-C9 capacitors; CB pressure chambers; CN1, CN2 connections; Cha1-Cha6, Chb1-Chb6, Csa1-Csa6, Csb1-Csb6 contacts; D1 diode; FC wiring component; L1 inductor; Ln1, Ln2 nozzle arrays; M1, M2 transistors; MN manifold; N nozzle; P dielectric; R1-R6 resistors; RA, RB supply communication channels; RK1, RK2 pressure chamber communication channels; RR nozzle communication channels; RX connection communication channels; Rs1-Rs6 resistors; Su1, Su2 flow path plates;WA1~WA6, WB1~WB6, WC1~WC6, WG1, WG2, WH1~WH6, WHc, WS1~WS6, WSc wiring. ; DETAILED DESCRIPTION

[0069] The preferred embodiments of the present invention are described below using the accompanying drawings. The accompanying drawings are used for the convenience of description. It should be noted that the embodiments described below do not improperly limit the contents of the present invention described in the claims. In addition, not all of the structures described below are necessary components of the present invention.

[0070] 1. First Implementation

[0071] 1.1 Composition of liquid ejection device

[0072] Figure 1 1 is a diagram showing a schematic structure of the liquid ejection device 1. Figure 1 As shown, the liquid ejection device 1 is a so-called line-type inkjet printer that forms a desired image on the medium P by ejecting ink at a desired timing onto the medium P transported by the transport unit 4. Here, in the following description, the direction of transporting the medium P may be referred to as the transport direction, and the width direction of the transported medium P may be referred to as the main scanning direction.

[0073] like Figure 1 As shown, the liquid ejection device 1 includes a control unit 2 , a liquid container 3 , a transport unit 4 , and a plurality of ejection units 5 .

[0074] The control unit 2 includes a processing circuit such as a CPU (Central Processing Unit), an FPGA (Field Programmable Gate Array), and a storage circuit such as a semiconductor memory. The control unit 2 outputs a signal for controlling each element of the liquid ejection device 1 based on image data input from an external device such as a host computer (not shown) disposed outside the liquid ejection device 1.

[0075] The liquid container 3 stores ink as an example of liquid supplied to the ejection unit 5. Specifically, the liquid container 3 stores inks of multiple colors ejected onto the medium P, such as black, cyan, magenta, yellow, red, and gray inks.

[0076] The conveying unit 4 includes a conveying motor 41 and a conveying roller 42. The conveying control signal Ctrl-T output by the control unit 2 is input to the conveying unit 4. Then, based on the input conveying control signal Ctrl-T, the conveying motor 41 is operated, and the conveying roller 42 is driven to rotate with the operation of the conveying motor 41. Thus, the medium P is conveyed along the conveying direction.

[0077] The plurality of ejection units 5 each include a head driving module 10 and a liquid ejection module 20. The ejection unit 5 is input with an image information signal IP output from the control unit 2, and is supplied with ink stored in the liquid container 3. Then, based on the image information signal IP input from the control unit 2, the head driving module 10 controls the operation of the liquid ejection module 20, and the liquid ejection module 20 ejects the ink supplied from the liquid container 3 to the medium P according to the control of the head driving module 10.

[0078] Here, in the liquid ejection device 1 of the first embodiment, the liquid ejection modules 20 respectively provided in the plurality of ejection units 5 are positioned in a row along the main scanning direction and are larger than the width of the medium P. Thus, the liquid ejection module 20 can eject ink to the entire area in the width direction of the transported medium P. That is, the liquid ejection device 1 of the first embodiment is a so-called line-type inkjet printer that forms a desired image on the medium P by ejecting ink as the medium P is transported through the plurality of liquid ejection modules 20 positioned in a row and larger than the width of the medium P. It should be noted that the liquid ejection device 1 is not limited to a line-type inkjet printer, but may also be a so-called serial-type inkjet printer that forms a desired image on the medium P by reciprocating along the main scanning direction, i.e., the width direction of the medium P, and ejecting ink to the medium P transported synchronously with the reciprocating movement.

[0079] Next, a schematic configuration of the discharge unit 5 will be described. Here, the plurality of discharge units 5 included in the liquid discharge device 1 all have the same configuration, and in the following description, only one discharge unit 5 will be described. Figure 2 is a diagram showing a schematic structure of the ejection unit 5. Figure 2 As shown, the ejection unit 5 includes a head driving module 10 and a liquid ejection module 20. In the ejection unit 5, the head driving module 10 and the liquid ejection module 20 are electrically connected via a connection member 30.

[0080] The connection component 30 is a flexible component for electrically connecting the head driving module 10 and the liquid ejection module 20, and for example, a flexible printed circuit (FPC) or a flexible flat cable (FFC) can be used. It should be noted that, as the connection component 30, a BtoB (Board to Board: board to board) connector may be used instead of FPC or FFC, and a BtoB connector and FPC or FFC may be used in combination.

[0081] The head driving module 10 includes a control circuit 100 , driving signal output circuits 50 - 1 to 50 - m , a reference voltage output circuit 53 , and a conversion circuit 120 .

[0082] The control circuit 100 includes a CPU, an FPGA, etc. The image information signal IP outputted from the control unit 2 is inputted to the control circuit 100. The control circuit 100 outputs a signal for controlling each element of the discharge unit 5 based on the inputted image information signal IP.

[0083] The control circuit 100 generates a basic data signal dDATA for controlling the operation of the liquid ejection module 20 based on the image information signal IP, and outputs it to the conversion circuit 120. The conversion circuit 120 converts the basic data signal dDATA into a differential signal such as LVDS (Low Voltage Differential Signaling), and outputs it to the liquid ejection module 20 as a data signal DATA. It should be noted that the conversion circuit 120 can also convert the basic data signal dDATA into a differential signal of a high-speed transmission method other than LVDS, such as LVPECL (Low Voltage Positive Emitter Coupled Logic) and CML (Current Mode Logic), and output it to the liquid ejection module 20 as a data signal DATA. In addition, the conversion circuit 120 can also convert part or all of the input basic data signal dDATA into a specified single-ended signal, and output it to the liquid ejection module 20 as a data signal DATA.

[0084] In addition, the control circuit 100 outputs basic drive signals dA1, dB1, and dC1 to the drive signal output circuit 50-1. The drive signal output circuit 50-1 has drive circuits 52a, 52b, and 52c. The basic drive signal dA1 is input to the drive circuit 52a. After the drive circuit 52a performs digital / analog conversion on the input basic drive signal dA1, it generates the drive signal COMA1 by performing class D amplification, and outputs it to the liquid ejection module 20. The basic drive signal dB1 is input to the drive circuit 52b. After the drive circuit 52b performs digital / analog conversion on the input basic drive signal dB1, it generates the drive signal COMB1 by performing class D amplification, and outputs it to the liquid ejection module 20. The basic drive signal dC1 is input to the drive circuit 52c. After the drive circuit 52c performs digital / analog conversion on the input basic drive signal dC1, it generates the drive signal COMC1 by performing class D amplification, and outputs it to the liquid ejection module 20.

[0085] Here, the drive circuits 52a, 52b, and 52c can each generate the drive signals COMA1, COMB1, and COMC1 as long as they can amplify the waveforms specified by the input basic drive signals dA1, dB1, and dC1. Therefore, the drive circuits 52a, 52b, and 52c can each replace the class D amplifier circuit or include a class A amplifier circuit, a class B amplifier circuit, or a class AB amplifier circuit in addition to the class D amplifier circuit. In addition, in the following description, the basic drive signals dA1, dB1, and dC1 are described as digital signals, but the basic drive signals dA1, dB1, and dC1 can be analog signals as long as they can specify the waveforms of the corresponding drive signals COMA1, COMB1, and COMC1.

[0086] The drive signal output circuits 50-2 to 50-m are configured in the same manner as the drive signal output circuit 50-1, except that the input signals and output signals are different. That is, the drive signal output circuit 50-j (j is any one of 1 to m) includes circuits corresponding to the drive circuits 52a, 52b, and 52c, respectively. Thus, the drive signal output circuit 50-j generates drive signals COMAj, COMBj, and COMCj based on the basic drive signals dAj, dBj, and dCj input from the control circuit 100, and outputs them to the liquid ejection module 20.

[0087] Here, the drive signal output circuit 50-1 and the drive signal output circuits 50-2 to 50-m have the same structure, and when there is no need to distinguish them, they are sometimes simply referred to as the drive signal output circuit 50. In this case, the drive signal output circuit 50 includes drive circuits 52a, 52b, and 52c, and the drive circuit 52a outputs the drive signal COMA, the drive circuit 52b outputs the drive signal COMB, and the drive circuit 52c outputs the drive signal COMC for explanation.

[0088] In addition, the drive circuits 52a, 52b, and 52c included in the drive signal output circuit 50 are all of the same configuration, and when no distinction is required, they are sometimes referred to as the drive circuit 52. In this case, the drive circuit 52 generates a drive signal COM based on the basic drive signal do and outputs the generated drive signal COM to the liquid ejection module 20 for explanation.

[0089] On the other hand, when explaining the drive circuits 52a, 52b, 52c included in the drive signal output circuit 50-1 and the drive circuits 52a, 52b, 52c included in the drive signal output circuit 50-j, the drive circuits 52a, 52b, 52c included in the drive signal output circuit 50-1 are sometimes referred to as drive circuits 52a1, 52b1, 52c1, respectively, and the drive circuits 52a, 52b, 52c included in the drive signal output circuit 50-j are sometimes referred to as drive circuits 52aj, 52bj, 52cj, respectively. It should be noted that a specific example of the configuration of the drive circuit 52 will be described later.

[0090] The reference voltage output circuit 53 generates a reference voltage signal VBS representing a reference potential for driving a piezoelectric element 60 described later in the liquid ejection module 20, and outputs the reference voltage signal VBS to the liquid ejection module 20. The reference voltage signal VBS is, for example, a signal of a constant potential such as 5.5 V or 6 V. Here, the signal of a constant potential includes a signal that is considered to be a constant potential in consideration of various deviations or errors such as a change in potential due to the operation of a peripheral circuit, a change in potential due to a deviation of a circuit element, and a change in potential due to a temperature characteristic of a circuit element.

[0091] The liquid ejection module 20 includes a recovery circuit 220 and ejection modules 23 - 1 to 23 - m .

[0092] The data signal DATA is input to the restoration circuit 220. The restoration circuit 220 restores the input differential data signal DATA to a single-ended signal, separates the restored single-ended signal into signals corresponding to the ejection modules 23-1 to 23-m, and outputs them to the corresponding ejection modules 23-1 to 23-m.

[0093] Specifically, the restoration circuit 220 restores and separates the data signal DATA to generate the clock signal SCK1, the printing data signal SI1 and the latch signal LAT1, and outputs them to the ejection module 23-1. In addition, the restoration circuit 220 restores and separates the data signal DATA to generate the clock signal SCKj, the printing data signal SIj and the latch signal LATj, and outputs them to the ejection module 23-j. It should be noted that any of the clock signals SCK1 to SCKm, the printing data signals SI1 to SIm and the latch signals LAT1 to LATm corresponding to the ejection modules 23-1 to 23-m, which are output by the restoration circuit 220, can also be input to the ejection modules 23-1 to 23-m.

[0094] Here, in view of the fact that the restoration circuit 220 generates clock signals SCK1 to SCKm, printing data signals SI1 to SIm, and latch signals LAT1 to LATm by restoring and separating the data signal DATA, the data signal DATA output by the conversion circuit 120 is a differential signal including signals corresponding to the clock signals SCK1 to SCKm, the printing data signals SI1 to SIm, and the latch signals LAT1 to LATm. Therefore, the basic data signal dDATA output by the control circuit 100 includes single-ended signals corresponding to the clock signals SCK1 to SCKm, the printing data signals SI1 to SIm, and the latch signals LAT1 to LATm. That is, the control circuit 100 outputs the basic data signal dDATA as a signal for controlling the operation of the ejection modules 23-1 to 23-m of the liquid ejection module 20.

[0095] The ejection module 23-1 includes a drive signal selection circuit 200 and a plurality of ejection units 600. In addition, each of the plurality of ejection units 600 includes a piezoelectric element 60. That is, the ejection module 23-1 includes the same number of piezoelectric elements 60 as the number of ejection units 600.

[0096] The ejection module 23-1 is input with driving signals COMA1, COMB1, COMC1, a reference voltage signal VBS, a clock signal SCK1, a printing data signal SI1, and a latch signal LAT1. The driving signals COMA1, COMB1, COMC1, the clock signal SCK1, the printing data signal SI1, and the latch signal LAT1 are input with the driving signal selection circuit 200 of the ejection module 23-1. The driving signal selection circuit 200 selects or does not select the driving signals COMA1, COMB1, and COMC1, respectively, based on the input clock signal SCK1, the printing data signal SI1, and the latch signal LAT1, to generate the driving signal VOUT. Then, the driving signal selection circuit 200 supplies the generated driving signal VOUT to one end of the piezoelectric element 60 of the corresponding ejection unit 600. In addition, the reference voltage signal VBS is supplied to the other end of the piezoelectric element 60. The piezoelectric element 60 is driven according to the potential difference between the driving signal VOUT supplied to one end and the reference voltage signal VBS supplied to the other end. As a result, the corresponding ejection unit 600 ejects ink in an amount corresponding to the driving amount of the piezoelectric element 60 .

[0097] Similarly, the ejection module 23-j includes a drive signal selection circuit 200 and a plurality of ejection units 600. In addition, each of the plurality of ejection units 600 includes a piezoelectric element 60. That is, the ejection module 23-j includes the same number of piezoelectric elements 60 as the number of ejection units 600.

[0098] The ejection module 23-j is input with driving signals COMAj, COMBj, COMCj, a reference voltage signal VBSj, a clock signal SCKj, a printing data signal SIj, and a latch signal LATj. The driving signals COMAj, COMBj, COMCj, the clock signal SCKj, the printing data signal SIj, and the latch signal LATj are input with the driving signal selection circuit 200 of the ejection module 23-j. The driving signal selection circuit 200 selects or does not select the driving signals COMAj, COMBj, and COMCj based on the input clock signal SCKj, the printing data signal SIj, and the latch signal LATj to generate the driving signal VOUT. Then, the driving signal selection circuit 200 supplies the generated driving signal VOUT to one end of the piezoelectric element 60 of the corresponding ejection unit 600. In addition, the reference voltage signal VBS is supplied to the other end of the piezoelectric element 60. The piezoelectric element 60 is driven according to the potential difference between the driving signal VOUT supplied to one end and the reference voltage signal VBS supplied to the other end. As a result, the corresponding ejection unit 600 ejects ink in an amount corresponding to the driving amount of the piezoelectric element 60 .

[0099] As described above, in the liquid ejection device 1, the control unit 2 controls the conveyance of the medium P by the conveyance unit 4 based on the image data supplied from the host computer (not shown), and controls the operation of the head driving module 10 of each of the plurality of ejection units 5, thereby controlling the ejection of ink from the liquid ejection module 20. Thus, the liquid ejection device 1 can land a desired amount of ink on a desired position of the medium P. Thus, a desired image is formed on the medium P.

[0100] Here, the ejection modules 23-1 to 23-m of the liquid ejection module 20 have the same structure except that the input signals are different. Therefore, in the following description, when there is no need to distinguish the ejection modules 23-1 to 23-m, they are sometimes simply referred to as the ejection module 23. In this case, the drive signals COMA1 to COMAm input to the ejection module 23 are sometimes referred to as the drive signals COMA, the drive signals COMB1 to COMBm are referred to as the drive signals COMB, the drive signals COMC1 to COMCm are referred to as the drive signals COMC, the clock signals SCK1 to SCKm are referred to as the clock signals SCK, the printing data signals SI1 to SIm are referred to as the printing data signals SI, and the latch signals LAT1 to LATm are referred to as the latch signals LAT.

[0101] 1.2 Functional composition of the drive signal selection circuit

[0102] Next, the configuration and operation of the drive signal selection circuit 200 of the ejection module 23 are described. When describing the configuration and operation of the drive signal selection circuit 200 of the ejection module 23, first, an example of a signal waveform included in the drive signals COMA, COMB, and COMC input to the drive signal selection circuit 200 is described.

[0103] Figure 3 is a diagram showing an example of the signal waveforms of the drive signals COMA, COMB, and COMC. Figure 3 As shown, the driving signal COMA includes a trapezoidal waveform Adp arranged in a period T from the rise of the latch signal LAT to the next rise of the latch signal LAT. The trapezoidal waveform Adp is a signal waveform supplied to one end of the piezoelectric element 60 to drive the piezoelectric element 60 to eject a predetermined amount of ink from the corresponding ejection portion 600.

[0104] The driving signal COMB includes a trapezoidal waveform Bdp arranged in a period T. The trapezoidal waveform Bdp is a signal waveform having a smaller voltage amplitude than the trapezoidal waveform Adp, and when the trapezoidal waveform Bdp is supplied to one end of the piezoelectric element 60, an amount of ink less than a prescribed amount is ejected from the ejection portion 600 corresponding to the piezoelectric element 60. That is, the trapezoidal waveform Bdp is a signal waveform supplied to one end of the piezoelectric element 60 to drive the piezoelectric element 60 so as to eject an amount of ink less than a prescribed amount from the corresponding ejection portion 600.

[0105] Here, when the driving signal COMA is supplied to the piezoelectric element 60, the amount of ink ejected from the corresponding ejection portion 600 is greater than the amount of ink ejected from the corresponding ejection portion 600 when the driving signal COMB is supplied to the piezoelectric element 60. Therefore, the driving amount of the piezoelectric element 60 when the driving signal COMA is supplied to the piezoelectric element 60 is greater than the driving amount of the piezoelectric element 60 when the driving signal COMB is supplied to the piezoelectric element 60. In other words, the amount of ink ejected from the ejection portion 600 corresponding to the piezoelectric element 60 when the drive signal COMA is supplied to the piezoelectric element 60 is different from the amount of ink ejected from the ejection portion 600 corresponding to the piezoelectric element 60 when the drive signal COMB is supplied to the piezoelectric element 60. The amount of ink ejected from the ejection portion 600 corresponding to the piezoelectric element 60 when the drive signal COMA is supplied to the piezoelectric element 60 is greater than the amount of ink ejected from the ejection portion 600 corresponding to the piezoelectric element 60 when the drive signal COMB is supplied to the piezoelectric element 60. Therefore, the amount of current generated by the transmission of the drive signal COMA is greater than the amount of current generated by the transmission of the drive signal COMB.

[0106] In addition, the driving signal COMC includes a trapezoidal waveform Cdp arranged in a period T. The trapezoidal waveform Cdp is a signal waveform having a smaller voltage amplitude than the trapezoidal waveforms Adp and Bdp. When the trapezoidal waveform Cdp is supplied to one end of the piezoelectric element 60, the ink near the nozzle opening portion is vibrated to such an extent that the ink is not ejected from the ejection portion 600 corresponding to the piezoelectric element 60. That is, the trapezoidal waveform Cdp is a signal waveform that is supplied to one end of the piezoelectric element 60 to drive the piezoelectric element 60 to such an extent that the ink is not ejected from the corresponding ejection portion 600. The trapezoidal waveform Cdp causes the ink near the nozzle opening portion of the ejection portion 600 of the piezoelectric element 60 to vibrate. As a result, the possibility of an increase in the viscosity of the ink near the corresponding nozzle opening portion is reduced.

[0107] As described above, the drive signals COMA and COMB drive the corresponding piezoelectric element 60 in a manner that ink is ejected from the ejection portion 600, and the drive signal COMC drives the corresponding piezoelectric element 60 in a manner that ink is not ejected from the ejection portion 600. That is, the drive amount of the piezoelectric element 60 when the drive signals COMA and COMB are supplied to the piezoelectric element 60 is greater than the drive amount of the piezoelectric element 60 when the drive signal COMC is supplied to the piezoelectric element 60. Therefore, the voltage amplitude of the drive signals COMA and COMB is greater than the voltage amplitude of the drive signal COMC, and the current amount generated with the transmission of the drive signals COMA and COMB is greater than the current amount generated with the transmission of the drive signal COMC.

[0108] In addition, at the start timing and end timing of the trapezoidal waveforms Adp, Bdp, and Cdp, the voltage values ​​of the trapezoidal waveforms Adp, Bdp, and Cdp are all the same voltage Vc. That is, the trapezoidal waveforms Adp, Bdp, and Cdp are signal waveforms that start and end at the voltage Vc, respectively.

[0109] Here, in the following description, the amount of ink ejected from the ejection portion 600 corresponding to the piezoelectric element 60 when the trapezoidal waveform Adp is supplied to one end of the piezoelectric element 60 may be referred to as a large amount, and the amount of ink ejected from the ejection portion 600 corresponding to the piezoelectric element 60 when the trapezoidal waveform Bdp is supplied to one end of the piezoelectric element 60 may be referred to as a small amount different from the large amount. In addition, when the trapezoidal waveform Cdp is supplied to one end of the piezoelectric element 60, the ink vibrating near the nozzle opening portion to such an extent that the ink is not ejected from the ejection portion 600 corresponding to the piezoelectric element 60 may be referred to as a micro vibration BSD.

[0110] That is, in the liquid ejection device 1 of the first embodiment, the driving circuit 52a outputs the driving signal COMA for driving the piezoelectric element 60 so that the ejection unit 600 of the ejection module 23 ejects a large amount of ink as a prescribed amount, the driving circuit 52b outputs the driving signal COMB for driving the piezoelectric element 60 so that the ejection unit 600 of the ejection module 23 ejects a small amount of ink less than the prescribed amount, and the driving circuit 52c outputs the driving signal COMC for driving the piezoelectric element 60 so that the ejection unit 600 of the ejection module 23 does not eject ink. In other words, when the driving signal COMA is supplied to the piezoelectric element 60, a large amount of liquid is ejected from the corresponding ejection unit 600, and when the driving signal COMB is supplied to the piezoelectric element 60, a small amount of ink different from the large amount is ejected from the corresponding ejection unit 600.

[0111] It should be noted that the signal waveforms of the drive signals COMA, COMB, and COMC are not limited to Figure 3 The illustrated shapes may also use signal waveforms of various shapes according to the type of ink ejected from the ejection portion 600, the number of piezoelectric elements 60 driven by the drive signals COMA, COMB, and COMC, the wiring length for transmitting the drive signals COMA, COMB, and COMC, and the like. Therefore, the drive signals COMA1 to COMAm may also be signal waveforms of different shapes, and the amount of ink ejected from the corresponding ejection portion 600 according to the drive signal COMA1 may be different from the amount of ink ejected from the corresponding ejection portion 600 according to the drive signal COMAj. Similarly, the drive signals COMB1 to COMBm may also be signal waveforms of different shapes, and the amount of ink ejected from the corresponding ejection portion 600 according to the drive signal COMB1 may be different from the amount of ink ejected from the corresponding ejection portion 600 according to the drive signal COMBj. Similarly, the drive signals COMC1 to COMCm may also be signal waveforms of different shapes, and the displacement of the piezoelectric element 60 generated by the drive signal COMC1 may be different from the displacement of the piezoelectric element 60 generated by the drive signal COMCj.

[0112] Next, the configuration and operation of the drive signal selection circuit 200 for outputting the drive signal VOUT by selecting or not selecting each of the drive signals COMA, COMB, and COMC will be described. Figure 4 2 is a diagram showing the functional structure of the drive signal selection circuit 200. Figure 4 As shown, the driving signal selection circuit 200 includes a selection control circuit 210 and a plurality of selection circuits 230 .

[0113] The printing data signal SI, the latch signal LAT, and the clock signal SCK are input to the selection control circuit 210. In addition, the selection control circuit 210 includes n sets of shift registers (S / R) 212, latch circuits 214, and decoders 216 corresponding to the n ejection units 600, respectively. That is, the drive signal selection circuit 200 includes n shift registers 212, n latch circuits 214, and n decoders 216, the same number as the n ejection units 600.

[0114] The print data signal SI is a signal synchronized with the clock signal SCK, and includes 2-bit print data [SIH, SIL] for specifying the dot size formed by the ink ejected from each of the n ejection units 600 as any one of "large dot LD", "small dot SD", "non-ejection ND" and "micro vibration BSD". The print data signal SI is held in the shift register 212 corresponding to the ejection unit 600 for each 2-bit print data [SIH, SIL].

[0115] Specifically, n shift registers 212 corresponding to the ejection unit 600 are connected in cascade connection. The 2-bit print data [SIH, SIL] included in the print data signal SI is sequentially transmitted to the subsequent stage of the cascade-connected shift registers 212 according to the clock signal SCK. Then, when the supply of the clock signal SCK stops, the 2-bit print data [SIH, SIL] corresponding to the ejection unit 600 corresponding to the shift register 212 is retained in the n shift registers 212. It should be noted that, in Figure 4 In the figure, in order to distinguish the n shift registers 212 connected in cascade, they are shown as 1st stage, 2nd stage, ..., nth stage from the upstream side to the downstream side of the input printing data signal SI.

[0116] Each of the n latch circuits 214 latches the 2-bit printing data [SIH, SIL] held in the corresponding shift register 212 at a rising edge of the latch signal LAT.

[0117] The 2-bit print data [SIH, SIL] latched by the latch circuit 214 is input to the corresponding decoder 216. The n decoders 216 each decode the input 2-bit print data [SIH, SIL] and output selection signals S1, S2, S3 of logic levels corresponding to the decoded contents in each cycle T. Figure 5 2 is a diagram showing an example of the decoding content in the decoder 216. The decoder 216 outputs a combination of the input 2-bit print data [SIH, SIL] and Figure 5The decoding content shown specifies the logic levels of the selection signals S1, S2, and S3. For example, when the 2-bit print data [SIH, SIL] input to the decoder 216 is [1, 0], the decoder 216 sets the logic levels of the selection signals S1, S2, and S3 to L, H, and L levels in the cycle T.

[0118] Return to Figure 4 , the selection circuit 230 is provided corresponding to each of the n ejection units 600. That is, the drive signal selection circuit 200 has n selection circuits 230. The selection signals S1, S2, S3 and the drive signals COMA, COMB, COMC output by the decoder 216 corresponding to the same ejection unit 600 are input to the selection circuit 230. The selection circuit 230 generates the drive signal VOUT by selecting or not selecting the drive signals COMA, COMB, COMC respectively based on the selection signals S1, S2, S3, and outputs it to the corresponding ejection unit 600.

[0119] Figure 6 2 is a diagram showing an example of the configuration of the selection circuit 230 corresponding to one ejection unit 600. Figure 6 As shown, the selection circuit 230 has inverters 232a, 232b, 232c and transmission gates 234a, 234b, 234c.

[0120] The selection signal S1 is input to the positive control terminal of the transmission gate 234a which is not marked with a circular mark, and is logically inverted by the inverter 232a and is also input to the negative control terminal of the transmission gate 234a which is marked with a circular mark. The drive signal COMA is input to the input terminal of the transmission gate 234a. When the input selection signal S1 is at an H level, the transmission gate 234a makes the input terminal and the output terminal conductive, and when the input selection signal S1 is at an L level, the input terminal and the output terminal are non-conductive. That is, the transmission gate 234a outputs the drive signal COMA to the output terminal when the selection signal S1 is at an H level, and does not output the drive signal COMA to the output terminal when the selection signal S1 is at an L level.

[0121] The selection signal S2 is input to the positive control terminal of the transmission gate 234b without a circular mark, and is logically inverted by the inverter 232b and is also input to the negative control terminal of the transmission gate 234b marked with a circular mark. The drive signal COMB is input to the input terminal of the transmission gate 234b. When the input selection signal S2 is at an H level, the transmission gate 234b makes the input terminal and the output terminal conductive, and when the input selection signal S2 is at an L level, the input terminal and the output terminal are non-conductive. That is, the transmission gate 234b outputs the drive signal COMB to the output terminal when the selection signal S2 is at an H level, and does not output the drive signal COMB to the output terminal when the selection signal S2 is at an L level.

[0122] The selection signal S3 is input to the positive control terminal of the transmission gate 234c which is not marked with a circular mark, and is logically inverted by the inverter 232c and is also input to the negative control terminal of the transmission gate 234c which is marked with a circular mark. In addition, the drive signal COMC is input to the input terminal of the transmission gate 234c. When the input selection signal S3 is at an H level, the transmission gate 234c conducts between the input terminal and the output terminal, and when the input selection signal S3 is at an L level, the input terminal and the output terminal are non-conductive. That is, the transmission gate 234c outputs the drive signal COMC to the output terminal when the selection signal S3 is at an H level, and does not output the drive signal COMC to the output terminal when the selection signal S3 is at an L level.

[0123] In the selection circuit 230, the output ends of the transmission gates 234a, 234b, and 234c are connected in common. That is, the drive signals COMA, COMB, and COMC selected or not selected by the selection signals S1, S2, and S3 are output from the output ends of the commonly connected transmission gates 234a, 234b, and 234c. Then, the drive signal selection circuit 200 supplies the signals at the output ends of the transmission gates 234a, 234b, and 234c as the drive signal VOUT to the piezoelectric element 60 of the corresponding ejection unit 600.

[0124] The operation of the driving signal selection circuit 200 configured as above will be described. Figure 7 2 is a diagram for explaining the operation of the drive signal selection circuit 200. The print data signal SI is a signal including 2-bit print data [SIH, SIL] in series, and is input to the drive signal selection circuit 200 in synchronization with the clock signal SCK. Then, the 2-bit print data [SIH, SIL] included in the print data signal SI is sequentially transmitted to the shift register 212 of the subsequent stage in synchronization with the clock signal SCK. Then, by stopping the input of the clock signal SCK, the 2-bit print data [SIH, SIL] corresponding to each ejection unit 600 is held in the shift register 212 corresponding to the same ejection unit 600.

[0125] Then, as the latch signal LAT rises, the latch circuit 214 latches the 2-bit printing data [SIH, SIL] held in the shift register 212 together. Figure 7 , 2-bit printing data [SIH, SIL] corresponding to the shift registers 212 of the 1st, 2nd, ..., nth stages latched by the latch circuit 214 are illustrated as LT1, LT2, ..., LTn.

[0126] The 2-bit print data [SIH, SIL] latched by the latch circuit 214 is input to the decoder 216. The decoder 216 outputs selection signals S1, S2, and S3 of logic levels according to the dot size specified by the input 2-bit print data [SIH, SIL].

[0127] Specifically, when the input 2-bit print data [SIH, SIL] is [1, 1], the decoder 216 sets the logic levels of the selection signals S1, S2, and S3 to H, L, and L levels in the period T and outputs them to the selection circuit 230. As a result, the selection circuit 230 selects the trapezoidal waveform Adp in the period T. As a result, the drive signal selection circuit 200 outputs Figure 7 The driving signal VOUT corresponding to the “large dot LD” is shown.

[0128] In addition, when the input 2-bit print data [SIH, SIL] is [1, 0], the decoder 216 sets the logic levels of the selection signals S1, S2, and S3 to L, H, and L levels in the period T and outputs them to the selection circuit 230. As a result, the selection circuit 230 selects the trapezoidal waveform Bdp in the period T. As a result, the drive signal selection circuit 200 outputs Figure 7 The driving signal VOUT corresponding to the “small dot SD” is shown.

[0129] In addition, when the input 2-bit printing data [SIH, SIL] is [0, 1], the decoder 216 sets the logic levels of the selection signals S1, S2, and S3 to L, L, and L levels in the cycle T and outputs them to the selection circuit 230. As a result, the selection circuit 230 does not select any of the trapezoidal waveforms Adp, Bdp, and Cdp in the cycle T. As a result, the drive signal selection circuit 200 outputs Figure 7 The driving signal VOUT corresponding to "non-discharge ND" is shown.

[0130] Here, when the selection circuit 230 does not select any of the trapezoidal waveforms Adp, Bdp, and Cdp, the voltage Vc supplied to the piezoelectric element 60 immediately before is maintained at one end of the corresponding piezoelectric element 60 through the capacitance component of the piezoelectric element 60. That is, the drive signal VOUT outputted from the drive signal selection circuit 200 at a constant voltage Vc includes the case where the voltage Vc immediately before maintained through the capacitance component of the piezoelectric element 60 is supplied to the piezoelectric element 60 as the drive signal VOUT when none of the trapezoidal waveforms Adp, Bdp, and Cdp are selected as the drive signal VOUT.

[0131] In addition, when the input 2-bit print data [SIH, SIL] is [0, 0], the decoder 216 sets the logic levels of the selection signals S1, S2, and S3 to L, L, and H levels in the period T and outputs them to the selection circuit 230. As a result, the selection circuit 230 selects the trapezoidal waveform Cdp in the period T. As a result, the drive signal selection circuit 200 outputs Figure 7 The driving signal VOUT corresponding to the “micro-vibration BSD” is shown.

[0132] As described above, the drive signal selection circuit 200 selects or deselects the drive signals COMA, COMB, and COMC based on the print data signal SI, the latch signal LAT, and the clock signal SCK, thereby generating a drive signal VOUT corresponding to each of the plurality of ejection units 600 and outputting the drive signal VOUT to the corresponding ejection unit 600. Thus, the amount of ink ejected from each of the plurality of ejection units 600 is individually controlled.

[0133] In addition, in the liquid ejection device 1 of the first embodiment, when a large dot is formed on the medium P, the drive signal selection circuit 200 supplies the drive signal COMA output by the drive circuit 52a as the drive signal VOUT to the ejection unit 600, and when a small dot is formed on the medium P, the drive signal selection circuit 200 supplies the drive signal COMB output by the drive circuit 52b as the drive signal VOUT to the ejection unit 600. That is, the drive signal selection circuit 200 only needs to select any one of the drive signals COMA and COMB according to the dot size formed on the medium P. Therefore, compared with a configuration in which one drive signal includes a plurality of signal waveforms and the dot size formed on the medium P is specified by selecting the signal waveform in a time-sharing manner, the waveform period of the drive signals COMA and COMB can be shortened. As a result, the image forming speed of the liquid ejection device 1 to form a desired image on the medium P can be increased.

[0134] Furthermore, in the liquid ejection device 1 in the first embodiment, in addition to the drive signals COMA and COMB, the drive signal COMC for driving the piezoelectric element 60 so as not to eject ink onto the medium P can be included, thereby reducing the possibility of ejection abnormality due to increased ink viscosity in the ejection unit 600 without reducing the image forming speed of forming a desired image on the medium P. That is, in the liquid ejection device 1 in the first embodiment, by including the drive signal COMC in addition to the drive signals COMA and COMB, the image forming speed of forming a desired image on the medium P can be increased without reducing the quality of the image formed on the medium P, and the possibility of reducing the ejection accuracy of the ink can be reduced.

[0135] Here, the drive signal VOUT supplied to the piezoelectric element 60 is generated by selecting the signal waveforms included in the drive signals COMA, COMB, and COMC. That is, when the drive signal selection circuit 200 selects the drive signal COMA, the drive signal COMA is supplied to the corresponding piezoelectric element 60 as the drive signal VOUT, when the drive signal selection circuit 200 selects the drive signal COMB, the drive signal COMB is supplied to the corresponding piezoelectric element 60 as the drive signal VOUT, and when the drive signal selection circuit 200 selects the drive signal COMC, the drive signal COMC is supplied to the corresponding piezoelectric element 60 as the drive signal VOUT. That is, the drive circuit 52a outputs the drive signal COMA supplied to the piezoelectric element 60, the drive circuit 52b outputs the drive signal COMB supplied to the piezoelectric element 60, and the drive circuit 52c outputs the drive signal COMC supplied to the piezoelectric element 60.

[0136] 1.3 Configuration of drive signal output circuit

[0137] Next, the configuration and operation of the drive circuit 52 that outputs the drive signal COM will be described. Figure 8 2 is a diagram showing a configuration of the driving circuit 52. The driving circuit 52 includes an integrated circuit 500, an amplifier circuit 550, a demodulation circuit 560, feedback circuits 570 and 572, and other electronic components.

[0138] The integrated circuit 500 has a plurality of terminals including a terminal In, a terminal Bst, a terminal Hdr, a terminal Sw, a terminal Gvd, a terminal Ldr, and a terminal Gnd. The integrated circuit 500 is electrically connected to a substrate (not shown) provided outside via the plurality of terminals. In addition, the integrated circuit 500 includes a DAC (Digital to Analog Converter) 511, a modulation circuit 510, a gate drive circuit 520, and a power supply circuit 590.

[0139] The power supply circuit 590 generates a voltage signal DAC_HV and a voltage signal DAC_LV, and supplies them to DAC511. In addition, a digital basic drive signal do that specifies the signal waveform of the drive signal COM is input to DAC511. Then, DAC511 converts the input basic drive signal do into an analog signal of a voltage value between the voltage signal DAC_HV and the voltage signal DAC_LV, namely, a basic drive signal ao, and outputs it to the modulation circuit 510. That is, the maximum value of the voltage amplitude of the basic drive signal ao is specified by the voltage signal DAC_HV, and the minimum value is specified by the voltage signal DAC_LV. The amplified signal of the analog basic drive signal ao output by the DAC511 is equivalent to the drive signal COM. In other words, the basic drive signal ao is equivalent to the target signal before the drive signal COM is amplified.

[0140] The modulation circuit 510 generates a modulation signal Ms by modulating the basic drive signal ao, and outputs the modulation signal to the gate drive circuit 520. The modulation circuit 510 includes adders 512 and 513, a comparator 514, an inverter 515, an integral attenuator 516, and an attenuator 517.

[0141] The integral attenuator 516 attenuates and integrates the drive signal COM input via the terminal Vfb, and supplies it to the -side input terminal of the adder 512. The basic drive signal ao is input to the +side input terminal of the adder 512. Then, the adder 512 subtracts the voltage input to the -side input terminal from the voltage input to the +side input terminal, and supplies the integrated voltage to the +side input terminal of the adder 513.

[0142] The attenuator 517 supplies a voltage obtained by attenuating the high frequency component of the drive signal COM input via the terminal Ifb to the - side input terminal of the adder 513. The voltage output from the adder 512 is input to the + side input terminal of the adder 513. Then, the adder 513 generates a voltage signal Os obtained by subtracting the voltage input to the - side input terminal from the voltage input to the + side input terminal, and outputs the voltage signal to the comparator 514.

[0143] The comparator 514 outputs a modulation signal Ms which is a pulse modulated signal of the voltage signal Os input from the adder 513. Specifically, the comparator 514 generates and outputs a modulation signal Ms which becomes an H level when the voltage value of the voltage signal Os input from the adder 513 rises and reaches or exceeds a predetermined threshold value Vth1, and becomes an L level when the voltage value of the voltage signal Os falls below a predetermined threshold value Vth2. Here, the threshold values ​​Vth1 and Vth2 are set to have a relationship of threshold value Vth1=>Vth2.

[0144] The modulation signal Ms output by the comparator 514 is input to the gate driver 521 included in the gate drive circuit 520, and is also input to the gate driver 522 included in the gate drive circuit 520 via the inverter 515. That is, signals whose logic levels are in an exclusive relationship are input to the gate driver 521 and the gate driver 522. Here, the logic level is exclusive, including that the logic levels of the signals input to the gate driver 521 and the gate driver 522 do not become H level at the same time. Therefore, the modulation circuit 510 may also include a timing control circuit for controlling the timing of the modulation signal Ms input to the gate driver 521 and the signal after inverting the logic level of the modulation signal Ms input to the gate driver 522 instead of the inverter 515 or in addition thereto.

[0145] The gate driving circuit 520 includes a gate driver 521 and a gate driver 522. The gate driver 521 performs level shifting on the modulation signal Ms output from the comparator 514, and outputs the result from the terminal Hdr as an amplification control signal Hgd.

[0146] Specifically, in the power supply voltage of the gate driver 521, a voltage is supplied to the high side via the terminal Bst, and a voltage is supplied to the low side via the terminal Sw. The terminal Bst is connected to one end of the capacitor C5 and the cathode of the diode D1 for preventing backflow. The terminal Sw is connected to the other end of the capacitor C5. In addition, the anode of the diode D1 is connected to the terminal Gvd to which a DC voltage of, for example, 7.5V, i.e., the voltage Vm, is supplied from a power supply circuit not shown. That is, the voltage Vm is supplied to the anode of the diode D1. Therefore, the potential difference between the terminal Bst and the terminal Sw is approximately equal to the voltage Vm. As a result, the gate driver 521 generates an amplified control signal Hgd having a voltage value greater than the voltage Vm relative to the terminal Sw according to the input modulation signal Ms, and outputs it from the terminal Hdr.

[0147] The gate driver 522 operates at a lower potential than the gate driver 521. The gate driver 522 level-shifts the signal obtained by inverting the logic level of the modulation signal Ms output from the comparator 514 by the inverter 515, and outputs the signal as the amplification control signal Lgd from the terminal Ldr.

[0148] Specifically, in the power supply voltage of the gate driver 522, the voltage Vm is supplied to the high side, and the ground potential GND1 is supplied to the low side via the terminal Gnd. Then, the gate driver 522 outputs the amplified control signal Lgd having a voltage value greater than the voltage Vm at the terminal Gnd from the terminal Ldr according to the signal obtained by inverting the logic level of the input modulation signal Ms. Here, the ground potential GND1 is a reference potential of the drive circuit 52, for example, 0V.

[0149] The amplifier circuit 550 includes a transistor M1 and a transistor M2 .

[0150] The transistor M1 is a surface-mounted FET (Field Effect Transistor), and a DC voltage of, for example, 42V, i.e., a voltage VHV, is supplied to the drain of the transistor M1 as an amplification power supply voltage of the amplifier circuit 550. In addition, the gate of the transistor M1 is electrically connected to one end of the resistor R1, and the other end of the resistor R1 is electrically connected to the terminal Hdr of the integrated circuit 500. That is, the amplification control signal Hgd is input to the gate of the transistor M1. In addition, the source of the transistor M1 is electrically connected to the terminal Sw of the integrated circuit 500.

[0151] The transistor M2 is a surface-mounted FET, and the drain of the transistor M2 is electrically connected to the terminal Sw of the integrated circuit 500. That is, the drain of the transistor M2 and the source of the transistor M1 are electrically connected to each other. The gate of the transistor M2 is electrically connected to one end of the resistor R2, and the other end of the resistor R2 is electrically connected to the terminal Ldr of the integrated circuit 500. That is, the amplification control signal Lgd is input to the gate of the transistor M2. In addition, the ground potential GND1 is supplied to the source of the transistor M2.

[0152] That is, the drive circuit 52 includes surface-mounted transistors M1 and M2 as amplification transistors. Thus, in the amplifier circuit 550, when the drain and source of the transistor M1 are controlled to be non-conductive, and the drain and source of the transistor M2 are controlled to be conductive, the potential of the node connected to the terminal Sw becomes the ground potential GND1. Therefore, the voltage Vm is supplied to the terminal Bst. On the other hand, when the drain and source of the transistor M1 are controlled to be conductive, and the drain and source of the transistor M2 are controlled to be non-conductive, the potential of the node connected to the terminal Sw becomes the voltage VHV. Therefore, a voltage signal with a potential of the voltage VHV+Vm is supplied to the terminal Bst. That is, the gate driver 521 driving the transistor M1 uses the capacitor C5 as a floating power supply, and according to the actions of the transistors M1 and M2, the potential of the terminal Sw changes to the ground potential GND1 or the voltage VHV, thereby generating an amplified control signal Hgd whose L level is the potential of the voltage VHV and whose H level is the potential of the voltage VHV+voltage Vm, and outputs it to the gate of the transistor M1.

[0153] On the other hand, the gate driver 522 driving the transistor M2 generates an amplification control signal Lgd having a potential of the ground potential GND1 at the L level and a potential of the voltage Vm at the H level, regardless of the operations of the transistors M1 and M2, and outputs the amplification control signal to the gate of the transistor M2.

[0154] The amplifier circuit 550 configured as described above generates an amplified modulation signal AMs at a connection point between the source of the transistor M1 and the drain of the transistor M2 by amplifying the modulation signal Ms based on the voltage VHV. Then, the amplifier circuit 550 outputs the generated amplified modulation signal AMs to the demodulation circuit 560.

[0155] Here, a capacitor C7 is provided on the transmission path for transmitting the voltage VHV input to the amplifier circuit 550. Specifically, one end of the capacitor C7 is the transmission path for transmitting the voltage VHV, and is electrically connected to the drain of the transistor M1, and the other end of the capacitor C7 is supplied with the ground potential GND1. As a result, the possibility of potential variation of the voltage VHV input to the amplifier circuit 550 is reduced, and the possibility of superimposing noise on the voltage VHV is reduced, and the waveform accuracy of the amplified modulated signal AMs output by the amplifier circuit 550 is improved.

[0156] The demodulation circuit 560 generates a drive signal COM by demodulating the amplified modulation signal AMs output by the amplifier circuit 550, and outputs it from the drive circuit 52. The demodulation circuit 560 includes an inductor L1 and a capacitor C1. One end of the inductor L1 is connected to one end of the capacitor C1. The amplified modulation signal AMs is input to the other end of the inductor L1. In addition, the ground potential GND1 is supplied to the other end of the capacitor C1. That is, in the demodulation circuit 560, the inductor L1 and the capacitor C1 constitute a low-pass filter (LowPass Filter). Therefore, the demodulation circuit 560 demodulates by smoothing the amplified modulation signal AMs using the low-pass filter, and outputs the demodulated signal as the drive signal COM. That is, the drive circuit 52 outputs the drive signal COM from one end of the inductor L1 and one end of the capacitor C1 included in the demodulation circuit 560.

[0157] The feedback circuit 570 includes a resistor R3 and a resistor R4. One end of the resistor R3 is supplied with a driving signal COM, and the other end is connected to the terminal Vfb and one end of the resistor R4. The other end of the resistor R4 is supplied with a voltage VHV. Thus, the driving signal COM after passing through the feedback circuit 570 is fed back to the terminal Vfb in a state where the voltage VHV is pulled up.

[0158] Feedback circuit 572 includes capacitors C2, C3, C4 and resistors R5 and R6. One end of capacitor C2 is input with driving signal COM, and the other end is connected with one end of resistor R5 and one end of resistor R6. The other end of resistor R5 is supplied with ground potential GND1. Thus, capacitor C2 and resistor R5 function as high-pass filter (High Pass Filter). In addition, the other end of resistor R6 is connected with one end of capacitor C4 and one end of capacitor C3. The other end of capacitor C3 is supplied with ground potential GND1. Thus, resistor R6 and capacitor C3 function as low-pass filter. That is, feedback circuit 572 includes high-pass filter and low-pass filter, and functions as band-pass filter (Band Pass Filter) that passes the signal of the specified frequency band included in driving signal COM.

[0159] The other end of the capacitor C4 is connected to the terminal Ifb of the integrated circuit 500. Thus, the signal from which the DC component of the high frequency component of the driving signal COM is cut after passing through the feedback circuit 572 functioning as a bandpass filter is fed back to the terminal Ifb.

[0160] The drive signal COM is a signal obtained by smoothing the amplified modulation signal AMs based on the basic drive signal do by the demodulation circuit 560. In addition, the drive signal COM is integrated and subtracted via the terminal Vfb, and then fed back to the adder 512. As a result, the drive circuit 52 self-oscillates at a frequency determined by the delay of the feedback and the transfer function of the feedback. However, the delay amount of the feedback path via the terminal Vfb is large, so it is possible that the frequency of the self-oscillation cannot be increased to a level that can fully ensure the accuracy of the drive signal COM if only the feedback is via the terminal Vfb. Therefore, a path for feeding back the high-frequency component of the drive signal COM via the terminal Ifb is set differently from the path via the terminal Vfb, thereby reducing the delay when the entire circuit is viewed. As a result, compared with the case where there is no path via the terminal Ifb, the frequency of the voltage signal Os can be increased to a level that can fully ensure the accuracy of the drive signal COM.

[0161] As described above, the drive circuit 52 performs digital / analog conversion on the input basic drive signal do, performs class D amplification on the analog signal to generate the drive signal COM, and outputs the generated drive signal COM.

[0162] 1.4 Composition of liquid ejection module

[0163] Next, use Figures 9 to 11 The structure of the liquid ejection module 20 will be described. Fig. 9 2 is a diagram showing the structure of the liquid ejection module 20. Here, when describing the structure of the liquid ejection module 20, Figures 9 to 11The middle figure shows arrows indicating the X1 direction, the Y1 direction, and the Z1 direction which are orthogonal to each other. Figures 9 to 11 In the description, the starting point side of the arrow indicating the X1 direction is sometimes referred to as the -X1 side, and the front end side is sometimes referred to as the +X1 side. The starting point side of the arrow indicating the Y1 direction is sometimes referred to as the -Y1 side, and the front end side is sometimes referred to as the +Y1 side. The starting point side of the arrow indicating the Z1 direction is sometimes referred to as the -Z1 side, and the front end side is sometimes referred to as the +Z1 side. Here, in the following description, the liquid ejection module 20 is described as having six ejection modules 23. When distinguishing each of the six ejection modules 23, each of the six ejection modules 23 is sometimes referred to as an ejection module 23-1 to 23-6.

[0164] like Fig. 9 As shown, the liquid ejection module 20 has a frame 31, a collective substrate 33, a flow path structure 34, a head substrate 35, a distribution flow path 37, a fixing plate 39 and ejection modules 23-1 to 23-6. In the liquid ejection module 20, the flow path structure 34, the head substrate 35, the distribution flow path 37 and the fixing plate 39 are stacked in the order of the fixing plate 39, the distribution flow path 37, the head substrate 35 and the flow path structure 34 from the -Z1 side toward the +Z1 side along the Z1 direction, and the frame 31 is located around the flow path structure 34, the head substrate 35, the distribution flow path 37 and the fixing plate 39 to support the flow path structure 34, the head substrate 35, the distribution flow path 37 and the fixing plate 39. The collective substrate 33 is uprightly provided on the +Z1 side of the frame 31 while being held by the frame 31 , and the six ejection modules 23 are located between the distribution flow path 37 and the fixing plate 39 so as to be partially exposed to the outside of the liquid ejection module 20 .

[0165] When describing the structure of the liquid ejecting module 20 , first, the structure of the ejecting module 23 included in the liquid ejecting module 20 will be described. Fig.10 2 is a diagram showing an example of the structure of the ejection module 23. Fig.11 2 is a diagram showing an example of a cross section of the ejection module 23. Fig.11 is along Fig.10 The cross-sectional view of the ejection module 23 is shown in FIG. Fig.10 The illustrated line Aa is a virtual line segment that passes through the introduction passage 661 included in the ejection module 23 and passes through the nozzle N1 and the nozzle N2 .

[0166] like Fig.10 and Fig.11As shown, the ejection module 23 has a plurality of nozzles N1 arranged side by side and a plurality of nozzles N2 arranged side by side. The total number of the nozzles N1 and the nozzles N2 of the ejection module 23 is n, which is the same number as the ejection portion 600 of the ejection module 23. It should be noted that in the first embodiment, the number of the nozzles N1 and the number of the nozzles N2 of the ejection module 23 are described as being the same number. That is, the ejection module 23 is described as having n / 2 nozzles N1 and n / 2 nozzles N2. Here, in the following description, when there is no need to distinguish between the nozzles N1 and N2, they are sometimes referred to simply as nozzles N.

[0167] The ejection module 23 includes a wiring member 388 , a housing 660 , a protection substrate 641 , a flow path forming substrate 642 , a communication plate 630 , a compliance substrate 620 , and a nozzle plate 623 .

[0168] On the flow path forming substrate 642, a pressure chamber CB1 partitioned by a plurality of partition walls by anisotropic etching from one side is arranged side by side corresponding to the nozzle N1, and a pressure chamber CB2 partitioned by a plurality of partition walls by anisotropic etching from one side is arranged side by side corresponding to the nozzle N2. Here, in the following description, when there is no need to distinguish between the pressure chamber CB1 and the pressure chamber CB2, they may be simply referred to as the pressure chamber CB.

[0169] The nozzle plate 623 is located on the -Z1 side of the flow path forming substrate 642. A nozzle row Ln1 formed by n / 2 nozzles N1 and a nozzle row Ln2 formed by n / 2 nozzles N2 are provided on the nozzle plate 623. Here, in the following description, the surface on the -Z1 side of the nozzle plate 623 where the nozzles N are opened may be referred to as a liquid ejection surface 623a.

[0170] The connecting plate 630 is located on the -Z1 side of the flow path forming substrate 642 and the +Z1 side of the nozzle plate 623. The connecting plate 630 is provided with a nozzle connecting passage RR1 that connects the pressure chamber CB1 with the nozzle N1 and a nozzle connecting passage RR2 that connects the pressure chamber CB2 with the nozzle N2. In addition, the connecting plate 630 is independently provided with a pressure chamber connecting passage RK1 that connects the end of the pressure chamber CB1 with the manifold MN1 and a pressure chamber connecting passage RK2 that connects the end of the pressure chamber CB2 with the manifold MN2, respectively corresponding to the pressure chambers CB1 and CB2.

[0171] The manifold MN1 includes a supply communication channel RA1 and a connection communication channel RX1. The supply communication channel RA1 is set to penetrate the communication plate 630 in the Z1 direction, and the connection communication channel RX1 does not penetrate the communication plate 630 in the Z1 direction, but opens on the nozzle plate 623 side of the communication plate 630 and is set to the middle of the Z1 direction. Similarly, the manifold MN2 includes a supply communication channel RA2 and a connection communication channel RX2. The supply communication channel RA2 is set to penetrate the communication plate 630 in the Z1 direction, and the connection communication channel RX2 does not penetrate the communication plate 630 in the Z1 direction, but opens on the nozzle plate 623 side of the communication plate 630 and is set to the middle of the Z1 direction. Thus, the connection communication channel RX1 included in the manifold MN1 is connected to the corresponding pressure chamber CB1 through the pressure chamber communication channel RK1, and the connection communication channel RX2 included in the manifold MN2 is connected to the corresponding pressure chamber CB2 through the pressure chamber communication channel RK2.

[0172] Here, in the following description, when there is no need to distinguish between the nozzle connecting channel RR1 and the nozzle connecting channel RR2, it is sometimes referred to as the nozzle connecting channel RR, when there is no need to distinguish between the manifold MN1 and the manifold MN2, it is sometimes referred to as the manifold MN, when there is no need to distinguish between the supply connecting channel RA1 and the supply connecting channel RA2, it is sometimes referred to as the supply connecting channel RA, and when there is no need to distinguish between the connecting connecting channel RX1 and the connecting connecting channel RX2, it is sometimes referred to as the connecting connecting channel RX.

[0173] The vibration plate 610 is located on the surface on the +Z1 side of the flow path forming substrate 642. In addition, on the surface on the +Z1 side of the vibration plate 610, n piezoelectric elements 60 corresponding to the nozzles N1 and N2 are formed in two rows.

[0174] The piezoelectric element 60 includes a piezoelectric body 601 and a pair of electrodes 602 and 603 disposed so as to sandwich the piezoelectric body 601. The electrode 602 and the piezoelectric body 601 are formed on the surface on the +Z1 side of the vibration plate 610 for each pressure chamber CB, and the electrode 603 is formed as a common electrode shared by the pressure chambers CB on the surface on the +Z1 side of the vibration plate 610. Thus, the piezoelectric element 60 drives the piezoelectric body 601 to displace in the up-down direction by supplying a drive signal VOUT from the drive signal selection circuit 200 to the electrode 602 and supplying a reference voltage signal VBS to the electrode 603 as a common electrode.

[0175] The protective substrate 641 is bonded to the surface on the +Z1 side of the flow path forming substrate 642. The protective substrate 641 forms a protective space 644 for protecting the piezoelectric element 60. In addition, a through hole 643 penetrating in the Z1 direction is provided on the protective substrate 641. The end of the lead electrode 611 led out from the electrodes 602 and 603 of the piezoelectric element 60 is extended and exposed inside the through hole 643. Thus, the wiring member 388 is electrically connected to the lead electrode 611 exposed inside the through hole 643.

[0176] In addition, a housing 660 is fixed to the protective substrate 641 and the connecting plate 630, which divides a part of the manifold MN connected to the plurality of pressure chambers CB. The housing 660 is joined to the protective substrate 641 and is also joined to the connecting plate 630. Specifically, the housing 660 has a recess 665 on the surface on the -Z1 side for accommodating the flow path forming substrate 642 and the protective substrate 641. The recess 665 has an opening area larger than the surface of the protective substrate 641 joined to the flow path forming substrate 642. The flow path forming substrate 642 and the like are accommodated in the recess 665. Then, in a state where the flow path forming substrate 642 and the like are accommodated in the recess 665, the opening surface on the -Z1 side of the recess 665 is sealed by the connecting plate 630. Thus, the supply connecting channel RB1 and the supply connecting channel RB2 are divided at the outer periphery of the flow path forming substrate 642 by the housing 660, the flow path forming substrate 642 and the protective substrate 641. Here, when it is not necessary to distinguish between the supply communication passage RB1 and the supply communication passage RB2, they may be simply referred to as the supply communication passage RB.

[0177] In addition, a plastic substrate 620 is provided on the surface of the opening of the supply communication channel RA and the connection communication channel RX in the communication plate 630. The opening of the supply communication channel RA and the connection communication channel RX is sealed by the plastic substrate 620. Such a plastic substrate 620 has a sealing film 621 and a fixed substrate 622. The sealing film 621 is formed of a flexible film or the like, and the fixed substrate 622 is formed of a hard material such as a metal such as stainless steel.

[0178] The housing 660 is provided with an introduction passage 661 for supplying ink to the manifold MN. The housing 660 is further provided with a connection port 662 which is an opening communicating with the through hole 643 of the protective substrate 641 and penetrating in the Z1 direction, and through which the wiring member 388 is inserted.

[0179] The wiring member 388 is a flexible member for electrically connecting the ejection module 23 and the head substrate 35, and an FPC can be used, for example. An integrated circuit 201 is mounted on the wiring member 388 by COF (Chip On Film). At least a part of the drive signal selection circuit 200 is mounted in the integrated circuit 201.

[0180] In the ejection module 23 configured as described above, the wiring component 388 transmits the drive signals COMA, COMB, COMC, the reference voltage signal VBS, the clock signal SCK, the printing data signal SI and the latch signal LAT. Among them, the drive signals COMA, COMB, COMC, the clock signal SCK, the printing data signal SI and the latch signal LAT are input to the drive signal selection circuit 200 including the integrated circuit 201 provided in the wiring component 388. Then, the drive signal selection circuit 200 generates and outputs the drive signal VOUT by selecting or not selecting the drive signals COMA, COMB, COMC based on the input clock signal SCK, the printing data signal SI and the latch signal LAT. The drive signal VOUT output by the drive signal selection circuit 200 is transmitted in the wiring component 388 and supplied to the electrode 602 via the lead electrode 611. In addition, the reference voltage signal VBS is transmitted in the wiring component 388 and supplied to the electrode 603 via the lead electrode 611. Thus, the piezoelectric body 601 is deformed according to the potential difference between the drive signal VOUT supplied to the electrode 602 and the reference voltage signal VBS supplied to the electrode 603. That is, the piezoelectric element 60 is driven. Then, as the piezoelectric element 60 is driven, the vibration plate 610 provided with the piezoelectric element 60 is displaced in the up-down direction. Thus, the internal pressure of the corresponding pressure chamber CB changes, and in response to the change in the internal pressure of the pressure chamber CB, the ink stored in the pressure chamber CB is ejected from the nozzle N.

[0181] In the ejection module 23 configured as above, the configuration including the nozzle N, the nozzle communication passage RR, the pressure chamber CB, the piezoelectric element 60, and the vibration plate 610 corresponds to the above-mentioned ejection unit 600. That is, the ejection module 23 has a plurality of ejection units 600, and the ejection unit 600 includes the piezoelectric element 60, and ejects ink in response to the driving of the piezoelectric element 60.

[0182] Back to Fig. 9 , the fixing plate 39 is located at the -Z1 side of the ejection module 23. Six ejection modules 23 are fixed to the fixing plate 39. Specifically, the fixing plate 39 has six openings 391 that penetrate the fixing plate 39 along the Z2 direction and correspond to the six ejection modules 23, respectively. The six ejection modules 23 are fixed to the fixing plate 39 in such a manner that the liquid ejection surfaces 623a are exposed from the six openings 391, respectively.

[0183] The distribution flow path 37 is located on the +Z1 side of the ejection module 23. Four introduction portions 373 are provided on the surface on the +Z1 side of the distribution flow path 37. The four introduction portions 373 are flow path tubes protruding from the surface on the +Z1 side of the distribution flow path 37 toward the +Z1 side along the Z1 direction, and are connected to the unillustrated flow path holes formed on the surface on the -Z1 side of the flow path structure 34. In addition, the unillustrated flow path tubes connected to the four introduction portions 373 are located on the surface on the -Z1 side of the distribution flow path 37. The unillustrated flow path tubes located on the surface on the -Z1 side of the distribution flow path 37 are connected to the introduction channels 661 respectively provided in the six ejection modules 23. In addition, the distribution flow path 37 has six opening portions 371 penetrating along the Z1 direction. The wiring components 388 respectively provided in the six ejection modules 23 are inserted through the six opening portions 371.

[0184] The head substrate 35 is located on the +Z1 side of the distribution flow path 37. A wiring component FC electrically connected to the collective substrate 33 described later is mounted on the head substrate 35. In addition, four openings 351 and cutouts 352 and 353 are formed on the head substrate 35. The wiring components 388 of the ejection modules 23-2 to 23-5 are inserted through the four openings 351 and electrically connected to the head substrate 35 by solder or the like. In addition, the wiring component 388 of the ejection module 23-1 passes through the cutout 352, and the wiring component 388 of the ejection module 23-6 passes through the cutout 353. The wiring components 388 of the ejection modules 23-1 and 23-6 respectively passing through the cutouts 352 and 353 are electrically connected to the head substrate 35 by solder or the like.

[0185] In addition, four cutouts 355 are formed at four corners of the head substrate 35. The introduction portions 373 pass through the four cutouts 355. The four introduction portions 373 passing through the cutouts 355 are connected to the flow path structure 34 located on the +Z1 side of the head substrate 35.

[0186] The flow path structure 34 has a flow path plate Su1 and a flow path plate Su2. The flow path plate Su1 and the flow path plate Su2 are stacked along the Z1 direction in a state where the flow path plate Su1 is located on the +Z1 side and the flow path plate Su2 is located on the -Z1 side, and are bonded to each other by an adhesive or the like. In addition, the flow path structure 34 has four introduction parts 341 protruding toward the +Z1 side along the Z1 direction on the surface on the +Z1 side. The four introduction parts 341 are connected to the unillustrated flow path holes formed on the surface on the -Z1 side of the flow path structure 34 via the ink flow path formed inside the flow path structure 34. The unillustrated flow path holes formed on the surface on the -Z1 side of the flow path structure 34 are connected to the four introduction parts 373. Furthermore, a through hole 343 is formed on the flow path structure 34 to penetrate along the Z1 direction. The wiring component FC electrically connected to the head substrate 35 is inserted through the through hole 343.

[0187] Here, inside the flow path structure 34, in addition to the ink flow path connecting the introduction portion 341 and the flow path hole (not shown) formed on the surface on the -Z1 side, a capture filter or the like for capturing foreign matter contained in the ink flowing in the ink flow path may be provided.

[0188] The frame 31 is positioned to cover and support the flow path structure 34, the head substrate 35, the distribution flow path 37 and the fixing plate 39. The frame 31 has four openings 311, a collective substrate insertion portion 313 and a holding member 315.

[0189] The four introduction parts 341 included in the flow path structure 34 are respectively inserted through the four openings 311. Then, ink is supplied from the liquid container 3 to the four introduction parts 341 inserted through the four openings 311 via a tube or the like (not shown).

[0190] The collective substrate 33 is partially inserted through the collective substrate insertion portion 313 and is sandwiched between the retaining component 315 and the frame body 31. A connecting portion 330 is provided on the collective substrate 33. The connecting component 30 for transmitting various signals such as the data signal DATA, the drive signals COMA, COMB, COMC, the reference voltage signal VBS and other power supply voltages output by the head driving module 10 is installed on the connecting portion 330. In addition, the wiring component FC possessed by the head substrate 35 is electrically connected to the collective substrate 33. Thus, the collective substrate 33 is electrically connected to the head substrate 35. Here, a semiconductor device equivalent to the above-mentioned restoration circuit 220 can also be provided on the collective substrate 33. In addition, Fig. 9 In the figure, a case where one connection portion 330 is provided on the collective substrate 33 is shown, but the collective substrate 33 may also have a plurality of connection portions 330 .

[0191] In the liquid ejection module 20 configured as described above, the liquid container 3 and the introduction section 341 are connected via a tube (not shown) and the like, so that the ink stored in the liquid container 3 is supplied to the liquid ejection module 20. The ink supplied to the liquid ejection module 20 is guided to the unillustrated flow path hole formed on the surface of the flow path structure 34 on the -Z1 side through the ink flow path formed inside the flow path structure 34, and then supplied to the four introduction sections 373 included in the distribution flow path 37. The ink supplied to the distribution flow path 37 is distributed to each of the six ejection modules 23 in the unillustrated ink flow path formed inside the distribution flow path 37, and then supplied to the introduction channel 661 included in the corresponding ejection module 23. Then, the ink supplied to the ejection module 23 via the introduction channel 661 is stored in the pressure chamber CB included in the ejection section 600.

[0192] In addition, various signals including the drive signals COMA1 to COMA6, COMB1 to COMB6, COMC1 to COMC6, the reference voltage signal VBS, and the data signal DATA output by the head drive module 10 are transmitted in the connection component 30 and input to the liquid ejection module 20 via the connection portion 330. Various signals including the drive signals COMA1 to COMA6, COMB1 to COMB6, COMC1 to COMC6, the reference voltage signal VBS, and the data signal DATA input to the liquid ejection module 20 are transmitted in the assembly substrate 33 and the head substrate 35. At this time, the recovery circuit 220 generates clock signals SCK1 to SCK6, printing data signals SI1 to SI6, and latch signals LAT1 to LAT6 corresponding to the ejection modules 23-1 to 23-6, respectively, according to the data signal DATA, and separates them corresponding to the ejection modules 23-1 to 23-6, respectively. Then, the driving signals COMA1 to COMA6, COMB1 to COMB6, COMC1 to COMC6, the reference voltage signal VBS, the clock signal SCK1 to SCK6, the printing data signal SI1 to SI6, and the latch signal LAT1 to LAT6 are respectively input to the wiring member 388 of the corresponding ejection module 23. The driving signals COMA, COMB, COMC, the reference voltage signal VBS, the clock signal SCK, the printing data signal SI, and the latch signal LAT supplied to the wiring member 388 are transmitted in the wiring member 388. At this time, the integrated circuit 201 including the driving signal selection circuit 200 provided in the wiring member 388 generates the driving signal VOUT corresponding to each of the n ejection units 600, and supplies it to the electrode 602 of the piezoelectric element 60 included in the corresponding ejection unit 600. Thus, the n piezoelectric elements 60 are driven individually in response to the driving signal VOUT. As a result, the ink stored in the pressure chamber CB corresponding to the piezoelectric element 60 is ejected from the corresponding nozzle N.

[0193] As described above, in the liquid ejection device 1 of the first embodiment, the liquid ejection module 20 has a plurality of ejection modules 23, and the ejection module 23 includes a plurality of piezoelectric elements 60. Ink is ejected by driving the piezoelectric element 60. The piezoelectric element 60 has an electrode 602 and an electrode 603, and is driven by a drive signal VOUT supplied to the electrode 602 and a reference voltage signal VBS supplied to the electrode 603.

[0194] 1.5 Structure of the head drive module

[0195] Next, use Fig.12 The structure of the head driving module 10 is described. Fig.12The middle figure shows arrows indicating mutually orthogonal X2 direction, Y2 direction and Z2 direction, which are directions independent of the above-mentioned X1 direction, Y1 direction and Z1 direction. In addition, in the following description, the starting point side of the arrow indicating the X2 direction is sometimes referred to as the -X2 side, and the front end side is referred to as the +X2 side, the starting point side of the arrow indicating the Y2 direction is sometimes referred to as the -Y2 side, and the front end side is referred to as the +Y2 side, and the starting point side of the arrow indicating the Z2 direction is sometimes referred to as the -Z2 side, and the front end side is referred to as the +Z2 side.

[0196] Fig.12 1 is a diagram showing an example of the structure of the head driving module 10. Fig.12 As shown, the head driving module 10 includes a driving circuit substrate 800 , a heat conducting member group 720 , a plurality of screws 780 , and a cooling fan 770 .

[0197] The driving circuit substrate 800 receives the image information signal IP from the control unit 2 and outputs a plurality of signals including the driving signals COMA, COMB, COMC, the reference voltage signal VBS and the data signal DATA to the liquid ejection module 20. That is, the driving circuit substrate 800 drives the piezoelectric element 60 included in the liquid ejection module 20.

[0198] The driving circuit substrate 800 includes a plurality of driving circuits 52, a reference voltage output circuit 53, an integrated circuit 101, connection parts CN1, CN2, and a wiring substrate 810. The wiring substrate 810 includes a plurality of through holes 820 that penetrate the wiring substrate 810 along the Z2 direction. In addition, the wiring substrate 810 is provided with a plurality of driving circuits 52, a reference voltage output circuit 53, an integrated circuit 101, and connection parts CN1, CN2.

[0199] The connection part CN1 is located on the +X2 side of the wiring substrate 810. A cable (not shown) for electrically connecting the control unit 2 to the drive circuit substrate 800 is installed on the connection part CN1. Thus, the image information signal IP output by the control unit 2 is input to the drive circuit substrate 800. The connection part CN2 is located on the -X2 side of the wiring substrate 810. A connecting component 30 for electrically connecting the drive circuit substrate 800 to the liquid ejection module 20 is installed on the connection part CN2. Thus, signals including the drive signals COMA, COMB, COMC, the reference voltage signal VBS and the data signal DATA output by the drive circuit substrate 800 are transmitted to the liquid ejection module 20.

[0200] The integrated circuit 101, the reference voltage output circuit 53, and the plurality of drive circuits 52 are located between the connection parts CN1 and CN2 in the wiring substrate 810. Specifically, the integrated circuit 101 is located on the -X2 side of the connection part CN1, the reference voltage output circuit 53 is located on the -X2 side of the integrated circuit 101, and the plurality of drive circuits 52 are arranged and positioned along the X2 direction on the -X2 side of the reference voltage output circuit 53. That is, the drive circuits 52a1 to 52a6, 52b1 to 52b6, 52c1 to 52c6 and the reference voltage output circuit 53 as the plurality of drive circuits 52 are provided on the wiring substrate 810. Thus, the structure including the integrated circuit 101, the reference voltage output circuit 53, and the plurality of drive circuits 52 provided on the wiring substrate 810 generates signals including the drive signals COMA, COMB, COMC, the reference voltage signal VBS, and the data signal DATA based on the image information signal IP input from the connection part CN1, and outputs them to the liquid ejection module 20.

[0201] Here, in addition to the plurality of drive circuits 52, the reference voltage output circuit 53, the integrated circuit 101, and the connection parts CN1 and CN2, a plurality of electronic components may also be provided on the wiring substrate 810. It should be noted that the details of the drive circuit substrate 800 including the wiring substrate 810 will be described later.

[0202] The heat sink 710 is located at the +Z2 side of the driving circuit substrate 800 and is mounted on the wiring substrate 810 by a plurality of screws 780. The heat sink 710 includes a bottom 711, side portions 712 and 713, protrusions 715, 716, and 717, and a plurality of fin portions 718.

[0203] The bottom 711 is located at a position opposite to the wiring substrate 810 and is a roughly rectangular shape extending in a plane formed by the X2 direction and the Y2 direction. The side portion 712 protrudes from the end of the -Y2 side of the bottom 711 toward the -Z2 side and extends along the X2 direction. At least a portion of the end of the -Z2 side of the side portion 712 contacts the end of the -Y2 side of the wiring substrate 810. The side portion 713 protrudes from the end of the +Y2 side of the bottom 711 toward the -Z2 side and extends along the X2 direction. At least a portion of the end of the -Z2 side of the side portion 713 contacts the end of the +Y2 side of the wiring substrate 810. That is, the heat sink 710 forms a storage space opened on the -Z2 side through the bottom 711 and the side portions 712 and 713. Thus, a plurality of drive circuits 52 possessed by the drive circuit substrate 800 are accommodated in the storage space formed by the heat sink 710. In other words, the heat sink 710 is mounted on the wiring substrate 810 and is provided to cover the plurality of drive circuits 52 .

[0204] The protrusions 715, 716, and 717 are provided inside the accommodation space formed by the bottom 711 and the side portions 712 and 713, corresponding to the inductor L1, the transistors M1 and M2, and the integrated circuit 500 of each of the plurality of driving circuits 52 provided on the wiring substrate 810. Specifically, the protrusion 715 is positioned corresponding to the inductor L1 provided on the wiring substrate 810, protrudes from the bottom 711 toward the -Z2 side, and extends along the X2 direction. The protrusion 716 is positioned corresponding to the transistors M1 and M2 provided on the wiring substrate 810, protrudes from the bottom 711 toward the -Z2 side, and extends along the X2 direction. The protrusion 717 is positioned corresponding to the integrated circuit 500 provided on the wiring substrate 810, protrudes from the bottom 711 toward the -Z2 side, and extends along the X2 direction.

[0205] The plurality of fins 718 protrude from the bottom 711 toward the -Z2 side, extend in the X2 direction, and are located at positions separated from each other in the Y2 direction. The heat sink 710 has a plurality of fins 718, so that the surface area of ​​the heat sink 710 increases, and as a result, the heat dissipation performance of the heat sink 710 is improved. The number of the fins 718 is set based on an optimal interval determined according to the amount of heat released by the heat sink 710, the length of the fins 718 in the Z2 direction, the airflow applied to the fins 718, and the like.

[0206] The heat sink 710 configured as described above is mounted on the wiring substrate 810 of the driving circuit substrate 800 to release the heat generated by the plurality of driving circuits 52 provided on the wiring substrate 810. Furthermore, the heat sink 710 is mounted so as to cover the plurality of driving circuits 52 provided on the wiring substrate 810, thereby functioning as a protective component for protecting the plurality of driving circuits 52 provided on the wiring substrate 810 from impacts and the like. Therefore, the heat sink 710 is preferably composed of a material having high thermal conductivity for releasing the heat generated by the driving circuits 52 and having sufficient rigidity for protecting the driving circuits 52, such as metal such as aluminum, iron, and copper.

[0207] The heat-conducting component group 720 is located between the driving circuit substrate 800 and the radiator 710. By mounting the radiator 710 on the wiring substrate 810, the heat-conducting component group 720 contacts both the plurality of driving circuits 52 and the radiator 710 provided on the wiring substrate 810. Thus, the heat-conducting component group 720 improves the contact efficiency with the plurality of driving circuits 52 and the radiator 710, and improves the conduction efficiency of the heat conducted from the driving circuit substrate 800 to the radiator 710. As such a heat-conducting component group 720, it is preferred that a material having elasticity, flame retardancy, and electrical insulation in addition to thermal conductivity be used. For example, a gel sheet or a rubber sheet having high thermal conductivity including silicone or acrylic resin can be used. Thus, the heat-conducting component group 720 functions as a conduction component that conducts the heat generated by the driving circuit substrate 800 to the radiator 710. Furthermore, since the heat conductive component group 720 is composed of a gel sheet and a rubber sheet, the heat conductive component group 720 functions as an insulating component for ensuring electrical insulation performance between the driving circuit substrate 800 and the heat sink 710, and also functions as a buffer component for alleviating stress that may be generated when the heat sink 710 is installed on the driving circuit substrate 800.

[0208] Specifically, the heat-conducting component group 720 includes heat-conducting components 730, 740, 750, and 760. The heat-conducting component 730 is located between the inductor L1 of each of the plurality of driving circuits 52 and the protrusion 715 of the heat sink 710, and contacts both the inductor L1 and the protrusion 715 of each of the plurality of driving circuits 52 by mounting the heat sink 710 on the driving circuit substrate 800. Thus, the heat-conducting component 730 improves the efficiency of conducting the heat generated by the inductor L1 to the heat sink 710. The heat-conducting component 740 is located between the transistor M1 of each of the plurality of driving circuits 52 and the protrusion 716 of the heat sink 710, and contacts both the transistor M1 and the protrusion 716 of the heat sink 710 by mounting the heat sink 710 on the driving circuit substrate 800. Thus, the heat-conducting component 740 improves the efficiency of conducting the heat generated by the transistor M1 to the heat sink 710. The heat-conducting member 750 is located between the transistor M2 of each of the plurality of driving circuits 52 and the protrusion 716 of the heat sink 710, and contacts both the transistor M2 of each of the plurality of driving circuits 52 and the protrusion 716 by mounting the heat sink 710 on the driving circuit substrate 800. Thus, the heat-conducting member 750 improves the efficiency of conducting the heat generated by the transistor M2 to the heat sink 710. The heat-conducting member 760 is located between the integrated circuit 500 of each of the plurality of driving circuits 52 and the protrusion 717 of the heat sink 710, and contacts both the integrated circuit 500 of each of the plurality of driving circuits 52 and the protrusion 717 by mounting the heat sink 710 on the driving circuit substrate 800. Thus, the heat-conducting member 760 improves the efficiency of conducting the heat generated by the integrated circuit 500 to the heat sink 710.

[0209] Each of the plurality of screws 780 is inserted from the -Z2 side toward the +Z2 side through each of the plurality of through holes 820 included in the wiring substrate 810 of the drive circuit substrate 800. Thus, the plurality of screws 780 are respectively fastened to the heat sink 710. Thus, the heat sink 710 is mounted on the wiring substrate 810 of the drive circuit substrate 800.

[0210] The cooling fan 770 is located on the -Z2 side of the radiator 710. The cooling fan 770 introduces external air into the interior of the head driving module 10 through an opening portion 714 provided at the upper portion of the +X2 side of the radiator 710. Specifically, the radiator 710 has an opening portion 714 that penetrates the exterior of the radiator 710 and the storage space formed by the radiator 710. The cooling fan 770 is mounted on the radiator 710 in a manner covering the opening portion 714. Therefore, when the cooling fan 770 is operated, external air is introduced into the interior of the storage space formed by the radiator 710 through the opening portion 714. As a result, the circulation efficiency of the air floating inside the storage space formed by the radiator 710 is improved, and the efficiency of releasing the heat generated by the drive circuit 52 contained in the storage space is further improved.

[0211] Here, the cooling fan 770 only needs to be installed in a manner that improves the circulation efficiency of the air floating inside the storage space formed by the radiator 710. Therefore, the opening 714 for installing the cooling fan 770 only needs to be located on any side of the storage space formed by the radiator 710. In addition, the cooling fan 770 operates in a manner that introduces external air into the storage space formed by the radiator 710, which is not limited to the cooling fan 770 operating in a manner that takes in external air into the storage space, but also includes the case where the cooling fan 770 operates in a manner that discharges the air floating inside the storage space.

[0212] The image information signal IP output by the control unit 2 is input to the head driving module 10 configured as above through the connection part CN2. Then, the integrated circuit 101 of the head driving module 10 generates and outputs the basic driving signals dA1 to dA6, dB1 to dB6, dC1 to dC6 and the data signal DATA based on the input image information signal IP, and the reference voltage output circuit 53 generates and outputs the reference voltage signal VBS. The basic driving signals dA1 to dA6, dB1 to dB6, dC1 to dC6 are transmitted in the wiring substrate 810 and input to the corresponding driving circuits 52a1 to 52a6, 52b1 to 52b6, 52c1 to 52c6. The driving circuits 52a1-52a6, 52b1-52b6, 52c1-52c6 generate and output driving signals COMA1-COMA6, COMB1-COMB6, COMC1-COMC6 corresponding to the corresponding input basic driving signals dA1-dA6, dB1-dB6, dC1-dC6, respectively. Then, the data signal DATA output by the integrated circuit 101, the driving signals COMA1-COMA6, COMB1-COMB6, COMC1-COMC6 output by the driving circuits 52a1-52a6, 52b1-52b6, 52c1-52c6, and the reference voltage signal VBS output by the reference voltage output circuit 53 are transmitted in the wiring substrate 810 and output to the liquid ejection module 20 via the connection part CN2.

[0213] 1.6 Structure of the drive circuit substrate

[0214] As described above, in the liquid ejection device 1 of the first embodiment, the piezoelectric elements 60 included in the ejection modules 23-1 to 23-6 of the liquid ejection module 20 are driven according to the potential difference between the drive signals COMA1 to COMA6, COMB1 to COMB6, COMC1 to COMC6 output by the head drive module 10 and the reference voltage signal VBS. Then, the ejection modules 23-1 to 23-6 eject the ink in an amount corresponding to the drive amount of the piezoelectric element 60 from the corresponding nozzles N, respectively. Therefore, in order to improve the ejection accuracy of the ink ejected by the liquid ejection module 20, in addition to improving the waveform accuracy of the drive signals COMA1 to COMA6, COMB1 to COMB6, COMC1 to COMC6 that drive the piezoelectric element 60, the stability of the potential of the reference voltage signal VBS that is the reference potential for driving the piezoelectric element 60 is also required.

[0215] Therefore, a more specific example of the structure of a driving circuit substrate 800 that generates driving signals COMA1 to COMA6, COMB1 to COMB6, COMC1 to COMC6 and a reference voltage signal VBS and outputs them to the liquid ejection module 20 from the perspective of improving the waveform accuracy of the driving signals COMA1 to COMA6, COMB1 to COMB6, COMC1 to COMC6 that drive the piezoelectric element 60 and improving the stability of the potential of the reference voltage signal VBS is described.

[0216] Fig.13 800 is a diagram showing an example of the electrical connection relationship of the drive circuit substrate 800. Fig.13 In the figure, the integrated circuit 101 and the wiring for transmitting the data signal DATA output by the integrated circuit 101, which have little influence on the waveform accuracy of the drive signals COMA, COMB, COMC and the reference voltage signal VBS, are omitted. On the other hand, the voltage VHV input to the drive circuits 52a1 to 52a6, 52b1 to 52b6, 52c1 to 52c6, respectively, greatly influences the waveform accuracy of the drive signals COMA1 to COMA6, COMB1 to COMB6, COMC1 to COMC6 output by the drive circuits 52a1 to 52a6, 52b1 to 52b6, 52c1 to 52c6, respectively. Therefore, in Fig.13 FIG. 5 shows the voltage VHV input to the plurality of drive circuits 52 and the transmission path of the transmission voltage VHV. Fig.13 , the voltage VHV is shown as being supplied from a power supply circuit (not shown) configured outside the driving circuit substrate 800 , but the power supply circuit that generates the voltage VHV may be provided on the driving circuit substrate 800 .

[0217] The drive circuit substrate 800 has the drive circuits 52a1 to 52a6, 52b1 to 52b6, 52c1 to 52c6, the reference voltage output circuit 53, and the connection parts CN1 and CN2 as described above, and includes capacitors C6-1 to C6-6, C8-1 to C8-6, C9a1 to C9a6, C9b1 to C9b6, and C9c1 to C9c6. In addition, the drive circuit substrate 800 has a wiring substrate 810 including wirings WA1 to WA6 for transmitting drive signals COMA1 to COMA6, respectively, wirings WB1 to WB6 for transmitting drive signals COMB1 to COMB6, respectively, wirings WC1 to WC6 for transmitting drive signals COMC1 to COMC6, respectively, wirings WSc, WS1 to WS6 for transmitting reference voltage signals VBS, and wirings WHc, WH1 to WH6 for transmitting voltage VHV.

[0218] The voltage VHV is input to the driving circuit substrate 800 via the connection portion CN1 , and then the voltage VHV is transmitted through the wiring WHc provided on the wiring substrate 810 .

[0219] The wiring WH1 is electrically connected to the wiring WHc via the contact Cha1. In addition, the wiring WH1 is also electrically connected to the drive circuits 52a1, 52b1, and 52c1. Thus, the voltage VHV transmitted in the wiring WHc is input to each of the drive circuits 52a1, 52b1, and 52c1 via the contact Cha1 and the wiring WH1. The drive circuits 52a1, 52b1, and 52c1 amplify and demodulate the modulation signal Ms based on the input voltage VHV, thereby generating and outputting the drive signals COMA1, COMB1, and COMC1. At this time, the drive signal COMA1 output by the drive circuit 52a1 is transmitted in the wiring WA1 included in the wiring substrate 810, and is input to the ejection module 23-1 via the connection part CN2; the drive signal COMB1 output by the drive circuit 52b1 is transmitted in the wiring WB1 included in the wiring substrate 810, and is input to the ejection module 23-1 of the liquid ejection module 20 via the connection part CN2; the drive signal COMC1 output by the drive circuit 52c1 is transmitted in the wiring WC1 included in the wiring substrate 810, and is input to the ejection module 23-1 of the liquid ejection module 20 via the connection part CN2.

[0220] In addition, a capacitor C6-1 is electrically connected to the wiring WH1. Specifically, one end of the capacitor C6-1 is electrically connected to the wiring WH1 via the contact Chb1, and the other end is supplied with the ground potential GND2. Here, the ground potential GND2 is a reference potential for the operation of the drive circuit substrate 800, and may be the same potential as the above-mentioned ground potential GND1. That is, in the drive circuit substrate 800, the capacitor C6-1 is electrically connected in parallel with the above-mentioned capacitor C7 of each of the drive circuits 52a1, 52b1, and 52c1.

[0221] The capacitor C6-1 and the capacitor C7 of each of the drive circuits 52a1, 52b1, 52c1 reduce voltage fluctuations that may occur in the voltage VHV supplied to the drive circuits 52a1, 52b1, 52c1, and reduce the possibility of noise being superimposed on the voltage VHV supplied to the drive circuits 52a1, 52b1, 52c1. Therefore, it is preferable that the capacitor has a large electrostatic capacitance that can reduce the voltage fluctuations and is located near the drive circuits 52a1, 52b1, 52c1 from the perspective of reducing noise.

[0222] In the liquid ejection device 1 of the first embodiment, a capacitor C6-1 and a capacitor C7 included in each of the drive circuits 52a1, 52b1, and 52c1 are provided on a supply path for supplying the voltage VHV to each of the drive circuits 52a1, 52b1, and 52c1. Thus, the capacitor C6-1 reduces the possibility of voltage fluctuations occurring in the voltage VHV supplied to the drive circuits 52a1, 52b1, and 52c1, respectively, and the capacitor C7 included in each of the drive circuits 52a1, 52b1, and 52c1 reduces the possibility of noise being superimposed on the voltage VHV supplied to the corresponding drive circuits 52a1, 52b1, and 52c1. As such capacitor C6-1, an electrolytic capacitor that can obtain a large electrostatic capacitance can be used, and as capacitor C7 provided in each of drive circuits 52a1, 52b1, 52c1, a chip ceramic capacitor can be used. This chip ceramic capacitor is a chip capacitor that is not easily affected by the heat generated by drive circuits 52a1, 52b1, 52c1 and can be mounted in a space-saving manner. As a result, the accuracy of voltage VHV supplied to each of drive circuits 52a1, 52b1, 52c1 is improved.

[0223] Similarly, the wirings WH2 to WH5 are electrically connected to the wiring WHc through the contacts Cha2 to Cha6. In addition, the wiring WH2 is also electrically connected to the drive circuits 52a2, 52b2, and 52c2, the wiring WH3 is also electrically connected to the drive circuits 52a3, 52b3, and 52c3, the wiring WH4 is also electrically connected to the drive circuits 52a4, 52b4, and 52c4, the wiring WH5 is also electrically connected to the drive circuits 52a5, 52b5, and 52c5, and the wiring WH6 is also electrically connected to the drive circuits 52a6, 52b6, and 52c6. Thus, the voltage VHV transmitted in the wiring WHc is input to each drive circuit 52a2, 52b2, 52c2, each drive circuit 52a3, 52b3, 52c3, each drive circuit 52a4, 52b4, 52c4, each drive circuit 52a5, 52b5, 52c5 and each drive circuit 52a6, 52b6, 52c6.

[0224] The drive circuits 52a2 to 52a6, 52b2 to 52b6, and 52c2 to 52c6 each amplify and demodulate the modulation signal Ms based on the input voltage VHV, thereby generating and outputting drive signals COMA2 to COMA6, COMB2 to COMB6, and COMC2 to COMC6. At this time, the drive signals COMA2, COMB2, COMC2 outputted by the drive circuits 52a2, 52b2, 52c2 are transmitted in the wirings WA2, WB2, WC2 included in the wiring substrate 810, and are input to the ejection module 23-2 via the connection portion CN2. The drive signals COMA3, COMB3, COMC3 outputted by the drive circuits 52a3, 52b3, 52c3 are transmitted in the wirings WA3, WB3, WC3 included in the wiring substrate 810, and are input to the ejection module 23-3 via the connection portion CN2. The drive signals COMA4, COMB4, COMC4 outputted by the drive circuits 52a4, 52b4, 52c4 are transmitted in the wirings WA3, WB3, WC3 included in the wiring substrate 810, and are input to the ejection module 23-3 via the connection portion CN2. The driving signals COMA5, COMB5, COMC5 outputted by the driving circuits 52a5, 52b5, 52c5 are respectively transmitted in the wirings WA4, WB4, WC4 included in the wiring substrate 810, and are inputted to the ejection module 23-4 via the connection part CN2. The driving signals COMA6, COMB6, COMC6 outputted by the driving circuits 52a6, 52b6, 52c6 are respectively transmitted in the wirings WA6, WB6, WC6 included in the wiring substrate 810, and are inputted to the ejection module 23-6 via the connection part CN2.

[0225] In addition, a capacitor C6-2 is electrically connected to the wiring WH2. Specifically, one end of the capacitor C6-2 is electrically connected to the wiring WH2 via the contact Chb2, and the other end is supplied with the ground potential GND2. That is, in the drive circuit substrate 800, the capacitor C6-2 is electrically connected in parallel with the capacitor C7 of each of the drive circuits 52a2, 52b2, and 52c2. In this case, as the capacitor C6-2, an electrolytic capacitor that can obtain a large electrostatic capacitance is used, thereby reducing the possibility of voltage fluctuations in the voltage VHV respectively input to the drive circuits 52a2, 52b2, and 52c2. By arranging the capacitor C7 possessed by the drive circuits 52a2, 52b2, and 52c2 respectively in the vicinity of the corresponding drive circuits 52a2, 52b2, and 52c2, and making it a chip ceramic capacitor as a chip capacitor that is not easily affected by the heat generated by the drive circuits 52a2, 52b2, and can be installed in a space-saving manner, the accuracy of the voltage VHV respectively supplied to the drive circuits 52a2, 52b2, and 52c2 is improved.

[0226] In addition, a capacitor C6-3 is electrically connected to the wiring WH3. Specifically, one end of the capacitor C6-3 is electrically connected to the wiring WH3 via the contact Chb3, and the other end is supplied with the ground potential GND2. That is, in the drive circuit substrate 800, the capacitor C6-3 is electrically connected in parallel with the capacitor C7 included in each of the above-mentioned drive circuits 52a3, 52b3, and 52c3. In this case, as the capacitor C6-3, an electrolytic capacitor that can obtain a large electrostatic capacitance is used, thereby reducing the possibility of voltage fluctuations in the voltage VHV respectively input to the drive circuits 52a3, 52b3, and 52c3. By arranging the capacitor C7 possessed by the drive circuits 52a3, 52b3, and 52c3 respectively in the vicinity of the corresponding drive circuits 52a3, 52b3, and 52c3, and making it a chip ceramic capacitor as a chip capacitor that is not easily affected by the heat generated by the drive circuits 52a3, 52b3, and 52c3 and can be installed in a space-saving manner, the accuracy of the voltage VHV respectively supplied to the drive circuits 52a3, 52b3, and 52c3 is improved.

[0227] In addition, a capacitor C6-4 is electrically connected to the wiring WH4. Specifically, one end of the capacitor C6-4 is electrically connected to the wiring WH4 via the contact Chb4, and the other end is supplied with the ground potential GND2. That is, in the drive circuit substrate 800, the capacitor C6-4 is electrically connected in parallel with the capacitor C7 included in each of the above-mentioned drive circuits 52a4, 52b4, and 52c4. In this case, as the capacitor C6-4, an electrolytic capacitor that can obtain a large electrostatic capacitance is used, thereby reducing the possibility of voltage fluctuations in the voltage VHV respectively input to the drive circuits 52a4, 52b4, and 52c4. By arranging the capacitor C7 possessed by the drive circuits 52a4, 52b4, and 52c4 respectively in the vicinity of the corresponding drive circuits 52a4, 52b4, and 52c4, and making it a chip ceramic capacitor as a chip capacitor that is not easily affected by the heat generated by the drive circuits 52a4, 52b4, and 52c4 and can be installed in a space-saving manner, the accuracy of the voltage VHV respectively supplied to the drive circuits 52a4, 52b4, and 52c4 is improved.

[0228] In addition, a capacitor C6-5 is electrically connected to the wiring WH5. Specifically, one end of the capacitor C6-5 is electrically connected to the wiring WH5 via the contact Chb5, and the other end is supplied with the ground potential GND2. That is, in the drive circuit substrate 800, the capacitor C6-5 is electrically connected in parallel with the capacitor C7 included in each of the above-mentioned drive circuits 52a5, 52b5, and 52c5. In this case, as the capacitor C6-5, an electrolytic capacitor that can obtain a large electrostatic capacitance is used, thereby reducing the possibility of voltage fluctuations in the voltage VHV respectively input to the drive circuits 52a5, 52b5, and 52c5. By arranging the capacitor C7 possessed by the drive circuits 52a5, 52b5, and 52c5 respectively in the vicinity of the corresponding drive circuits 52a5, 52b5, and 52c5, and making it a chip ceramic capacitor that is not easily affected by the heat generated by the drive circuits 52a5, 52b5, and 52c5 and can be installed in a space-saving manner, the accuracy of the voltage VHV respectively supplied to the drive circuits 52a5, 52b5, and 52c5 is improved.

[0229] In addition, a capacitor C6-6 is electrically connected to the wiring WH6. Specifically, one end of the capacitor C6-6 is electrically connected to the wiring WH6 via the contact Chb6, and the other end is supplied with the ground potential GND2. That is, in the drive circuit substrate 800, the capacitor C6-6 is electrically connected in parallel with the capacitor C7 included in each of the above-mentioned drive circuits 52a6, 52b6, and 52c6. In this case, as the capacitor C6-6, an electrolytic capacitor that can obtain a large electrostatic capacitance is used, thereby reducing the possibility of voltage fluctuations in the voltage VHV respectively input to the drive circuits 52a6, 52b6, and 52c6. By arranging the capacitor C7 possessed by the drive circuits 52a6, 52b6, and 52c6 respectively in the vicinity of the corresponding drive circuits 52a6, 52b6, and 52c6, and making it a chip ceramic capacitor as a chip capacitor that is not easily affected by the heat generated by the drive circuits 52a6, 52b6, and 52c6 and can be installed in a space-saving manner, the accuracy of the voltage VHV respectively supplied to the drive circuits 52a6, 52b6, and 52c6 is improved.

[0230] The reference voltage output circuit 53 generates and outputs a reference voltage signal VBS having a predetermined voltage value by stepping down or stepping up the voltage VHV or a voltage signal (not shown). The reference voltage signal VBS output by the reference voltage output circuit 53 is transmitted through the wiring WSc provided on the wiring substrate 810 .

[0231] The wiring WS1 is electrically connected to the wiring WSc via the contact Csa1. In addition, the wiring WH1 is electrically connected to the ejection module 23-1 via the connection portion CN2. Thus, the reference voltage signal VBS is input to the ejection module 23-1. That is, the wiring WH1 is electrically connected to the contact Csa1 and the electrode 603 of the piezoelectric element 60 of the ejection module 23-1. Thus, the reference voltage signal VBS output by the reference voltage output circuit 53 is transmitted in the wiring WS1 via the contact Csa1, and is supplied to the electrodes 603 of the plurality of piezoelectric elements 60 of the ejection module 23-1.

[0232] Similarly, the wirings WS2 to WS6 are electrically connected to the wiring WSc through each of the contacts Csa2 to Csa6. In addition, the wiring WH2 is electrically connected to the ejection module 23-2 via the connection part CN2, the wiring WH3 is electrically connected to the ejection module 23-3 via the connection part CN2, the wiring WH4 is electrically connected to the ejection module 23-4 via the connection part CN2, the wiring WH5 is electrically connected to the ejection module 23-5 via the connection part CN2, and the wiring WH6 is electrically connected to the ejection module 23-6 via the connection part CN2. That is, the wiring WH2 is electrically connected to the contact Csa2 and the electrode 603 of the piezoelectric element 60 of the ejection module 23-2, the wiring WH3 is electrically connected to the contact Csa3 and the electrode 603 of the piezoelectric element 60 of the ejection module 23-3, the wiring WH4 is electrically connected to the contact Csa4 and the electrode 603 of the piezoelectric element 60 of the ejection module 23-4, the wiring WH5 is electrically connected to the contact Csa5 and the electrode 603 of the piezoelectric element 60 of the ejection module 23-5, and the wiring WH6 is electrically connected to the contact Csa6 and the electrode 603 of the piezoelectric element 60 of the ejection module 23-6.

[0233] Thus, the reference voltage signal VBS output by the reference voltage output circuit 53 is transmitted in the wiring WS2 via the contact Csa2 and supplied to the electrodes 603 of the multiple piezoelectric elements 60 of the ejection module 23-2, is transmitted in the wiring WS3 via the contact Csa3 and supplied to the electrodes 603 of the multiple piezoelectric elements 60 of the ejection module 23-3, is transmitted in the wiring WS4 via the contact Csa4 and supplied to the electrodes 603 of the multiple piezoelectric elements 60 of the ejection module 23-4, is transmitted in the wiring WS5 via the contact Csa5 and supplied to the electrodes 603 of the multiple piezoelectric elements 60 of the ejection module 23-5, and is transmitted in the wiring WS6 via the contact Csa6 and supplied to the electrodes 603 of the multiple piezoelectric elements 60 of the ejection module 23-6.

[0234] That is, the electrodes 603 of the piezoelectric elements 60 of the ejection modules 23-1 to 23-6 are electrically connected to each other via the wirings WSc and WH1 to WH6. Thus, the reference voltage signal VBS is transmitted in the wirings WSc and WH1 to WH6, and is supplied to the electrodes 603 of the piezoelectric elements 60 of the ejection modules 23-1 to 23-6. In other words, the reference voltage signal VBS is transmitted in the transmission path formed by the wirings WH1 to WH6 and the wiring WSc, and the transmission path is electrically connected to the electrodes 603 of the piezoelectric elements 60 of the ejection modules 23-1 to 23-6, thereby supplying the reference voltage signal VBS to the electrodes 603 of the piezoelectric elements 60 of the ejection modules 23-1 to 23-6.

[0235] The capacitor C8-1 is provided between the transmission path for supplying the reference voltage signal VBS to the electrode 603 of the piezoelectric element 60 of the ejection module 23-1 and the ground potential GND2, and one end is electrically connected to the transmission path for supplying the reference voltage signal VBS to the electrode 603 of the piezoelectric element 60 through the contact Csb1, and the other end is supplied with the ground potential GND2. That is, the capacitor C8-1 is electrically connected to the transmission path for transmitting the reference voltage signal VBS through the contact Csb1 provided on the transmission path for transmitting the reference voltage signal VBS. In this case, the contact Csb1 electrically connected to the capacitor C8-1 is located between the electrode 603 of the piezoelectric element 60 of the ejection module 23-1 and the contact Csa1 in the transmission path for transmitting the reference voltage signal VBS. In other words, the contact Csb1 is located on the wiring WS1 that electrically connects the contact Csa1 to the electrode 603 of the piezoelectric element 60 of the ejection module 23-1 in the transmission path for transmitting the reference voltage signal VBS.

[0236] The capacitor C8-2 is provided between the transmission path for supplying the reference voltage signal VBS to the electrode 603 of the piezoelectric element 60 of the ejection module 23-2 and the ground potential GND2, and one end is electrically connected to the transmission path for supplying the reference voltage signal VBS to the electrode 603 of the piezoelectric element 60 through the contact Csb2, and the other end is supplied with the ground potential GND2. That is, the capacitor C8-2 is electrically connected to the transmission path for transmitting the reference voltage signal VBS through the contact Csb2 provided on the transmission path for transmitting the reference voltage signal VBS. In this case, the contact Csb2 electrically connected to the capacitor C8-2 is located between the electrode 603 of the piezoelectric element 60 of the ejection module 23-2 and the contact Csa2 in the transmission path for transmitting the reference voltage signal VBS. In other words, the contact Csb2 is located on the wiring WS2 that electrically connects the contact Csa2 to the electrode 603 of the piezoelectric element 60 of the ejection module 23-2 in the transmission path for transmitting the reference voltage signal VBS.

[0237] The capacitor C8-3 is provided between the transmission path for supplying the reference voltage signal VBS to the electrode 603 of the piezoelectric element 60 of the ejection module 23-3 and the ground potential GND2, and one end is electrically connected to the transmission path for supplying the reference voltage signal VBS to the electrode 603 of the piezoelectric element 60 through the contact Csb3, and the other end is supplied with the ground potential GND2. That is, the capacitor C8-3 is electrically connected to the transmission path for transmitting the reference voltage signal VBS through the contact Csb3 provided on the transmission path for transmitting the reference voltage signal VBS. In this case, the contact Csb3 electrically connected to the capacitor C8-3 is located between the electrode 603 of the piezoelectric element 60 of the ejection module 23-3 and the contact Csa3 in the transmission path for transmitting the reference voltage signal VBS. In other words, the contact Csb3 is located on the wiring WS3 that electrically connects the contact Csa3 to the electrode 603 of the piezoelectric element 60 of the ejection module 23-3 in the transmission path for transmitting the reference voltage signal VBS.

[0238] The capacitor C8-4 is provided between the transmission path for supplying the reference voltage signal VBS to the electrode 603 of the piezoelectric element 60 of the ejection module 23-4 and the ground potential GND2, and one end is electrically connected to the transmission path for supplying the reference voltage signal VBS to the electrode 603 of the piezoelectric element 60 through the contact Csb4, and the other end is supplied with the ground potential GND2. That is, the capacitor C8-4 is electrically connected to the transmission path for transmitting the reference voltage signal VBS through the contact Csb4 provided on the transmission path for transmitting the reference voltage signal VBS. In this case, the contact Csb4 electrically connected to the capacitor C8-4 is located between the electrode 603 of the piezoelectric element 60 of the ejection module 23-4 and the contact Csa4 in the transmission path for transmitting the reference voltage signal VBS. In other words, the contact Csb4 is located on the wiring WS4 that electrically connects the contact Csa4 to the electrode 603 of the piezoelectric element 60 of the ejection module 23-4 in the transmission path for transmitting the reference voltage signal VBS.

[0239] The capacitor C8-5 is provided between the transmission path for supplying the reference voltage signal VBS to the electrode 603 of the piezoelectric element 60 of the ejection module 23-5 and the ground potential GND2, and one end is electrically connected to the transmission path for supplying the reference voltage signal VBS to the electrode 603 of the piezoelectric element 60 through the contact Csb5, and the other end is supplied with the ground potential GND2. That is, the capacitor C8-5 is electrically connected to the transmission path for transmitting the reference voltage signal VBS through the contact Csb5 provided on the transmission path for transmitting the reference voltage signal VBS. In this case, the contact Csb5 electrically connected to the capacitor C8-5 is located between the electrode 603 of the piezoelectric element 60 of the ejection module 23-5 and the contact Csa5 in the transmission path for transmitting the reference voltage signal VBS. In other words, the contact Csb5 is located on the wiring WS5 that electrically connects the contact Csa5 to the electrode 603 of the piezoelectric element 60 of the ejection module 23-5 in the transmission path for transmitting the reference voltage signal VBS.

[0240] The capacitor C8-6 is provided between the transmission path for supplying the reference voltage signal VBS to the electrode 603 of the piezoelectric element 60 of the ejection module 23-6 and the ground potential GND2, and one end is electrically connected to the transmission path for supplying the reference voltage signal VBS to the electrode 603 of the piezoelectric element 60 through the contact Csb6, and the other end is supplied with the ground potential GND2. That is, the capacitor C8-6 is electrically connected to the transmission path for transmitting the reference voltage signal VBS through the contact Csb6 provided on the transmission path for transmitting the reference voltage signal VBS. In this case, the contact Csb6 electrically connected to the capacitor C8-6 is located between the electrode 603 of the piezoelectric element 60 of the ejection module 23-6 and the contact Csa6 in the transmission path for transmitting the reference voltage signal VBS. In other words, the contact Csb6 is located on the wiring WS6 that electrically connects the contact Csa6 to the electrode 603 of the piezoelectric element 60 of the ejection module 23-6 in the transmission path for transmitting the reference voltage signal VBS.

[0241] One end of the capacitors C9a1, C9b1, and C9c1 is electrically connected to the wiring WS1, and the other end is supplied with the ground potential GND1. In addition, the ground potential GND1 is also supplied to the drive circuits 52a1, 52b1, and 52c1, respectively. Therefore, the capacitor C9a1 is provided corresponding to the drive circuit 52a1, the capacitor C9b1 is provided corresponding to the drive circuit 52b1, and the capacitor C9c1 is provided corresponding to the drive circuit 52c1. Here, "correspondingly provided" includes that the capacitor C9a1 is located near the drive circuit 52a1 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52a1, that the capacitor C9b1 is located near the drive circuit 52b1 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52b1, and that the capacitor C9c1 is located near the drive circuit 52c1 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52c1.

[0242] One end of the capacitors C9a2, C9b2, and C9c2 is electrically connected to the wiring WS2, and the other end is supplied with the ground potential GND1. In addition, the ground potential GND1 is also supplied to the drive circuits 52a2, 52b2, and 52c2, respectively. Thus, the capacitor C9a2 is provided corresponding to the drive circuit 52a2, the capacitor C9b2 is provided corresponding to the drive circuit 52b2, and the capacitor C9c2 is provided corresponding to the drive circuit 52c2. Here, "correspondingly provided" includes that the capacitor C9a2 is located near the drive circuit 52a2 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52a2, that the capacitor C9b2 is located near the drive circuit 52b2 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52b2, and that the capacitor C9c2 is located near the drive circuit 52c2 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52c2.

[0243] One end of the capacitors C9a3, C9b3, and C9c3 is electrically connected to the wiring WS3, and the other end is supplied with the ground potential GND1. In addition, the ground potential GND1 is also supplied to the drive circuits 52a3, 52b3, and 52c3, respectively. Thus, the capacitor C9a3 is provided corresponding to the drive circuit 52a3, the capacitor C9b3 is provided corresponding to the drive circuit 52b3, and the capacitor C9c3 is provided corresponding to the drive circuit 52c3. Here, "correspondingly provided" includes that the capacitor C9a3 is located near the drive circuit 52a3 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52a3, that the capacitor C9b3 is located near the drive circuit 52b3 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52b3, and that the capacitor C9c3 is located near the drive circuit 52c3 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52c3.

[0244] One end of the capacitors C9a4, C9b4, and C9c4 is electrically connected to the wiring WS4, and the other end is supplied with the ground potential GND1. In addition, the ground potential GND1 is also supplied to the drive circuits 52a4, 52b4, and 52c4, respectively. Thus, the capacitor C9a4 is provided corresponding to the drive circuit 52a4, the capacitor C9b4 is provided corresponding to the drive circuit 52b4, and the capacitor C9c4 is provided corresponding to the drive circuit 52c4. Here, "provided correspondingly" includes that the capacitor C9a4 is located near the drive circuit 52a4 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52a4, that the capacitor C9b4 is located near the drive circuit 52b4 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52b4, and that the capacitor C9c4 is located near the drive circuit 52c4 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52c4.

[0245] One end of the capacitors C9a5, C9b5, and C9c5 is electrically connected to the wiring WS5, and the other end is supplied with the ground potential GND1. In addition, the ground potential GND1 is also supplied to the drive circuits 52a5, 52b5, and 52c5, respectively. Therefore, the capacitor C9a5 is provided corresponding to the drive circuit 52a5, the capacitor C9b5 is provided corresponding to the drive circuit 52b5, and the capacitor C9c5 is provided corresponding to the drive circuit 52c5. Here, "correspondingly provided" includes that the capacitor C9a5 is located near the drive circuit 52a5 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52a5, that the capacitor C9b5 is located near the drive circuit 52b5 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52b5, and that the capacitor C9c5 is located near the drive circuit 52c5 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52c5.

[0246] One end of the capacitors C9a6, C9b6, and C9c6 is electrically connected to the wiring WS6, and the other end is supplied with the ground potential GND1. In addition, the ground potential GND1 is also supplied to the drive circuits 52a6, 52b6, and 52c6, respectively. Thus, the capacitor C9a6 is provided corresponding to the drive circuit 52a6, the capacitor C9b6 is provided corresponding to the drive circuit 52b6, and the capacitor C9c6 is provided corresponding to the drive circuit 52c6. Here, "correspondingly provided" includes that the capacitor C9a6 is located near the drive circuit 52a6 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52a6, that the capacitor C9b6 is located near the drive circuit 52b6 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52b6, and that the capacitor C9c6 is located near the drive circuit 52c6 in the wiring substrate 810 and is connected to the same reference potential as the drive circuit 52c6.

[0247] As described above, in the liquid ejection device 1 of the first embodiment, the capacitor C8-1 provided on the transmission path for transmitting the reference voltage signal VBS to the ejection module 23-1 reduces the possibility of variation in the voltage value of the reference voltage signal VBS supplied to the ejection module 23-1, and even if the voltage value of the reference voltage signal VBS supplied to the ejection module 23-1 varies due to variation in the amount of current generated by the reference voltage signal VBS supplied to the ejection module 23-1 in accordance with the ink ejection operation of the ejection module 23-1, the possibility of variation in the voltage value of the reference voltage signal VBS input to the ejection modules 23-2 to 23-6 is reduced. That is, by providing the capacitor C8-1 on the wiring WS1 in the transmission path for transmitting the reference voltage signal VBS to the ejection module 23-1, the accuracy of the reference voltage signal VBS input to the ejection module 23-1 is improved.

[0248] In addition, the current generated by the driving signals COMA1, COMB1, and COMC1 supplied to the electrode 602 of the piezoelectric element 60 of the ejection module 23-1 is fed back to the driving circuits 52a1, 52b1, and 52c1 respectively via the wiring WS1 electrically connected to the electrode 603 of the piezoelectric element 60 of the ejection module 23-1 and the wiring pattern supplied with the ground potential GND1. In the liquid ejection device 1 of the first embodiment, capacitors C9a1, C9b1, and C9c1 are respectively arranged corresponding to drive circuits 52a1, 52b1, and 52c1 that supply drive signals COMA1, COMB1, and COMC1 to the ejection module 23-1, and one end is electrically connected to a transmission path that transmits a reference voltage signal VBS to the ejection module 23-1, and the other end is supplied with the same ground potential as the drive circuits 52a1, 52b1, and 52c1, respectively, thereby shortening the path through which the current flows in response to the drive signals COMA1, COMB1, and COMC1 supplied to the electrode 602 of the piezoelectric element 60 of the ejection module 23-1. Thus, the inductance component that may be generated by the current generated by the drive signals COMA1, COMB1, and COMC1 supplied to the electrode 602 of the piezoelectric element 60 of the ejection module 23-1 is reduced, and as a result, the waveform accuracy of the drive signals COMA1, COMB1, and COMC1 supplied to the electrode 602 of the piezoelectric element 60 of the ejection module 23-1 is improved, and the stability of the voltage value of the reference voltage signal VBS supplied to the electrode 603 of the piezoelectric element 60 of the ejection module 23-1 is also improved. That is, the capacitors C9a1, C9b1, and C9c1 are respectively provided corresponding to the drive circuits 52a1, 52b1, and 52c1 that supply the drive signals COMA1, COMB1, and COMC1 to the ejection module 23-1, thereby improving the accuracy of the drive signals COMA1, COMB1, and COMC1 and the reference voltage signal VBS input to the ejection module 23-1.

[0249] Similarly, by providing a capacitor C8-2 on the wiring WS2 in the transmission path for transmitting the reference voltage signal VBS to the ejection module 23-2, the accuracy of the reference voltage signal VBS input to the ejection module 23-2 is improved. In addition, by providing capacitors C9a2, C9b, and C9c2 corresponding to the drive circuits 52a2, 52b2, and 52c2 that supply the drive signals COMA2, COMB2, and COMC2 to the ejection module 23-2, the accuracy of the drive signals COMA2, COMB2, and COMC2 and the reference voltage signal VBS input to the ejection module 23-2 is improved.

[0250] Similarly, by providing a capacitor C8-3 on the wiring WS3 in the transmission path for transmitting the reference voltage signal VBS to the ejection module 23-3, the accuracy of the reference voltage signal VBS input to the ejection module 23-3 is improved. In addition, by providing capacitors C9a3, C9b3, and C9c3 corresponding to the drive circuits 52a3, 52b3, and 52c3 that supply the drive signals COMA3, COMB3, and COMC3 to the ejection module 23-3, the accuracy of the drive signals COMA3, COMB3, and COMC3 and the reference voltage signal VBS input to the ejection module 23-3 is improved.

[0251] Similarly, by providing a capacitor C8-4 on the wiring WS4 in the transmission path for transmitting the reference voltage signal VBS to the ejection module 23-4, the accuracy of the reference voltage signal VBS input to the ejection module 23-4 is improved. In addition, by providing capacitors C9a4, C9b4, and C9c4 corresponding to the drive circuits 52a4, 52b4, and 52c4 that supply the drive signals COMA4, COMB4, and COMC4 to the ejection module 23-4, the accuracy of the drive signals COMA4, COMB4, and COMC4 and the reference voltage signal VBS input to the ejection module 23-4 is improved.

[0252] Similarly, by providing a capacitor C8-5 on the wiring WS5 in the transmission path for transmitting the reference voltage signal VBS to the ejection module 23-5, the accuracy of the reference voltage signal VBS input to the ejection module 23-5 is improved. In addition, by providing capacitors C9a5, C9b5, and C9c5 corresponding to the drive circuits 52a5, 52b5, and 52c5 that supply the drive signals COMA5, COMB5, and COMC5 to the ejection module 23-5, the accuracy of the drive signals COMA5, COMB5, and COMC5 and the reference voltage signal VBS input to the ejection module 23-5 is improved.

[0253] Similarly, by providing a capacitor C8-6 on the wiring WS6 in the transmission path for transmitting the reference voltage signal VBS to the ejection module 23-6, the accuracy of the reference voltage signal VBS input to the ejection module 23-6 is improved. In addition, by providing capacitors C9a6, C9b6, and C9c6 corresponding to the drive circuits 52a6, 52b6, and 52c6 that supply the drive signals COMA6, COMB6, and COMC6 to the ejection module 23-6, the accuracy of the drive signals COMA6, COMB6, and COMC6 and the reference voltage signal VBS input to the ejection module 23-6 is improved.

[0254] As described above, the driving circuit substrate 800 comprises: a driving circuit 52a1, including a transistor M1, one end of which is supplied with a ground potential GND1, and capacitors C1 and C7, which output a driving signal COMA1 to drive the piezoelectric element 60 of the ejection module 23-1 of the liquid ejection module 20 to eject ink from the nozzle N of the ejection module 23-1 to the electrode 602 of the piezoelectric element 60; a driving circuit 52b1, including a transistor M1, one end of which is supplied with a ground potential GND1, and capacitors C1 and C7, which output a driving signal COMB1 to drive the piezoelectric element 60 of the ejection module 23-1 of the liquid ejection module 20 to eject ink from the nozzle N of the ejection module 23-1 to the piezoelectric element 60 The driving circuit 52c1 includes a transistor M1, capacitors C1 and C7, one end of which is supplied with a ground potential GND1, and outputs a driving signal COMC1 to the electrode 602 of the piezoelectric element 60 of the ejection module 23-1 of the liquid ejection module 20 so as not to eject ink from the nozzle N of the ejection module 23-1; capacitors C9a1, C9b1 and C9c1, one end of which is electrically connected to the electrode 603 of the piezoelectric element 60 of the ejection module 23-1, and the other end of which is supplied with a ground potential GND1; and a capacitor C8-1, one end of which is electrically connected to the electrode 603 of the piezoelectric element 60 of the ejection module 23-1, and the other end of which is supplied with a ground potential GND2.

[0255] Furthermore, the driving circuit substrate 800 comprises: a driving circuit 52a2, including a transistor M1, one end of which is supplied with a ground potential GND1, and capacitors C1 and C7, which output a driving signal COMA2 to the electrode 602 of the piezoelectric element 60 of the ejection module 23-2 of the liquid ejection module 20 to eject ink from the nozzle N of the ejection module 23-2; a driving circuit 52b2, including a transistor M1, one end of which is supplied with a ground potential GND1, and capacitors C1 and C7, which output a driving signal COMB2 to the piezoelectric element 60 of the ejection module 23-2 of the liquid ejection module 20 to eject ink from the nozzle N of the ejection module 23-2. The driving circuit 52c2 includes a transistor M1, capacitors C1 and C7, one end of which is supplied with a ground potential GND1, and outputs a driving signal COMC2 to the electrode 602 of the piezoelectric element 60 of the ejection module 23-2 of the liquid ejection module 20 so as not to eject ink from the nozzle N of the ejection module 23-2; capacitors C9a2, C9b, and C9c2, one end of which is electrically connected to the electrode 603 of the piezoelectric element 60 of the ejection module 23-2, and the other end of which is supplied with a ground potential GND1; and a capacitor C8-2, one end of which is electrically connected to the electrode 603 of the piezoelectric element 60 of the ejection module 23-2, and the other end of which is supplied with a ground potential GND2.

[0256] Furthermore, the driving circuit substrate 800 comprises: a driving circuit 52a3, including a transistor M1, one end of which is supplied with a ground potential GND1, and capacitors C1 and C7, which output a driving signal COMA3 for driving the piezoelectric element 60 of the ejection module 23-3 of the liquid ejection module 20 to eject ink from the nozzle N of the ejection module 23-3 to the electrode 602 of the piezoelectric element 60; a driving circuit 52b3, including a transistor M1, one end of which is supplied with a ground potential GND1, and capacitors C1 and C7, which output a driving signal COMB3 for driving the piezoelectric element 60 of the ejection module 23-3 of the liquid ejection module 20 to eject ink from the nozzle N of the ejection module 23-3 to the electrode 602 of the piezoelectric element 60. electrode 602; a driving circuit 52c3, including a transistor M1 having one end supplied with a ground potential GND1, capacitors C1 and C7, which output a driving signal COMC3 to the electrode 602 of the piezoelectric element 60 of the ejection module 23-3 of the liquid ejection module 20 so as not to eject ink from the nozzle N of the ejection module 23-3; capacitors C9a3, C9b3, and C9c3, one end of which is electrically connected to the electrode 603 of the piezoelectric element 60 of the ejection module 23-3, and the other end of which is supplied with a ground potential GND1; and a capacitor C8-3, one end of which is electrically connected to the electrode 603 of the piezoelectric element 60 of the ejection module 23-3, and the other end of which is supplied with a ground potential GND2.

[0257] Furthermore, the driving circuit substrate 800 comprises: a driving circuit 52a4, including a transistor M1, one end of which is supplied with a ground potential GND1, and capacitors C1 and C7, which output a driving signal COMA4 to the electrode 602 of the piezoelectric element 60 of the ejection module 23-4 of the liquid ejection module 20 to eject ink from the nozzle N of the ejection module 23-4; a driving circuit 52b4, including a transistor M1, one end of which is supplied with a ground potential GND1, and capacitors C1 and C7, which output a driving signal COMB4 to the electrode 602 of the piezoelectric element 60 of the ejection module 23-4 of the liquid ejection module 20 to eject ink from the nozzle N of the ejection module 23-4. electrode 602; a driving circuit 52c4, including a transistor M1, capacitors C1 and C7, one end of which is supplied with a ground potential GND1, and which outputs a driving signal COMC4 to the electrode 602 of the piezoelectric element 60 of the ejection module 23-4 of the liquid ejection module 20 so as not to eject ink from the nozzle N of the ejection module 23-4; capacitors C9a4, C9b4, and C9c4, one end of which is electrically connected to the electrode 603 of the piezoelectric element 60 of the ejection module 23-4, and the other end of which is supplied with a ground potential GND1; and a capacitor C8-4, one end of which is electrically connected to the electrode 603 of the piezoelectric element 60 of the ejection module 23-4, and the other end of which is supplied with a ground potential GND2.

[0258] Furthermore, the driving circuit substrate 800 comprises: a driving circuit 52a5, including a transistor M1, one end of which is supplied with a ground potential GND1, and capacitors C1 and C7, which output a driving signal COMA5 to the electrode 602 of the piezoelectric element 60 of the ejection module 23-5 of the liquid ejection module 20 to eject ink from the nozzle N of the ejection module 23-5; a driving circuit 52b5, including a transistor M1, one end of which is supplied with a ground potential GND1, and capacitors C1 and C7, which output a driving signal COMB5 to the electrode 602 of the piezoelectric element 60 of the ejection module 23-5 of the liquid ejection module 20 to eject ink from the nozzle N of the ejection module 23-5. Electrode 602; a driving circuit 52c5, including a transistor M1, capacitors C1 and C7, one end of which is supplied with a ground potential GND1, and which outputs a driving signal COMC5 to the electrode 602 of the piezoelectric element 60 of the ejection module 23-5 of the liquid ejection module 20 so as not to eject ink from the nozzle N of the ejection module 23-5; capacitors C9a5, C9b5, and C9c5, one end of which is electrically connected to the electrode 603 of the piezoelectric element 60 of the ejection module 23-5, and the other end of which is supplied with a ground potential GND1; and a capacitor C8-5, one end of which is electrically connected to the electrode 603 of the piezoelectric element 60 of the ejection module 23-5, and the other end of which is supplied with a ground potential GND2.

[0259] Furthermore, the driving circuit substrate 800 comprises: a driving circuit 52a6, including a transistor M1, one end of which is supplied with a ground potential GND1, and capacitors C1 and C7, which output a driving signal COMA6 for driving the piezoelectric element 60 of the ejection module 23-6 of the liquid ejection module 20 to eject ink from the nozzle N of the ejection module 23-6 to the electrode 602 of the piezoelectric element 60; a driving circuit 52b6, including a transistor M1, one end of which is supplied with a ground potential GND1, and capacitors C1 and C7, which output a driving signal COMB6 for driving the piezoelectric element 60 of the ejection module 23-6 of the liquid ejection module 20 to eject ink from the nozzle N of the ejection module 23-6 to the electrode 602 of the piezoelectric element 60. Electrode 602; a driving circuit 52c6, including a transistor M1, capacitors C1 and C7, one end of which is supplied with a ground potential GND1, and which outputs a driving signal COMC6 to the electrode 602 of the piezoelectric element 60 of the ejection module 23-6 of the liquid ejection module 20 so as not to eject ink from the nozzle N of the ejection module 23-6; capacitors C9a6, C9b6, and C9c6, one end of which is electrically connected to the electrode 603 of the piezoelectric element 60 of the ejection module 23-6, and the other end of which is supplied with a ground potential GND1; and a capacitor C8-6, one end of which is electrically connected to the electrode 603 of the piezoelectric element 60 of the ejection module 23-6, and the other end of which is supplied with a ground potential GND2.

[0260] Furthermore, the driving circuit substrate 800 has a reference voltage output circuit 53, which outputs a reference voltage signal VBS to the electrode 603 of the piezoelectric element 60 of the ejection module 23-1, the electrode 603 of the piezoelectric element 60 of the ejection module 23-2, the electrode 603 of the piezoelectric element 60 of the ejection module 23-3, the electrode 603 of the piezoelectric element 60 of the ejection module 23-4, the electrode 603 of the piezoelectric element 60 of the ejection module 23-5, and the electrode 603 of the piezoelectric element 60 of the ejection module 23-6.

[0261] In such a driving circuit substrate 800, capacitors C9a1 to C9a6, C9b1 to C9b6, and C9c1 to C9c6 are chip capacitors, and capacitors C8-1 to C8-6 are electrolytic capacitors. That is, the electrostatic capacitance of capacitors C9a1 to C9a6, C9b1 to C9b6, and C9c1 to C9c6 is smaller than the electrostatic capacitance of capacitors C8-1 to C8-6.

[0262] Here, capacitors C9a1 to C9a6, C9b1 to C9b6, and C9c1 to C9c6 all have the same purpose, function, and structure. In the following description, when there is no need to distinguish them, they may be simply referred to as capacitor C9. In addition, capacitors C6-1 to C6-6 all have the same purpose, function, and structure. In the following description, when there is no need to distinguish them, they may be simply referred to as capacitor C6. In addition, capacitors C8-1 to C8-6 all have the same purpose, function, and structure. In the following description, when there is no need to distinguish them, they may be simply referred to as capacitor C8. In addition, in the following description, wirings WSc, WS1 to WS6 that transmit reference voltage signals VBS may be collectively referred to as wirings WS.

[0263] Next, for Fig.13 The electrical connection relationship of the driving circuit substrate 800 shown in the figure will be described with reference to a specific example of the driving circuit substrate 800 . Fig.14 8 is a diagram showing an example of a cross-sectional structure of a wiring substrate 810 included in a driving circuit substrate 800. Fig.14 As shown, the wiring substrate 810 includes a surface 831 and a surface 832. The surface 831 and the surface 832 are located at opposing positions along the Z2 direction such that the surface 831 is located on the +Z2 side and the surface 832 is located on the -Z2 side.

[0264] The wiring substrate 810 includes a plurality of layers 840 and layers 841 to 845. The layers 841 to 845 are located between the surface 831 and the surface 832, and are positioned in the order of layer 841, layer 842, layer 843, layer 844, and layer 845 from the +Z2 side where the surface 831 is located toward the -Z2 side where the surface 832 is located in the direction along the Z2 direction. The plurality of layers 840 are located between the surface 831 and the layer 841, between the layer 841 and the layer 842, between the layer 842 and the layer 843, between the layer 843 and the layer 844, between the layer 844 and the layer 845, and between the layer 845 and the surface 832 in the direction along the Z2 direction.

[0265] On the surfaces 831 and 832, there are provided: a plurality of electronic components constituting various circuits including a plurality of drive circuits 52; and a portion of a plurality of wiring patterns for electrically connecting the electronic components to each other and transmitting various signals. In addition, on the layers 841 to 845, there are provided a portion of a plurality of wiring patterns for electrically connecting the electronic components disposed on the surfaces 831 and 832 and transmitting various signals. In addition, the layer 840 insulates the surfaces 831, 832 and the layers 841 to 845 from each other. That is, the surfaces 831, 832 and the layers 841 to 845 are equivalent to the wiring layers provided with the wiring patterns for transmitting various signals, and the plurality of layers 840 are equivalent to the insulator layers.

[0266] The surfaces 831, 832 and layers 841 to 845 corresponding to the wiring layer each have a plurality of wiring patterns formed by etching copper foil, which is a material with excellent conductivity for transmitting various signals. The plurality of layers 840 corresponding to the insulating layer are made of a material with excellent insulating properties, such as epoxy glass formed by infiltrating epoxy resin into glass fiber cloth.

[0267] As described above, the wiring substrate 810 in the first embodiment is a so-called multilayer substrate including the surface 831 and the surface 832 different from the surface 831 , and having a plurality of layers between the surface 831 and the surface 832 .

[0268] First, a specific example of the structure of the surfaces 831 and 832 on which various electronic components are mounted will be described. Fig.15 831 of the wiring substrate 810. Fig.15 1 shows an example of the configuration of the surface 831 when the wiring substrate 810 is viewed from the +Z2 side along the Z2 direction. It should be noted that in the following description, the case where the wiring substrate 810 is viewed from the +Z2 side along the Z2 direction may be referred to as a plan view of the wiring substrate 810.

[0269] like Fig.15 As shown, the wiring substrate 810 is a substantially rectangular shape including sides 811 and 812 that are opposite to each other along the X2 direction and sides 813 and 814 that are opposite to each other along the Y2 direction. Specifically, side 811 is located on the +X2 side of the wiring substrate 810, side 812 is located on the -X2 side of the wiring substrate 810, side 813 intersects both sides 811 and 812 and is located on the +Y2 side of the wiring substrate 810, and side 814 intersects both sides 811 and 812 and is located on the -Y2 side of the wiring substrate 810.

[0270] like Fig.15 As shown, connection portions CN1 and CN2 , an integrated circuit 101 , a plurality of drive circuits 52 , a reference voltage output circuit 53 , and a plurality of capacitors C9 provided corresponding to the plurality of drive circuits 52 are provided on a surface 831 of a wiring substrate 810 .

[0271] The connection part CN1 is positioned along the side 811 and is electrically connected to the control unit 2. Specifically, a cable (not shown) electrically connected to the control unit 2 is installed on the connection part CN1. Thus, a signal including an image information signal IP output by the control unit 2 is supplied to the head driving module 10. It should be noted that the connection part CN1 may also be a BtoB (Board to Board) connector that can electrically connect the control unit 2 and the head driving module 10 without a cable.

[0272] The connection part CN2 is positioned along the edge 812 of the wiring substrate 810 and is electrically connected to the liquid ejection module 20. Specifically, one end of the connection component 30 is mounted on the connection part CN2. In addition, the other end of the connection component 30 is connected to the connection part 330 of the liquid ejection module 20. Thus, the signals including the drive signals COMA1 to COMA6, COMB1 to COMB6, COMC1 to COMC6 and the data signal DATA output by the head drive module 10 are supplied to the liquid ejection module 20 via the connection part CN2 and the connection component 30. Here, as described above, the connection parts CN2 and 330 may also be BtoB connectors.

[0273] The integrated circuit 101 is located on the -X2 side of the connection part CN1. The integrated circuit 101 includes all of the above-mentioned control circuit 100 and all of the conversion circuit 120. Therefore, the integrated circuit 101 generates and outputs various signals including the data signal DATA, basic drive signals dA1~dA6, dB1~dB6, dC1~dC6 based on the image information signal IP input via the connection part CN1. The data signal DATA output by the integrated circuit 101 is transmitted in a wiring pattern not shown in the figure provided on the wiring substrate 810, and is output to the liquid ejection module 20 via the connection part CN2. In addition, the basic drive signals dA1~dA6, dB1~dB6, dC1~dC6 output by the integrated circuit 101 are respectively transmitted in a wiring pattern not shown in the figure provided on the wiring substrate 810, and are input to the corresponding drive circuits 52a1~52a6, 52b1~52b6, 52c1~52c6. It should be noted that a part of the control circuit 100 or a part of the conversion circuit 120 included in the integrated circuit 101 may also be configured outside the integrated circuit 101 .

[0274] The reference voltage output circuit 53 is located at the -X2 side of the integrated circuit 101. The reference voltage output circuit 53 generates and outputs a reference voltage signal VBS by stepping down or stepping up the voltage VHV or the voltage signal (not shown) input from the connection part CN1. Then, the reference voltage signal VBS is transmitted in the wiring pattern provided on the wiring substrate 810 and supplied to the liquid ejection module 20 via the connection part CN2. Such a reference voltage output circuit 53 can be composed of one or more semiconductor devices, and can also be composed of a plurality of electronic components.

[0275] Here, in Fig.15, an example is shown in which the integrated circuit 101 and the reference voltage output circuit 53 are arranged on the surface 831 of the wiring substrate 810 together with the plurality of drive circuits 52, but at least one of the integrated circuit 101 and the reference voltage output circuit 53 may be arranged on the surface 832 of the wiring substrate 810. Furthermore, at least one of the integrated circuit 101 and the reference voltage output circuit 53 may be provided on a circuit substrate that is different from the wiring substrate 810 and is not shown in the figure.

[0276] A plurality of drive circuits 52 including drive circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6 are located between the reference voltage output circuit 53 and the connection portion CN2 and arranged along the X2 direction. Specifically, the drive circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6 corresponding to the ejection modules 23-1 to 23-6 of the liquid ejection module 20 are arranged and positioned in the order of the drive circuits 52a1, 52b1, 52c1, 52a2, 52b2, 52c2, 52a3, 52b3, 52c3, 52a4, 52b4, 52c4, 52a5, 52b5, 52c5, 52a6, 52b6, and 52c6 from the +X2 side toward the -X2 side on the surface 831 of the wiring substrate 810 along the X2 direction.

[0277] In this case, the transistors M1 and the transistors M2 included in each of the plurality of drive circuits 52 are arranged and positioned in such a manner that the transistor M1 is located on the +X2 side and the transistor M2 is located on the -X2 side in the direction along the X2 direction, the inductor L1 is located on the -Y2 side of the transistors M1 and M2 arranged and positioned in the direction along the X2 direction, and the integrated circuit 500 is located on the +Y2 side of the transistors M1 and M2 arranged and positioned in the direction along the X2 direction. That is, the integrated circuit 500, the transistors M1, M2, and the inductor L1 included in the drive circuit 52 are arranged and positioned in the order of the integrated circuit 500, the transistors M1, M2, and the inductor L1 arranged side by side on the surface 831 of the wiring substrate 810 in the direction from the side 813 to the side 814.

[0278] Furthermore, capacitors C1 and C7 included in each of the plurality of drive circuits 52 are located between transistors M1 and M2 and inductor L1 arranged side by side in the direction from side 813 toward side 814. In this case, capacitor C7 is located near transistor M1, and capacitor C1 is located near inductor L1.

[0279] Capacitor C7 reduces noise that may be superimposed on the voltage VHV supplied to the drain of transistor M1, and reduces voltage fluctuations that may occur in voltage VHV. By locating such capacitor C7 near transistor M1, the wiring length between capacitor C1 and the drain of transistor M1 can be shortened. As a result, the possibility of superimposing noise on voltage VHV can be further reduced, and the possibility of fluctuations in the voltage value of voltage VHV input to the drain of transistor M1 can be further reduced. As a result, the accuracy of voltage VHV supplied to transistor M1 is improved, and the accuracy of amplified modulation signal AMs output by amplifier circuit 550 including transistor M1 is improved.

[0280] The capacitor C1 and the inductor L1 together form a low-pass filter. Thus, the drive signal COM is generated by demodulating the amplified modulation signal AMs output by the amplifier circuit 550 using the low-pass filter including the capacitor C1 and the inductor L1. By locating the capacitor C1 constituting such a low-pass filter near the inductor L1, the wiring length electrically connecting the capacitor C1 and the inductor L1 can be shortened, and as a result, the stability of the operation of the low-pass filter composed of the capacitor C1 and the inductor L1 is improved. Therefore, the waveform accuracy of the drive signal COM output by the demodulation circuit 560 including the low-pass filter composed of the capacitor C1 and the inductor L1 is improved.

[0281] Here, in the wiring substrate 810, the integrated circuits 500 of the plurality of driving circuits 52 are arranged and positioned along the X2 direction, the transistors M1 and M2 arranged side by side are arranged and positioned alternately along the X2 direction, and the inductor L1 is arranged and positioned along the X2 direction. That is, the plurality of driving circuits 52 are located on the surface 831 of the wiring substrate 810 in such a manner as to form a column of the integrated circuits 500 arranged side by side from the side 812 to the side 811, a column of the transistors M1 and M2 arranged side by side from the side 812 to the side 811, and a column of the inductor L1 arranged side by side from the side 812 to the side 811.

[0282] A plurality of capacitors C9 are provided corresponding to each of the plurality of drive circuits 52. Specifically, at least one of the plurality of capacitors C9 is located near the inductor L1 and the capacitor C1 of the drive circuit 52a1 on the -X2 side of the drive circuit 52a1. The capacitor C9 located near the inductor L1 and the capacitor C1 of the drive circuit 52a1 is equivalent to the capacitor C9a1 corresponding to the drive circuit 52a1. In addition, at least one of the plurality of capacitors C9 is located near the inductor L1 and the capacitor C1 of the drive circuit 52b1 on the -X2 side of the drive circuit 52b1. The capacitor C9 located near the inductor L1 and the capacitor C1 of the drive circuit 52b1 is equivalent to the capacitor C9b1 corresponding to the drive circuit 52b1. In addition, at least one of the plurality of capacitors C9 is located near the inductor L1 and the capacitor C1 of the drive circuit 52c1 on the -X2 side of the drive circuit 52c1. The capacitor C9 located near the inductor L1 and the capacitor C1 included in the drive circuit 52c1 corresponds to the capacitor C9c1 corresponding to the drive circuit 52c1.

[0283] Similarly, the plurality of capacitors C9 are located near the inductors L1 and capacitors C1 of the drive circuits 52a2 to 52a6 on the -X2 side of each of the drive circuits 52a2 to 52a6. The capacitors C9 located near the inductors L1 and capacitors C1 of the drive circuits 52a2 to 52a6 correspond to the capacitors C9a2 to C9a6 corresponding to the drive circuits 52a2 to 52a6. In addition, the plurality of capacitors C9 are located near the inductors L1 and capacitors C1 of the drive circuits 52b2 to 52b6 on the -X2 side of each of the drive circuits 52b2 to 52b6. The capacitors C9 located near the inductors L1 and capacitors C1 of the drive circuits 52b2 to 52b6 correspond to the capacitors C9b2 to C9b6 corresponding to the drive circuits 52b2 to 52b6. In addition, a plurality of capacitors C9 are located near the inductor L1 and capacitor C1 of each of the drive circuits 52c2 to 52c6 on the -X2 side of each of the drive circuits 52c2 to 52c6. The capacitors C9 located near the inductor L1 and capacitor C1 of each of the drive circuits 52c2 to 52c6 correspond to the capacitors C9c2 to C9c6 corresponding to the drive circuits 52c2 to 52c6.

[0284] As described above, in the liquid ejection device 1 of the first embodiment, the transistors M1 and capacitors C1 and c7 respectively possessed by the driving circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6, and the capacitors C9a1 to C9a6, C9b1 to C9b6, and C9c1 to C9c6 respectively corresponding to the driving circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6 are respectively arranged on the surface 831 of the wiring substrate 810.

[0285] Fig.16 8 is a diagram showing an example of the structure of the surface 832 of the wiring substrate 810. Here, Fig.16 FIG. 8 is a perspective view showing an example of the structure of the surface 832 when the wiring substrate 810 is viewed from above. Fig.16 In FIG. 8 , a portion of the structure provided outside the surface 832 of the wiring substrate 810 is indicated by a dotted line.

[0286] like Fig.16 As shown, a plurality of capacitors C6 and a plurality of capacitors C8 are provided on a surface 832 of a wiring substrate 810 .

[0287] One of the plurality of capacitors C6 is provided on the surface 832 of the wiring substrate 810 in a manner that at least a portion overlaps with at least any one of the drive circuits 52a1, 52b1, and 52c1 when the wiring substrate 810 is viewed from above. The capacitor C6 provided so as to at least a portion overlap with at least any one of the drive circuits 52a1, 52b1, and 52c1 corresponds to the capacitor C6-1 for stabilizing the voltage value of the voltage VHV input to the drive circuits 52a1, 52b1, and 52c1 that output drive signals COMA1, COMB1, and COMC1 to the ejection module 23-1, respectively. In addition, one of the plurality of capacitors C8 is provided on the surface 832 of the wiring substrate 810 in a manner that at least a portion overlaps with at least any one of the drive circuits 52a1, 52b1, and 52c1 when the wiring substrate 810 is viewed from above. The capacitor C8 provided so as to at least partially overlap at least any one of the drive circuits 52a1, 52b1, and 52c1 corresponds to the capacitor C8-1 for stabilizing the voltage value of the reference voltage signal VBS supplied to the discharge module 23-1.

[0288] One of the plurality of capacitors C6 is provided on the surface 832 of the wiring substrate 810 in such a manner that at least a portion overlaps with at least any one of the drive circuits 52a2, 52b2, and 52c2 when the wiring substrate 810 is viewed from above. The capacitor C6 provided so as to at least a portion overlap with at least any one of the drive circuits 52a2, 52b2, and 52c2 is equivalent to the capacitor C6-2 for stabilizing the voltage value of the voltage VHV input to the drive circuits 52a2, 52b2, and 52c2 that output drive signals COMA2, COMB2, and COMC2 to the ejection module 23-2, respectively. In addition, one of the plurality of capacitors C8 is provided on the surface 832 of the wiring substrate 810 in such a manner that at least a portion overlaps with at least any one of the drive circuits 52a2, 52b2, and 52c2 when the wiring substrate 810 is viewed from above. The capacitor C8 provided so as to at least partially overlap with at least any one of the drive circuits 52a2, 52b2, and 52c2 corresponds to the capacitor C8-2 for stabilizing the voltage value of the reference voltage signal VBS supplied to the discharge module 23-2.

[0289] One of the plurality of capacitors C6 is provided on the surface 832 of the wiring substrate 810 in such a manner that at least a portion overlaps with at least any one of the drive circuits 52a3, 52b3, and 52c3 when the wiring substrate 810 is viewed from above. The capacitor C6 provided so as to at least a portion overlap with at least any one of the drive circuits 52a3, 52b3, and 52c3 is equivalent to the capacitor C6-3 for stabilizing the voltage value of the voltage VHV input to the drive circuits 52a3, 52b3, and 52c3 that output drive signals COMA3, COMB3, and COMC3 to the ejection module 23-3, respectively. In addition, one of the plurality of capacitors C8 is provided on the surface 832 of the wiring substrate 810 in such a manner that at least a portion overlaps with at least any one of the drive circuits 52a3, 52b3, and 52c3 when the wiring substrate 810 is viewed from above. The capacitor C8 provided so as to at least partially overlap with at least any one of the drive circuits 52a3, 52b3, and 52c3 corresponds to the capacitor C8-3 for stabilizing the voltage value of the reference voltage signal VBS supplied to the discharge module 23-3.

[0290] One of the plurality of capacitors C6 is provided on the surface 832 of the wiring substrate 810 in a manner that at least a portion overlaps with at least any one of the drive circuits 52a4, 52b4, and 52c4 when the wiring substrate 810 is viewed from above. The capacitor C6 provided so as to at least a portion overlap with at least any one of the drive circuits 52a4, 52b4, and 52c4 is equivalent to the capacitor C6-4 for stabilizing the voltage value of the voltage VHV input to the drive circuits 52a4, 52b4, and 52c4 that output drive signals COMA4, COMB4, and COMC4 to the ejection module 23-4, respectively. In addition, one of the plurality of capacitors C8 is provided on the surface 832 of the wiring substrate 810 in a manner that at least a portion overlaps with at least any one of the drive circuits 52a4, 52b4, and 52c4 when the wiring substrate 810 is viewed from above. The capacitor C8 provided so as to at least partially overlap with at least any one of the drive circuits 52a4, 52b4, and 52c4 corresponds to the capacitor C8-4 for stabilizing the voltage value of the reference voltage signal VBS supplied to the discharge module 23-4.

[0291] One of the plurality of capacitors C6 is provided on the surface 832 of the wiring substrate 810 in such a manner that at least a portion overlaps with at least any one of the drive circuits 52a5, 52b5, and 52c5 when the wiring substrate 810 is viewed from above. The capacitor C6 provided so as to at least a portion overlap with at least any one of the drive circuits 52a5, 52b5, and 52c5 is equivalent to the capacitor C6-5 for stabilizing the voltage value of the voltage VHV input to the drive circuits 52a5, 52b5, and 52c5 that output drive signals COMA5, COMB5, and COMC5 to the ejection module 23-5, respectively. In addition, one of the plurality of capacitors C8 is provided on the surface 832 of the wiring substrate 810 in such a manner that at least a portion overlaps with at least any one of the drive circuits 52a5, 52b5, and 52c5 when the wiring substrate 810 is viewed from above. The capacitor C8 provided so as to at least partially overlap with at least any one of the drive circuits 52a5, 52b5, and 52c5 corresponds to the capacitor C8-5 for stabilizing the voltage value of the reference voltage signal VBS supplied to the discharge module 23-5.

[0292] One of the plurality of capacitors C6 is provided on the surface 832 of the wiring substrate 810 in such a manner that at least a portion overlaps with at least any one of the drive circuits 52a6, 52b6, and 52c6 when the wiring substrate 810 is viewed from above. The capacitor C6 provided so as to at least a portion overlap with at least any one of the drive circuits 52a6, 52b6, and 52c6 is equivalent to the capacitor C6-6 for stabilizing the voltage value of the voltage VHV input to the drive circuits 52a6, 52b6, and 52c6 that output drive signals COMA6, COMB6, and COMC6 to the ejection module 23-6, respectively. In addition, one of the plurality of capacitors C8 is provided on the surface 832 of the wiring substrate 810 in such a manner that at least a portion overlaps with at least any one of the drive circuits 52a6, 52b6, and 52c6 when the wiring substrate 810 is viewed from above. The capacitor C8 provided so as to at least partially overlap with at least any one of the drive circuits 52a6, 52b6, and 52c6 corresponds to the capacitor C8-6 for stabilizing the voltage value of the reference voltage signal VBS supplied to the ejection module 23-6.

[0293] As described above, in the liquid ejection device 1 of the first embodiment, the capacitors C8-1 to C8-6 for stabilizing the voltage values ​​of the reference voltage signals VBS respectively input to the ejection modules 23-1 to 23-6 are provided on the surface 832 of the wiring substrate 810. That is, the capacitors C8-1 to C8-6 are provided on the surface of the wiring substrate 810 different from the surface of the plurality of drive circuits 52.

[0294] Here, as described above, capacitors C8-1 to C8-6 are preferably large electrostatic capacitors, and therefore are composed of electrolytic capacitors. Therefore, the size of capacitors C8-1 to C8-6 is larger than that of a plurality of capacitors C9 composed of chip capacitors disposed on surface 831 of wiring substrate 810. Specifically, the mounting area of ​​capacitor C9 mounted on wiring substrate 810 is smaller than the mounting area of ​​capacitor C8 mounted on wiring substrate 810. In other words, the size of capacitor C9 when wiring substrate 810 is observed along the normal direction, i.e., the Z2 direction, is smaller than the size of capacitor C8 when wiring substrate 810 is observed along the normal direction, i.e., the Z2 direction.

[0295] By setting the capacitor C9 that can be set on the wiring substrate 810 with a small mounting area on the same mounting surface as the multiple driving circuits 52 in the wiring substrate 810, and setting the capacitor C8 that can be set on the wiring substrate 810 with a large mounting area on a mounting surface different from the multiple driving circuits 52 in the wiring substrate 810, the mounting area of ​​the wiring substrate 810 can be effectively utilized, and the possibility of the driving circuit substrate 800 becoming larger can be reduced.

[0296] Next, the structure of the layers 841 to 845 located between the surface 831 and the surface 832 in the wiring layer of the wiring substrate 810 will be described. Fig.14 As shown, the layers 841 to 845 of the wiring substrate 810 are positioned in the order of layer 841, layer 842, layer 843, layer 844, and layer 845 from the +Z2 side where the surface 831 is located toward the -Z2 side where the surface 832 is located in the direction along the Z2 direction. In addition, a wiring pattern for transmitting the ground potential GND1 of the reference potential of the driving circuit substrate 800 is provided on layer 841. In addition, wirings WA1 to WA6 for transmitting driving signals COMA1 to COMA6 are provided on layer 842. In addition, wirings WC1 to WC6 for transmitting driving signals COMC1 to COMC6 and wiring WS for transmitting reference voltage signal VBS are provided on layer 843. In addition, wirings WB1 to WB6 for transmitting driving signals COMB1 to COMB6 are provided on layer 844. In addition, a wiring pattern for transmitting the ground potential GND2 of the reference potential of the driving circuit substrate 800 is provided on layer 845.

[0297] That is, the wiring substrate 810 includes: a layer 841 including a wiring pattern of a ground potential GND1 which is a reference potential of a certain potential of the transmission driving circuit substrate 800; a layer 842, provided with wirings WA1 to WA6 which respectively transmit each of the driving signals COMA1 to COMA6; a layer 843, provided with wirings WC1 to WC6 which respectively transmit each of the driving signals COMC1 to COMC6 and wiring WS which transmits a reference voltage signal VBS, and located between the layer 842 and the layer 844 along the Z2 direction which is one direction; a layer 844, provided with wirings WB1 to WB6 which respectively transmit each of the driving signals COMB1 to COMB6; and a layer 845 including a wiring pattern of a ground potential GND2 which is a reference potential of the transmission driving circuit substrate 800.

[0298] That is, in the wiring substrate 810, the surface 831 on which the plurality of driving circuits 52 and the plurality of capacitors C9 are provided is located adjacent to the layer 841 on which the wiring pattern for transmitting the ground potential GND1 electrically connected to the plurality of driving circuits 52 and the plurality of capacitors C9 is provided, and the surface 832 on which the plurality of capacitors C6 and C8 are provided is located adjacent to the layer 845 on which the wiring pattern for transmitting the ground potential GND2 electrically connected to the plurality of capacitors C6 and C8 is provided. In other words, the shortest distance between the surface 831 and the layer 841 is shorter than the shortest distance between the surface 831 and the layer 845, and the shortest distance between the surface 832 and the layer 845 is shorter than the shortest distance between the surface 832 and the layer 841.

[0299] First, a specific example of the structure of layer 841 in the inner layer of wiring substrate 810 will be described. Fig.17841 of the wiring substrate 810. Fig.17 841 is a perspective view showing an example of the structure of the layer 841 when the wiring substrate 810 is viewed from above. Fig.17 In FIG. 8 , a portion of the structure other than the layer 841 of the wiring substrate 810 is indicated by a dotted line.

[0300] like Fig.17 As shown, in the layer 841, the wiring WG1 is formed on substantially one surface of the layer 841. Specifically, in the layer 841, when the wiring substrate 810 is viewed from above, the wiring WG1 is formed so as to overlap at least a portion with each of the drive circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6. The wiring WG1 is supplied with the ground potential GND1 of the reference potential of the drive circuit substrate 800. That is, the other end of each of the capacitors C9a1 to C9a6, C9b1 to C9b6, and C9c1 to C9c6, the other end of each of the capacitors C1 of the drive circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6, the source of the transistor M2, the other end of the capacitor C7, etc. are electrically connected to the wiring WG1 formed in the layer 841.

[0301] Therefore, the other end of the capacitor C1 of each of the driving circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6, the source of the transistor M2, the other end of the capacitor C7, and the other ends of each of the capacitors C9a1 to C9a6, C9b1 to C9b6, and C9c1 to C9c6 are electrically connected to the wiring WG1 that transmits the ground potential GND1 without passing through the wiring pattern that transmits the ground potential GND2.

[0302] Thus, the wiring length of the feedback path of the current generated by the transmission of the drive signals COMA1 to COMA6, COMB1 to COMB6, and COMC1 to COMC6, which is fed back to the respective drive circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6 via the wiring pattern of the respective capacitors C9a1 to C9a6, C9b1 to C9b6, and C9c1 to C9c6 and the transmission ground potential GND1, can be shortened. Thus, the waveform accuracy of the drive signals COMA1 to COMA6, COMB1 to COMB6, and COMC1 to COMC6 and the stability of the voltage value of the reference voltage signal VBS are improved, and as a result, the ejection accuracy of the ink ejected from each ejection module 23-1 to 23-6 is improved.

[0303] Here, in Fig.17In the example, the case where only the wiring WG1 is formed on approximately one side of the layer 841 is shown, but it is not limited to this. That is, in addition to the wiring WG1, in the layer 841, wiring patterns for transmitting various signals such as the data signal DATA, the clock signals SCK1 to SCK6 generated by restoring the data signal DATA, the printed data signals SI1 to SI6 and the latch signals LAT1 to LAT6, and the power supply voltage may also be provided. Furthermore, via wiring for electrically connecting the layers of the wiring substrate 810 to each other may also be provided in the layer 841. Therefore, forming the wiring WG1 on approximately one side of the layer 841 is not limited to forming the wiring WG1 on the entire area of ​​the layer 841. Specifically, the wiring WG1 occupies most of the area of ​​the layer 841, for example, the wiring WG1 occupies more than 50% of the area relative to the entire area of ​​the layer 841.

[0304] Next, a specific example of the structure of layer 842 in the inner layer of wiring substrate 810 will be described. Fig.18 842 of the wiring substrate 810. Fig.18 FIG. 8 is a perspective view showing an example of the structure of the layer 842 when the wiring substrate 810 is viewed from above. Fig.18 In FIG. 8 , a portion of the structure other than the layer 842 of the wiring substrate 810 is indicated by a dotted line.

[0305] Wirings WA1 to WA6 are formed in the layer 842. One end of the wiring WA1 is electrically connected to one end of the inductor L1 and one end of the capacitor C1 of the drive circuit 52a1 via a via hole (not shown), and the other end is electrically connected to the connection portion CN2 via a via hole (not shown). Thus, the wiring WA1 transmits the drive signal COMA1 output by the drive circuit 52a1 and supplied to one end to the connection portion CN2.

[0306] The wiring WA2 is located on the -X2 side of the wiring WA1 and the -Y2 side of the wiring WA1. One end of the wiring WA2 is electrically connected to one end of the inductor L1 and one end of the capacitor C1 of the drive circuit 52a2 via a via hole not shown, and the other end is electrically connected to the connection part CN2 via a via hole not shown. Thus, the wiring WA2 transmits the drive signal COMA2 output by the drive circuit 52a2 and supplied to one end to the connection part CN2.

[0307] The wiring WA3 is located on the -X2 side of the wiring WA2 and the -Y2 side of the wiring WA2. One end of the wiring WA3 is electrically connected to one end of the inductor L1 and one end of the capacitor C1 of the drive circuit 52a3 via a via hole not shown, and the other end is electrically connected to the connection part CN2 via a via hole not shown. Thus, the wiring WA3 transmits the drive signal COMA3 output by the drive circuit 52a3 and supplied to one end to the connection part CN2.

[0308] Wiring WA4 is located on the -X2 side of wiring WA3 and on the -Y2 side of wiring WA3. One end of wiring WA4 is electrically connected to one end of inductor L1 and one end of capacitor C1 of driving circuit 52a4 via a via hole not shown, and the other end is electrically connected to connection part CN2 via a via hole not shown. Thus, wiring WA4 transmits driving signal COMA4 output by driving circuit 52a4 and supplied to one end to connection part CN2.

[0309] Wiring WA5 is located on the -X2 side of wiring WA4 and on the -Y2 side of wiring WA4. One end of wiring WA5 is electrically connected to one end of inductor L1 and one end of capacitor C1 of driving circuit 52a5 via a via hole not shown, and the other end is electrically connected to connection part CN2 via a via hole not shown. Thus, wiring WA5 transmits driving signal COMA5 output by driving circuit 52a5 and supplied to one end to connection part CN2.

[0310] Wiring WA6 is located on the -X2 side of wiring WA5 and on the -Y2 side of wiring WA5. One end of wiring WA6 is electrically connected to one end of inductor L1 and one end of capacitor C1 of driving circuit 52a6 via a via hole not shown, and the other end is electrically connected to connection part CN2 via a via hole not shown. Thus, wiring WA6 transmits driving signal COMA6 output by driving circuit 52a6 and supplied to one end to connection part CN2.

[0311] That is, wirings WA1 to WA6 for transmitting drive signals COMA1 to COMA6 outputted by the drive circuits 52a1 to 52a6 are formed in the layer 842. Here, in addition to the wirings WA1 to WA6, wiring patterns for transmitting various signals such as the data signal DATA, clock signals SCK1 to SCK6 generated by restoring the data signal DATA, printing data signals SI1 to SI6, and latch signals LAT1 to LAT6, and power supply voltages may be provided in the layer 842, and via wirings for interconnecting the layers of the wiring substrate 810 may also be provided.

[0312] As described above, the layer 842 is provided with the wirings WA1 to WA6 for transmitting the drive signals COMA1 to COMA6 outputted from the drive circuits 52a1 to 52a6, respectively.

[0313] Next, a specific example of the structure of layer 843 in the inner layer of wiring substrate 810 will be described. Fig.19 843 is a diagram showing an example of the structure of the layer 843 of the wiring substrate 810. Here, Fig.19 FIG. 8 is a perspective view showing an example of the structure of the layer 843 when the wiring substrate 810 is viewed from above. Fig.19In FIG. 8 , a portion of the structure other than the layer 843 of the wiring substrate 810 is indicated by a dotted line.

[0314] Wirings WC1 to WC6 and WS are formed in layer 843. One end of the wiring WC1 is electrically connected to one end of the inductor L1 and one end of the capacitor C1 of the drive circuit 52c1 via a via hole (not shown), and the other end is electrically connected to the connection portion CN2 via a via hole (not shown). Thus, the wiring WC1 transmits the drive signal COMC1 output from the drive circuit 52c1 and supplied to one end to the connection portion CN2.

[0315] The wiring WC2 is located on the -X2 side of the wiring WC1 and the -Y2 side of the wiring WC1. One end of the wiring WC2 is electrically connected to one end of the inductor L1 and one end of the capacitor C1 of the drive circuit 52c2 via a via hole not shown, and the other end is electrically connected to the connection part CN2 via a via hole not shown. Thus, the wiring WC2 transmits the drive signal COMC2 output by the drive circuit 52c2 and supplied to one end to the connection part CN2.

[0316] The wiring WC3 is located on the -X2 side of the wiring WC2 and the -Y2 side of the wiring WC2. One end of the wiring WC3 is electrically connected to one end of the inductor L1 and one end of the capacitor C1 of the drive circuit 52c3 via a via hole not shown, and the other end is electrically connected to the connection part CN2 via a via hole not shown. Thus, the wiring WC3 transmits the drive signal COMC3 output by the drive circuit 52c3 and supplied to one end to the connection part CN2.

[0317] The wiring WC4 is located on the -X2 side of the wiring WC3 and the -Y2 side of the wiring WC3. One end of the wiring WC4 is electrically connected to one end of the inductor L1 and one end of the capacitor C1 of the drive circuit 52c4 via a via hole not shown, and the other end is electrically connected to the connection part CN2 via a via hole not shown. Thus, the wiring WC4 transmits the drive signal COMC4 output by the drive circuit 52c4 and supplied to one end to the connection part CN2.

[0318] The wiring WC5 is located on the -X2 side of the wiring WC4 and the -Y2 side of the wiring WC4. One end of the wiring WC5 is electrically connected to one end of the inductor L1 and one end of the capacitor C1 of the drive circuit 52c5 via a via hole not shown, and the other end is electrically connected to the connection part CN2 via a via hole not shown. Thus, the wiring WC5 transmits the drive signal COMC5 output by the drive circuit 52c5 and supplied to one end to the connection part CN2.

[0319] The wiring WC6 is located on the -X2 side of the wiring WC5 and the -Y2 side of the wiring WC5. One end of the wiring WC6 is electrically connected to one end of the inductor L1 and one end of the capacitor C1 of the drive circuit 52c6 via a via hole not shown, and the other end is electrically connected to the connection part CN2 via a via hole not shown. Thus, the wiring WC6 transmits the drive signal COMC6 output by the drive circuit 52c6 and supplied to one end to the connection part CN2.

[0320] One end of the wiring WS is electrically connected to the reference voltage output circuit 53 via a via hole (not shown) or the like. That is, the wiring WS transmits the reference voltage signal VBS. Fig.13 As shown, such a wiring WS includes wirings WSc and WS1 to WS6.

[0321] One end of the wiring WSc is electrically connected to the reference voltage output circuit 53, and extends along the side 814 of the wiring substrate 810. In other words, in the wiring WS, a region extending along the side 814 of the wiring substrate 810 corresponds to the wiring WSc.

[0322] The wiring WS1 is located in the area closer to the +X2 side and the +Y2 side than the wiring WC1 in the wiring substrate 810, and one end is connected to the wiring WSc, and the other end is electrically connected to the connection portion CN2. Thus, the wiring WS1 transmits the reference voltage signal VBS to the connection portion CN2. Here, the connection area where one end of the wiring WC1 is electrically connected to the wiring WSc corresponds to Fig.13 In the present embodiment, at least a portion of the wiring WS1 overlaps at least a portion of the drive circuits 52a1, 52b1, and 52c1 when the wiring substrate 810 is viewed from above, and is electrically connected to one end of the capacitor C8 provided on the surface 832. The area of ​​the wiring WS1 electrically connected to one end of the capacitor C8 corresponds to Fig.13 As shown in contact point Csb1, capacitor C8 is equivalent to capacitor C8-1.

[0323] The wiring WS2 is located between the wiring WC1 and the wiring WC2 in the wiring substrate 810, one end of which is connected to the wiring WSc, and the other end of which is electrically connected to the connection portion CN2. Thus, the wiring WS2 transmits the reference voltage signal VBS to the connection portion CN2. Here, the connection area where one end of the wiring WC2 is electrically connected to the wiring WSc corresponds to Fig.13 In the present embodiment, at least a portion of the wiring WS2 overlaps at least a portion of the drive circuits 52a2, 52b2, and 52c2 when the wiring substrate 810 is viewed from above, and is electrically connected to one end of the capacitor C8 provided on the surface 832. The area of ​​the wiring WS2 electrically connected to one end of the capacitor C8 corresponds to Fig.13As shown in contact point Csb2, capacitor C8 is equivalent to capacitor C8-2.

[0324] The wiring WS3 is located between the wiring WC2 and the wiring WC3 in the wiring substrate 810, one end of which is connected to the wiring WSc, and the other end of which is electrically connected to the connection portion CN2. Thus, the wiring WS3 transmits the reference voltage signal VBS to the connection portion CN2. Here, the connection area where one end of the wiring WC3 is electrically connected to the wiring WSc corresponds to Fig.13 In addition, in the present embodiment, when the wiring substrate 810 is viewed from above, at least a portion of the wiring WS3 overlaps at least a portion of the drive circuits 52a3, 52b3, and 52c3, and is electrically connected to one end of the capacitor C8 provided on the surface 832. The area of ​​the wiring WS3 electrically connected to one end of the capacitor C8 corresponds to Fig.13 As shown in contact point Csb3, capacitor C8 is equivalent to capacitor C8-3.

[0325] The wiring WS4 is located between the wiring WC3 and the wiring WC4 in the wiring substrate 810, one end of which is connected to the wiring WSc, and the other end of which is electrically connected to the connection portion CN2. Thus, the wiring WS4 transmits the reference voltage signal VBS to the connection portion CN2. Here, the connection area where one end of the wiring WC4 is electrically connected to the wiring WSc corresponds to Fig.13 In addition, in the present embodiment, when the wiring substrate 810 is viewed from above, at least a portion of the wiring WS4 overlaps at least a portion of the drive circuits 52a4, 52b4, and 52c4, and is electrically connected to one end of the capacitor C8 provided on the surface 832. The area of ​​the wiring WS4 electrically connected to one end of the capacitor C8 corresponds to Fig.13 As shown in contact Csb4, capacitor C8 is equivalent to capacitor C8-4.

[0326] The wiring WS5 is located between the wiring WC4 and the wiring WC5 in the wiring substrate 810, one end of which is connected to the wiring WSc, and the other end of which is electrically connected to the connection portion CN2. Thus, the wiring WS5 transmits the reference voltage signal VBS to the connection portion CN2. Here, the connection area where one end of the wiring WC5 is electrically connected to the wiring WSc corresponds to Fig.13 In addition, in the present embodiment, when the wiring substrate 810 is viewed from above, at least a portion of the wiring WS5 overlaps at least a portion of the drive circuits 52a5, 52b5, and 52c5, and is electrically connected to one end of the capacitor C8 provided on the surface 832. The area of ​​the wiring WS5 electrically connected to one end of the capacitor C8 corresponds to Fig.13 As shown in contact Csb5, capacitor C8 is equivalent to capacitor C8-5.

[0327] The wiring WS6 is located between the wiring WC5 and the wiring WC6 in the wiring substrate 810, one end of which is connected to the wiring WSc, and the other end of which is electrically connected to the connection portion CN2. Thus, the wiring WS6 transmits the reference voltage signal VBS to the connection portion CN2. Here, the connection area where one end of the wiring WC6 is electrically connected to the wiring WSc corresponds to Fig.13 In addition, in the present embodiment, when the wiring substrate 810 is viewed from above, at least a portion of the wiring WS6 overlaps at least a portion of the drive circuits 52a6, 52b6, and 52c6, and is electrically connected to one end of the capacitor C8 provided on the surface 832. The area of ​​the wiring WS6 electrically connected to one end of the capacitor C8 corresponds to Fig.13 As shown in contact Csb6, capacitor C8 is equivalent to capacitor C8-6.

[0328] That is, a wiring pattern for transmitting the drive signals COMC1 to COMC6 outputted by the drive circuits 52c1 to 52c6, respectively, and a wiring pattern for transmitting the reference voltage signal VBS outputted by the reference voltage output circuit 53 are formed in the layer 843. In other words, a wiring WS is provided in the layer 843, which is located between the layer 842 and the layer 844 along the Z2 direction as one direction and transmits the reference voltage signal VBS. Fig.19 As shown, the wirings WC1 to WC6 for transmitting the driving signals COMC1 to COMC6 are provided in the layer 843 where the wiring WS for transmitting the reference voltage signal VBS is provided. That is, the wirings WC1 to WC6 for transmitting the driving signals COMC1 to COMC6 are provided in the layer 843 where the wiring WS for transmitting the reference voltage signal VBS is provided.

[0329] Here, in layer 843, in addition to the wirings WA1~WA6 and WS, a portion of the wiring pattern for transmitting various signals, such as the data signal DATA, the clock signals SCK1~SCK6 generated by restoring the data signal DATA, the printing data signals SI1~SI6 and the latch signals LAT1~LAT6, and the power supply voltage can also be provided, and via wiring for interconnecting the layers of the wiring substrate 810 can also be provided.

[0330] Next, a specific example of the structure of layer 844 in the inner layer of wiring substrate 810 will be described. Fig. 20 844 of the wiring substrate 810. Fig. 20 FIG. 8 is a perspective view showing an example of the structure of the layer 844 when the wiring substrate 810 is viewed from above. Fig. 20 In FIG. 8 , a portion of the structure other than the layer 844 of the wiring substrate 810 is indicated by a dotted line.

[0331] Wirings WB1 to WB6 are formed in layer 844. One end of the wiring WB1 is electrically connected to one end of the inductor L1 and one end of the capacitor C1 of the drive circuit 52b1 via a via hole (not shown), and the other end is electrically connected to the connection portion CN2 via a via hole (not shown). Thus, the wiring WB1 transmits the drive signal COMB1 output by the drive circuit 52b1 and supplied to one end to the connection portion CN2.

[0332] Wiring WB2 is located on the -X2 side of wiring WB1 and on the -Y2 side of wiring WB1. One end of wiring WB2 is electrically connected to one end of inductor L1 and one end of capacitor C1 of driving circuit 52b2 via a via hole (not shown), and the other end is electrically connected to connection portion CN2 via a via hole (not shown). Thus, wiring WB2 transmits driving signal COMB2 output by driving circuit 52b2 and supplied to one end to connection portion CN2.

[0333] Wiring WB3 is located on the -X2 side of wiring WB2 and on the -Y2 side of wiring WB2. One end of wiring WB3 is electrically connected to one end of inductor L1 and one end of capacitor C1 of driving circuit 52b3 via a via hole not shown, and the other end is electrically connected to connection part CN2 via a via hole not shown. Thus, wiring WB3 transmits driving signal COMB3 output by driving circuit 52b3 and supplied to one end to connection part CN2.

[0334] Wiring WB4 is located on the -X2 side of wiring WB3 and on the -Y2 side of wiring WB3. One end of wiring WB4 is electrically connected to one end of inductor L1 and one end of capacitor C1 of driving circuit 52b4 via a via hole not shown, and the other end is electrically connected to connection part CN2 via a via hole not shown. Thus, wiring WB4 transmits driving signal COMB4 output by driving circuit 52b4 and supplied to one end to connection part CN2.

[0335] Wiring WB5 is located on the -X2 side of wiring WB4 and on the -Y2 side of wiring WB4. One end of wiring WB5 is electrically connected to one end of inductor L1 and one end of capacitor C1 of driving circuit 52b5 via a via hole not shown, and the other end is electrically connected to connection part CN2 via a via hole not shown. Thus, wiring WB5 transmits driving signal COMB5 output by driving circuit 52b5 and supplied to one end to connection part CN2.

[0336] Wiring WB6 is located on the -X2 side of wiring WB5 and the -Y2 side of wiring WB5. One end of wiring WB6 is electrically connected to one end of inductor L1 and one end of capacitor C1 of driving circuit 52b6 via a via hole not shown, and the other end is electrically connected to connection part CN2 via a via hole not shown. Thus, wiring WB6 transmits driving signal COMB6 output by driving circuit 52b6 and supplied to one end to connection part CN2.

[0337] That is, wirings WB1 to WB6 for transmitting drive signals COMB1 to COMB6 outputted by the drive circuits 52b1 to 52b6 are formed in the layer 844. Here, in addition to the wirings WB1 to WB6, wiring patterns for transmitting various signals such as the data signal DATA, clock signals SCK1 to SCK6 generated by restoring the data signal DATA, printing data signals SI1 to SI6, and latch signals LAT1 to LAT6, and power supply voltages may be provided in the layer 844, and via wirings for interconnecting the layers of the wiring substrate 810 may also be provided.

[0338] As described above, the layer 844 is provided with the wirings WB1 to WB6 for transmitting the drive signals COMB1 to COMB6 outputted from the drive circuits 52 b 1 to 52 b 6 , respectively.

[0339] Next, a specific example of the structure of layer 845 in the inner layer of wiring substrate 810 will be described. Fig.21 845 is a diagram showing an example of the structure of the layer 845 of the wiring substrate 810. Here, Fig.21 FIG. 8 is a perspective view showing an example of the structure of the layer 845 when the wiring substrate 810 is viewed from above. Fig.21 In FIG. 8 , a portion of the structure other than the layer 845 of the wiring substrate 810 is indicated by a dotted line.

[0340] like Fig.21 As shown, in layer 845, wiring WG2 is formed on substantially one surface of layer 845. Specifically, in layer 845, wiring WG2 is formed so as to overlap at least a portion of each of drive circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6 when viewed from above the wiring substrate 810. The wiring WG2 is supplied with the ground potential GND2 of the reference potential of the drive circuit substrate 800. That is, the other ends of capacitors C6-1 to C6-6 and C8-1 to C8-6 are electrically connected to wiring WG2 formed in layer 845.

[0341] Therefore, the other ends of the capacitors C6-1 to C6-6 and C8-1 to C8-6 are electrically connected to the wiring WG2 for transmitting the ground potential GND2 without passing through the wiring WG1 for transmitting the ground potential GND1. In addition, as described above, the other ends of the capacitors C1 of the drive circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6, the source of the transistor M2, and the other end of the capacitor C7, and the other ends of the capacitors C9a1 to C9a6, C9b1 to C9b6, and C9c1 to C9c6 are electrically connected to the wiring WG1 for transmitting the ground potential GND1 without passing through the wiring pattern for transmitting the ground potential GND2. Therefore, the distance of the wiring pattern that electrically connects the other end of the capacitor C1 of each of the driving circuits 52a1~52a6, 52b1~52b6, 52c1~52c6, the source of the transistor M2 and the other end of the capacitor C7 to the capacitors C9a1~C9a6, C9b1~C9b6, C9c1~C9c6 is shorter than the distance of the wiring pattern that electrically connects the other end of the capacitor C1 of each of the driving circuits 52a1~52a6, 52b1~52b6, 52c1~52c6, the source of the transistor M2 and the other end of the capacitor C7 to the other end of the capacitors C6-1~C6-6, C8-1~C8-6. In other words, the electrical distance between the other end of the capacitor C1 of the driving circuits 52a1 to 52a6, 52b1 to 52b6, 52c1 to 52c6, the source of the transistor M2 and the other end of the capacitor C7 and the capacitors C9a1 to C9a6, C9b1 to C9b6, C9c1 to C9c6 is shorter than the electrical distance between the other end of the capacitor C1 of the driving circuits 52a1 to 52a6, 52b1 to 52b6, 52c1 to 52c6, the source of the transistor M2 and the other end of the capacitor C7 and the other end of the capacitors C6-1 to C6-6, C8-1 to C8-6.

[0342] Here, in Fig.21 In the example, the case where only the wiring WG2 is formed on approximately one side of the layer 845 is shown, but it is not limited to this. That is, in addition to the wiring WG2, in the layer 845, wiring patterns for various signals such as the transmission data signal DATA, the clock signals SCK1 to SCK6 generated by restoring the data signal DATA, the printing data signals SI1 to SI6 and the latch signals LAT1 to LAT6, and the power supply voltage can be provided. Furthermore, via wiring for electrically connecting the layers of the wiring substrate 810 to each other can also be provided in the layer 845. Therefore, forming the wiring WG2 on approximately one side of the layer 845 is not limited to forming the wiring WG2 on the entire area of ​​the layer 845. Specifically, the wiring WG2 occupies most of the area of ​​the layer 845, for example, the wiring WG2 occupies more than 50% of the area relative to the entire area of ​​the layer 845.

[0343] In the driving circuit substrate 800 constructed as above, in the wiring substrate 810, at least a portion of the wiring pattern for transmitting the driving signal COMA, at least a portion of the wiring pattern for transmitting the driving signal COMB, and at least a portion of the wiring pattern for transmitting the reference voltage signal VBS are located at an overlapping position when the wiring substrate 810 is viewed from above. In addition, the wiring pattern for transmitting the driving signal COMC, which has a smaller amount of current than the driving signals COMA and COMB generated during transmission, is arranged in the same wiring layer as at least any one of the wiring layer provided with the wiring pattern for transmitting the driving signal COMA, the wiring layer provided with the wiring pattern for transmitting the driving signal COMB, and the wiring layer provided with the wiring pattern for transmitting the reference voltage signal VBS. Thus, the possibility of distortion of the signal waveforms of the driving signals COMA, COMB, and COMC due to the inductance component of the wiring pattern included in the wiring substrate 810 is reduced.

[0344] use Fig. 22 A specific example of this configuration will be described. Fig. 22 It is along Figure 15 to Figure 21 The illustrated diagram is a cross-sectional view of the wiring substrate 810 when the wiring substrate 810 is cut along the line Bb.

[0345] like Fig. 22 As shown, the wiring WS1 for transmitting the reference voltage signal VBS supplied to the ejection module 23-1 is provided in the layer 843, the wiring WA1 for transmitting the driving signal COMA1 is provided in the layer 842, and the wiring WB1 for transmitting the driving signal COMB1 is provided in the layer 844. That is, the wiring WA1 and the wiring WS1 are provided in adjacent wiring layers, and the wiring WB1 and the wiring WS1 are provided in adjacent wiring layers. In other words, the layer 842 provided with the wiring WA1 and the layer 843 provided with the wiring WS1 are located at adjacent positions along the Z2 direction as one direction, and the layer 844 provided with the wiring WB1 and the layer 843 provided with the wiring WS1 are located at adjacent positions along the Z2 direction as one direction.

[0346] In this case, the wiring WS1 is located between the wiring WA1 and the wiring WB1, and at least a portion of the wiring WA1 and at least a portion of the wiring WB1 are provided so as to overlap at least a portion of the wiring WS1 in a direction along the Z2 direction as one direction. Thus, the wiring WC1 that transmits the drive signal COMC1 supplied to the ejection module 23-1 is provided in the same layer 843 as the wiring WS1 on the -Y2 side of the wiring WS1 so as to be adjacent to the wiring WS1.

[0347] When the drive signals COMA1, COMB1, and COMC1 are input to the ejection module 23-1, the current generated is transmitted in the wirings WA1, WB1, and WC1, respectively, and then input to the ejection module 23-1. Then, the current is transmitted in the wiring WS1 that transmits the reference voltage signal VBS, and is fed back to the drive circuits 52a1, 52b1, and 52c1 that output the drive signals COMA1, COMB1, and COMC1. That is, currents in opposite directions flow through the wirings WA1, WB1, and WC1 and the wiring WS1. As a result, the inductance component generated by the current flowing through the wirings WA1, WB1, and WC1 and the inductance component generated by the current flowing through the wiring WS1 cancel each other out. As a result, the possibility of waveform distortion caused by the inductance component in the signal waveforms of the drive signals COMA1, COMB1, and COMC1 is reduced.

[0348] Similarly, the wirings WS2 to WS6 for transmitting the reference voltage signals VBS supplied to the ejection modules 23-2 to 23-6 are respectively arranged in the layer 843, the wirings WA2 to WA6 for transmitting the drive signals COMA2 to COMA6 are respectively arranged in the layer 842, and the wirings WB2 to WB6 for transmitting the drive signals COMB2 to COMB6 are respectively arranged in the layer 844. That is, the wirings WA2 to WA6 and the wirings WS2 to WS6 are arranged in adjacent wiring layers, and the wirings WB2 to WB6 and the wirings WS2 to WS6 are arranged in adjacent wiring layers. In other words, the layer 842 provided with the wirings WA2 to WA6 and the layer 843 provided with the wirings WS2 to WS6 are located at adjacent positions in the direction along the Z2 direction, and the layer 844 provided with the wirings WB2 to WB6 and the layer 843 provided with the wirings WS2 to WS6 are located at adjacent positions in the direction along the Z2 direction.

[0349] In this case, the wiring WS2 is located between the wiring WA2 and the wiring WB2, and at least a portion of the wiring WA2 and at least a portion of the wiring WB2 are arranged in a manner overlapping with at least a portion of the wiring WS2 in the direction along the Z2 direction. The wiring WS3 is located between the wiring WA3 and the wiring WB3, and at least a portion of the wiring WA3 and at least a portion of the wiring WB3 are arranged in a manner overlapping with at least a portion of the wiring WS3 in the direction along the Z2 direction. The wiring WS4 is located between the wiring WA4 and the wiring WB4, and at least a portion of the wiring WA4 and at least a portion of the wiring WB4 are arranged in a manner overlapping with at least a portion of the wiring WS4 in the direction along the Z2 direction. The wiring WS5 is located between the wiring WA5 and the wiring WB5, and at least a portion of the wiring WA5 and at least a portion of the wiring WB5 are arranged in a manner overlapping with at least a portion of the wiring WS5 in the direction along the Z2 direction. The wiring WS6 is located between the wiring WA6 and the wiring WB6, and at least a portion of the wiring WA6 and at least a portion of the wiring WB6 are arranged in a manner overlapping with at least a portion of the wiring WS6 in the direction along the Z2 direction.

[0350] In addition, the wiring WC2 for transmitting the driving signal COMC2 supplied to the ejection module 23-2 is provided on the -Y2 side of the wiring WS2 in the same layer 843 as the wiring WS2 so as to be adjacent to the wiring WS2, the wiring WC3 for transmitting the driving signal COMC3 supplied to the ejection module 23-3 is provided on the -Y2 side of the wiring WS3 in the same layer 843 as the wiring WS3 so as to be adjacent to the wiring WS3, and the wiring WC4 for transmitting the driving signal COMC4 supplied to the ejection module 23-4 is provided on the -Y2 side of the wiring WS3 in the same layer 843 as the wiring WS3. The wiring WC5 for transmitting the driving signal COMC5 supplied to the ejection module 23-5 is arranged on the -Y2 side of the wiring WS4 in the same layer 843 as the wiring WS5 so as to be adjacent to the wiring WS5, and the wiring WC6 for transmitting the driving signal COMC6 supplied to the ejection module 23-6 is arranged on the -Y2 side of the wiring WS6 in the same layer 843 as the wiring WS6 so as to be adjacent to the wiring WS6.

[0351] As a result, the inductance components caused by the current flowing through the wirings WA2 to WA6, WB2 to WB6, and WC2 to WC6 and the inductance components caused by the current flowing through the wirings WS2 to WS6 cancel each other out. As a result, the possibility of waveform distortion caused by the inductance components in the signal waveforms of the driving signals COMA2 to COMA6, COMB2 to COMB6, and COMC2 to COMC6 is reduced.

[0352] Furthermore, as described above, the wiring substrate 810 includes: a layer 841 provided with a wiring WG1 for transmitting a ground potential GND1 of a certain potential; and a layer 845 provided with a wiring WG2 for transmitting a ground potential GND2 of a certain potential. In addition, the layer 841 provided with the wiring WG1 is located on the +Z2 side of the layer 842 provided with the wirings WA1 to WA6, and the layer 845 provided with the wiring WG2 is located on the -Z2 side of the layer 844 provided with the wirings WB1 to WB6. In other words, the layer 842 is located between the layer 843 and the layer 841, and the layer 844 is located between the layer 843 and the layer 845. In this case, at least a portion of the wiring WG1 is provided so as to overlap at least a portion of each of the wirings WA1 to WA6 in the direction along the Z2 direction, and at least a portion of the wiring WG2 is provided so as to overlap at least a portion of the wirings WB1 to WB6 in the direction along the Z2 direction.

[0353] Thus, the wiring WG1 functions as a shielding member that reduces the possibility of superimposing interference noise on each wiring WA1 to WA6, and the wiring WG2 functions as a shielding member that reduces the possibility of superimposing interference noise on each wiring WB1 to WB6. As a result, the accuracy of the signal waveforms of the drive signals COMA1 to COMA6 transmitted in the wirings WA1 to WA6 and the drive signals COMB1 to COMB6 transmitted in the wirings WB1 to WB6 is further improved.

[0354] In the liquid ejection device 1 configured as described above, the liquid ejection module 20 is an example of a liquid ejection head, the electrode 602 of the piezoelectric element 60 included in the liquid ejection module 20 is an example of a first electrode, and the electrode 603 is an example of a second electrode. In addition, any one of the drive circuits 52a1~52a6 is an example of a first drive circuit, any one of the drive circuits 52b1~52b6 is an example of a second drive circuit, and any one of the drive circuits 52c1~52c6 is an example of a third drive circuit. The drive signals COMA1~COMA6 output by the drive circuits 52a1~52a6 corresponding to the first drive circuit are an example of a first drive signal, the drive signals COMB1~COMB6 output by the drive circuits 52b1~52b6 corresponding to the second drive circuit are an example of a second drive signal, and the drive signals COMC1~COMC6 output by the drive circuits 52c1~52c6 corresponding to the third drive circuit are an example of a third drive signal. The ground potential GND1 of a constant potential is an example of a first constant voltage signal, and the ground potential GND2 of a constant potential is an example of a second constant voltage signal. In addition, the wiring substrate 810 is an example of a substrate, the layer 842 is an example of a first wiring layer, the layer 844 is an example of a second wiring layer, the layer 843 is an example of a third wiring layer, the layer 841 is an example of a seventh wiring layer, the layer 845 is an example of an eighth wiring layer, the wirings WA1 to WA6 provided in the layer 842 and transmitting the drive signals COMA1 to COMA6 outputted by the drive circuits 52a1 to 52a6 corresponding to the first drive circuit are examples of first wirings, and the wirings WA1 to WA6 provided in the layer 844 and transmitting the drive signals COMA1 to COMA6 outputted by the drive circuits 52b1 to 52b6 corresponding to the second drive circuit are examples of The wiring WB1~WB6 for transmitting the driving signals COMB1~COMB6 is an example of the second wiring, the wiring WC1~WC6 for transmitting the driving signals COMC1~COMC6 output by the driving circuit 52c1~52c6 equivalent to the third driving circuit is an example of the third wiring, the wiring WS provided on the layer 843 and transmitting the reference voltage signal VBS is an example of the fourth wiring, the wiring WG1 provided on the layer 841 and transmitting the ground potential GND1 is an example of the eighth wiring, and the wiring WG2 provided on the layer 845 and transmitting the ground potential GND2 is an example of the ninth wiring.

[0355] 1.7 Effects

[0356] In the liquid ejection device 1 constructed as described above, in the driving circuit substrate 800 of the liquid ejection module 20 that drives the piezoelectric element to eject ink by using the driving signal COMA1 supplied to the electrode 602 and the reference voltage signal VBS supplied to the electrode 603, the driving circuit 52a1 that outputs the driving signal COMA1 to the electrode 602 of the piezoelectric element 60 includes a transistor M1 supplied with a ground potential GND1, capacitors C1, C7, and a capacitor C9a1 as a chip capacitor whose one end is electrically connected to the electrode 603 of the piezoelectric element and the other end is supplied with the ground potential GND1, which are arranged on the surface 831 of the wiring substrate 810, and a capacitor C8-1 as an electrolytic capacitor whose one end is electrically connected to the electrode 603 of the piezoelectric element and the other end is supplied with the ground potential GND2, which is arranged on a surface 832 different from the surface 831 of the wiring substrate 810.

[0357] The current generated by the transmission of the driving signal COMA1 is fed back to the driving circuit 52a1 via each capacitor C9a1 and the ground potential GND1. In the driving circuit substrate 800 of the liquid ejection device 1 of the first embodiment, the transistor M1, capacitors C1, C7 and capacitor C9a1 as a chip capacitor included in the driving circuit 52a1 are all arranged on the surface 831 of the wiring substrate 810, so that the electrical distance between the transistor M1, capacitors C1, C7 and capacitor C9a1 as a chip capacitor included in the driving circuit 52a1 in the wiring pattern for transmitting the ground potential GND1 can be shortened. That is, the wiring length of the feedback path for the current generated by the transmission of the driving signal COMA1 to be fed back to the driving circuit 52a1 can be shortened. As a result, the waveform accuracy of the driving signals COMA1 to COMA6, COMB1 to COMB6, and COMC1 to COMC6 and the stability of the voltage value of the reference voltage signal VBS are improved, and as a result, the ejection accuracy of the ink ejected from each of the ejection modules 23-1 to 23-6 is improved.

[0358] In this case, the wiring substrate 810 includes: a layer 841 including a wiring WG1, which is electrically connected to the transistor M1, capacitors C1, C7 and capacitor C9a1 as a chip capacitor included in the driving circuit 52a1, and is provided with a ground potential GND1; and a layer 845 including a wiring WG2, which is electrically connected to the capacitor C8-1 and is provided with a ground potential GND2. In the wiring substrate 810, by positioning the surfaces 831, 832, layers 841, and 845 in a manner such that the shortest distance between the surface 831 and the layer 841 is shorter than the shortest distance between the surface 831 and the layer 845, and the shortest distance between the surface 832 and the layer 845 is shorter than the shortest distance between the surface 832 and the layer 841, the wiring length of the feedback path of the current generated by the transmission of the driving signal COMA1 to the driving circuit 52a1 can be further shortened.

[0359] In addition, in the liquid ejection device 1 of the first embodiment, the driving circuit substrate 800 supplies the reference voltage signal VBS to the electrode 603 of the piezoelectric element 60 of each of the ejection modules 23-1 to 23-6 via the wiring WS. Specifically, for the ejection module 23-1, the reference voltage signal VBS supplied to the wiring WSc in the wiring WS is branched at the contact Csa1, transmitted in the wiring WS1, and supplied to the electrode 603 of the piezoelectric element 60 of the ejection module 23-1, and for each of the ejection modules 23-2 to 23-6, the reference voltage signal VBS supplied to the wiring WSc in the wiring WS is branched at each of the contacts Csa2 to Csa6, transmitted in each of the wiring WS2 to WS6, and supplied to the electrode 603 of the piezoelectric element 60 of the ejection modules 23-2 to 23-6.

[0360] In this case, the contact Csb1 electrically connected to the capacitor C8-1 is located on the wiring WS1 that electrically connects the contact Csa1 to the electrode 603 of the piezoelectric element 60 of the ejection module 23-1. Therefore, even if the voltage value of the reference voltage signal VBS changes due to the operation of any of the ejection modules 23-2 to 23-6, the change in the voltage value will be absorbed by the capacitor C8-1. As a result, the possibility of the voltage value of the reference voltage signal VBS supplied to the ejection module 23-1 changing is reduced.

[0361] Furthermore, in the liquid ejection device 1 of the first embodiment, the contact Csb2 electrically connected to the capacitor C8-2 is located on the wiring WS2 electrically connecting the contact Csa2 to the electrode 603 of the piezoelectric element 60 of the ejection module 23-2, the contact Csb3 electrically connected to the capacitor C8-3 is located on the wiring WS3 electrically connecting the contact Csa3 to the electrode 603 of the piezoelectric element 60 of the ejection module 23-3, and the contact Csb4 electrically connected to the capacitor C8-4 is located on the wiring WS4 electrically connecting the contact Csa3 to the electrode 603 of the piezoelectric element 60 of the ejection module 23-3. The contact Csa4 is located on the wiring WS4 electrically connected to the electrode 603 of the piezoelectric element 60 of the ejection module 23-4, the contact Csb5 electrically connected to the capacitor C8-5 is located on the wiring WS5 electrically connecting the contact Csa5 to the electrode 603 of the piezoelectric element 60 of the ejection module 23-5, and the contact Csb6 electrically connected to the capacitor C8-6 is located on the wiring WS6 electrically connecting the contact Csa6 to the electrode 603 of the piezoelectric element 60 of the ejection module 23-6.

[0362] Therefore, even if the voltage value of the reference voltage signal VBS changes due to the operation of any of the ejection modules 23-1 to 23-6, the change in the voltage value will be absorbed by the capacitors C8-1 to C8-6. As a result, the possibility of the voltage value of the reference voltage signal VBS supplied to each ejection module 23-1 to 23-6 changing is reduced.

[0363] In addition, in the liquid ejection device 1 configured as above, the wiring WS1 for transmitting the reference voltage signal VBS is located between the wiring WA1 for transmitting the driving signal COMA1 for the piezoelectric element 60 of the ejection module 23-1 to eject ink from the ejection module 23-1 and the wiring WB1 for transmitting the driving signal COMB1 for the piezoelectric element 60 of the ejection module 23-1 to eject ink from the ejection module 23-1. In addition, the wiring WC1 for transmitting the driving signal COMC1 for the piezoelectric element 60 of the ejection module 23-1 not to eject ink from the ejection module 23-1 is provided in the same layer 843 as the wiring WS1. Thus, the current generated when the driving signals COMA1, COMB1, and COMC1 are transmitted is transmitted in the wirings WA1, WB1, and WC1, and after flowing into the ejection module 23-1, it is transmitted in the wiring WS1 and fed back to the driving circuits 52a1, 52b1, and 52c1. That is, in the wiring substrate 810, currents flow in opposite directions through the wirings WA1, WB1, WC1 and the wiring WS1. As a result, the inductance component caused by the current generated when the drive signals COMA1, COMB1, COMC1 are transmitted is cancelled, and the possibility of distortion in the signal waveforms of the drive signals COMA1, COMB1, COMC1 due to the inductance component is reduced.

[0364] In addition, in the liquid ejection device 1 of the present embodiment, the wiring WS1 is located between the wiring WA1 and the wiring WB1 along the Z2 direction, and the wiring WC1 that transmits the driving signal COMC1 of the piezoelectric element 60 of the ejection module 23-1 so that the ink is not ejected from the ejection module 23-1 is located in the same wiring layer as the wiring WS1. The amount of current generated when the driving signal COMC1 is transmitted is smaller than the amount of current generated when the driving signals COMA1 and COMB1 are transmitted, so the pattern width of the wiring WC1 is smaller than the pattern width of the wiring WA1 and WB1. Furthermore, the inductance component caused by the current generated when the driving signal COMC1 with a small amount of current is transmitted is smaller than the inductance component caused by the current generated when the driving signals COMA1 and COMB1 are transmitted, so the inductance component caused by the current generated when the driving signal COMC1 is transmitted is less likely to cause distortion in the signal waveforms of the driving signals COMA1, COMB1, and COMC1. By setting such a wiring WC1 for transmitting the driving signal COMC1 in the same wiring layer as at least one of the wirings WA1, WB1, WS1, preferably in the same wiring layer as the wiring WS1, even when the driving circuit substrate 800 outputs the driving signals COMA1, COMB1, COMC1 and the reference voltage signal VBS, the possibility of distortion of the signal waveforms of the driving signals COMA1, COMB1, COMC1 supplied to the ejection module 23-1 will be reduced without increasing the number of wiring layers of the wiring substrate 810.

[0365] 2. Second Implementation

[0366] Next, the liquid ejection device 1 in the second embodiment will be described. When describing the liquid ejection device 1 in the second embodiment, the same components as those in the liquid ejection device 1 in the first embodiment are denoted by the same reference numerals, and the description thereof will be simplified or omitted.

[0367] Fig.23 FIG. 8 is a diagram showing an example of the electrical connection relationship of the drive circuit substrate 800 in the second embodiment. Fig.23As shown, the driving circuit substrate 800 in the second embodiment has resistors Rs1 to Rs6. One end of the resistor Rs1 is electrically connected to the contact Csa1, and the other end is electrically connected to the contact Csb1. In other words, the resistor Rs1 electrically connects the contact Csa1 to the contact Csb1. Similarly, one end of the resistor Rs2 is electrically connected to the contact Csa2, and the other end is electrically connected to the contact Csb2, one end of the resistor Rs3 is electrically connected to the contact Csa3, and the other end is electrically connected to the contact Csb3, one end of the resistor Rs4 is electrically connected to the contact Csa4, and the other end is electrically connected to the contact Csb4, one end of the resistor Rs5 is electrically connected to the contact Csa5, and the other end is electrically connected to the contact Csb5, and one end of the resistor Rs6 is electrically connected to the contact Csa6, and the other end is electrically connected to the contact Csb6. That is, resistor Rs2 electrically connects contact Csa2 and contact Csb2, resistor Rs3 electrically connects contact Csa3 and contact Csb3, resistor Rs4 electrically connects contact Csa4 and contact Csb4, resistor Rs5 electrically connects contact Csa5 and contact Csb5, and resistor Rs6 electrically connects contact Csa6 and contact Csb6.

[0368] Therefore, even if the voltage value of the reference voltage signal VBS varies due to the operation of any of the ejection modules 23-1 to 23-6, the variation in the voltage value is absorbed by the capacitors C8-1 to C8-6 and the resistors Rs1 to Rs6. As a result, the possibility of variation in the voltage value of the reference voltage signal VBS supplied to each of the ejection modules 23-1 to 23-6 is further reduced.

[0369] 3. Third Implementation

[0370] Next, the liquid ejection device 1 in the third embodiment will be described. When describing the liquid ejection device 1 in the third embodiment, the same components as those in the first and second embodiments are denoted by the same reference numerals, and their descriptions are simplified or omitted.

[0371] Fig.24 is along the equivalent of Figure 15 to Figure 21 The illustrated diagram is a cross-sectional view of the wiring substrate 810 when the wiring substrate 810 of the third embodiment is cut along a line segment of line Bb.

[0372] like Fig.24 As shown, in the liquid ejection device 1 in the third embodiment, the wiring WC1 for transmitting the drive signal COMC1 is arranged on the same layer 844 as the wiring WB1 for transmitting the drive signal COMB1, and similarly, the wirings WC2 to WC6 for respectively transmitting the drive signals COMC2 to COMC6 are respectively arranged on the same layer 844 as the wirings WB2 to WB6 for respectively transmitting the drive signals COMB2 to COMB6.

[0373] In this case, if Fig.24 As shown, the wiring WC1 is preferably arranged in the same layer 844 as the wiring WB1 through which the amount of current flowing is smaller than that of the wiring WA1. Since the amount of current flowing through the wiring WB1 is smaller than that of the wiring WA1, the pattern width of the wiring WB1 can be smaller than the pattern width of the wiring WA1. Thus, the wiring WC1 can be arranged relative to the wiring WA1 and the wiring WS1 along the Z2 direction. As a result, in the wiring substrate 810, the area occupied by the wiring pattern for transmitting the drive signals COMA1, COMB1, COMC1, and the reference voltage signal VBS to the ejection module 23-1 can be reduced, and the miniaturization of the wiring substrate 810 can be achieved. That is, in the liquid ejection device 1 of the second embodiment, in addition to the same effects as the liquid ejection device 1 of the first embodiment, the miniaturization of the wiring substrate 810 can also be achieved.

[0374] Here, as shown in the liquid ejection device 1 of the first embodiment and the second embodiment, the wiring WC1 for transmitting the driving signal COMC1 is arranged in at least any one of the layer 842 provided with the wiring WA1 for transmitting the driving signal COMA1, the layer 844 provided with the wiring WB1 for transmitting the driving signal COMB1, and the layer 843 provided with the wiring WS1 for transmitting the reference voltage signal VBS. Thus, the possibility of distortion of the signal waveforms of the driving signals COMA1, COMB1, and COMC1 supplied to the ejection module 23-1 is reduced without increasing the number of wiring layers of the wiring substrate 810.

[0375] 4. Fourth Implementation

[0376] Next, a liquid ejection device 1 according to a fourth embodiment will be described. When describing the liquid ejection device 1 according to the fourth embodiment, the same components as those of the liquid ejection device 1 according to the first to third embodiments are denoted by the same reference numerals, and description thereof will be simplified or omitted.

[0377] Fig.25 is along the equivalent of Figure 15 to Figure 21 The illustrated diagram is a cross-sectional view of the wiring substrate 810 when the wiring substrate 810 of the fourth embodiment is cut along a line segment of line Bb.

[0378] like Fig.25As shown, in the liquid ejection device 1 in the fourth embodiment, the wiring substrate 810 has a layer 853 and a layer 863. The layer 853 is located between the layer 842 and the layer 843 in the direction along the Z2 direction. In addition, the layer 863 is located between the layer 843 and the layer 844 in the direction along the Z2 direction. The wirings WS1 to WS6 for transmitting the reference voltage signal VBS are provided in the layers 853 and 863. That is, the reference voltage signal VBS is transmitted in the wirings WS1 to WS6 formed in the layers 843, 853, and 863.

[0379] In addition, the wirings WC1 to WC6 for transmitting driving signals COMC1 to COMC6 arranged in layer 843 are each located so that at least a portion thereof is located between the wirings WS1 to WS6 arranged in layer 853 and the wirings WS1 to WS6 arranged in layer 863, and are positioned so as to overlap with a portion of each of the wirings WA1 to WA6, each of the wirings WB1 to WB6, and each of the wirings WS1 to WS6 in a direction along the Z2 direction which is a direction.

[0380] In the liquid ejection device 1 of the fourth embodiment constructed as above, the effective cross-sectional area of ​​the wiring WS1 to WS6 for transmitting the reference voltage signal VBS can be increased. Thus, in addition to the same effects as the liquid ejection device 1 of the first to third embodiments, the possibility of the voltage value of the reference voltage signal VBS changing due to the impedance component of the wiring WS1 to WS6 can be further reduced.

[0381] 5. Fifth Implementation

[0382] Next, a fifth embodiment of the liquid ejection device 1 is described. When describing the fifth embodiment of the liquid ejection device 1, the same components as those of the first to fourth embodiments are denoted by the same reference numerals, and description thereof is simplified or omitted.

[0383] Fig.26 is along the equivalent of Figure 15 to Figure 21 The cross-sectional view of the wiring substrate 810 when the wiring substrate 810 of the fifth embodiment is cut through by the line segment of the line Bb shown. Fig.26 As shown, in the liquid ejection device 1 according to the fifth embodiment, the wiring substrate 810 has layers 852 , 853 , and 854 .

[0384] The wirings WA1 to WA6 for transmitting the drive signals COMA1 to COMA6 are provided in the layer 852. In addition, the layer 852 is located adjacent to the layer 842 in which the wirings WA1 to WA6 for transmitting the drive signals COMA1 to COMA6 are provided in the direction along the Z2 direction as one direction, and the layer 842 is located between the layer 843 and the layer 852. In this case, at least a portion of each of the wirings WA1 to WA6 provided in the layer 852 is provided so as to overlap with at least a portion of each of the wirings WA1 to WA6 provided in the layer 842 in the direction along the Z2 direction as one direction.

[0385] The wirings WB1 to WB6 for transmitting the drive signals COMB1 to COMB6 are provided in the layer 854. In addition, the layer 854 is located adjacent to the layer 844 in which the wirings WB1 to WB6 for transmitting the drive signals COMB1 to COMB6 are provided in the direction along the Z2 direction as one direction, and the layer 844 is located between the layer 843 and the layer 854. In this case, at least a portion of each of the wirings WB1 to WB6 provided in the layer 854 is provided so as to overlap with at least a portion of each of the wirings WB1 to WB6 provided in the layer 844 in the direction along the Z2 direction as one direction.

[0386] The wirings WS1 to WS6 for transmitting the reference voltage signal VBS are provided in the layer 853. In addition, the layer 853 is located adjacent to the layer 843 in which the wirings WS1 to WS6 for transmitting the reference voltage signal VBS are provided in the direction along the Z2 direction as one direction. In this case, at least a portion of each of the wirings WS1 to WS6 provided in the layer 853 is provided so as to overlap at least a portion of each of the wirings WS1 to WS6 provided in the layer 843 in the direction along the Z2 direction as one direction.

[0387] In the liquid ejection device 1 of the fifth embodiment constructed as above, the effective cross-sectional area of ​​the wiring WS1 to WS6 for transmitting the reference voltage signal VBS can be increased, and the effective cross-sectional area of ​​the wiring WA1 to WA6 for transmitting the drive signals COMA1 to COMA6 and the effective cross-sectional area of ​​the wiring WB1 to WB6 for transmitting the drive signals COMB1 to COMB6 can be increased. Thus, in addition to the same effects as those of the liquid ejection device 1 of the first to fourth embodiments, the possibility of distortion in the signal waveform of the drive signals COMA1 to COMA6 due to the impedance component of the wiring WA1 to WA6 can be reduced, the possibility of distortion in the signal waveform of the drive signals COMB1 to COMB6 due to the impedance component of the wiring WB1 to WB6 can be reduced, and further, the possibility of variation in the voltage value of the reference voltage signal VBS due to the impedance component of the wiring WS1 to WS6 can be further reduced.

[0388] Here, layer 852 is an example of a fourth wiring layer, and wirings WA1 to WA6 provided in layer 852 are examples of fifth wirings. In addition, layer 854 is an example of a fifth wiring layer, and wirings WB1 to WB6 provided in layer 854 are examples of sixth wirings. In addition, layer 853 is an example of a sixth wiring layer, and wirings WS1 to WS6 provided in layer 853 are examples of seventh wirings.

[0389] Although the embodiments and modifications have been described above, the present invention is not limited to these embodiments, and can be implemented in various forms within the scope of the gist thereof. For example, the above embodiments can be appropriately combined.

[0390] The present invention includes substantially the same configuration as the configuration described in the embodiment (for example, a configuration with the same function, method and result or a configuration with the same purpose and effect). In addition, the present invention includes a configuration obtained by replacing a non-essential part of the configuration described in the embodiment. In addition, the present invention includes a configuration having the same effect as the configuration described in the embodiment or a configuration capable of achieving the same purpose. In addition, the present invention includes a configuration obtained by adding a known technology to the configuration described in the embodiment.

[0391] The following contents are derived from the above-mentioned embodiment.

[0392] One aspect of the liquid ejection device comprises:

[0393] a liquid ejection head including a piezoelectric element having a first electrode and a second electrode, and ejecting liquid by driving the piezoelectric element; and

[0394] A driving circuit substrate drives the piezoelectric element.

[0395] The driving circuit substrate comprises:

[0396] a first driving circuit, outputting to the first electrode a first driving signal for driving the piezoelectric element to cause the liquid ejection head to eject liquid;

[0397] a second driving circuit, outputting to the first electrode a second driving signal for driving the piezoelectric element to cause the liquid ejection head to eject liquid;

[0398] a third driving circuit, outputting a third driving signal to the first electrode to drive the piezoelectric element so that the liquid ejection head does not eject liquid;

[0399] a reference voltage output circuit for supplying a reference voltage signal to the second electrode; and

[0400] A substrate is provided with the first driving circuit, the second driving circuit, the third driving circuit and a reference voltage output circuit,

[0401] The substrate comprises:

[0402] a first wiring, transmitting the first driving signal;

[0403] a second wiring, transmitting the second driving signal;

[0404] A third wiring, transmitting the third driving signal;

[0405] A fourth wiring, transmitting the reference voltage signal;

[0406] A first wiring layer, provided with the first wiring;

[0407] A second wiring layer provided with the second wiring; and

[0408] a third wiring layer, located between the first wiring layer and the second wiring layer along a direction and provided with the fourth wiring,

[0409] The third wiring is provided in any one of the first wiring layer, the second wiring layer, and the third wiring layer.

[0410] According to the liquid ejection device, by making the third wiring layer provided with the fourth wiring for transmitting the reference voltage signal be located between the first wiring layer provided with the first wiring for transmitting the first drive signal and the second wiring layer provided with the second wiring for transmitting the second drive signal, the inductance component caused by the current generated when the first drive signal is transmitted and the inductance component caused by the current generated when the second drive signal is transmitted are offset by the inductance component caused by the current transmitted in the fourth wiring. As a result, the possibility of waveform distortion caused by the inductance component in the first drive signal and the second drive signal is reduced.

[0411] Furthermore, the current generated when the third drive signal is transmitted is smaller than the current generated when the first drive signal is transmitted and the current generated when the second drive signal is transmitted because the piezoelectric element is driven to such an extent that ink is not ejected. By providing the third wiring for the third drive signal having such a small amount of transmission current in the same wiring layer as at least any one of the first wiring layer for transmitting the first drive signal, the second wiring layer for transmitting the second drive signal, and the third wiring layer for transmitting the fourth wiring for transmitting the reference voltage signal, the possibility of undesirably increasing the number of layers of the substrate can be reduced.

[0412] In one aspect of the liquid ejection device,

[0413] At least a portion of the first wiring and at least a portion of the second wiring may be provided so as to overlap with at least a portion of the fourth wiring in a direction along the one direction.

[0414] According to the liquid ejection device, the inductance component caused by the current generated when the first drive signal is transmitted and the inductance component caused by the current generated when the second drive signal is transmitted are more efficiently offset by the inductance component caused by the current transmitted in the fourth wiring. As a result, the possibility of waveform distortion caused by the inductance component in the first drive signal and the second drive signal is further reduced.

[0415] In one aspect of the liquid ejection device,

[0416] The third wiring may also be provided in the third wiring layer.

[0417] In one aspect of the liquid ejection device, it may be that:

[0418] The substrate includes a fifth wiring for transmitting the first driving signal and a fourth wiring layer provided with the fifth wiring,

[0419] The fourth wiring layer is located adjacent to the first wiring layer in a direction along the one direction,

[0420] The first wiring layer is located between the third wiring layer and the fourth wiring layer,

[0421] At least a portion of the fifth wiring is provided so as to overlap with at least a portion of the first wiring in a direction along the one direction.

[0422] In one aspect of the liquid ejection device, it may be that:

[0423] The substrate includes a sixth wiring for transmitting the second driving signal and a fifth wiring layer provided with the sixth wiring,

[0424] The fifth wiring layer is located adjacent to the second wiring layer in a direction along the one direction,

[0425] The second wiring layer is located between the third wiring layer and the fifth wiring layer,

[0426] At least a portion of the sixth wiring is provided so as to overlap with at least a portion of the second wiring in a direction along the one direction.

[0427] In one aspect of the liquid ejection device, it may be that:

[0428] The substrate includes a seventh wiring for transmitting the reference voltage signal and a sixth wiring layer provided with the seventh wiring.

[0429] The sixth wiring layer is located adjacent to the third wiring layer in a direction along the one direction,

[0430] At least a portion of the seventh wiring is provided so as to overlap with at least a portion of the fourth wiring in a direction along the one direction.

[0431] In one aspect of the liquid ejection device, it may be that:

[0432] The first wiring layer and the third wiring layer are located adjacent to each other in a direction along the one direction.

[0433] The second wiring layer and the third wiring layer are located adjacent to each other in a direction along the one direction.

[0434] In one aspect of the liquid ejection device, it may be that:

[0435] The substrate includes an eighth wiring for transmitting a first constant voltage signal of a certain potential and a seventh wiring layer provided with the eighth wiring,

[0436] The first wiring layer is located between the third wiring layer and the seventh wiring layer,

[0437] At least a portion of the eighth wiring is provided so as to overlap with at least a portion of the first wiring in a direction along the one direction.

[0438] In one aspect of the liquid ejection device, it may be that:

[0439] The substrate includes a ninth wiring for transmitting a second constant voltage signal of a certain potential and an eighth wiring layer provided with the ninth wiring,

[0440] The second wiring layer is located between the third wiring layer and the eighth wiring layer,

[0441] At least a portion of the ninth wiring is provided so as to overlap with at least a portion of the second wiring in a direction along the one direction.

[0442] One aspect of the driving circuit substrate is a driving circuit substrate for driving a liquid ejection head, wherein the liquid ejection head includes a piezoelectric element having a first electrode and a second electrode, and ejects liquid by driving the piezoelectric element, and the driving circuit substrate comprises:

[0443] a first driving circuit, outputting to the first electrode a first driving signal for driving the piezoelectric element to cause the liquid ejection head to eject liquid;

[0444] a second driving circuit, outputting to the first electrode a second driving signal for driving the piezoelectric element to cause the liquid ejection head to eject liquid;

[0445] a third driving circuit, outputting a third driving signal to the first electrode to drive the piezoelectric element so that the liquid ejection head does not eject liquid;

[0446] a reference voltage output circuit for supplying a reference voltage signal to the second electrode; and

[0447] A substrate is provided with the first driving circuit, the second driving circuit, the third driving circuit and a reference voltage output circuit,

[0448] The substrate comprises:

[0449] a first wiring, transmitting the first driving signal;

[0450] a second wiring, transmitting the second driving signal;

[0451] A third wiring, transmitting the third driving signal;

[0452] A fourth wiring, transmitting the reference voltage signal;

[0453] A first wiring layer, provided with the first wiring;

[0454] A second wiring layer provided with the second wiring; and

[0455] a third wiring layer, located between the first wiring layer and the second wiring layer along a direction and provided with the fourth wiring,

[0456] The third wiring is provided in any one of the first wiring layer, the second wiring layer, and the third wiring layer.

[0457] According to the driving circuit substrate, by making the third wiring layer provided with the fourth wiring for transmitting the reference voltage signal be located between the first wiring layer provided with the first wiring for transmitting the first driving signal and the second wiring layer provided with the second wiring for transmitting the second driving signal, the inductance component caused by the current generated when the first driving signal is transmitted and the inductance component caused by the current generated when the second driving signal is transmitted are offset by the inductance component caused by the current transmitted in the fourth wiring. As a result, the possibility of waveform distortion caused by the inductance component in the first driving signal and the second driving signal is reduced.

[0458] Furthermore, the current generated when the third drive signal is transmitted is smaller than the current generated when the first drive signal is transmitted and the current generated when the second drive signal is transmitted because the piezoelectric element is driven to such an extent that ink is not ejected. By providing the third wiring for the third drive signal having such a small amount of transmission current in the same wiring layer as at least any one of the first wiring layer for transmitting the first drive signal, the second wiring layer for transmitting the second drive signal, and the third wiring layer for transmitting the fourth wiring for transmitting the reference voltage signal, the possibility of undesirably increasing the number of layers of the substrate can be reduced.

Claims

1. A liquid ejection device, characterized in that: have: A liquid ejection head including a piezoelectric element having a first electrode and a second electrode, and ejecting liquid by driving the piezoelectric element; and A driving circuit substrate drives the piezoelectric element. The driving circuit substrate comprises: a first driving circuit, outputting to the first electrode a first driving signal for driving the piezoelectric element to cause the liquid ejection head to eject liquid; a second driving circuit, outputting to the first electrode a second driving signal for driving the piezoelectric element to cause the liquid ejection head to eject liquid; a third driving circuit, outputting a third driving signal to the first electrode to drive the piezoelectric element so that the liquid ejection head does not eject liquid; A reference voltage output circuit supplies a reference voltage signal to the second electrode; as well as A substrate is provided with the first driving circuit, the second driving circuit, the third driving circuit and the reference voltage output circuit, The substrate comprises: a first wiring, transmitting the first driving signal; a second wiring, transmitting the second driving signal; A third wiring, transmitting the third driving signal; A fourth wiring, transmitting the reference voltage signal; A first wiring layer, provided with the first wiring; A second wiring layer provided with the second wiring; and a third wiring layer, located between the first wiring layer and the second wiring layer along a direction, and provided with the fourth wiring, The third wiring is provided in any one of the first wiring layer, the second wiring layer, and the third wiring layer.

2. The liquid ejection device according to claim 1, characterized in that: At least a portion of the first wiring and at least a portion of the second wiring are provided so as to overlap with at least a portion of the fourth wiring in a direction along the one direction.

3. The liquid ejection device according to claim 1 or 2, characterized in that: The third wiring is provided in the third wiring layer.

4. The liquid ejection device according to claim 1, characterized in that: The substrate includes a fifth wiring for transmitting the first driving signal and a fourth wiring layer provided with the fifth wiring, The fourth wiring layer is located adjacent to the first wiring layer in a direction along the one direction, The first wiring layer is located between the third wiring layer and the fourth wiring layer, At least a portion of the fifth wiring is provided so as to overlap with at least a portion of the first wiring in a direction along the one direction.

5. The liquid ejection device according to claim 1, characterized in that: The substrate includes a sixth wiring for transmitting the second driving signal and a fifth wiring layer provided with the sixth wiring, The fifth wiring layer is located adjacent to the second wiring layer in a direction along the one direction, The second wiring layer is located between the third wiring layer and the fifth wiring layer, At least a portion of the sixth wiring is provided so as to overlap with at least a portion of the second wiring in a direction along the one direction.

6. The liquid ejection device according to claim 1, characterized in that: The substrate includes a seventh wiring for transmitting the reference voltage signal and a sixth wiring layer provided with the seventh wiring. The sixth wiring layer is located adjacent to the third wiring layer in a direction along the one direction, At least a portion of the seventh wiring is provided so as to overlap with at least a portion of the fourth wiring in a direction along the one direction.

7. The liquid ejection device according to claim 1, characterized in that: The first wiring layer and the third wiring layer are located adjacent to each other in a direction along the one direction. The second wiring layer and the third wiring layer are located adjacent to each other in a direction along the one direction.

8. The liquid ejection device according to claim 1, characterized in that: The substrate includes an eighth wiring for transmitting a first constant voltage signal of a certain potential and a seventh wiring layer provided with the eighth wiring, The first wiring layer is located between the third wiring layer and the seventh wiring layer, At least a portion of the eighth wiring is provided so as to overlap with at least a portion of the first wiring in a direction along the one direction.

9. The liquid ejection device according to claim 1, characterized in that: The substrate includes a ninth wiring for transmitting a second constant voltage signal of a certain potential and an eighth wiring layer provided with the ninth wiring, The second wiring layer is located between the third wiring layer and the eighth wiring layer, At least a portion of the ninth wiring is provided so as to overlap with at least a portion of the second wiring in a direction along the one direction.

10. A driving circuit substrate, characterized in that: A liquid ejection head is driven, wherein the liquid ejection head includes a piezoelectric element having a first electrode and a second electrode, and the liquid is ejected by driving the piezoelectric element, wherein the driving circuit substrate comprises: a first driving circuit, outputting to the first electrode a first driving signal for driving the piezoelectric element to cause the liquid ejection head to eject liquid; a second driving circuit, outputting to the first electrode a second driving signal for driving the piezoelectric element to cause the liquid ejection head to eject liquid; a third driving circuit, outputting a third driving signal to the first electrode to drive the piezoelectric element so that the liquid ejection head does not eject liquid; A reference voltage output circuit supplies a reference voltage signal to the second electrode; as well as A substrate is provided with the first driving circuit, the second driving circuit, the third driving circuit and the reference voltage output circuit, The substrate comprises: a first wiring, transmitting the first driving signal; a second wiring, transmitting the second driving signal; A third wiring, transmitting the third driving signal; A fourth wiring, transmitting the reference voltage signal; A first wiring layer, provided with the first wiring; A second wiring layer provided with the second wiring; and a third wiring layer, located between the first wiring layer and the second wiring layer along a direction, and provided with the fourth wiring, The third wiring is provided in any one of the first wiring layer, the second wiring layer, and the third wiring layer.

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