A decoding method and device based on LDPC code and a solid state disk

Abstract

The application relates to the technical field of flash memory error correction, in particular to a decoding method and device based on an LDPC code and a solid state disk. The method comprises the following steps: obtaining initial LLR quantization corresponding to an initial input code word which fails in initial iteration decoding; monitoring the characteristics of all variable nodes in the LDPC decoding process; hierarchically obtaining the positions of error variable nodes; and re-decoding the code word which fails in original decoding in combination with an LLR gradient rule, so as to obtain a decoding result which is correct, wherein the LLR gradient rule is set by combining different difference conditions, so as to identify different numbers of error variable nodes step by step, and the LLR value sign is flipped correspondingly, so as to reduce the number of error bits in each iteration decoding process, thereby improving the error correction capability of the LDPC decoding, reducing the delay and optimizing the use experience of users.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of flash memory error correction technology, and specifically to a decoding method and device based on LDPC code and a solid state disk. BACKGROUND

[0002] With the continuous improvement of flash memory storage density, ECC (Error Correction Code) technology is required to further provide higher error bit correction capability. Nowadays, the ECC in the SSD host chip generally adopts LDPC (Low-Density Parity-Check) error correction technology for decoding error correction. However, LDPC decoding can be affected by TSs (Trapping Sets) to cause decoding failure, which leads to error flatness in a low error rate state. In addition, there is another way of using BTA (Backtracking Algorithm) for error correction, which requires re-quantization of a single variable node and then decoding. The number of re-decoding can be very high, resulting in high delay and affecting user experience. In addition, this method cannot be applied to the case of quantizing two or more error variable nodes at the same time. SUMMARY

[0003] The embodiments of the present application mainly solve the technical problems of poor error correction capability or high delay in the existing decoding method.

[0004] To solve the above technical problems, one technical solution adopted by the embodiments of the present application is to provide a decoding method based on LDPC code, comprising:

[0005] The initial LLR quantization corresponding to the initial input codeword which fails in the initial LDPC decoding is acquired, and the characteristics of all variable nodes in the LDPC decoding process are monitored; the problem variable nodes are identified based on the characteristics of all the variable nodes, and the positions of the problem variable nodes are acquired, wherein the problem variable nodes include error variable nodes num_e and misjudgment variable nodes num_r; according to the LLR ladder rule, the problem variable nodes corresponding to each level of the LLR ladder rule are hierarchically divided, wherein the node number ratio corresponding to the i-th level of the LLR ladder rule is denoted as pi, pi=(num_ei / num_ri), and pi>p(i+1), i is an integer greater than or equal to 1; starting from the first level of the LLR ladder rule, the problem variable nodes corresponding to the current level of the LLR ladder rule are acquired, error correction processing is performed on the problem variable nodes, and iterative decoding is performed on the error correction result; if the iterative decoding fails, the problem variable nodes corresponding to the next level of the LLR ladder rule are acquired, error correction processing is performed on the problem variable nodes, and iterative decoding is performed on the error correction result, until the iterative decoding succeeds or the error correction result of the last level of the LLR ladder rule has been subjected to iterative decoding.

[0006] Optionally, the method further comprises: configuring the LLR ladder rule, which comprises: performing LDPC decoding on the experimental input codeword, and acquiring the simulation variable node data in the decoding process; performing error injection on the simulation variable node data, and performing iterative decoding on the error-injected data as simulation input codeword, wherein the simulation input codeword includes error-injected simulation variable nodes and non-error-injected simulation variable nodes; acquiring the LLR values and positions of all simulation variable nodes corresponding to the simulation input codeword in the iteration process; acquiring the difference conditions of the error-injected simulation variable nodes and the non-error-injected simulation variable nodes, and identifying problem simulation variable nodes based on the difference conditions, wherein the difference conditions include at least one of check result data, LLR absolute value or LLR symbol flip frequency, and the problem simulation variable nodes include error simulation variable nodes and misjudgment simulation variable nodes; determining the level of the LLR ladder rule based on the error injection result and the difference conditions, wherein the LLR ladder rule at least includes a first level of the LLR ladder rule, and the node number ratio of the corresponding level decreases as the level of the LLR ladder rule increases.

[0007] Optionally, the acquisition of the difference conditions of the error-injected simulation variable nodes and the non-error-injected simulation variable nodes, and the identification of the problem simulation variable nodes based on the difference conditions comprises: monitoring all check nodes that fail in the current iterative decoding process; determining problem simulation variable nodes based on the check nodes, and acquiring the positions of the problem simulation variable nodes.

[0008] Optionally, the acquiring the difference conditions of the error-injected simulation variable node and the non-error-injected simulation variable node and identifying the problem simulation variable node based on the difference conditions comprises: monitoring the LLR values of all simulation variable nodes in the current iteration decoding process; acquiring the simulation variable nodes whose LLR values exceed a preset threshold in the iteration decoding process, denoted as problem simulation variable nodes, and acquiring the positions of the problem simulation variable nodes.

[0009] Optionally, the acquiring the difference conditions of the error-injected simulation variable node and the non-error-injected simulation variable node and identifying the problem simulation variable node based on the difference conditions comprises: monitoring the LLR value sign flipping times of all simulation variable nodes in the current iteration decoding process; acquiring the simulation variable nodes whose LLR value sign flipping times exceed a preset flipping times in the iteration decoding process, denoted as problem simulation variable nodes, and acquiring the positions of the problem simulation variable nodes.

[0010] Optionally, the setting the levels of the LLR ladder rule based on the error correction result and the difference conditions comprises: identifying problem simulation variable nodes based on different difference condition combinations, wherein each set of the difference condition combinations comprises at least one difference condition; acquiring the node number ratio corresponding to each set of difference condition combinations respectively in combination with the error-injected simulation variable node and the non-error-injected simulation variable node; and setting the difference condition combination corresponding to the node number ratio as the i-th level LLR ladder rule when the node number ratio satisfies the i-th level preset range, wherein the maximum level of the LLR ladder rule is m, i takes integer values in [1-m], and pi > p(i+1).

[0011] Optionally, the error correction processing on the problem variable node and the iteration decoding on the error correction result comprises: acquiring the positions of the problem variable nodes corresponding to the current level LLR ladder rule; performing sign flipping on the LLR values of the problem variable nodes in combination with the positions of the problem variable nodes; taking the LLR values of the non-problem variable nodes and the LLR values of the problem variable nodes after sign flipping as the error correction result, and performing iteration decoding on the error correction result.

[0012] To solve the above technical problems, another technical scheme adopted by the embodiments of the present application is to provide a decoding device based on LDPC code, comprising: a decoding monitoring module, configured to acquire initial LLR quantization corresponding to an initial input code word of initial LDPC decoding failure, and monitor features of all variable nodes in the LDPC decoding process; a node identification module, configured to identify problem variable nodes based on the features of all the variable nodes and acquire positions of the problem variable nodes, wherein the problem variable nodes include error variable nodes num_e and misjudgment variable nodes num_r; a node division module, configured to hierarchically divide the problem variable nodes corresponding to each level of LLR ladder rule according to the LLR ladder rule, wherein the number of nodes corresponding to the i-th level of LLR ladder rule is denoted as pi, pi=(num_ei / num_ri), and pi>p(i+1), i is an integer greater than or equal to 1; and a node error correction module, configured to start from the first level of LLR ladder rule, acquire the problem variable nodes corresponding to the current level of LLR ladder rule, perform error correction processing on the problem variable nodes, and perform iterative decoding on the error correction result; and further configured to, when the iterative decoding fails, acquire the problem variable nodes corresponding to the next level of LLR ladder rule, perform error correction processing on the problem variable nodes, and perform iterative decoding on the error correction result, until the iterative decoding succeeds or the error correction result of the last level of LLR ladder rule has been subjected to iterative decoding.

[0013] To solve the above technical problems, still another technical scheme adopted by the embodiments of the present application is to provide a solid state disk, comprising: at least one processor; and a memory in communication connection with the at least one processor; wherein the memory stores instructions executable by the at least one processor, so as to enable the at least one processor to execute the decoding method based on LDPC code described above.

[0014] To solve the above technical problems, still another technical scheme adopted by the embodiments of the present application is to provide a non-volatile computer readable storage medium, which stores computer executable instructions, when the computer executable instructions are executed by an electronic device, the electronic device executes the decoding method based on LDPC code described above.

[0015] Compared with the related art, the embodiment of the application provides a decoding method, device and solid state disk based on LDPC code. The decoding method comprises the following steps: obtaining initial LLR quantization corresponding to an initial input code word which fails in initial iteration decoding; monitoring the characteristics of all variable nodes in the LDPC decoding process; obtaining the positions of error variable nodes in stages; re-decoding the code word which fails in original decoding according to the LLR ladder rule, so as to obtain a decoding result which is correct, wherein the LLR ladder rule is used to identify different numbers of error variable nodes in stages by setting different combinations of difference conditions, and the sign of the LLR value is flipped, so as to reduce the number (or proportion) of error bits in each iteration decoding process, thereby improving the error correction capability of the LDPC decoding. Compared with the BTA error correction method, the decoding method based on LDPC code provided by the embodiment of the application has lower delay, and the user experience is optimized. BRIEF DESCRIPTION OF DRAWINGS

[0016] One or more embodiments are illustrated by way of example with reference to the accompanying drawings, which are schematic and not intended to be limiting of the embodiments, and in which like reference numerals designate similar items in the figures, in which: the drawings do not limit the proportion.

[0017] Figure 1 is a flowchart of a decoding method based on LDPC code provided by the embodiment of the application;

[0018] Figure 2a is a flowchart of another decoding method based on LDPC code provided by the embodiment of the application;

[0019] Figure 2b is a method diagram for configuring the LLR ladder rule provided by the application;

[0020] Figure 3 is a method diagram for decoding according to the LLR ladder rule provided by the embodiment of the application;

[0021] Figure 4 is a diagram of an LDPC decoding process provided by the embodiment of the application;

[0022] Figure 5 is a diagram of the LLR ladder rule provided by the embodiment of the application;

[0023] Figure 6 is a structural diagram of a decoding device based on LDPC code provided by the embodiment of the application;

[0024] Figure 7 is a structural diagram of a solid state disk provided by the embodiment of the application. DETAILED DESCRIPTION

[0025] In order to make the purposes, technical solutions and advantages of the present application clearer, the present application is further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and not used to limit the present application. It should be noted that, if there is no conflict, each feature in the embodiments of the present application can be combined with each other, and all within the protection scope of the present application. In addition, although the functional modules are divided in the device schematic diagram, and the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in a different order than the module division in the device schematic diagram or the order in the flowchart.

[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. All publications, patent applications, patents, and other references mentioned herein are incorporated by reference in their entirety.

[0027] Generally, the LDPC decoding process inside the SSD includes hard decoding and soft decoding, although the error correction capability of soft decoding is higher than that of hard decoding, but it will read the flash memory particles multiple times, increase the number of operations in the read direction and the flash memory particles, not only occupy a large amount of flash memory data bandwidth, but also may reduce the flash memory life. Hard decoding can be understood as multiplying the input codeword with the check matrix. If it is a 0 matrix, it means that the received is a correct codeword. If it is not a correct codeword, error correction decoding is performed. The error correction decoding process is to pass information between check nodes and variable nodes, iterate until all parity checks are 0, then decoding is successful. If the decoding process ends without all parity checks being 0, it is judged that this decoding fails. In order to improve the error correction capability of hard decoding, please refer to Figure 1 The embodiments of the present application provide a decoding method based on LDPC code, which is used to improve the hard decoding error correction capability of flash memory. The method comprises:

[0028] S11, obtaining the initial LLR quantization corresponding to the initial input codeword of the initial LDPC decoding failure, and monitoring the characteristics of all variable nodes in the LDPC decoding process. The initial LLR quantization (Log Likelihood Ratio) of one bit is one of 0 or 1.

[0029] The initial LDPC decoding failure means that the number (or proportion) of error bits in the current initial input code word exceeds the error correction capability range of the LDPC. Generally, one initial input code word corresponds to 4K bits of data, which belongs to channel information and can also be referred to as a variable node. Each bit (or variable node) can be correct or incorrect. During the initial LDPC decoding, the "correct" or "incorrect" variable node in the initial input code word can be identified in the iteration decoding process of the LDPC decoding on the initial input code word. It should be noted that the above "correct" and "incorrect" in quotation marks refer to the identification result, that is, if a variable node is identified as an "incorrect" variable node, the node can be a truly incorrect error variable node or a non-error variable node misjudged as incorrect by the LDPC. In the embodiment, in order to facilitate explanation and description, the "incorrect" variable node is expressed as a problem variable node.

[0030] S12, identify the problem variable node based on the characteristics of all the variable nodes, and obtain the position of the problem variable node. In order to facilitate explanation and description, the problem variable node is denoted as an error variable node num_e and a misjudged variable node num_r in the embodiment of the application, wherein the error variable node refers to a truly incorrect variable node, and the misjudged variable node refers to a variable node that is not incorrect but is misjudged as incorrect by the LDPC. In the method provided by the embodiment of the application, after the initial iteration decoding fails, the decoding failure is not directly judged, but the initial LLR quantization corresponding to the initial input code word and the characteristics of all the variable nodes in the LDPC decoding process are obtained. The problem variable node is identified based on the characteristics of all the variable nodes, and the position of the problem variable node is obtained. The number of error variable nodes is reduced through subsequent error correction means, so that the number of error variable nodes in the error-corrected data is within the LDPC decoding range, so as to obtain the correct decoding result as much as possible, thereby improving the success rate of the LDPC decoding.

[0031] Please refer to Figure 2a In some embodiments, the method further comprises: S13, configuring the LLR ladder rule. The LLR ladder rule needs to be configured through experimental input code word before actual use. After the rule is configured, the following step S14 can be directly executed after step S12 in the actual use scenario. Please refer to Figure 2b The configuration of the LLR ladder rule comprises:

[0032] S131, LDPC decoding is performed on the experimental input codeword, and simulation variable node data in the decoding process is obtained. The experimental input codeword can be an example input codeword simulating an actual use case. In some scenarios, in order to simulate a decoding failure case, data with an error variable node number (or proportion) exceeding the LDPC error correction capability range can be selected as the experimental input codeword. Iterative decoding is performed on the experimental input codeword, and the result data obtained by iterative decoding is taken as the simulation variable node data.

[0033] S132, error injection is performed on the simulation variable node data, and the error-injected data is taken as a simulation input codeword for iterative decoding. The simulation input codeword includes error-injected simulation variable nodes and non-error-injected simulation variable nodes. Error injection is performed on the simulation variable node data. It should be noted that error injection is performed on the simulation variable node data to facilitate subsequent determination of the level of the LLR ladder rule. The error-injected simulation variable nodes obtained during the error injection step are truly erroneous simulation variable nodes, and the non-error-injected simulation variable nodes are truly non-erroneous simulation variable nodes. Iterative decoding is performed on the error-injected data as a simulation input codeword. At this time, the data is error-injected data, so the staff already knows which variable nodes are erroneous.

[0034] S133, the LLR values and positions of all simulation variable nodes in the simulation input codeword during iteration are obtained. During a LDPC decoding process, the LDPC decoding unit performs multiple rounds of decoding, obtains process data of each round of decoding, including whether the check node corresponding to each variable node is successfully checked, and infers the position information of the corresponding variable node according to the check node that fails to check, so as to facilitate subsequent determination of the problem variable node; the LLR values of all variable nodes in each round of decoding can also be obtained, so as to facilitate subsequent determination of the error variable node according to the change of the LLR value.

[0035] It should be noted that the actual process of performing multiple rounds of decoding is that information is transmitted between the check node and the variable node in a decoding process, and iteration is performed until all parity checks are 0. If the iteration process ends without all parity checks being 0, it is determined that this decoding fails. The iteration process is described as multiple rounds of decoding only to distinguish from the process of processing the codeword based on the LLR ladder rule in the subsequent text, to facilitate explanation and description.

[0036] S134, obtain a difference condition of the error injection simulation variable node and the non-error injection simulation variable node, and identify a problem simulation variable node based on the difference condition, wherein the difference condition comprises at least one of check result data, an LLR absolute value, or an LLR symbol flip count, and the problem simulation variable node comprises an error simulation variable node and a misjudgment simulation variable node. It should be noted that the problem simulation variable node refers to the result of identification, that is, if a certain variable node is identified as a problem simulation variable node, the node may be an error simulation variable node that is actually wrong, or a misjudgment simulation variable node that is misjudged as an error by the LDPC. The error injection process before this can distinguish whether a simulation variable node is actually wrong, that is, an error injection simulation variable node is an actually wrong simulation variable node, and a non-error injection simulation variable node is an actually correct simulation variable node.

[0037] The obtaining of the difference condition of the error injection simulation variable node and the non-error injection simulation variable node, and the identification of the problem simulation variable node based on the difference condition can be:

[0038] All check nodes that fail to check in the current iteration decoding process are monitored, and the problem simulation variable node is determined based on the check nodes, and the position of the problem simulation variable node is obtained. That is, the difference condition is used to identify the problem simulation variable node according to the check result, which can be denoted as difference condition a1 for convenience of subsequent explanation and description.

[0039] For example, it is assumed that after 5 rounds of information transmission iteration in the process of iteration decoding of the LDPC decoding unit, the error correction decoding is not performed to make all parity checks 0, which indicates that the decoding fails this time. At this time, the check result data after decoding of a certain round of information transmission iteration can be selected, for example, the check result data after the fifth round of iteration is selected, the check nodes that fail to check are determined according to the check result data, and the simulation variable nodes corresponding to the failed check nodes are back-identified as problem simulation variable nodes. It can be understood that the problem simulation variable nodes identified here have the possibility of misjudgment, that is, they may be error simulation variable nodes that are actually wrong, or misjudgment simulation variable nodes that are misjudged as errors by the LDPC. In addition, the above-mentioned selection of the data of the fifth round to identify the check nodes that fail to check is only an example, and in some embodiments, data of other rounds or a plurality of rounds can also be selected for identification, which is not limited here.

[0040] The obtaining of the difference condition of the error injection simulation variable node and the non-error injection simulation variable node, and the identification of the problem simulation variable node based on the difference condition can also be:

[0041] The LLR values of all simulated variable nodes in the current iteration decoding process are monitored, and the simulated variable nodes whose LLR values in the iteration decoding process exceed a preset threshold are obtained, denoted as problem simulated variable nodes, and the positions of the problem simulated variable nodes are obtained. That is, the difference condition is to identify the problem simulated variable nodes according to the LLR values of the simulated variable nodes in the iteration process, and for the convenience of subsequent explanation, it can be denoted as difference condition a2.

[0042] For example, assuming that in the process of one iteration decoding, still taking 5 rounds of information transmission iteration as an example, the LLR values of all simulated variable nodes in the iteration process are obtained. It can be understood that in the first round of iteration and when one iteration decoding is completed, the LLR of a simulated variable node has only two states of 1 or 0, but in the iteration process of 5 rounds of iteration not completed, this value will participate in the calculation of the decoder algorithm, and the LLR value after each iteration may change. The LLR value during the period can be used to reflect the reliability of the data, and the larger the value is, the more reliable it is.

[0043] The preset threshold can be set according to experimental data or the experience of the staff, which is not limited in the embodiment of the application. For example, taking 3 as an example, the judgment condition can be set as follows: in the current iteration decoding process, if there is a simulated variable node whose LLR value in each iteration is less than 3, the simulated variable node is identified as a problem simulated variable node; or it can also be set as follows: if the LLR value of more than 2 rounds (taking 2 as an example, but also other quantities) is less than 3, it is identified as a problem simulated variable node, or it can also be set as follows: the LLR value of the 4th round (taking 4 as an example, but also other rounds) is less than 3, which is identified as a problem simulated variable node, and so on.

[0044] It can be understood that the LLR value is a value with a positive or negative sign. In actual design, in addition to directly judging according to the LLR value, it can also be judged according to the maximum value of the absolute value of the LLR, the minimum value of the absolute value of the LLR, the average value of the absolute value of the LLR, or the maximum value / minimum value / average value of the absolute value of the LLR with the same sign. Taking the average value of the absolute value of the LLR as an example, assuming that the simulated variable node v1 corresponds to five different LLR values after each iteration, the average value of the absolute values of the five LLR values is calculated, and if the value is less than 3, the simulated variable node v1 is identified as a problem simulated variable node. Taking the maximum value of the absolute value of the LLR with the same sign as an example, assuming that the simulated variable node v2 corresponds to five different LLR values after each iteration, the LLR values with the same sign are selected for calculation, for example, there is one LLR value that is negative, and the other four LLR values are positive. Then the maximum value of the absolute values of the four LLR values is calculated for judgment, and if the value is less than 3, the simulated variable node v2 is identified as a problem simulated variable node.

[0045] In some embodiments, the obtaining the difference condition of the error injection simulation variable node and the non-error injection simulation variable node, and identifying the problem simulation variable node based on the difference condition can further include:

[0046] monitoring the number of times of LLR sign flips of all simulation variable nodes in the current iteration decoding process; obtaining the simulation variable node whose number of times of LLR sign flips exceeds a preset number of times of flips in the iteration decoding process, denoted as a problem simulation variable node, and obtaining the position of the problem simulation variable node. That is, the difference condition is to identify the "error" simulation variable node according to the number of times of LLR sign flips of each simulation variable node in the iteration process. For the convenience of subsequent explanation and description, it can be denoted as difference condition a3.

[0047] For example, assuming that in the process of one iteration decoding, still taking 5 rounds of information transmission iteration as an example, the number of times of LLR sign flips of all simulation variable nodes in the iteration process is obtained. It can be understood that the LLR value after each iteration can change, and the LLR sign can also change. The preset number of times of flips can be set according to the experimental data of the previous time or the personal experience of the staff, which is not limited in the embodiments of the present application. For example, taking 3 as an example of the preset number of times of flips. In the process of this iteration decoding, if there is a simulation variable node whose LLR sign flips more than 3 times in the process of 5 iterations, the simulation variable node is identified as a problem simulation variable node.

[0048] It should be noted that in addition to the above difference conditions a1, a2 and a3, there are other types of difference conditions, which are not all listed in the embodiments of the present application and do not mean that other types of difference conditions cannot be used. However, the above difference conditions a1, a2 and a3 are relatively more reasonable and more practical difference conditions.

[0049] S135, determining the level of the LLR ladder rule based on the error injection result and the difference condition, wherein the LLR ladder rule at least includes a first level LLR ladder rule, and the number of nodes corresponding to the level decreases as the level of the LLR ladder rule increases. It can be understood that the error injection result in this step is the data after error injection, so the staff already knows which simulation variable nodes are error, so it can be known which simulation variable nodes are misjudged as misjudged simulation variable nodes and which are truly error simulation variable nodes.

[0050] The setting the level of the LLR ladder rule based on the error injection result and the difference condition includes:

[0051] S1351、based on different combinations of difference conditions, identify problem simulation variable nodes, wherein each combination of difference conditions includes at least one difference condition. In combination with the above difference conditions a1, a2 and a3, different combinations of difference conditions are tried, for example, combination 1 is to identify simulation variable nodes that satisfy difference conditions a1, a2 and a3 at the same time as problem simulation variable nodes, that is, assuming that in the process of one iteration decoding, if simulation variable node v3 is identified as a problem simulation variable node under difference conditions a1, a2 and a3, then simulation variable node v3 is identified as a problem simulation variable node, if simulation variable node v4 is identified as a problem simulation variable node only under difference conditions a1 and a2, and is not identified as a problem simulation variable node under difference condition a3, then simulation variable node v4 is not identified as a problem simulation variable node.

[0052] For another example, if combination 2 is to identify simulation variable nodes that satisfy the above difference conditions a1 and a2 as problem simulation variable nodes, still taking the above simulation variable node v4 as an example, simulation variable node v4 is identified as a problem simulation variable node under difference conditions a1 and a2, then in the judgment of combination 2, simulation variable node v4 is identified as a problem simulation variable node.

[0053] For another example, if combination 3 is to identify simulation variable nodes that satisfy the above difference condition a3 as problem simulation variable nodes, and the preset number of flips in the difference condition a3 is 4, that is, assuming that in the process of one iteration decoding, if the number of flips of the sign of the LLR value of simulation variable node v5 is 3, then in the judgment of combination 3, simulation variable node v5 is not identified as a problem simulation variable node.

[0054] For another example, if combination 4 is to identify simulation variable nodes that satisfy the above difference condition a3 as problem simulation variable nodes, and the preset number of flips in the difference condition a3 is 2, still taking the above simulation variable node v5 as an example, the number of flips of the sign of the LLR value of v5 is 3, then in the judgment of combination 4, simulation variable node v5 is identified as a problem simulation variable node.

[0055] It can be understood that the above combinations 1-4 are only combination examples, and in actual situations, there can be more combinations different from the above combinations 1-4, which are not limited here.

[0056] S1352, in combination with the error injection simulation variable node and non-error injection simulation variable node, the node number ratio corresponding to each group of difference condition combination is obtained respectively. Wherein, the node number ratio p is the ratio of the error simulation variable node num_e0 correctly identified and the misjudged simulation variable node num_r0, assuming that there are 100 simulation variable nodes in total, 50 problem variable nodes are identified based on a certain difference condition combination, wherein, according to the error injection result, it can be judged that among the 50 problem simulation variable nodes, the error simulation variable node num_e0 correctly identified has 40, that is, the error simulation variable node actually has 40, and the other 10 simulation variable nodes are the misjudged simulation variable node num_r0, that is, the 10 simulation variable nodes are actually the simulation variable nodes without error, but are misjudged as error simulation variable nodes, then the node number ratio p0 corresponding to the current difference condition combination is p0=num_e0 / num_r0=40 / 10=4.

[0057] It should be noted that generally, the node number ratio p is greater than or equal to 1, the greater the value of p, the higher the identification accuracy of the group of difference condition combinations. If the node number ratio p is less than 1 in some cases, it is considered that the corresponding difference condition combination setting is unreasonable, and the difference condition combination can be discarded.

[0058] S1353, when the node number ratio satisfies the i-th preset range, the difference condition combination corresponding to the node number ratio is set as the i-th LLR ladder rule, wherein the node number ratio corresponding to the i-th LLR ladder rule is pi, pi=(num_ei / num_ri), num_e is the error variable node in the problem variable node, num_r is the misjudged variable node in the problem variable node, the maximum level of the LLR ladder rule is m, i is an integer in [1-m], and pi>p(i+1).

[0059] Wherein, the i-th preset range can be set according to the experimental data of the last time or the experience of the staff, only need to ensure that the identification accuracy of the i-th corresponding difference condition combination is greater than the identification accuracy of the (i+1)-th corresponding difference condition combination.

[0060] For example, assuming that m is 4, the first preset range corresponding to the first LLR ladder rule can be set as [19, positive infinity), and the corresponding identification accuracy is greater than 95%; the second preset range can be set as [4, 19), and the corresponding identification accuracy is 80%-95%, the third preset range can be set as [1.5, 4), and the corresponding identification accuracy is 60%-80%; the fourth preset range can be set as (1, 1.5), and the corresponding identification accuracy is 50%-60%.

[0061] For example, assuming m is 3, the first preset range corresponding to the first level LLR ladder rule is [19, positive infinity), and the corresponding identification accuracy is greater than 95%; the second preset range is [9, 19), and the corresponding identification accuracy is 90%-95%; and the third preset range is [9-4), and the corresponding identification accuracy is 80%-90%.

[0062] It can be understood that the maximum level m and the preset range of the i-th level are only used as examples for illustration, for the convenience of understanding, and do not limit the values of m and the preset range.

[0063] Referring to Figure 1 or Figure 2a S14, according to the LLR ladder rule, the problem variable node corresponding to each level of the LLR ladder rule is classified and divided.

[0064] In the iteration decoding process of the LDPC decoding of the variable node set (CW={cw0, cw1, cw2…cw n-1}) corresponding to the initial input code word, the problem variable node is identified, and the variable node set is divided into two subsets, namely the set of problem variable nodes N(v) and the set of non-problem variable nodes N'(v). As shown in the example of Figure 4 , the set of problem variable nodes N(v)={v0, v4, v8}, and the set of non-problem variable nodes N'(v)={v1, v2, v3, v5, v6, v7, v9}. As shown in Figure 4 , the initial LLR quantization can be obtained by the LLR initialization unit, and the variable nodes at the corresponding positions in the set CW are replaced by "1" and "0" of the initial LLR quantization, to obtain the initial LLR quantization D0={1, 0, 0, 0, 1, 0, 0, 0, 1, 0} as a set of identifying data D.

[0065] It can be understood that the above N(v) and N'(v) refer to the identification results, that is, the elements in N(v) can be error variable nodes that are actually wrong, or can be variable nodes that are not wrong but are misjudged by the LDPC. In the problem variable nodes divided by each level of the LLR ladder rule, the ratio of the error variable nodes num_e and the misjudged variable nodes num_r is the node number ratio corresponding to the level, that is, the node number ratio corresponding to the i-th level of the LLR ladder rule is pi, pi=(num_ei / num_ri), where pi>p(i+1), i is an integer greater than or equal to 1, and the relationship between the level division of the LLR ladder rule and the corresponding node number ratio is described in detail in the above step S135, which will not be repeated here.

[0066] S15, starting from the first level LLR ladder rule, obtaining the problem variable node corresponding to the current level LLR ladder rule, performing error correction processing on the problem variable node, and performing iterative decoding on the error correction result. Wherein, the error correction processing on the problem variable node and the iterative decoding on the error correction result comprise:

[0067] S151, obtaining the position of the problem variable node corresponding to the current level LLR ladder rule. Taking the first level LLR ladder rule as an example, the problem variable node corresponding to the level is identified according to the first level LLR ladder rule, and the position corresponding to the problem variable node is obtained.

[0068] S152, combining the position of the problem variable node, and performing symbol flipping on the LLR value of the problem variable node.

[0069] S153, taking the LLR value of the non-problem variable node and the LLR value of the problem variable node after symbol flipping as the error correction result, and performing iterative decoding on the error correction result.

[0070] In the initial iterative decoding of LDPC decoding, the initial input codeword includes bit 0 and bit 1, and in the embodiment of the application, the LLR values corresponding to bit 0 and bit 1 are represented by y0 and y1 respectively, that is, y0 represents the LLR value corresponding to bit 0, and y1 represents the LLR value corresponding to bit 1. At this time, the LLR value can only be positive or negative a, that is, two numbers with the same absolute value, for example, if y0 is +4, then y0 must be -4. Therefore, if a variable node v7 is a correctly identified error variable node, its LLR value will be correct after flipping, and in the decoding process, the variable node v7 is equivalent to a non-error variable node.

[0071] Suppose the maximum level of the LLR ladder rule is m, and the original variable node set is divided into N(v) and N'(v); wherein, The value of i is an integer in [1-m], and p1≥...≥pm. After the initial iterative decoding of LDPC decoding fails, a set of data D=={d0, d1, d2, …, d n-1} is obtained, which has an identifier for CW. j d j =0,1,…m. When d j+1 =0, it means that the jth bit in CW belongs to N'(v); when d j =1, it means that the j+1th bit in CW belongs to N(v), and so on, that is, cw j =0 means that the value of the jth bit is 0, and here 0 and 1 are the information of the initial input codeword, which is bit 0 and bit 1.

[0072] Please combine Figure 5, with different values of d, the LLR quantization of the corresponding bit in CW will also be different. As shown in Figure 5 y0 and y1 are the LLR values of the jth bit (cwj) in CW when d j In different cases, the corresponding LLR configuration. d j is the id number recorded after the completion of a round of decoding, which is used to determine the position information of the variable node, that is, it can be determined which bit data in the initial input codeword is wrong. K is the number of times of iterative processing of the initial LLR quantization or the error correction result of the previous iteration.

[0073] Figure 5 In LLR table_1, y1 and y0 (i.e. y1 and y0 when d j is 1) shown in bold black frame mean that the problem variable node is identified according to the first level LLR ladder rule and is flipped. It should be noted that in the process of iterative processing of the initial LLR quantization according to the first level LLR ladder rule, y0 and y1 of the corresponding level have been determined according to each level LLR ladder rule, but only y0 and y1 identified by the first level LLR ladder rule are flipped. That is, under the condition of LLR table_1, all y0 and y1 corresponding to d j is 1 to m have been obtained, but only y0 and y1 shown in bold black frame when K=1 are sign-flipped according to the first level LLR ladder rule. Under the condition of LLR table_1, y0 and y1 not shown in bold black frame remain unchanged.

[0074] Please refer to Figure 5 , the data after sign-flipping of y1 and y0 shown in bold black frame in LLR table_1 (the initial LLR quantization after sign-flipping), combined with the LLR values of non-problem variable nodes, are used as error correction results for iterative decoding.

[0075] For example, assuming that the initial input codeword corresponding to the initial iterative decoding failure has 100 variable nodes, 2 variable nodes are identified as problem variable nodes according to the first level LLR ladder rule, the LLR values of the 2 variable nodes are sign-flipped, and the flipped two LLR values and the LLR values of the remaining 98 variable nodes are used as the first level error correction result. The first level error correction result is iteratively decoded.

[0076] If this decoding is successful, the decoding is successful, and the decoding result is directly output.

[0077] S16, if the iterative decoding fails, obtaining the problem variable node corresponding to the next level LLR ladder rule, performing error correction processing on the problem variable node, and performing iterative decoding on the error correction result until the iterative decoding succeeds or the error correction result of the last level LLR ladder rule has been iteratively decoded.

[0078] Still taking the above 100 variable nodes as an example, in the first level error correction result, the LLR values of two variable nodes are the LLR values after symbol flipping. According to the second level LLR ladder rule processing the first level error correction result, the problem variable node is identified until the iterative decoding succeeds or the second last level error correction result has been processed according to the last level LLR ladder rule. At this time, the problem variable node is identified according to the second level LLR ladder rule, and symbol flipping is performed.

[0079] Please refer to Figure 5 , in the LLR table_2, the first row in the range of the bold black box is the two variable nodes whose LLR values have been flipped in the first iteration decoding, and the LLR values of the two variable nodes will not be changed in this iteration decoding, only the LLR values corresponding to the second row in the range of the bold black box will be flipped. Assuming that 8 variable nodes are identified as problem variable nodes according to the second level LLR ladder rule in the iteration decoding process, the LLR values of the 8 variable nodes are flipped, and the flipped 8 LLR values and the LLR values of the remaining 92 variable nodes (the 92 variable nodes include the 2 variable nodes whose LLR values have been flipped in the previous iteration) are taken as the second level error correction result, and the second level error correction result is iteratively decoded.

[0080] If this decoding succeeds, the decoding succeeds, and the decoding result is directly output; if this iteration decoding still fails, the second level error correction result is processed by the subsequent level LLR ladder rule in turn, and iterative decoding is performed until the iterative decoding succeeds or the error correction result of the last level LLR ladder rule has been iteratively decoded.

[0081] According to Figure 5It can be seen that the number of LLR quantization times of the initial input codeword corresponds to the total number of LLR_table (M), that is, the number of iteration decoding times is not more than M. In practical applications, considering the influence of delay, the value of M is usually not more than 3 times, so as to avoid too high delay and bring good user experience. Compared with the existing error correction method using BTA, BTA is to re-quantize a single variable node in N(v) corresponding to the LDPC code and then decode, and the number of re-decoding times is not more than |N(v)|. For example, assuming that the row weight of the LDPC code is dv, which does not satisfy the number of check node sets |N(c)|, in the worst case, the number of re-decoding times of the BTA method is |N(v)| = dv*|N(c)|. If dv = 30 and |N(c)| = 5 in the LDPC code, the number of re-decoding times of the method is 150, which has too high delay cost. In the decoding method based on the LDPC code provided in the embodiment of the present application, the number of re-decoding times is at most M, which obviously reduces the delay compared with the BTA method.

[0082] It should be noted that, in order to avoid the sign of the LLR value of the same variable node being flipped multiple times, when setting the (i+1)th level LLR ladder rule, the selection range of the ith level LLR ladder rule is avoided. For example, assuming that the preset threshold in the first level LLR ladder rule is set to be less than 3, when setting the second level LLR ladder rule, there is a prerequisite that the preset threshold is greater than or equal to 3, and then the corresponding condition is set, for example, the number of sign flips of the LLR value is greater than 5. Therefore, the situation that the sign of the LLR value of the variable node v7 is flipped in the first level, and the sign of the LLR value of v7 is flipped back in the second level will not occur.

[0083] The decoding method based on the LDPC code provided in the embodiment of the present application acquires the initial LLR quantization corresponding to the initial input codeword which fails in the initial iteration decoding, monitors the characteristics of all variable nodes in the LDPC decoding process, acquires the positions of the error variable nodes in stages, combines the LLR ladder rule to re-decode the codeword which fails in the original decoding, so as to acquire the decoding result which is correct, wherein the LLR ladder rule identifies the variable nodes with different numbers in stages by setting different difference condition combinations, and flips the sign of the LLR value, so as to reduce the number (or proportion) of error bits in each iteration decoding process, thereby improving the error correction capability of the LDPC decoding. Meanwhile, compared with the existing error correction method using BTA, the decoding method based on the LDPC code provided in the embodiment of the present application has lower delay and better user experience.

[0084] The embodiment of the present application provides a decoding device 200 based on an LDPC code, please refer to Figure 6The device comprises a decoding monitoring module 21, a node identifying module 22, a node dividing module 24 and a node error correction module 25.

[0085] Specifically, the decoding monitoring module 21 can acquire initial LLR quantization corresponding to an initial input codeword that fails in initial LDPC decoding, and monitor features of all variable nodes in the LDPC decoding process.

[0086] The node identifying module 22 can identify problem variable nodes based on the features of all variable nodes, and acquire positions of the problem variable nodes.

[0087] The node dividing module 24 can divide the problem variable nodes corresponding to each level of LLR ladder rules according to LLR ladder rules.

[0088] The node error correction module 25 can start from the first level of LLR ladder rules, acquire the problem variable nodes corresponding to the current level of LLR ladder rules, perform error correction processing on the problem variable nodes, and perform iterative decoding on the error correction results. When the iterative decoding fails, the node error correction module 25 can acquire the problem variable nodes corresponding to the next level of LLR ladder rules, perform error correction processing on the problem variable nodes, and perform iterative decoding on the error correction results, until the iterative decoding succeeds or the error correction results of the last level of LLR ladder rules have been iteratively decoded.

[0089] In some embodiments, the device further comprises a rule configuration module 23, which can:

[0090] perform LDPC decoding on experimental input codewords, and acquire simulation variable node data in the decoding process; perform error injection on the simulation variable node data, and perform iterative decoding on the error-injected data as simulation input codewords, wherein the simulation input codewords comprise error-injected simulation variable nodes and non-error-injected simulation variable nodes; acquire LLR values and positions of all simulation variable nodes of the simulation input codewords in the iterative process; acquire difference conditions of the error-injected simulation variable nodes and the non-error-injected simulation variable nodes, and identify problem simulation variable nodes based on the difference conditions, wherein the difference conditions comprise at least one of check result data, LLR absolute value or LLR symbol flipping frequency, the problem simulation variable nodes comprise error simulation variable nodes and misjudgment simulation variable nodes; determine levels of the LLR ladder rules based on error injection results and the difference conditions, wherein the LLR ladder rules at least comprise a first level of LLR ladder rules, and the number of nodes corresponding to the levels decreases as the levels of the LLR ladder rules increase.

[0091] It should be noted that the LDPC code-based decoding device described above can execute the LDPC code-based decoding method provided in the embodiments of this application, and has the corresponding functional modules and beneficial effects of the method. Technical details not described in detail in the embodiments of the LDPC code-based decoding device can be found in the LDPC code-based decoding method provided in the embodiments of this application.

[0092] This application also provides a solid-state drive, such as... Figure 7 As shown, the solid-state drive 300 includes: one or more processors 31 and memory 32. Figure 7 Take a processor 31 as an example.

[0093] Processor 31 and memory 32 can be connected via a bus or other means. Figure 7 Taking the example of a connection between China and Israel via a bus.

[0094] The memory 32, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as the program instructions / modules corresponding to the LDPC code-based decoding method in the embodiments of this application. The processor 31 executes various functional applications and data processing of the server by running the non-volatile software programs, instructions, and modules stored in the memory 32, thereby implementing the LDPC code-based decoding method in the above-described method embodiments.

[0095] The memory 32 may include a program storage area and a data storage area, wherein the program storage area may store the operating system and applications required for at least one function; the data storage area may store data created based on the use of the solid-state drive controller, etc. Furthermore, the memory 32 may include high-speed random access memory and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, the memory 32 may optionally include memory remotely located relative to the processor 31, and these remote memories may be connected to the solid-state drive controller via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0096] The one or more modules are stored in the memory 32. When executed by the one or more processors 31, they execute the LDPC code-based decoding method in any of the above method embodiments and implement the corresponding functions.

[0097] This application provides a non-volatile computer-readable storage medium storing computer-executable instructions that are executed by one or more processors, for example... Figure 7The one processor 31 in the one processor 31 can make the one or more processors executable in the above-described any method embodiment of the LDPC code-based decoding method, for example, execute the above-described method steps, and realize the corresponding functions.

[0098] The above-described product can execute the LDPC code-based decoding method provided by the embodiments of the present application, has the corresponding function modules and beneficial effects of the execution method. The technical details not described in detail in the embodiments can refer to the LDPC code-based decoding method provided by the embodiments of the present application.

[0099] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be realized by means of software plus a general hardware platform, and of course can also be realized by hardware. Those skilled in the art can understand that all or part of the processes in the above-described embodiments can be completed by a computer program instructing related hardware, and the program can be stored in a computer readable storage medium. When the program is executed, it can include the processes of the above-described embodiments. The storage medium can be a magnetic disc, an optical disc, a read-only memory (ROM) or a random access memory (RAM), etc.

[0100] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; under the idea of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other changes of the different aspects of the present application as described above. In order to be brief, they are not provided in details; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement to part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A decoding method based on an LDPC code, characterized by, The method comprises the following steps: acquiring initial LLR quantization corresponding to an initial input code word of which initial LDPC decoding fails, and monitoring characteristics of all variable nodes in the LDPC decoding process; identifying a problem variable node based on the characteristics of all the variable nodes and acquiring the position of the problem variable node; configuring an LLR ladder rule; dividing the problem variable nodes corresponding to each level of the LLR ladder rule according to the LLR ladder rule; starting from the first level of the LLR ladder rule, acquiring the problem variable nodes corresponding to the current level of the LLR ladder rule, performing error correction processing on the problem variable nodes, and performing iterative decoding on the error correction result; if the iterative decoding fails, acquiring the problem variable nodes corresponding to the next level of the LLR ladder rule, performing error correction processing on the problem variable nodes, and performing iterative decoding on the error correction result until the iterative decoding succeeds or the error correction result of the last level of the LLR ladder rule has been subjected to iterative decoding; wherein the configuration of the LLR ladder rule comprises: performing LDPC decoding on an experimental input code word and acquiring simulation variable node data in the decoding process; performing error injection on the simulation variable node data and performing iterative decoding on the error-injected data as simulation input code words, wherein the simulation input code words comprise error-injected simulation variable nodes and non-error-injected simulation variable nodes; acquiring LLR values and positions of all simulation variable nodes in the iterative process of the simulation input code words; acquiring difference conditions of the error-injected simulation variable nodes and the non-error-injected simulation variable nodes, and identifying problem simulation variable nodes based on the difference conditions, wherein the difference conditions comprise at least one of check result data, LLR absolute value or LLR symbol flipping frequency, and the problem simulation variable nodes comprise error simulation variable nodes and misjudgment simulation variable nodes; determining the level of the LLR ladder rule based on the error injection result and the difference conditions, wherein the LLR ladder rule at least comprises a first level of the LLR ladder rule, and the number of nodes corresponding to the level decreases as the level of the LLR ladder rule increases.

2. The method of claim 1, wherein, The acquisition of the difference conditions of the error-injected simulation variable nodes and the non-error-injected simulation variable nodes and the identification of the problem simulation variable nodes based on the difference conditions comprises: monitoring all check nodes that fail in the current iterative decoding process; determining problem simulation variable nodes based on the check nodes and acquiring the positions of the problem simulation variable nodes.

3. The method of claim 1, wherein, The acquisition of the difference conditions of the error-injected simulation variable nodes and the non-error-injected simulation variable nodes and the identification of the problem simulation variable nodes based on the difference conditions comprises: monitoring LLR values of all simulation variable nodes in the current iterative decoding process; acquiring the simulation variable nodes whose LLR values exceed a preset threshold in the iterative decoding process, denoted as problem simulation variable nodes, and acquiring the positions of the problem simulation variable nodes.

4. The method of claim 1, wherein, The acquisition of the difference conditions of the error-injected simulation variable nodes and the non-error-injected simulation variable nodes and the identification of the problem simulation variable nodes based on the difference conditions comprises: monitoring the number of times of LLR symbol flipping of all simulation variable nodes in the current iterative decoding process; The simulation variable nodes whose LLR symbol flipping times exceed the preset flipping times in the iterative decoding process are recorded as problem simulation variable nodes, and the positions of the problem simulation variable nodes are obtained.

5. The method of claim 1, wherein, The setting of the LLR ladder rule based on the error injection result and the difference condition includes: Identifying problem simulation variable nodes based on different difference condition combinations, wherein each set of the difference condition combinations includes at least one difference condition; Combining the error injection simulation variable nodes and non-error injection simulation variable nodes, the node number ratio corresponding to each set of difference condition combinations is obtained respectively; When the node number ratio meets the preset range of the i-th level, the difference condition combination corresponding to the node number ratio is set as the i-th level LLR ladder rule, wherein the node number ratio corresponding to the i-th level LLR ladder rule is recorded as pi, pi=(num_ei / num_ri), num_e is the error variable node in the problem variable node, num_r is the misjudgment variable node in the problem variable node, the maximum level of the LLR ladder rule is m, i is an integer in [1-m], and pi>p(i+1).

6. The method of claim 1, wherein, The error correction processing of the problem variable node and the iterative decoding of the error correction result include: Obtaining the positions of the problem variable nodes corresponding to the current level LLR ladder rule; Combining the positions of the problem variable nodes, the LLR values of the problem variable nodes are symbol flipped; The LLR values of non-problem variable nodes and the LLR values of the problem variable nodes after symbol flipping are taken as the error correction result, and the error correction result is subjected to iterative decoding.

7. A decoding apparatus based on an LDPC code, characterized by It includes: A decoding monitoring module is configured to obtain initial LLR quantization corresponding to an initial input codeword of initial LDPC decoding failure, and monitor features of all variable nodes in the LDPC decoding process; A node identification module is configured to identify problem variable nodes based on the features of the all variable nodes, and obtain positions of the problem variable nodes. The rule configuration module is configured to configure the LLR ladder rule, including LDPC decoding of an experimental input codeword and obtaining simulation variable node data in the decoding process; error injection is performed on the simulation variable node data, and the error-injected data is used as simulation input codeword for iterative decoding, wherein the simulation input codeword includes error-injected simulation variable nodes and non-error-injected simulation variable nodes; the LLR values and positions of all simulation variable nodes of the simulation input codeword in the iterative process are obtained; the difference conditions of the error-injected simulation variable nodes and the non-error-injected simulation variable nodes are obtained, and the problem simulation variable nodes are identified based on the difference conditions, wherein the difference conditions include at least one of check result data, LLR absolute value or LLR symbol flipping times, the problem simulation variable nodes include error simulation variable nodes and misjudgment simulation variable nodes; the level of the LLR ladder rule is determined based on the error injection result and the difference conditions, wherein the LLR ladder rule at least includes a first-level LLR ladder rule, and the number of nodes of a corresponding level decreases as the level of the LLR ladder rule increases. The node division module is configured to hierarchically divide the problem variable nodes corresponding to each level of the LLR ladder rule according to the LLR ladder rule. The node error correction module is configured to start from the first-level LLR ladder rule, obtain the problem variable nodes corresponding to the current level of the LLR ladder rule, perform error correction processing on the problem variable nodes, and perform iterative decoding on the error correction result; and when the iterative decoding fails, the problem variable nodes corresponding to the next level of the LLR ladder rule are obtained, error correction processing is performed on the problem variable nodes, and iterative decoding is performed on the error correction result until the iterative decoding is successful or the error correction result of the last level of the LLR ladder rule has been subjected to iterative decoding.

8. A solid state drive, comprising: Comprise: At least one processor; And The memory is in communication with the at least one processor; wherein The memory stores instructions executable by the at least one processor to cause the at least one processor to perform the LDPC code-based decoding method of any one of claims 1-6.

9. A non-transitory computer readable storage medium, comprising: The non-volatile computer readable storage medium stores computer executable instructions, when the computer executable instructions are executed by an electronic device, causing the electronic device to perform the LDPC code-based decoding method of any one of claims 1-6.

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