Display panel and display device

Abstract

The application provides a display panel and a display device; the display panel comprises a driving backboard and a plurality of display components arranged on the driving backboard in an array, each display component comprises a substrate and a plurality of first binding terminals, each first binding terminal comprises a first terminal part and a plurality of second terminal parts, the first terminal part is arranged on the side of the substrate far from the driving backboard, the plurality of second terminal parts are arranged in the substrate, one end of each second terminal part is electrically connected with the first terminal part, the other end of each second terminal part is electrically connected with the driving backboard, and the area of the orthogonal projection of the plurality of second terminal parts on the substrate is smaller than the area of the orthogonal projection of the first terminal part on the substrate, so that the plurality of second terminal parts are arranged in a dense and spaced columnar structure, thereby relieving the poor lap joint between the display screen and the mother board in the existing frameless splicing display technology.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to a display panel and a display device. Background Technology

[0002] With the continuous development of display technology, the application of ultra-large-size displays is becoming increasingly widespread, meeting people's needs for viewing from a distance and displaying large amounts of information. For cost reasons, current ultra-large-size displays are typically achieved using splicing technology, which involves combining multiple sub-displays to form an ultra-large display. However, when multiple displays are spliced ​​together, large black seams appear at the splicing points, severely affecting the display's aesthetic appeal. To solve this problem, borderless splicing display technology has emerged, which involves splicing multiple displays together and binding them to a motherboard. This technology requires bonding terminals on each display to bind it to the motherboard. To achieve good contact between the display and the motherboard, laser drilling can be used to remove the film layer under the bonding terminals to fully expose them. However, prolonged laser drilling can damage the bonding terminals, leading to poor overlap between the display and the motherboard.

[0003] Therefore, the problem of poor overlap between the display screen and the motherboard in existing frameless splicing display technology needs to be solved. Summary of the Invention

[0004] This application provides a display panel and a display device to alleviate the technical problem of poor overlap between the display screen and the motherboard in existing frameless splicing display technologies.

[0005] To solve the above problems, the technical solution provided in this application is as follows:

[0006] This application embodiment provides a display panel, including a driving backplane and a display component electrically connected to the driving backplane, the display component including:

[0007] A substrate is disposed facing the driving backplate; and

[0008] A plurality of first bonding terminals, each first bonding terminal including a first terminal portion and a plurality of second terminal portions, the first terminal portion being disposed on the side of the substrate away from the drive back plate, and the plurality of second terminal portions being disposed within the substrate;

[0009] In this configuration, one end of each second terminal portion is electrically connected to the first terminal portion, and the other end of each second terminal portion is electrically connected to the drive backplate. Furthermore, the projected area of ​​the plurality of second terminal portions on the substrate is smaller than the projected area of ​​the first terminal portion on the substrate.

[0010] In the display panel provided in the embodiments of this application, the substrate includes a first substrate and a first barrier layer disposed on the side of the first substrate away from the driving back plate. The first terminal portion is disposed on the side of the first barrier layer away from the first substrate, and the second terminal portion is disposed within the first barrier layer. The first substrate has an opening in the area corresponding to the first bonding terminal.

[0011] In the display panel provided in the embodiments of this application, the first barrier layer has a plurality of through holes spaced apart in the area corresponding to the first terminal portion, and each second terminal portion is filled with the corresponding through hole.

[0012] In the display panel provided in this application embodiment, the size range of the through hole is 2 micrometers to 5 micrometers.

[0013] In the display panel provided in this application embodiment, the size of the opening is greater than or equal to the size of the first terminal portion.

[0014] In the display panel provided in this application embodiment, the size of the first terminal portion is greater than 100 micrometers.

[0015] In the display panel provided in the embodiments of this application, the display component further includes a driving circuit layer disposed on the side of the first bonding terminal away from the substrate. The driving circuit layer includes a plurality of signal lines, and the signal lines are electrically connected to the corresponding first terminal portion.

[0016] In the display panel provided in this application embodiment, the substrate further includes an insulating protective layer covering the first terminal portion and the first barrier layer, and the driving circuit layer includes:

[0017] A semiconductor layer is disposed on the insulating protective layer;

[0018] A gate insulating layer is applied over the semiconductor layer and the insulating protective layer;

[0019] A gate layer, disposed on the gate insulating layer, includes a gate and a gate signal scan line;

[0020] An interlayer insulating layer is applied over the gate layer and the gate insulating layer;

[0021] A source-drain layer is disposed on the interlayer insulating layer and includes a source, a drain, and a data line;

[0022] The plurality of signal lines include the gate signal line and the data line.

[0023] In the display panel provided in this application embodiment, the first terminal portion and a plurality of second terminal portions are integrally disposed.

[0024] In the display panel provided in the embodiments of this application, a second bonding terminal is provided on the side of the driving back plate facing the display component, and the second bonding terminal is electrically connected to the second terminal portion.

[0025] In the display panel provided in this application embodiment, there are multiple display components, and the multiple display components are arranged in an array on the driving backplate.

[0026] This application also provides a display device, which includes a housing and a display panel of one of the foregoing embodiments, wherein the housing forms a receiving cavity and the display panel is disposed within the receiving cavity.

[0027] The beneficial effects of this application are as follows: In the display panel and display device provided by this application, multiple display components are arranged in an array on the driving back plate. Each display component includes a substrate and multiple first bonding terminals. Each first bonding terminal includes a first terminal portion and multiple second terminal portions. The first terminal portion is disposed on the side of the substrate away from the driving back plate, and the multiple second terminal portions are disposed within the substrate. One end of each second terminal portion is electrically connected to the first terminal portion, and the other end of each second terminal portion is electrically connected to the driving back plate. Moreover, the orthographic projection area of ​​the multiple second terminal portions on the substrate is smaller than the orthographic projection area of ​​the first terminal portion on the substrate, so that the multiple second terminal portions are arranged in a dense and spaced columnar structure, which reduces the damage to the second terminal portions during laser drilling and improves the reliability of the bonding between the first bonding terminals and the driving back plate, thereby solving the problem of poor overlap between the display screen and the motherboard in the existing frameless splicing display technology. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in the embodiments or prior art, the drawings used in the description of the embodiments or prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 This is a top view of a display panel provided in an embodiment of this application.

[0030] Figure 2 This is a partial cross-sectional structural diagram of the display panel provided in an embodiment of this application.

[0031] Figure 3 This is a schematic diagram of a first partial cross-sectional structure of a display component provided in an embodiment of this application.

[0032] Figure 4 This is a schematic diagram of a second partial cross-sectional structure of the display component provided in an embodiment of this application.

[0033] Figure 5 This is a schematic cross-sectional view of the third part of the display component provided in the embodiments of this application.

[0034] Figure 6 This is a cross-sectional structural diagram of the display device provided in an embodiment of this application. Detailed Implementation

[0035] The following descriptions of the embodiments are based on the accompanying illustrations, illustrating specific embodiments in which this application can be implemented. Directional terms used in this application, such as [up], [down], [front], [back], [left], [right], [inner], [outer], [side], etc., are merely for reference to the accompanying drawings. Therefore, the directional terms used are for illustration and understanding of this application, and not for limiting this application. In the figures, structurally similar units are denoted by the same reference numerals. In the figures, the thickness of some layers and regions is exaggerated for clarity and ease of description. That is, the dimensions and thicknesses of each component shown in the figures are arbitrarily shown, but this application is not limited thereto.

[0036] Please refer to the reference. Figures 1 to 3 , Figure 1 This is a top view of a display panel provided in an embodiment of this application. Figure 2 This is a partial cross-sectional structural diagram of the display panel provided in an embodiment of this application. Figure 3 This is a partial cross-sectional structural diagram of a display assembly provided in an embodiment of this application. The display panel 100 includes a driving backplate 1 and a plurality of display components 2 arranged in an array on the driving backplate 1. Each display component 2 includes a substrate 10 disposed on the side facing the driving backplate 1 and a plurality of first bonding terminals 11. Each first bonding terminal 11 includes a first terminal portion 111 and a plurality of second terminal portions 112. The first terminal portion 111 is disposed on the side of the substrate 10 away from the driving backplate 1, and the plurality of second terminal portions 112 are disposed within the substrate 10. The orthographic projection area of ​​the plurality of second terminal portions 112 on the substrate 10 is smaller than the orthographic projection area of ​​the first terminal portion 111 on the substrate 10.

[0037] One end of each second terminal portion 112 is electrically connected to the first terminal portion 111, and the other end of each second terminal portion 112 is electrically connected to the driving backplane 1, thereby enabling each display component 2 to be electrically connected to the driving backplane 1 through a plurality of first bonding terminals 11. Simultaneously, each display component 2 also includes a plurality of signal lines (e.g., ...) disposed on the side of the plurality of first bonding terminals 11 away from the driving backplane 1. Figure 2 Data line 253 shown Figure 3The gate scan line 232 shown is electrically connected to the corresponding first bonding terminal 11. More specifically, each signal line is electrically connected to the first terminal portion 111 of the corresponding first bonding terminal 11 to enable the drive backplane 1 to provide a signal to the corresponding signal line through the first bonding terminal 11.

[0038] The film structure of the display component 2 will be described in detail below:

[0039] Specifically, the substrate 10 further includes a first substrate 12 and a first barrier layer 13 stacked together. The first substrate 12 is disposed facing the drive backplate 1. The first barrier layer 13 is disposed on the side of the first substrate 12 away from the drive backplate 1. The first terminal portion 111 is disposed on the side of the first barrier layer 13 away from the first substrate 12. The second terminal portion 112 is disposed within the first barrier layer 13. The first substrate 12 has an opening 121 in the area corresponding to the first bonding terminal 11 to expose the second terminal portion 112 for electrical connection with the drive backplate 1.

[0040] Optionally, the opening 121 on the first substrate 12 can be formed by laser drilling, and the size of the opening 121 is greater than or equal to the size of the first terminal portion 111, so as to better contact the first bonding terminal 11 with the drive backplate 1. Of course, this application is not limited to this, and the size of the opening 121 in this application may also be smaller than the size of the first terminal portion 111.

[0041] Optionally, the size of the first terminal portion 111 is greater than 100 micrometers, so that the contact area between the formed first bonding terminal 11 and the drive backplate 1 is sufficiently large to improve the stability of the bonding between the first bonding terminal 11 and the drive backplate 1. The size of the first terminal portion 111 refers to its diameter or side length, specifically depending on its cross-sectional shape. In this application, the cross-sectional shape of the first terminal portion 111 includes circular, square, etc. When the cross-sectional shape of the first terminal portion 111 is circular, the size refers to its diameter; when the cross-sectional shape of the first terminal portion 111 is square, the size refers to its side length. The definition of the size of the opening 121 is the same as that of the first terminal portion 111, specifically depending on its cross-sectional shape, which is related to the cross-sectional shape of the first terminal portion 111.

[0042] Optionally, the first barrier layer 13 has a plurality of through holes 131 spaced apart in the area corresponding to the first terminal portion 111. Each second terminal portion 112 fills the corresponding through hole 131, so that the plurality of second terminal portions 112 are arranged in a dense and spaced columnar structure, that is, the plurality of second terminal portions 112 are arranged in a pin-like structure. Thus, the orthogonal projection area of ​​the plurality of second terminal portions 112 on the substrate 10 is smaller than the orthogonal projection area of ​​the first terminal portion 111 on the substrate 10. By arranging the first terminal portions 111 in a dense and spaced columnar structure, the damage of the laser to the first bonding terminal 11 can be reduced when the first substrate 12 is laser-drilled to form the opening 121, thereby improving the reliability of the bonding between the first bonding terminal 11 and the driving backplate 1, avoiding poor overlap between the display component 2 and the driving backplate 1, and thus solving the problem of poor overlap between the display screen and the motherboard in the existing frameless splicing display technology.

[0043] Optionally, the size of the through-hole 131 ranges from 2 micrometers to 5 micrometers. Since the second terminal portion 112 fills the through-hole 131, the size of the through-hole 131 is also the size of each second terminal portion 112. The size of each second terminal portion 112 is smaller than the size of the first terminal portion 111. Therefore, a large number of second terminal portions 112 can be provided in the area corresponding to the first terminal portion 111. The more second terminal portions 112 there are, the more beneficial it is to reduce the damage of the laser to the first bonding terminal 11.

[0044] The size of the through hole 131 refers to its diameter or side length, which depends on its cross-sectional shape. In this application, the cross-sectional shape of the through hole 131 includes circular, square, etc. When the cross-sectional shape of the through hole 131 is circular, the size refers to its diameter; when the cross-sectional shape of the through hole 131 is square, the size refers to its side length. It is understood that when the cross-sectional shape of the through hole 131 is circular, the inner surface of the through hole 131 is smoother, thus facilitating the fabrication of the second terminal portion 112 when the conductive metal is filled into the through hole 131.

[0045] Optionally, the first terminal portion 111 and a plurality of second terminal portions 112 are integrally disposed to form the first bonding terminal 11. The first bonding terminal 11 may be made of a metal or alloy with strong oxidation resistance and low resistivity, such as MO, AL alloy, etc., to ensure the stability of the first bonding terminal 11 and the reliability of its connection with the drive backplate 1.

[0046] Optionally, the substrate 10 further includes an insulating protective layer covering the first terminal portion 111 and the first barrier layer 13. The insulating protective layer may include a second substrate 14, a second barrier layer 15 covering the second substrate 14, and a buffer layer 16 covering the second barrier layer 15. The first barrier layer 13, the second barrier layer 15, and the buffer layer 16 may all be formed of inorganic materials such as silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON) to prevent unwanted impurities or contaminants (e.g., moisture, oxygen, etc.) from diffusing from the first substrate 12 and the second substrate 14 into devices that may be damaged by these impurities or contaminants. Of course, the substrate 10 of this application is not limited to this; the substrate 10 of this application may include more or fewer inorganic film layers. The materials of the first substrate 12 and the second substrate 14 include flexible thin film materials such as polyimide (PI). Meanwhile, the buffer layer 16 can also provide a flat top surface to facilitate the fabrication of other film structures on the substrate 10.

[0047] Specifically, each of the display components 2 further includes a driving circuit layer 20 disposed on the side of the substrate 10 away from the driving backplate 1, the driving circuit layer 20 including a plurality of the signal lines.

[0048] Optionally, the driving circuit layer 20 includes a semiconductor layer 21, a gate insulating layer 22, a gate layer 23, an interlayer insulating layer 24, and a source / drain layer 25. The semiconductor layer 21 is disposed on the substrate 10. More specifically, the semiconductor layer 21 is disposed on the buffer layer 16 of the insulating protective layer. The semiconductor layer 21 includes a channel region 211 and source regions 212 and drain regions 213 located on opposite sides of the channel region 211. The gate insulating layer 22 covers the semiconductor layer 21 and the substrate 10. The gate layer 23 is disposed on the gate insulating layer 22. The gate layer 23 is patterned to form a gate 231 and other signal lines such as a gate scan line 232. The gate 231 is correspondingly disposed to the channel region 211 of the semiconductor layer 21. The gate scan line 232 is electrically connected to the corresponding first terminal portion 111. The interlayer insulating layer 24 covers the gate layer 23 and the gate insulating layer 22. The source-drain layer 25 is disposed on the interlayer insulating layer 24. The source-drain layer 25 is patterned to form a source 251, a drain 252, and other signal lines such as a data line 253. The source 251 and the drain 252 are electrically connected to the source region 212 and the drain region 213 of the corresponding semiconductor layer 21, respectively. The data line 253 is electrically connected to the corresponding first terminal portion 111. The plurality of signal lines in the driving circuit layer 20 include the gate scan line 232 and the data line 253, and different signal lines are electrically connected to different first terminal portions 111.

[0049] Specifically, the interlayer insulating layer 24 is patterned to form a first via 241, which penetrates the interlayer insulating layer 24, the gate insulating layer 22, the buffer layer 16, the second barrier layer 15, the second substrate 14, and extends to the first terminal portion 111, exposing a portion of the first terminal portion 111. The data line 253 is electrically connected to the first terminal portion 111 through the first via 241, and is also electrically connected to the source 251 or the drain 252. This application uses the electrical connection between the data line 253 and the source 251 as an example for illustration.

[0050] Furthermore, the interlayer insulating layer 24 is patterned to form a second via 242 and a third via 243. The second via 242 has the same structure as the first via 241, that is, the second via 242 also penetrates the interlayer insulating layer 24, the gate insulating layer 22, the buffer layer 16, the second barrier layer 15, the second substrate 14, and extends to the first terminal portion 111 to expose a portion of the first terminal portion 111. The third via 243 penetrates the interlayer insulating layer 24 to the gate scan line 232 to expose a portion of the gate scan line 232. The source-drain layer 25 also includes a signal adapter 254 disposed on the same layer as the data line 253. The signal adapter 254 is electrically connected to the first bonding terminal 11 and the gate scan line 232 through the second via 242 and the third via 243, respectively, so that the gate scan line 232 is electrically connected to the first terminal portion 111.

[0051] Furthermore, the interlayer insulating layer 24 is patterned to form a plurality of fifth vias 244, each of which penetrates the interlayer insulating layer 24 and the gate insulating layer 22 to expose the source region 212 and the drain region 213, respectively. The source 251 is electrically connected to the source region 212 through one of the fifth vias 244, and the drain 252 is electrically connected to the drain region 213 through another fifth via 244.

[0052] It should be noted that, in this application, "same-layer arrangement" refers to the process in which a film layer formed of the same material is patterned to obtain at least two different features, and the at least two different features are arranged in the same layer. For example, in this embodiment, the signal adapter cable 254 and the data line 253 are obtained by patterning the same conductive film layer, and therefore the signal adapter cable 254 and the data line 253 are arranged in the same layer.

[0053] Furthermore, the plurality of signal lines in the driving circuit layer 20 described in this application are not limited to the data line 253 and the gate scan line 232. The plurality of signal lines may also include VSS, VDD power lines, and other signal lines used for display or non-display purposes. Different signal lines are electrically connected to different first terminal portions 111, that is, different signal lines are electrically connected to different first bonding terminals 11 to obtain different signals. For example, the data line 253 is electrically connected to the corresponding first bonding terminal 11 to obtain a source drive signal and provide it to the source 251; the gate scan line 232 is electrically connected to the corresponding first bonding terminal 11 to obtain a gate scan signal and provide it to the gate 231.

[0054] To provide a flat surface for the driving circuit layer 20, the driving circuit layer 20 also includes a planarization layer 26 covering the source / drain layer 25 and the interlayer insulating layer 24. Of course, the structure of the driving circuit layer 20 in this application is not limited to that illustrated in this embodiment. The driving circuit layer 20 in this application may also include more or fewer film layers, and the positional relationship of each film layer is not limited to that illustrated in this embodiment. For example, the gate layer 23 in this application may also adopt a dual-gate structure, and the gate layer 23 may also be located below the semiconductor layer 21, forming a bottom gate structure.

[0055] Understandably, please refer to the following: Figures 1 to 4 , Figure 4 This is a second partial cross-sectional structural diagram of the display component provided in an embodiment of this application. To realize the display function of the display component 2, the display component 2 further includes a light-emitting functional layer 30 disposed on the driving circuit layer 20. The driving circuit layer 20 provides a driving voltage to the light-emitting functional layer 30 to make the light-emitting functional layer 30 emit light. To protect the reliability of the light-emitting functional layer 30 and prevent water and oxygen intrusion from causing the light-emitting functional layer 30 to fail, the display component 2 further includes an encapsulation layer 40.

[0056] Specifically, the light-emitting functional layer 30 includes a pixel electrode 31, a pixel definition layer 32, a light-emitting unit 33, and a cathode 34. The pixel electrode 31 is disposed on the planarization layer 26 and is electrically connected to the source electrode 251 or the drain electrode 252 through vias in the planarization layer 26. Of course, since this embodiment uses the electrical connection between the data line 253 and the source electrode 251 as an example, correspondingly, this embodiment uses the electrical connection between the pixel electrode 31 and the drain electrode 252 as an example. The pixel definition layer 32 is disposed on the pixel electrode 31 and the planarization layer 26, and the pixel definition layer 32 is patterned with pixel openings that expose a portion of the pixel electrode 31 to define the area where the light-emitting unit 33 is located.

[0057] The light-emitting unit 33 is formed by a light-emitting material printed in the pixel opening of the pixel definition layer 32. Different colored light-emitting materials form light-emitting units 33 of different colors. For example, the light-emitting unit 33 may include a red light-emitting unit formed by a red light-emitting material, a green light-emitting unit formed by a green light-emitting material, and a blue light-emitting unit formed by a blue light-emitting material. The red light-emitting unit emits red light, the green light-emitting unit emits green light, and the blue light-emitting unit emits blue light.

[0058] The cathode 34 covers the light-emitting unit 33 and the pixel definition layer 32. The light-emitting unit 33 emits light under the combined action of the pixel electrode 31 and the cathode 34. Different colored light-emitting units 33 emit different colored light, thereby realizing the pixel display of the display component 2.

[0059] Optionally, the pixel electrode 31 can be a transparent electrode or a reflective electrode. If the pixel electrode 31 is a transparent electrode, it can be formed of, for example, indium tin oxide (ITO), indium zinc oxide (IZO), ZnO, or In2O3. If the pixel electrode 31 is a reflective electrode, it can, for example, include a reflective layer formed of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, or combinations thereof, and a layer formed of ITO, IZO, ZnO, or In2O3. However, the pixel electrode 31 is not limited to these; it can be formed of various materials and can be formed as a single layer or a multilayer structure.

[0060] It should be noted that whether the pixel electrode 31 is a transparent electrode or a reflective electrode depends on the light emission direction of the display panel 100. When the display panel 100 uses top-emitting light, the pixel electrode 31 can be either a transparent electrode or a reflective electrode. Of course, using a reflective electrode can improve the utilization rate of the light emitted by the light-emitting unit 33. When the display panel 100 uses bottom-emitting light, the pixel electrode 31 is a transparent electrode to improve the light transmittance. This embodiment uses the top-emitting display panel 100 as an example. In this case, in order to improve the light transmittance, the cathode 34 needs to be formed of a transparent conductive material. For example, the cathode 34 can be formed of transparent conductive oxides (TCO) such as ITO, IZO, ZnO, or In2O3.

[0061] Optionally, the light-emitting functional layer 30 may further include a hole injection layer (HIL) and a hole transport layer (HTL) disposed between the light-emitting unit 33 and the pixel electrode 31; and an electron injection layer (EIL) and an electron transport layer (ETL) disposed between the light-emitting unit 33 and the cathode 34. The hole injection layer receives holes transported from the pixel electrode 31, and the holes are transported to the light-emitting unit 33 via the hole transport layer. The electron injection layer receives electrons transported from the cathode 34, and the electrons are transported to the light-emitting unit 33 via the electron transport layer. After the holes and electrons combine at the position of the light-emitting unit 33, excitons are generated. The excitons transition from the excited state to the ground state, release energy, and emit light.

[0062] The encapsulation layer 40 covers the light-emitting functional layer 30 and is used to protect the light-emitting unit 33 of the light-emitting functional layer 30, preventing water and oxygen intrusion that could cause the light-emitting unit 33 to fail. Optionally, the encapsulation layer 40 may be a thin-film encapsulation, for example, the encapsulation layer 40 may be a stacked structure or a multilayer stacked structure formed by sequentially stacking three thin films: a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer.

[0063] In this embodiment, the display panel 100 includes a driving backplate 1 and a plurality of display components 2 arranged in an array on the driving backplate 1, that is, the plurality of display components 2 are spliced ​​together and bound to the driving backplate 1. Multiple signal lines of each display component 2 are electrically connected to the driving backplate 1 through different first binding terminals 11. Specifically, the driving backplate 1 is provided with a second binding terminal 50 at the first binding terminal 11 corresponding to each display component 2. The second binding terminal 50 and the first binding terminal 11 are electrically connected, thereby making the display component 2 electrically connected to the driving backplate 1. Simultaneously, the driving backplate 1 is also provided with a driving chip (not shown), etc., and the second binding terminal 50 is also electrically connected to the driving chip to transmit the driving signal of the driving chip to the corresponding display component 2.

[0064] Thus, by placing the driver chip and other peripheral circuits on the driver backplane 1, and providing deep holes and first bonding terminals 11 on each display component 2, the signal lines within each display component 2 are electrically connected to the first bonding terminals 11 through the deep holes, and connected to the driver chip through the corresponding second bonding terminals 50, thereby achieving signal transmission. Therefore, each display component 2 does not require a reserved bezel area to house the driver chip and various bonding traces, ensuring that there are no large gaps between adjacent display components 2 after multiple display components 2 are spliced ​​together.

[0065] Meanwhile, the first binding terminal 11 is configured to include two parts: a first terminal portion 111 and a plurality of second terminal portions 112. The first terminal portion 111 is disposed on the first barrier layer 13, and the plurality of second terminal portions 112 are disposed within the first barrier layer 13, so that the plurality of second terminal portions 112 are arranged in a dense and spaced columnar structure. One end of each second terminal portion 112 is electrically connected to the first terminal portion 111, and the other end of each second terminal portion 112 is electrically connected to the driving backplate 1. In this way, while realizing the binding of the display component 2 to the driving backplate 1, the damage to the second terminal portion 112 during laser drilling can also be reduced, improving the reliability of the binding of the first binding terminal 11 to the driving backplate 1, thereby solving the problem of poor overlap between the display screen and the motherboard in the existing frameless splicing display technology.

[0066] In one embodiment, please refer to the reference. Figures 1 to 5 , Figure 5 This is a third partial cross-sectional structural diagram of the display assembly provided in this application embodiment. Unlike the embodiments described above, the gate scan line 232 is directly electrically connected to the corresponding first terminal portion 111, thus eliminating the need for a signal transfer line 254 on the source-drain layer 25. Specifically, the gate insulating layer 22 is patterned to form a fourth via 221, which penetrates the gate insulating layer 22, the buffer layer 16, the second barrier layer 15, the second substrate 14, and extends to the first terminal portion 111, exposing a portion of the first terminal portion 111. The gate scan line 232 is electrically connected to the first terminal portion 111 through the fourth via 221. Other descriptions are as described in the embodiments above and will not be repeated here.

[0067] In one embodiment, please refer to Figure 6 , Figure 6 This is a cross-sectional structural diagram of a display device provided in an embodiment of this application. The display device 1000 includes a housing 200 and a display panel 100 of one of the above embodiments. The housing 200 forms a receiving cavity 201, and the display panel 100 is disposed within the receiving cavity 201.

[0068] As can be seen from the above embodiments:

[0069] This application provides a display panel and a display device. The display panel includes a driving backplate and a plurality of display components arranged in an array on the driving backplate. Each display component includes a substrate and a plurality of first bonding terminals. Each first bonding terminal includes a first terminal portion and a plurality of second terminal portions. The first terminal portion is disposed on the side of the substrate away from the driving backplate, and the plurality of second terminal portions are disposed within the substrate. One end of each second terminal portion is electrically connected to the first terminal portion, and the other end of each second terminal portion is electrically connected to the driving backplate. The orthographic projection area of ​​the plurality of second terminal portions on the substrate is smaller than the orthographic projection area of ​​the first terminal portion on the substrate, so that the plurality of second terminal portions are arranged in a dense and spaced columnar structure, which reduces the damage to the second terminal portions during laser drilling and improves the reliability of the bonding between the first bonding terminals and the driving backplate, thereby solving the problem of poor overlap between the display screen and the motherboard in the existing frameless splicing display technology.

[0070] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0071] The embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A display panel, characterized in that, Includes a driving backplane and a display assembly electrically connected to the driving backplane, the display assembly comprising: A substrate is disposed facing the driving backplate; and A plurality of first bonding terminals, each first bonding terminal including a first terminal portion and a plurality of second terminal portions, the first terminal portion being disposed on the side of the substrate away from the drive back plate, and the plurality of second terminal portions being disposed within the substrate; Wherein, one end of each second terminal portion is electrically connected to the first terminal portion, the other end of each second terminal portion is electrically connected to the drive backplate, and the projected area of ​​the plurality of second terminal portions on the substrate is smaller than the projected area of ​​the first terminal portion on the substrate. The first terminal portion and a plurality of second terminal portions are integrally disposed thereon; The size of the first terminal portion is greater than 100 micrometers; The substrate includes a first substrate and a first barrier layer disposed on the side of the first substrate away from the drive back plate. The first terminal portion is disposed on the side of the first barrier layer away from the first substrate, and the second terminal portion is disposed within the first barrier layer. The first barrier layer has a plurality of through holes spaced apart in the area corresponding to the first terminal portion, and each second terminal portion is filled with the corresponding through hole; The size of the through-hole ranges from 2 micrometers to 5 micrometers.

2. The display panel according to claim 1, characterized in that, The first substrate has an opening in the region corresponding to the first bonding terminal.

3. The display panel according to claim 2, characterized in that, The size of the opening is greater than or equal to the size of the first terminal portion.

4. The display panel according to claim 1, characterized in that, The display component further includes a driving circuit layer disposed on the side of the first bonding terminal away from the substrate, the driving circuit layer including a plurality of signal lines, the signal lines being electrically connected to the corresponding first terminal portion.

5. The display panel according to claim 4, characterized in that, The substrate further includes an insulating protective layer covering the first terminal portion and the first barrier layer, and the driving circuit layer includes: A semiconductor layer is disposed on the insulating protective layer; A gate insulating layer is applied over the semiconductor layer and the insulating protective layer; A gate layer, disposed on the gate insulating layer, includes a gate and a gate signal scan line; An interlayer insulating layer is applied over the gate layer and the gate insulating layer; A source-drain layer is disposed on the interlayer insulating layer and includes a source, a drain, and a data line; The plurality of signal lines include the gate signal scan line and the data line.

6. The display panel according to claim 1, characterized in that, The first terminal portion and a plurality of second terminal portions are integrally disposed.

7. The display panel according to any one of claims 1 to 6, characterized in that, The drive backplate has a second bonding terminal on the side facing the display component, and the second bonding terminal is electrically connected to the second terminal portion.

8. The display panel according to claim 7, characterized in that, The number of display components is multiple, and the multiple display component arrays are arranged on the driving backplate.

9. A display device, characterized in that, include: The shell has a receiving cavity; The display panel as described in any one of claims 1 to 8 is disposed within the receiving cavity.

Images