Data processing method, device, non-volatile storage medium and computer equipment

Abstract

The present invention discloses a data processing method, apparatus, non-volatile storage medium, and computer equipment. The method comprises: detecting an original video stream to obtain signal characteristic parameters of the original video stream, wherein the original video stream is used to transmit video data; writing the signal characteristic parameters into the original video stream to obtain a target video stream; and transmitting the target video stream to a display driver programmable logic array, wherein the display driver programmable logic array drives a display device to display the video based on the signal characteristic parameters and video data read from the target video stream. The present invention solves the technical problem of poor user experience caused by time delays in video display in the prior art.

Description

Technical Field

[0001] The present invention relates to the field of image and video display, and in particular to a data processing method, device, non-volatile storage medium and computer equipment. Background Art

[0002] With the increase in the application scenarios of LED display screens, in order to meet the needs of displaying video sources with different characteristics, LED display screens need to adjust the display mode of the displayed video stream according to the signal characteristics of the displayed video stream.

[0003] In the prior art, LED display systems usually include a communication control MCU, a video control FPGA, and a display driver FPGA. Figure 1 A schematic diagram of data transmission during video stream display in the prior art is shown. Figure 1 As shown, users can use the host computer software to send commands to the communication control MCU via the network port. The communication control MCU parses the commands, repackages and encodes them, and sends them to the video control FPGA. The video control FPGA then detects the video stream based on the commands and feeds the detection results back to the communication control MCU. The communication control MCU then repackages the detection results into a communication command stream, which is then sent to the display driver FPGA. The display driver FPGA can then implement video display based on the detection results. Because the MCU's processing speed is much slower than that of the FPGA, when the signal characteristics of the video stream change, the video control FPGA detects the difference and feeds it back to the MCU, which then sends it to the display driver FPGA. This significantly slows the response time of the entire system, resulting in a poor user experience.

[0004] To address the above-mentioned problems, no effective solutions have been proposed so far. Summary of the Invention

[0005] Embodiments of the present invention provide a data processing method, apparatus, non-volatile storage medium, and computer equipment to at least solve the technical problem of poor user experience caused by time delay in video display in the prior art.

[0006] According to one aspect of an embodiment of the present invention, a data processing method is provided, comprising: detecting an original video stream to obtain signal characteristic parameters of the original video stream, wherein the original video stream is used to transmit video data of a video; writing the signal characteristic parameters into the original video stream to obtain a target video stream; transmitting the target video stream to a display driver programmable logic array, wherein the display driver programmable logic array drives a display device to display the video based on the signal characteristic parameters and video data read from the target video stream.

[0007] Optionally, writing the signal characteristic parameters into the original video stream to obtain the target video stream includes: determining the non-video data position in the original video stream, wherein the non-video data position is the position in the original video stream other than the position occupied by the video data; writing the signal characteristic parameters into the non-video data position to obtain the target video stream.

[0008] Optionally, determining the non-video data position in the original video stream includes: determining the signal pulse synchronization header of the field synchronization signal of the original video stream as the non-video data position; or determining the signal pulse synchronization header of the line synchronization signal of the original video stream as the non-video data position.

[0009] Optionally, the signal characteristic parameters are written into the original video stream to obtain the target video stream, including: generating a parameter stream packet according to the signal characteristic parameters, wherein the parameter stream packet includes a stream header, a stream trailer and a signal characteristic parameter stream, and the signal characteristic parameter stream is a binary bit stream; and writing the parameter stream packet into the original video stream to obtain the target video stream.

[0010] Optionally, the signal characteristic parameters include at least one of the following: frame rate, resolution, image dynamic range type, and video dimension.

[0011] According to another aspect of an embodiment of the present invention, a data processing method is also provided, including: receiving a target video stream sent by a video control programmable logic array, wherein the target video stream is obtained by the video control programmable logic array writing the signal characteristic parameters of the original video stream into the original video stream, and the original video stream is used to transmit video data of the video; reading the signal characteristic parameters and video data from the target video stream; and driving a display device to display the video according to the signal characteristic parameters and the video data.

[0012] Optionally, signal characteristic parameters are read out from the target video stream, including: sampling non-video data positions in the target video stream to obtain signal characteristic parameters, wherein the non-video data positions are positions in the original video stream other than positions occupied by video data, and the video control programmable logic array writes the signal characteristic parameters into the non-video data positions of the original video stream to obtain the target video stream.

[0013] According to another aspect of an embodiment of the present invention, a data processing device is also provided, including: a detection module, used to detect the original video stream and obtain signal characteristic parameters of the original video stream, wherein the original video stream is used to transmit video data of the video; an encoding module, used to write the signal characteristic parameters into the original video stream to obtain a target video stream; a transmission module, used to transmit the target video stream to a display driver programmable logic array, wherein the display driver programmable logic array drives a display device to display the video according to the signal characteristic parameters and video data read from the target video stream.

[0014] According to another aspect of an embodiment of the present invention, a data processing device is also provided, including: a receiving module for receiving a target video stream emitted by a video control programmable logic array, wherein the target video stream is obtained by the video control programmable logic array writing the signal characteristic parameters of the original video stream into the original video stream, and the original video stream is used to transmit video data of the video; a decoding module for reading the signal characteristic parameters and video data from the target video stream; and a driving module for driving a display device to display the video according to the signal characteristic parameters and video data.

[0015] According to another aspect of an embodiment of the present invention, a non-volatile storage medium is provided. The non-volatile storage medium includes a stored program, wherein when the program is running, the device where the non-volatile storage medium is located is controlled to execute any one of the above-mentioned data processing methods.

[0016] According to yet another aspect of an embodiment of the present invention, a computer device is provided. The computer device includes a processor, and the processor is configured to run a program. When the program is run, any one of the above-mentioned data processing methods is executed.

[0017] In an embodiment of the present invention, a video control programmable logic array is used to directly send the signal characteristic parameters obtained by detecting the video stream to the display driver programmable logic array. The original video stream is detected to obtain the signal characteristic parameters of the original video stream; the signal characteristic parameters are written into the original video stream to obtain the target video stream; the target video stream is transmitted to the display driver programmable logic array, and the display driver programmable logic array drives the display device to display the video according to the signal characteristic parameters and video data read from the target video stream, thereby achieving the purpose of writing the signal characteristic parameters obtained by detecting the video stream into the video stream and sending it to the display driver programmable logic array, thereby realizing the technical effect of reducing the time delay during video display, and further solving the technical problem of poor user experience caused by the time delay during video display in the prior art. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of this application. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0019] Figure 1 A schematic diagram showing data transmission during video stream display in the prior art is shown;

[0020] Figure 2 A hardware structure block diagram of a computer terminal for implementing a data processing method is shown;

[0021] Figure 3is a flow chart of a data processing method 1 provided according to an embodiment of the present invention;

[0022] Figure 4 is a flow chart of a second data processing method according to an embodiment of the present invention;

[0023] Figure 5 is a schematic diagram of data transmission during video stream display according to an optional embodiment of the present invention;

[0024] Figure 6 is a schematic diagram of sending a video stream signal according to an optional embodiment of the present invention;

[0025] Figure 7 is a structural block diagram of a data processing device according to an embodiment of the present invention;

[0026] Figure 8 It is a structural block diagram of a second data processing device provided according to an embodiment of the present invention. DETAILED DESCRIPTION

[0027] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0028] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0029] First, some nouns or terms that appear in the description of the embodiments of this application are subject to the following interpretations:

[0030] Microcontroller Unit (MCU), also known as single-chip microcomputer, is a chip-level computer.

[0031] Field Programmable Gate Array (FPGA) is a semi-custom circuit that can effectively solve the problem of a small number of gate circuits in existing devices.

[0032] According to an embodiment of the present invention, an embodiment of a method for data processing is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0033] The method embodiment provided in the first embodiment of the present application can be executed in a mobile terminal, a computer terminal or a similar computing device. Figure 2 FIG1 shows a hardware structure block diagram of a computer terminal for implementing a data processing method. Figure 2 As shown, the computer terminal 10 may include one or more (illustrated as 102a, 102b, ..., 102n in the figure) processors (the processor may include but is not limited to a microprocessor MCU or a programmable logic device FPGA and other processing devices), a memory 104 for storing data. In addition, it may also include: a display, an input / output interface (I / O interface), a universal serial bus (USB) port (which may be included as one of the ports of the BUS bus), a network interface, a power supply and / or a camera. It will be understood by those skilled in the art that Figure 2 The structure shown is only for illustration and does not limit the structure of the above electronic device. Figure 2 More or fewer components than shown, or with Figure 2 Different configurations shown.

[0034] It should be noted that the one or more processors and / or other data processing circuits described above may generally be referred to herein as "data processing circuitry." The data processing circuitry may be embodied in whole or in part as software, hardware, firmware, or any other combination thereof. Furthermore, the data processing circuitry may be a single, independent processing module, or may be incorporated in whole or in part into any of the other components of the computer terminal 10. As described in the embodiments of the present application, the data processing circuitry serves as a processor control (e.g., selection of a variable resistor terminal path connected to an interface).

[0035] The memory 104 can be used to store software programs and modules of application software, such as the program instructions / data storage device corresponding to the data processing method in the embodiment of the present invention. The processor executes the software programs and modules stored in the memory 104 to perform various functional applications and data processing, that is, to implement the data processing method of the application described above. The memory 104 may include a high-speed random access memory and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include a memory remotely located relative to the processor, and these remote memories may be connected to the computer terminal 10 via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0036] The display may be, for example, a touch screen liquid crystal display (LCD) that enables a user to interact with a user interface of the computer terminal 10 .

[0037] The execution subject of the data processing method 1 is the video control programmable logic array, that is, the video control FPGA. Figure 3 : is a flow chart of a data processing method 1 according to an embodiment of the present invention. Figure 3 As shown, the method includes the following steps:

[0038] Step S302: Detect the original video stream to obtain signal characteristic parameters of the original video stream, wherein the original video stream is used to transmit video data of the video.

[0039] In this step, the video control FPGA can detect the original video stream. Because LED displays have a wide range of applications, the video stream input to the LED display may have various characteristics. When the LED display displays the input video stream, it needs to detect the signal characteristic parameters of the video source and adjust the display parameters accordingly.

[0040] Step S304: Write the signal characteristic parameters into the original video stream to obtain the target video stream.

[0041] In this step, the video control FPGA can write the signal characteristic parameters into the original video stream to obtain the target video stream, so the signal characteristic parameters can be transmitted to the display driver FPGA together with the original video stream.

[0042] Step S306 , transmitting the target video stream to the display driver programmable logic array, wherein the display driver programmable logic array drives the display device to display the video according to the signal characteristic parameters and video data read from the target video stream.

[0043] In this step, the video control FPGA can transmit the target video stream with the signal characteristic parameters written into it to the display driver FPGA. The display driver FPGA can read the signal characteristic parameters and determine the display parameters according to the signal characteristic parameters to display the video represented by the target video stream.

[0044] Through the above steps, the purpose of writing the signal characteristic parameters obtained by detecting the video stream into the video stream and sending it to the display driver programmable logic array can be achieved, thereby realizing the technical effect of reducing the time delay during video display, and further solving the technical problem of poor user experience caused by the time delay during video display in the existing technology.

[0045] As an optional embodiment, writing the signal characteristic parameters into the original video stream to obtain the target video stream can be achieved by the following steps: determining the non-video data position in the original video stream, wherein the non-video data position is the position in the original video stream other than the position occupied by the video data; writing the signal characteristic parameters into the non-video data position to obtain the target video stream.

[0046] Alternatively, a video stream typically includes multiple signals, and valid video data is not transmitted all the time during a signal transmission cycle. A small portion of time does not require valid video data transmission. Therefore, this inactive time without valid video data transmission can be used to transmit detection information. The original video stream may also include inactive time, i.e., non-video data locations where no video data is transmitted, which can be used to transmit signal characteristic parameters.

[0047] As an optional embodiment, determining the non-video data position in the original video stream can be achieved by the following steps: determining the signal pulse synchronization head of the field synchronization signal of the original video stream as the non-video data position; or determining the signal pulse synchronization head of the line synchronization signal of the original video stream as the non-video data position.

[0048] Optionally, the original video stream may include multiple signals, such as field sync signals, line sync signals, and data enable blanking signals. The transmission of these signals includes periods during which valid video data is not required. These inactive periods can be used to transmit signal characteristic parameters. This optional real-time example provides two locations for transmitting signal characteristic parameters: the signal pulse sync header of the field sync signal and the signal pulse sync header of the line sync signal. Specifically, the signal characteristic parameters are transmitted during the high pulse sync header of the field signal or the line signal.

[0049] As an optional embodiment, writing the signal characteristic parameters into the original video stream to obtain the target video stream can be achieved by the following steps: generating a parameter stream packet based on the signal characteristic parameters, wherein the parameter stream packet includes a stream header, a stream trailer, and a signal characteristic parameter stream, and the signal characteristic parameter stream is a binary bit stream; writing the parameter stream packet into the original video stream to obtain the target video stream.

[0050] Optionally, the signal characteristic parameters can be transmitted to the display driver FPGA in a fixed format to facilitate reading by the display driver FPGA and improve transmission reliability. A parameter stream packet conforming to a fixed format can be generated based on the signal characteristic parameters. The parameter stream packet has a fixed format and may include a stream header, a stream trailer, and a signal characteristic parameter stream. The generated parameter stream packet is written into the original video stream to generate the target video stream, which is then transmitted to the display driver FPGA along with the target video stream.

[0051] As an optional embodiment, the signal characteristic parameter may include at least one of the following: frame rate, resolution, image dynamic range type, and video dimension. The signal characteristic parameter characterizes the characteristics of the original video stream and may be the frame rate, resolution, image dynamic range type, or video dimension of the original video stream, or a combination of these characteristics.

[0052] The execution subject of the second data processing method is the display driver programmable logic array, that is, the display driver FPGA. Figure 4 : is a flow chart of a second data processing method according to an embodiment of the present invention. Figure 4 As shown, the method includes the following steps:

[0053] Step S402: receiving a target video stream sent by a video control programmable logic array, wherein the target video stream is obtained by the video control programmable logic array writing signal characteristic parameters of the original video stream into the original video stream, and the original video stream is used to transmit video data of the video.

[0054] In this step, the display driver FPGA can receive the target video stream transmitted by the video control FPGA. The target video stream includes the signal characteristic parameters of the original video stream. The original video stream is used to transmit the video data of the video to be displayed on the LED display.

[0055] Step S404: read signal characteristic parameters and video data from the target video stream.

[0056] Step S406: driving a display device to display the video according to the signal characteristic parameters and the video data.

[0057] In this step, the display driver FPGA can read the signal characteristic parameters and the video data of the video to be displayed from the target video stream, and determine the parameters of the LED display screen to display the video according to the signal characteristic parameters, and display the video with the determined display parameters.

[0058] Through the above steps, the purpose of writing the signal characteristic parameters obtained by detecting the video stream into the video stream and sending it to the display driver programmable logic array can be achieved, thereby realizing the technical effect of reducing the time delay during video display, and further solving the technical problem of poor user experience caused by the time delay during video display in the existing technology.

[0059] As an optional embodiment, reading out signal characteristic parameters from the target video stream can be achieved by the following steps: sampling the non-video data positions in the target video stream to obtain signal characteristic parameters, wherein the non-video data positions are positions in the original video stream other than the positions occupied by the video data, and the video control programmable logic array writes the signal characteristic parameters into the non-video data positions of the original video stream to obtain the target video stream.

[0060] Optionally, the non-video data locations in the target video stream are the locations where the signal characteristic parameters are transmitted. Therefore, the display driver FPGA can sample the non-video data locations to obtain the signal characteristic parameters. The signal characteristic parameters can be transmitted in the form of parameter stream packets. When the display driver FPGA reads a fixed format, it can identify it as a parameter stream packet and read the signal characteristic parameters included in the parameter stream packet.

[0061] As a specific embodiment, Figure 5 Schematic diagram of data transmission during video stream display according to an optional embodiment of the present invention. Figure 5 As shown, after the video stream is input into the video control FPGA, the video control FPGA detects the video stream signal characteristics and obtains a detection result, namely, a signal characteristic parameter. This detection result is directly transmitted to the display driver FPGA via the video stream channel. The entire process does not pass through the communication control MCU, and the communication control MCU does not need to encode the detection result and transmit it to the display driver FPGA via the communication stream channel. However, the present invention still retains the process of the communication control MCU receiving user commands, which can realize video stream transmission and detection based on user commands. However, after the video control FPGA receives the input video stream, it can detect the signal characteristics of the video stream and directly send the signal characteristics and the video stream together to the display driver FPGA without being transferred through the communication control MCU.

[0062] Figure 6 Schematic diagram of sending a video stream signal according to an optional embodiment of the present invention. Figure 6As shown in the figure, for a video stream, it usually includes field synchronization signal, line synchronization signal, data enable blanking signal, etc. In one field, most of the time is used to transmit valid video stream, but there is still a small part that does not need to transmit valid video data. This invalid time can be used to insert detection information, which is the signal characteristic parameter. For example, for a video with a 60hz frame rate, the field cycle time is 16.66ms, which includes the time for transmitting valid video stream and a small part of invalid time when valid video data is not required. Figure 6 As shown, for the field synchronization signal during the high pulse period, there is no need to transmit a valid video stream at this time, and the detection information can be transmitted during the high pulse synchronization header of the field signal. In order to improve the reliability of transmission, it can be transmitted in the form of a stream packet, and the stream packet includes a stream header and a stream tail. For example, in hexadecimal form, BDXXXX54 can be used as a stream packet, where BD is a fixed value header, 54 is a fixed value tail, and XXXX is the valid detection information transmitted. When the detection information is the frame rate of the video stream signal detection, if the display device supports frame rates including 60hz / 50hz / 24hz / 48hz, etc., it can be represented by two binary bits, such as 00 for 60hz frame rate, 01 for 50hz frame rate, 10 for 24hz frame rate, 11 for 48hz frame rate, etc. If more frame rates are to be supported, they can be transmitted by expanding to 3-4 bits. There are n bits, which can transmit 2 n Frame rate information. In addition, support for SDR / HDR signal detection and transmission can be represented by a 1-2-bit bit, such as 0 for support of SDR signal detection and transmission, 1 for support of HDR signal detection and transmission, etc. In this way, more video stream signal feature information can be expanded and transmitted. The display driver FPGA reads the detection information by detecting the high pulse synchronization header (low pulse synchronization header is also acceptable) of the field signal. When the high pulse field synchronization header appears, the display driver FPGA continuously samples and detects the input video stream data. When the packet structure code stream of BDxxxx54 is detected, the video stream signal feature information is received by parsing the valid data information, thereby determining the corresponding display drive mode and processing parameters, so as to quickly respond to achieve the best display state effect. The present invention simplifies the time for the video control FPGA to feedback the results to the communication control MCU and the time for the communication control MCU to package and encode the detection results and send them, because the processing time of the FPGA is much faster than that of the MCU, thereby greatly improving the response time of the system.

[0063] It should be noted that for the aforementioned method embodiments, for simplicity of description, they are all expressed as a series of action combinations. However, those skilled in the art should be aware that the present invention is not limited by the order of the actions described, because according to the present invention, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in this specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present invention.

[0064] Through the description of the above embodiments, those skilled in the art can clearly understand that the data processing method according to the above embodiments can be implemented by means of software plus a necessary general hardware platform, or of course by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for enabling a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present invention.

[0065] According to an embodiment of the present invention, there is further provided a data processing device 1 for implementing the above-mentioned data processing method 1. Figure 7 : is a structural block diagram of a data processing device according to an embodiment of the present invention. Figure 7 As shown, the data processing device 1 includes: a detection module 72, an encoding module 74 and a transmission module 76. The device is described below.

[0066] The detection module 72 is used to detect the original video stream to obtain signal characteristic parameters of the original video stream, wherein the original video stream is used to transmit video data of the video.

[0067] The encoding module 74 is connected to the detection module 72 and is used to write the signal characteristic parameters into the original video stream to obtain the target video stream.

[0068] The transmission module 76 is connected to the encoding module 74 and is used to transmit the target video stream to the display driver programmable logic array, wherein the display driver programmable logic array drives the display device to display the video according to the signal characteristic parameters and video data read from the target video stream.

[0069] It should be noted that the detection module 72, encoding module 74, and transmission module 76 described above correspond to steps S302 to S306 in the embodiment. The examples and application scenarios implemented by the various modules and corresponding steps are the same, but are not limited to the contents disclosed in the above embodiment. It should be noted that the above modules, as part of the device, can be run in the computer terminal 10 provided in the embodiment.

[0070] According to an embodiment of the present invention, a second data processing device for implementing the second data processing method is also provided. Figure 8 is a structural block diagram of a data processing device 2 provided according to an embodiment of the present invention, such as Figure 8 As shown, the second data processing device includes: a receiving module 82, a decoding module 84 and a driving module 86. The device is described below.

[0071] The receiving module 82 is used to receive the target video stream sent by the video control programmable logic array, wherein the target video stream is obtained by the video control programmable logic array writing the signal characteristic parameters of the original video stream into the original video stream, and the original video stream is used to transmit video data of the video.

[0072] The decoding module 84 is connected to the receiving module 82 and is used to read signal characteristic parameters and video data from the target video stream.

[0073] The driving module 86 is connected to the decoding module 84 and is used to drive the display device to display the video according to the signal characteristic parameters and the video data.

[0074] It should be noted that the receiving module 82, decoding module 84, and driving module 86 correspond to steps S402 to S406 in the embodiment. The examples and application scenarios implemented by the various modules and corresponding steps are the same, but are not limited to the contents disclosed in the above embodiment. It should be noted that the above modules, as part of the device, can be run in the computer terminal 10 provided in the embodiment.

[0075] An embodiment of the present invention may provide a computer device. Optionally, in this embodiment, the computer device may be located in at least one of a plurality of network devices in a computer network. The computer device includes a memory and a processor.

[0076] Among them, the memory can be used to store software programs and modules, such as the program instructions / modules corresponding to the data processing method and device in the embodiments of the present invention. The processor executes various functional applications and data processing by running the software programs and modules stored in the memory, that is, realizing the above-mentioned data processing method. The memory may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory may further include a memory remotely located relative to the processor, and these remote memories may be connected to the computer terminal via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0077] The processor can call the information and application programs stored in the memory through the transmission device to perform the following steps: detect the original video stream to obtain the signal characteristic parameters of the original video stream, wherein the original video stream is used to transmit the video data of the video; write the signal characteristic parameters into the original video stream to obtain the target video stream; transmit the target video stream to the display driver programmable logic array, wherein the display driver programmable logic array drives the display device to display the video according to the signal characteristic parameters and video data read from the target video stream.

[0078] Optionally, the above-mentioned processor can also execute the program code of the following steps: writing the signal characteristic parameters into the original video stream to obtain the target video stream, including: determining the non-video data position in the original video stream, wherein the non-video data position is the position in the original video stream other than the position occupied by the video data; writing the signal characteristic parameters into the non-video data position to obtain the target video stream.

[0079] Optionally, the processor may also execute the program code of the following steps: determining the non-video data position in the original video stream, including: determining the signal pulse synchronization header of the field synchronization signal of the original video stream as the non-video data position; or determining the signal pulse synchronization header of the line synchronization signal of the original video stream as the non-video data position.

[0080] Optionally, the above-mentioned processor can also execute the program code of the following steps: writing the signal characteristic parameters into the original video stream to obtain the target video stream, including: generating a parameter bitstream package based on the signal characteristic parameters, wherein the parameter bitstream package includes a bitstream header, a bitstream trailer and a signal characteristic parameter bitstream, and the signal characteristic parameter bitstream is a binary bitstream; writing the parameter bitstream package into the original video stream to obtain the target video stream.

[0081] Optionally, the processor may further execute program code of the following steps: signal characteristic parameters include at least one of the following: frame rate, resolution, image dynamic range type, and video dimension.

[0082] Optionally, the above-mentioned processor can also execute the program code of the following steps: receiving a target video stream sent by a video control programmable logic array, wherein the target video stream is obtained by the video control programmable logic array writing the signal characteristic parameters of the original video stream into the original video stream, and the original video stream is used to transmit the video data of the video; reading the signal characteristic parameters and video data from the target video stream; and driving the display device to display the video according to the signal characteristic parameters and video data.

[0083] Optionally, the above-mentioned processor can also execute the program code of the following steps: reading out signal characteristic parameters from the target video stream, including: sampling the non-video data position in the target video stream to obtain signal characteristic parameters, wherein the non-video data position is the position in the original video stream other than the position occupied by the video data, and the video control programmable logic array writes the signal characteristic parameters to the non-video data position of the original video stream to obtain the target video stream.

[0084] An embodiment of the present invention provides a data processing solution. A video control programmable logic array is used to directly send signal characteristic parameters obtained by detecting a video stream to a display driver programmable logic array. The original video stream is detected to obtain the signal characteristic parameters of the original video stream; the signal characteristic parameters are written into the original video stream to obtain a target video stream; the target video stream is transmitted to the display driver programmable logic array. The display driver programmable logic array drives a display device to display the video based on the signal characteristic parameters read from the target video stream and video data. This achieves the purpose of writing the signal characteristic parameters obtained by detecting the video stream into the video stream and sending it to the display driver programmable logic array, thereby achieving the technical effect of reducing the time delay during video display, thereby solving the technical problem of poor user experience caused by the time delay during video display in the prior art.

[0085] A person skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be completed by instructing the hardware related to the terminal device through a program, and the program can be stored in a non-volatile storage medium, which may include: a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.

[0086] The embodiment of the present invention further provides a non-volatile storage medium. Optionally, in this embodiment, the non-volatile storage medium can be used to store the program code executed by the data processing method provided in the above embodiment.

[0087] Optionally, in this embodiment, the non-volatile storage medium may be located in any computer terminal in a computer terminal group in a computer network, or in any mobile terminal in a mobile terminal group.

[0088] Optionally, in this embodiment, the non-volatile storage medium is configured to store program codes for executing the following steps: detecting the original video stream to obtain signal characteristic parameters of the original video stream, wherein the original video stream is used to transmit video data of the video; writing the signal characteristic parameters into the original video stream to obtain a target video stream; transmitting the target video stream to a display driver programmable logic array, wherein the display driver programmable logic array drives a display device to display the video according to the signal characteristic parameters and video data read from the target video stream.

[0089] Optionally, in this embodiment, the non-volatile storage medium is configured to store program code for performing the following steps: writing signal characteristic parameters into the original video stream to obtain a target video stream, including: determining a non-video data position in the original video stream, wherein the non-video data position is a position in the original video stream other than a position occupied by video data; writing the signal characteristic parameters into the non-video data position to obtain a target video stream.

[0090] Optionally, in this embodiment, the non-volatile storage medium is configured to store program code for performing the following steps: determining the non-video data position in the original video stream, including: determining the signal pulse synchronization header of the field synchronization signal of the original video stream as the non-video data position; or, determining the signal pulse synchronization header of the line synchronization signal of the original video stream as the non-video data position.

[0091] Optionally, in this embodiment, the non-volatile storage medium is configured to store program code for executing the following steps: writing signal characteristic parameters into the original video stream to obtain a target video stream, including: generating a parameter bitstream package based on the signal characteristic parameters, wherein the parameter bitstream package includes a bitstream header, a bitstream trailer, and a signal characteristic parameter bitstream, and the signal characteristic parameter bitstream is a binary bitstream; writing the parameter bitstream package into the original video stream to obtain the target video stream.

[0092] Optionally, in this embodiment, the non-volatile storage medium is configured to store program codes for executing the following steps: signal characteristic parameters include at least one of the following: frame rate, resolution, image dynamic range type, video dimension.

[0093] Optionally, in this embodiment, the non-volatile storage medium is configured to store program code for performing the following steps: receiving a target video stream sent by a video control programmable logic array, wherein the target video stream is obtained by the video control programmable logic array writing signal characteristic parameters of the original video stream into the original video stream, and the original video stream is used to transmit video data of the video; reading the signal characteristic parameters and video data from the target video stream; and driving the display device to display the video according to the signal characteristic parameters and the video data.

[0094] Optionally, in this embodiment, the non-volatile storage medium is configured to store program code for performing the following steps: reading signal characteristic parameters from a target video stream, including: sampling non-video data positions in the target video stream to obtain signal characteristic parameters, wherein the non-video data positions are positions in the original video stream other than positions occupied by video data, and the video control programmable logic array writes the signal characteristic parameters to the non-video data positions of the original video stream to obtain the target video stream.

[0095] The serial numbers of the above embodiments of the present invention are for description only and do not represent the advantages or disadvantages of the embodiments.

[0096] In the above embodiments of the present invention, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0097] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. Among them, the device embodiments described above are only exemplary. For example, the division of the units can be a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of units or modules, which can be electrical or other forms.

[0098] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0099] In addition, the functional units in the various embodiments of the present invention may be integrated into a single processing unit, each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0100] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a non-volatile storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, magnetic disk or optical disk, and other media that can store program code.

[0101] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as within the scope of protection of the present invention.

Claims

1. A data processing method, characterized in that: include: The video control programmable logic array detects the original video stream to obtain signal characteristic parameters of the original video stream, wherein the original video stream is used to transmit video data of the video; The video control programmable logic array writes the signal characteristic parameters into the original video stream to obtain a target video stream; The video control programmable logic array transmits the target video stream to the display driver programmable logic array, wherein the display driver programmable logic array drives a display device to display the video according to the signal characteristic parameters and the video data read from the target video stream.

2. The method according to claim 1, characterized in that The video control programmable logic array writes the signal characteristic parameters into the original video stream to obtain a target video stream, including: Determining a non-video data position in the original video stream, wherein the non-video data position is a position in the original video stream other than a position occupied by the video data; The signal characteristic parameters are written into the non-video data location to obtain the target video stream.

3. The method according to claim 2, characterized in that Determining the position of the non-video data in the original video stream includes: Determine the signal pulse synchronization head of the field synchronization signal of the original video stream as the non-video data position; or, A signal pulse synchronization head of a line synchronization signal of the original video stream is determined as the non-video data position.

4. The method according to claim 1, wherein The video control programmable logic array writes the signal characteristic parameters into the original video stream to obtain a target video stream, including: Generate a parameter stream packet according to the signal characteristic parameters, wherein the parameter stream packet includes a stream header, a stream trailer, and a signal characteristic parameter stream, and the signal characteristic parameter stream is a binary bit stream; The parameter stream packet is written into the original video stream to obtain the target video stream.

5. The method according to any one of claims 1 to 4, characterized in that The signal characteristic parameters include at least one of the following: frame rate, resolution, image dynamic range type, and video dimension.

6. A data processing method, characterized in that: include: The display driver programmable logic array receives a target video stream sent by the video control programmable logic array, wherein the target video stream is obtained by the video control programmable logic array writing signal characteristic parameters of the original video stream into the original video stream, and the original video stream is used to transmit video data of the video; The display driver programmable logic array reads the signal characteristic parameters and the video data from the target video stream; The display driver programmable logic array drives a display device to display the video according to the signal characteristic parameters and the video data.

7. The method according to claim 6, characterized in that The display driver programmable logic array reads the signal characteristic parameter from the target video stream, including: The non-video data position in the target video stream is sampled to obtain the signal characteristic parameters, wherein the non-video data position is a position in the original video stream other than the position occupied by the video data, and the video control programmable logic array writes the signal characteristic parameters into the non-video data position of the original video stream to obtain the target video stream.

8. A data processing device, characterized in that: include: a detection module, configured to detect an original video stream using a video control programmable logic array to obtain signal characteristic parameters of the original video stream, wherein the original video stream is used to transmit video data of a video; An encoding module, configured for the video control programmable logic array to write the signal characteristic parameters into the original video stream to obtain a target video stream; A transmission module is used for the video control programmable logic array to transmit the target video stream to the display driver programmable logic array, wherein the display driver programmable logic array drives the display device to display the video according to the signal characteristic parameters and the video data read from the target video stream.

9. A data processing device, characterized in that: include: a receiving module, configured to display a driver programmable logic array receiving a target video stream sent by a video control programmable logic array, wherein the target video stream is obtained by the video control programmable logic array writing signal characteristic parameters of an original video stream into the original video stream, and the original video stream is used to transmit video data of a video; A decoding module, configured for the display driver programmable logic array to read the signal characteristic parameters and the video data from the target video stream; A driving module is used for the display driving programmable logic array to drive a display device to display the video according to the signal characteristic parameters and the video data.

10. A non-volatile storage medium, characterized in that: The non-volatile storage medium includes a stored program, wherein when the program is executed, the device where the non-volatile storage medium is located is controlled to execute the data processing method according to any one of claims 1 to 7.

11. A computer device, characterized in that: include: memory and processor, The memory stores a computer program; The processor is configured to execute a computer program stored in the memory, and when the computer program is run, the processor is enabled to execute the data processing method according to any one of claims 1 to 7.

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