Instruction transfer prediction systems, methods, apparatus, computer devices, and storage media

By introducing the Predictive Target Address Queue (PTQ) to decouple the prediction unit and the instruction fetch unit, and using the advanced prediction results to direct the instruction fetch address, the problem of improving the performance of the front-end processing unit is solved, and more efficient hardware resource utilization and pipeline performance optimization are achieved.

CN116149733BActive Publication Date: 2026-03-20BEIJING SMARTCHIP MICROELECTRONICS TECHNOLOGY CO LTD +3
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Patent Information

Application Number
CN202310215287.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-02-28
Publication Date
2026-03-20
Estimated Expiration
2043-02-28

AI Technical Summary

Technical Problem

In the prior art, the prediction unit and the instruction fetching unit of the front-end processing unit are tightly coupled, resulting in poor decoupling effect and difficulty in improving performance, especially in multi-level branch prediction structures.

Method used

The instruction transfer prediction system was redesigned by introducing a prediction target address queue (PTQ), which decouples the prediction unit from the instruction fetch unit. The high-level prediction results generated by multi-level branch prediction directly direct the instruction fetch address, eliminating the participation of pre-decoding results and forming an independent prediction unit.

Benefits of technology

It improves the decoupling effect of the prediction unit, reduces the waste of hardware resources, improves the working efficiency of the front-end processing unit, reduces pipeline errors, and improves instruction fetching efficiency.

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Abstract

The application discloses a kind of instruction transfer prediction systems, methods, devices, computer equipment and storage medium, the instruction transfer prediction system includes prediction unit, prediction target address queue and fetch unit;Wherein: the prediction unit is used to carry out multistage branch prediction to transfer instruction;The prediction target address queue is used to record the instruction address of the transfer instruction and the first level prediction result under the condition of receiving first level prediction result, and using the second level prediction result to cover corresponding first level prediction result under the condition of receiving the second level prediction result corresponding to the transfer instruction;The fetch unit is used to obtain target prediction address from the prediction target address queue to carry out corresponding fetch operation. Thus, the prediction unit is separated from the original coupling structure, effectively improving the decoupling effect of prediction unit.
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