A method for testing electrical characteristics of a radio frequency identification chip based on an ATE

Abstract

The present application belongs to the field of integrated circuit testing, and aims to provide a kind of electrical characteristic test method based on ATE for radio frequency identification chip.The specific invention content includes five kinds of algorithm modules, such as reverse link frequency automatic adjustment algorithm, initialization data format automatic conversion algorithm, ID number automatic arrangement infusion algorithm, encryption data format automatic conversion algorithm and radio frequency function verification protocol algorithm.The method can simultaneously satisfy the test of the digital logic module and the radio frequency module of the radio frequency identification chip, and can complete the test of the electrical characteristic parameters of the radio frequency identification chip with different communication protocol standards by only using ATE general digital board, radio frequency board and analog board plus corresponding programming algorithm without adding any peripheral protocol module, so that the test of digital logic function and radio frequency function is completed at one time, and the method has the advantages of saving test suite cost, saving test time, being convenient and easy to modify for different communication protocol standards, etc.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit testing and relates to a method for testing the electrical characteristics of radio frequency identification chips based on ATE. Background Technology

[0002] Testing is a crucial stage in the integrated circuit (IC) development process and an essential step before IC product acceptance and delivery. Using automated test equipment (ATE) to test the electrical characteristics of ICs at each stage is currently the most common method for rapid mass testing of ICs and a vital guarantee of IC product qualification.

[0003] Radio frequency identification (RFID) products are generally divided into electronic tags, readers, and antennas. RFID electronic tags are RFID chips. Their basic principle is: after the electronic tag enters the magnetic field, it receives the radio frequency signal emitted by the reader. It then uses the energy obtained by the induced current to send out the product information stored in the chip. The reader reads and decodes the information and sends it to the host computer terminal for further processing of the decoded data.

[0004] For testing RFID electronic tags (i.e., RFID chips), there are two most common technical solutions. One is to build a test environment using an RFID integrated tester (or a combination of discrete instruments such as a signal generator, oscilloscope, spectrum analyzer, and corresponding communication protocol hardware modules), a DC power supply, a PC, and a test board. Corresponding software is developed on the PC to perform read / write tests on the RFID chip under test. This method is extremely inefficient, has poor versatility, and cannot effectively avoid crosstalk from numerous cables. The other technical solution uses an ATE (Automatic Test Equipment) to test the RFID chip. Typically, this requires testing in conjunction with external protocol modules to meet signal communication protocol requirements. Adjusting the reverse link frequency requires establishing multiple or even dozens of test items. When assigning IDs, only fixed IDs can be assigned. If the ID needs to be changed, a large number of test vectors matching the number of chips need to be prepared in advance, and then the test vectors need to be manually switched to change the ID. This also requires the ATE tester to have a large vector space and depth.

[0005] Due to the unique characteristics of RFID chips, ATE testing presents new requirements. ATE equipment must generate compliant RF signals and digital signals conforming to specific communication protocols, possess the ability to return signals like a reader / writer, and perform ID number encoding and programming for different RFID chips. To meet these requirements, various algorithms need to be developed on the ATE to achieve fully automated testing, reduce testing time and hardware requirements, and lower overall testing costs. Summary of the Invention

[0006] The purpose of this invention is to provide a test method for the electrical characteristics of passive UHF RFID chips based on ATE (Automatic Test Equipment). This method can simultaneously test both the digital logic module and the RF module of the RFID chip. Without adding any external protocol modules, it can efficiently complete the testing of the electrical characteristics of the RFID chip for RFID chips with different communication protocol standards by utilizing existing general-purpose digital boards, RF boards, and analog boards in ATE and designing an automated test method. This allows for the efficient completion of testing of both digital logic and RF functions in one go.

[0007] The technical solution adopted in this invention is as follows:

[0008] A method for testing the electrical characteristics of an ATE-based radio frequency identification chip specifically includes the following steps:

[0009] Step S1: Generate the initial excitation signal. Based on the initial excitation signal, generate an excitation format signal according to the communication protocol format used by the RFID chip under test, and send it to the RFID chip under test. Test the frequency value based on the returned excitation format signal from the RFID chip under test, and adjust the excitation format signal according to the frequency value until the frequency value is adjusted to the target range. The reverse link frequency adjustment is then completed.

[0010] Step S2: After the reverse link frequency adjustment is completed, initialization binary data is generated according to the initialization requirements and segmented. The segmented data is appended with an address and sent to the corresponding addresses of the RFID chip under test. The data returned by the RFID chip under test is judged. When all the returned data meets the judgment criteria, the initialization is successful.

[0011] Step S3: After successful initialization, the ID number data of the RFID chip under test is generated according to the probe movement coordinates of the probe station and the ID number compilation rules, injected into the corresponding RFID chip under test, and the ID number injection is judged based on the signal returned by the RFID chip under test.

[0012] Step S4: After the ID number is successfully injected, the source encrypted data is converted into a specific format according to the encryption and hardening requirements of the RFID chip under test, and the encrypted data is sent to the RFID chip under test. After receiving the encrypted data, the RFID chip under test encrypts and hardens the initialization data and ID number and returns a signal. The encryption and hardening is determined by parsing the returned signal.

[0013] Step S5: After successful encryption and solidification, transmit an RF signal to the RFID chip under test, analyze and judge the function of the RF signal returned by the RFID chip under test, and verify whether the operations of steps S1 to S4 on the RFID chip under test were completed correctly.

[0014] Furthermore, step S1 specifically includes the following steps:

[0015] Step S11: Generate the initial excitation signal;

[0016] Step S12: The generated excitation signal is framed and packaged according to the communication protocol format used by the RFID chip under test to generate an excitation format signal, and then sent to the RFID chip under test.

[0017] Step S13: The return excitation format signal of the RFID chip under test is parsed according to the communication protocol, and the valid segments are detected for frequency testing to obtain the frequency value of the data.

[0018] Step S14: Generate a new excitation signal based on the interval where the Frequency value is located. Specifically, generate a new excitation signal by binary search or linear search based on the size of the target interval of the Frequency value. Return to step S12 until the Frequency value is adjusted to the target interval.

[0019] Furthermore, step S3 specifically includes the following steps:

[0020] Step S31: Obtain the probe coordinate information of the probe station on the wafer. According to the ID number compilation rules, the probe coordinate information is used as input to obtain the source format ID number. The ID number compilation rules include continuous jump, exponential jump, logarithmic jump and pseudo-random jump.

[0021] Step S32: After converting the source format ID number, generate ID number data that conforms to the communication protocol and ID number compilation rules, and inject it into the RFID chip under test;

[0022] Step S33: After the ID number is injected, receive the signal returned by the RFID chip under test. If the returned signal meets the criteria, the ID number of the corresponding RFID chip under test is successfully injected, and proceed to step S34; otherwise, return to step S31.

[0023] In step S34, the probes of the probe station move to the next RFID chip under test and return to step S31 until the last RFID chip under test is encapsulated.

[0024] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0025] First, when adjusting the reverse link frequency, the present invention can quickly and automatically adjust the excitation sent by the ATE according to the reverse link frequency, so that the reverse link frequency can be quickly and efficiently adjusted to the required frequency range, without the need for manual adjustment as in the prior art.

[0026] Secondly, when sending stimuli that need to conform to the communication protocol format, the present invention does not require an additional serial protocol module on the hardware. The data format conversion that conforms to the communication protocol can be achieved on the ATE by programming a complex algorithm, which greatly reduces the hardware cost.

[0027] Furthermore, the automatic ID number arrangement and injection test is implemented on the ATE through an algorithm and can be freely arranged according to any rules. There is no need to generate a large number of vectors based on ID number arrangement during the simulation stage, which reduces the requirements and configuration of the vector space of the ATE test machine, saves the cost of ATE test equipment version upgrades, and also eliminates the need for manual vector switching.

[0028] Finally, RF function verification does not require external specialized RF signal testing instruments, nor does it require additional RF protocol testing options corresponding to the product under test. The RF function verification protocol algorithm can be written directly on the ATE (Automatic Test Equipment). This significantly reduces the hardware cost of RF protocol testing options when applied to batch, multi-site testing scenarios, and allows for quick and convenient modification and adaptation to different communication protocol standards. This invention offers advantages such as saving testing hardware costs, saving testing time, and strong versatility for testing RF identification chips across different communication protocol standards. Attached Figure Description

[0029] Figure 1 This is a schematic diagram of the five sequentially executed test steps upon which this invention is based.

[0030] Figure 2 This is a schematic diagram of the reverse link frequency automatic adjustment algorithm invented in step S1.

[0031] Figure 3 This is a schematic diagram of the initial data format automatic conversion algorithm invented in step S2.

[0032] Figure 4 This is a schematic diagram of the automatic ID number arrangement and injection algorithm invented in step S3.

[0033] Figure 5 This is a schematic diagram of the automatic encryption data format conversion algorithm invented in step S4.

[0034] Figure 6 This is a schematic diagram of the radio frequency function verification protocol algorithm invented in step S5.

[0035] Figure 7 This is a schematic diagram of the reverse link frequency automatic adjustment algorithm based on step S1 in one embodiment of the present invention.

[0036] Figure 8 This is a schematic diagram of the automatic initial data format conversion algorithm invented based on step S2 in one embodiment of the present invention.

[0037] Figure 9 This is a schematic diagram of the data format conversion process in the initial data format automatic conversion algorithm invented based on step S2 in one embodiment of the present invention.

[0038] Figure 10 This is a schematic diagram of the automatic ID number arrangement and injection algorithm based on step S3 in one embodiment of the present invention.

[0039] Figure 11 This is a schematic diagram of the automatic encryption data format conversion algorithm based on step S4 in one embodiment of the present invention.

[0040] Figure 12 This is a schematic diagram of the protocol algorithm for radio frequency function verification based on step S5 in one embodiment of the present invention. Detailed Implementation

[0041] The test process underlying the electrical characteristic testing method for an ATE-based radio frequency identification chip of this invention is as follows: Figure 1 As shown, it consists of step S1 automatically adjusting the reverse link frequency, step S2 initializing the storage area data, step S3 automatically arranging and injecting the ID number, step S4 encrypting and solidifying the storage area data, and step S5 verifying the radio frequency function.

[0042] Step S1, automatically adjusting the reverse link frequency, is the first step of this method. The next step, S2, is data initialization of the storage area. Step S1 must be completed for step S2 to be effective. Figure 2Step S1 introduces an automatic frequency adjustment algorithm for the reverse link, which mainly consists of three modules: a communication protocol algorithm module, a frequency testing algorithm module, and an excitation selection algorithm module. The ATE generates a First Stimulater Signal and sends it to the communication protocol algorithm module. The communication protocol algorithm module frames and packages the First Stimulater Signal according to the communication protocol format used by the RFID chip under test, generating a First Stimulater Protocolled Signal, which is then sent to the RFID chip under test. The frequency testing algorithm module parses the First Backward Protocolled Signal according to the communication protocol, detects valid segments for frequency testing, and sends the measured frequency data to the excitation selection algorithm module. The excitation selection algorithm module selects which new excitation to generate based on the frequency value's range. This selection process specifically uses a binary search or linear search method to generate new excitations based on the target range size of the frequency value. Each newly generated excitation is sent to the communication protocol algorithm module for a new cycle, until the frequency value is adjusted to within the target range.

[0043] Step S2, initializing the storage area data, is the second step of this method. It is preceded by step S1, which automatically adjusts the reverse link frequency, and followed by step S3, which automatically arranges and injects ID numbers. Step S2 must be completed for step S3 to be effective. Figure 3Step S2 invented an automatic data format conversion algorithm for initialization. This algorithm mainly consists of a variable-width, variable-address source format data loading module, a data segmentation and distribution module, a data format conversion module, and an initialization completion flag judgment module. The variable-width, variable-address source format data loading module can load different contents and sizes of initialization binary data according to different initialization requirements. It then sends the loaded Source Format Data to the data segmentation and distribution module. This module segments the Source Format Data, appends an address to the end of each segment to generate Source Format Data1, Source Format Data2…Source Format Datan, and sends each segment to the data format conversion module. The conversion module automatically converts Source Format Data1, Source Format Data2…Source Format Datan into InitializationData1, Initialization Data2…Initialization Datan according to the corresponding initialization format. These Initialization Data1, Initialization Data2…Initialization Datan are then sent to the respective addresses of the RFID chip under test. After initialization, the RFID chip under test returns n strings of Initialization Backward Data1, Initialization Backward Data2…Initialization Backward Datan. Datan, the initialization completion identification judgment module judges each of the n returned strings of data. When all n returned strings of data meet the judgment criteria, the initialization is considered successful and step S2 is completed; where n is the number of addresses of the radio frequency identification chip under test.

[0044] Step S3, automatic ID number arrangement and injection, is the third step of this method. It is preceded by step S2, which initializes the storage area data, and followed by step S4, which encrypts and solidifies the storage area data. Step S3 must be completed for step S4 to be effective. For example... Figure 4Step S3 describes an automatic ID number arrangement and injection algorithm. This algorithm mainly consists of a real-time coordinate information acquisition module, an ID number transition module, a data format conversion module, and an ID number injection completion judgment module. The ID number is the unique identifier of each RFID chip. During testing and production, different ID numbers need to be injected into the storage area of ​​each RFID chip. This invention first uses the real-time coordinate information acquisition module to obtain the probe coordinate information (Coord_Data) of the Prober probe station on the wafer and sends it to the ID number transition module. The ID number transition module takes the probe coordinate information as input according to the ID number compilation rules and outputs the source format ID number. The ID number compilation rules that the ID number transition module can implement are not limited to continuous transitions, exponential transitions, logarithmic transitions, pseudo-random transitions, etc. After the source format ID number is converted by the data format conversion module, the generated ID number data ID_Protocolled_Data, which conforms to the communication protocol and ID number compilation rules, is injected into the RFID chip under test. The ID number injection completion judgment module receives the JugeID_Output_Data signal returned by the RFID chip under test and judges whether the ID number injection is successful. When the JugeID_Output_Data signal meets the judgment criteria, it is considered that the ID number injection of the chip under test is successful. As the probe of the probe station moves to the next RFID chip under test, the probe coordinate information Coord_Data will be updated, and the ATE will perform the ID number injection action again until the last RFID chip under test is injected, which is considered to be the completion of step S3.

[0045] Step S4, data encryption and solidification in the storage area, is the fourth step of this method. It is preceded by step S3, automatic ID number arrangement and injection, and followed by step S5, RF function verification. Step S4 must be completed for step S5 to be effective. Figure 5Step S4 introduces an automatic encryption data format conversion algorithm, which consists of an encryption data format conversion module and an encryption and solidification judgment module. The encryption data format conversion module converts the source encrypted data according to the encryption and solidification requirements of the RFID chip under test (DUT), generating encrypted data Enc_Protocolled_Data in a specific format. After receiving the encrypted data Enc_Protocolled_Data, the DUT outputs a return signal Enc_Backward_Data to the encryption and solidification judgment module. The encryption and solidification judgment module automatically determines whether the encryption and solidification function is successful by parsing the return signal Enc_Backward_Data. Once the judgment is complete, step S4 is finished. The purpose of step S4 is to encrypt the initialized data and ID number data within the DUT and solidify its internal data. The encryption data format conversion module can achieve automatic encryption and solidification without requiring additional encryption hardware. The encryption and solidification judgment module can automatically determine whether the encryption and solidification is successful without needing to read the values ​​of all registers involved in steps S2 and S3.

[0046] Step S5, RF function verification, is the final step of this method; it is preceded by step S4, which involves encrypting and securing the data in the storage area. Figure 6 As shown, step S5 invents a protocol algorithm for RF function verification, enabling the verification of RF functions to be automatically completed on the ATE in an integrated manner with steps S1 to S4. This overcomes the difficulties of low efficiency in manual testing on discrete instruments like dedicated RF test instruments, and also overcomes the high cost of adding additional RF verification firmware to the ATE. The RF verification protocol algorithm module is a programming module built on the ATE analog board. This module can control the transmission power, reference level, and carrier mode of the RF signal RF_Outout emitted by the RF board, as well as the timing of the query command sent by the digital board. It also has the function of analyzing and judging the RF signal RF_Inout returned by the RF identification chip under test, thereby further verifying whether the operations of the digital logic module of the chip under test in steps S1 to S4 were executed correctly.

[0047] Based on the above five steps, a method for testing the electrical characteristics of an RFID chip according to the present invention can be implemented.

[0048] The format and content of the write instructions, data writing instructions, and query instructions in the steps of this invention are not unique and can be modified according to actual needs. Based on Figure 1 The illustrated process implements a method for testing the electrical characteristics of an RFID chip. This will be further clarified by examining a specific example of testing a passive UHF RFID chip conforming to the GJB7377.1A-2018 communication protocol standard. Figure 1 The process is shown in the example below:

[0049] 1) Refer to step S1 to automatically adjust the reverse link frequency. For example... Figure 7 The ATE itself sends the initial stimulus data 1110000111000101 to the communication protocol algorithm module. In the communication protocol algorithm module, after processing by the preamble function, classification command frame format function, and start query function, data conforming to the GJB7377.1A-2018 communication protocol is generated. Then, the data is written to the user area address HX94 of the RFID chip under test. After the RFID chip under test returns a response signal, the frequency test algorithm module uses the data acquisition function to capture and parse the valid segment from the response signal based on a specific flag bit. Since this valid segment is baseband coded FM0 sequence format data, the pulse width varies at different periods. This invention uses several times (2...) n Using the minimum pulse frequency as the sampling rate (n is an integer greater than 1), the minimum pulse width in the effective segment is found, and the reverse link frequency is calculated. The frequency judgment program in the excitation selection algorithm module, based on the magnitude of the reverse link frequency, uses a binary excitation generation program to generate corresponding new excitation data through a pre-defined interval. After receiving the new excitation data, the communication protocol algorithm module generates data conforming to the GJB7377.1A-2018 communication protocol and sends it to the RFID chip under test for a new round of reverse link frequency adjustment until the reverse link frequency is within the range of 160KHz±5KHz, indicating that step S1 is complete.

[0050] 2) Refer to step S2 for storage area data initialization. For example... Figure 8 The 128-bit data is loaded into the variable-width, variable-address source format data function `Changed_Source_Format_Data()`. `Changed_Source_Format_Data()` calculates the data according to the initialization requirements, generating source format data (`Source Format Data`). The data distribution function `Distribute()` truncates the source format data according to the address to be initialized, generating 16 data segments (`Source Format Data1`, `Source Format Data2`, ..., `Source Format Data16`) matching the number of initialization addresses. To meet the communication protocol of the chip under test, all 16 data segments must be input into the data format conversion module for format conversion, such as... Figure 9In the data format conversion module, the 16 data segments are converted into initialization data Initialization Data1, Initialization Data2...Initialization Data16 in a format required by the communication protocol after passing through the framing function Pack_write(), the two-bit locking function Data_get(), the data conversion level function Data_convert_level(), and the vector feeding function Write_vector(). These initialization data segments are then serially input to the RFID chip under test at 10ms intervals. When the initialization completion flag judgment module captures the return signal of each address and there is an 8-bit flag of 10100011, it indicates that step S2 is complete.

[0051] 3) Refer to step S3 for automatic ID number arrangement and injection. For example... Figure 10 The GetDiePosXYOfSite() function based on ATE retrieves the probe coordinate information Coord_Data of the Prober probe station. The GetDiePosXYOfSite() and Auto_Add() programming algorithms ensure that the source format ID number automatically increments by 1 as the probe coordinate information Coord_Data is updated. The source format ID number is then processed... Figure 9 After the data format conversion module, ID number data ID_Protocolled_Data conforming to the communication protocol is generated and injected into the HX78-HX81 addresses of the RFID chip under test. The ID number injection completion judgment module captures the return signal of the HX78-HX81 addresses through the Juge_ID() function. If there are 10011001 flag bits in certain fixed positions, it means that one ID injection is completed. This process continues until the last RFID chip under test is injected, and step S3 is completed.

[0052] 4) Refer to step S4 for data encryption and solidification in the storage area. For example... Figure 11 The preprocessing function `Enc_Process()` performs a series of preprocessing steps on the source encrypted data. Then, through the data level conversion function `Data_convert_level()` and the vector input function `Write_vector()`, it is converted into encrypted data `Enc_Protocolled_Data` conforming to the communication protocol format and written to the HX8C and HX8F registers of the RFID chip under test. The encryption and hardening judgment function `Juge_Enc()` captures the encryption and hardening completion flag bits one by one from the return signal `Enc_Backward_Data`. If the encryption and hardening completion flag bits are successfully captured, it indicates that step S4 is complete.

[0053] 5) Refer to step S5 for RF function verification. For example... Figure 12 The ATE's RF board is differentially connected to the RF pins RF_INOUT_P and RF_INOUT_N of the chip under test. The RF verification function RF_fun() can set the transmission power of the RF excitation signal RF_Output to 20dBm, the reference level to -15dBm, and the carrier mode to burst. After modulating it according to the specified communication protocol, it is sent to the RFID chip under test through the RF board. RF_fun() controls the digital board to send a query command query. The chip under test returns an RF signal RF_Input. RF_fun() can parse whether the data written in each address of the chip under test is correct.

[0054] This invention is not limited to the examples in the specific embodiments described above. Figures 2 to 6 The description provided is merely an illustrative example of the method's implementation and does not constitute a limitation on this patent. Those skilled in the art, inspired by this invention, can make many modifications without departing from its spirit. These modifications all fall within the protection scope of this invention.

Claims

1. A method for testing the electrical characteristics of an ATE-based radio frequency identification chip, characterized in that, Specifically, the following steps are included: Step S1: Generate the initial excitation signal. Based on the initial excitation signal, generate an excitation format signal according to the communication protocol format used by the RFID chip under test, and send it to the RFID chip under test. Test the frequency value based on the returned excitation format signal from the RFID chip under test, and adjust the excitation format signal according to the frequency value until the frequency value is adjusted to the target range. The reverse link frequency adjustment is then completed. Step S2: After the reverse link frequency adjustment is completed, initialization binary data is generated according to the initialization requirements and segmented. The segmented data is appended with an address and sent to the corresponding addresses of the RFID chip under test. The data returned by the RFID chip under test is judged. When all the returned data meets the judgment criteria, the initialization is successful. Step S3: After successful initialization, the ID number data of the RFID chip under test is generated according to the probe movement coordinates of the probe station and the ID number compilation rules, injected into the corresponding RFID chip under test, and the ID number injection is judged based on the signal returned by the RFID chip under test. Step S4: After the ID number is successfully injected, the source encrypted data is converted into a specific format according to the encryption and hardening requirements of the RFID chip under test, and the encrypted data is sent to the RFID chip under test. After receiving the encrypted data, the RFID chip under test encrypts and hardens the initialization data and ID number and returns a signal. The encryption and hardening is determined by parsing the returned signal. Step S5: After successful encryption and solidification, transmit an RF signal to the RFID chip under test, analyze and judge the function of the RF signal returned by the RFID chip under test, and verify whether the operations of steps S1 to S4 on the RFID chip under test were completed correctly.

2. The method for testing the electrical characteristics of an ATE-based radio frequency identification chip according to claim 1, characterized in that, Step S1 specifically includes the following steps: Step S11: Generate the first excitation signal; Step S12: The generated excitation signal is framed and packaged according to the communication protocol format used by the RFID chip under test to generate an excitation format signal, and then sent to the RFID chip under test. Step S13: The return excitation format signal of the RFID chip under test is parsed according to the communication protocol, and the valid segments are detected for frequency testing to obtain the frequency value of the data. Step S14: Generate a new excitation signal based on the interval where the Frequency value is located. Specifically, generate a new excitation signal by binary search or linear search based on the size of the target interval of the Frequency value. Return to step S12 until the Frequency value is adjusted to the target interval.

3. The method for testing the electrical characteristics of an ATE-based radio frequency identification chip according to claim 1, characterized in that, Step S3 specifically includes the following steps: Step S31: Obtain the probe coordinate information of the probe station on the wafer. According to the ID number compilation rules, the probe coordinate information is used as input to obtain the source format ID number. The ID number compilation rules include continuous jump, exponential jump, logarithmic jump and pseudo-random jump. Step S32: After converting the source format ID number, generate ID number data that conforms to the communication protocol and ID number compilation rules, and inject it into the RFID chip under test; Step S33: After the ID number is injected, receive the signal returned by the RFID chip under test. If the returned signal meets the criteria, the ID number of the corresponding RFID chip under test is successfully injected, and proceed to step S34; otherwise, return to step S31. In step S34, the probes of the probe station move to the next RFID chip under test and return to step S31 until the last RFID chip under test is encapsulated.

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