Pixel driving method, circuit and display device

Abstract

The present disclosure relates to a pixel driving method, circuit, and display device, belonging to the field of display devices, and capable of quickly turning off display pixels. A pixel driving circuit includes a driving signal generating circuit, a driving transistor, and a writing circuit, wherein: the driving signal generating circuit is used to receive a data signal and generate a driving signal based on the data signal; the driving transistor is turned on and off by the driving signal to control the display pixel to display a bright image when the driving transistor is turned on and to control the display pixel to display a dark image when the driving transistor is turned off; the writing circuit is used to write a low level to the anode of the display pixel to control the display pixel to turn off when the display pixel is controlled to switch from displaying the bright image to displaying the dark image.

Description

Technical Field

[0001] The present disclosure relates to the field of display devices, and in particular to a pixel driving method, circuit, and display device. Background Art

[0002] In related technologies, as resolution, grayscale, and display refresh rate continue to increase, it becomes difficult to control the brightness of LEDs in light-emitting diode (LED) displays, resulting in a defect in that display pixels, i.e., light-emitting elements, cannot be turned off in a timely manner. Summary of the Invention

[0003] To overcome the problems existing in the related art, the present disclosure provides a pixel driving method, circuit and display device.

[0004] According to a first aspect of an embodiment of the present disclosure, a pixel driving circuit is provided, comprising a driving signal generating circuit, a driving transistor and a writing circuit, wherein: the driving signal generating circuit is configured to receive a data signal and generate a driving signal based on the data signal; the driving transistor is turned on and off controlled by the driving signal to control the display pixel to display a bright picture when the driving transistor is turned on and to control the display pixel to display a dark picture when the driving transistor is turned off; and the writing circuit is configured to write a low level to the anode of the display pixel to control the display pixel to turn off when the display pixel is controlled to switch from displaying the bright picture to displaying the dark picture.

[0005] Optionally, the drive signal generating circuit includes a second transistor, a third transistor, a first inverter, a second inverter and a third inverter, wherein: the gate of the third transistor receives a scan signal, one of the source and the drain of the third transistor receives the data signal, and the other is connected to the input of the first inverter and the output of the second inverter; the output of the first inverter, the input of the second inverter and the input of the third inverter are electrically connected to each other; the gate of the second transistor receives a reset signal, one of the source and the drain of the second transistor receives the data signal, and the other is connected to the output of the third inverter; and the output of the first inverter is connected to the gate of the drive transistor.

[0006] Optionally, the writing circuit includes a fourth transistor, wherein the fourth transistor is turned on when the display pixel is controlled to switch from displaying the bright image to displaying the dark image, so as to write the low level into the anode of the display pixel.

[0007] Optionally, the on and off of the fourth transistor is controlled by the data signal.

[0008] Optionally, the fourth transistor is a thin film transistor.

[0009] Optionally, the pixel driving circuit further includes a reset circuit for resetting the display pixel.

[0010] Optionally, the reset circuit includes a fifth transistor, wherein the fifth transistor, the driving transistor and the display pixel are connected in series in sequence, and during the display period of the display pixel, the fifth transistor is turned on, and during the non-display period of the display pixel, the fifth transistor is turned off to reset the display pixel.

[0011] Optionally, the fifth transistor is a driving thin film transistor.

[0012] According to a second aspect of an embodiment of the present disclosure, a pixel driving method is provided, comprising: receiving a data signal, generating a driving signal based on the data signal; controlling the on and off of a driving transistor by the driving signal, so as to control a display pixel to display a bright picture when the driving transistor is turned on and to control the display pixel to display a dark picture when the driving transistor is turned off; and when the display pixel is controlled to switch from displaying the bright picture to displaying the dark picture, controlling the display pixel to be turned off by writing a low level to the anode of the display pixel.

[0013] According to a third aspect of an embodiment of the present disclosure, a display device is provided, comprising the pixel driving circuit according to the first aspect of the present disclosure.

[0014] By adopting the above technical solution, since a low level can be written to the anode of the display pixel by using the write circuit when the display pixel is controlled to switch from displaying a bright image to displaying a dark image, the anode of the display pixel can be quickly converted to a low level, and the display pixel can be controlled to be quickly turned off, so that the display pixel can achieve a high refresh rate, improve the contrast of the display image and the accuracy of grayscale control, which is conducive to improving the switching ratio of the display pixel and the realization of high resolution and high bit number.

[0015] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0017] Figure 1 is a schematic block diagram of a pixel driving circuit according to an exemplary embodiment.

[0018] Figure 2is a schematic circuit diagram of a pixel driving circuit according to an exemplary embodiment.

[0019] Figure 3 is a schematic diagram of yet another pixel driving circuit according to an exemplary embodiment.

[0020] Figure 4 is a schematic diagram of yet another pixel driving circuit according to an exemplary embodiment.

[0021] Figure 5 FIG. 1 is a schematic operation timing diagram of a pixel driving circuit according to an exemplary embodiment.

[0022] Figure 6 The figure is a flowchart of a pixel driving method according to an exemplary embodiment. DETAILED DESCRIPTION

[0023] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all possible embodiments consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present disclosure, as detailed in the appended claims.

[0024] Figure 1 This is a schematic block diagram of a pixel driving circuit according to an exemplary embodiment. The pixel driving circuit can be applied to any display scenario, for example, in AR glasses that require a high refresh rate.

[0025] like Figure 1 As shown, the pixel driving circuit includes a driving signal generating circuit 10 , a driving transistor M1 and a writing circuit 20 .

[0026] The driving signal generating circuit 10 is used to receive a data signal and generate a driving signal according to the data signal. The data signal is a signal used to indicate whether the display pixel 30 should display a bright picture or a dark picture. The display pixel 30 refers to a light-emitting element, such as an LED, a micro LED, an organic light-emitting diode (OLED), etc. When the display pixel 30 is turned on, it will display a bright picture, and when the display pixel 30 is turned off, it will display a dark picture. Since the luminous efficiency and luminous wavelength of the display pixel 30 will change with the change of current density, a pulse width modulation signal (PulseWidth Modulation, PWM) is generally used as the driving signal, that is, one frame time is divided into multiple subframes, and the luminous state of each subframe of different display pixels is different, so the luminous time is different, and different grayscales are displayed.

[0027] The on and off states of the driving transistor M1 are controlled by a driving signal, such that when the driving transistor M1 is on, the display pixel 30 displays a bright image, and when the driving transistor M1 is off, the display pixel 30 displays a dark image. Furthermore, by controlling the on and off states of the driving transistor M1 with the driving signal, the light-emitting time of the display pixel 30 can be controlled.

[0028] When the display pixel 30 is controlled to switch from displaying a bright screen to displaying a dark screen, the writing circuit 20 writes a low level to the anode of the display pixel 30 to control the display pixel 30 to be turned off.

[0029] Because the display pixel 30 (e.g., an LED element) has a certain capacitance, when the display pixel 30 is controlled by a drive signal to switch from a bright image to a dark image, the charge on the capacitor in the display pixel 30 recombines slowly, resulting in the display pixel 30 not being able to shut down in time to display the dark image. However, by using the write circuit 20 to write a low level to the anode of the display pixel 30 when the display pixel 30 is controlled to switch from displaying a bright image to displaying a dark image, the anode of the display pixel 30 can be quickly changed to a low level (i.e., the voltage on the display pixel 30 can be quickly released), thereby controlling the display pixel 30 to be quickly turned off. This ensures that the shutdown speed of the display pixel 30 is not affected by the slow recombination speed of the charge on the capacitor in the display pixel 30. This enables the display pixel 30 to achieve a high refresh rate, improves the contrast of the displayed image and the accuracy of grayscale control, and facilitates improving the on-off ratio of the display pixel 30 and achieving high resolution and high bit count.

[0030] Figure 2 FIG. 1 is a schematic circuit diagram of a pixel driving circuit according to an exemplary embodiment. Figure 2 As shown, the driving signal generating circuit 10 includes a second transistor M2, a third transistor M3, a first inverter I1, a second inverter I2 and a third inverter I3.

[0031] The gate of the third transistor M3 receives a scan signal Scan. One of its source and drain receives a data signal Data, and the other is connected to the input of the first inverter I1 and the output of the second inverter I2. The scan signal Scan is used to implement row scanning or column scanning of the display device and is used to control the turning on and off of the third transistor M3.

[0032] An output terminal of the first inverter I1 , an input terminal of the second inverter I2 , and an input terminal of the third inverter I3 are electrically connected to one another.

[0033] A gate of the second transistor M2 receives a reset signal RST, one of a source and a drain of the second transistor M2 receives a data signal Data, and the other is connected to an output terminal of the third inverter I3.

[0034] The output terminal of the first inverter I1 is connected to the gate of the driving transistor M1 , so that the driving transistor M1 can be turned on and off by the output terminal Q of the first inverter I1 .

[0035] By adopting Figure 2 The driving signal generating circuit 10 shown in FIG. 1 can generate a PWM signal at node Q for controlling the on and off of the driving transistor M1. It should be understood by those skilled in the art that Figure 2 The circuit structure of the driving signal generating circuit 10 shown is merely illustrative and does not constitute a limitation to the present disclosure. That is, any circuit capable of generating a driving signal for controlling the on / off switching of the driving transistor M1 can be used as the driving signal generating circuit 10 .

[0036] Figure 3 FIG. 1 is a schematic diagram of another pixel driving circuit according to an exemplary embodiment. Figure 3 As shown, the writing circuit 20 includes a fourth transistor M4, wherein the fourth transistor M4 is turned on when the display pixel 30 is controlled to switch from displaying a bright image to displaying a dark image, so as to turn the low level V 低 Writing into the anode of the display pixel 30. The fourth transistor M4 may be a thin film transistor or other types of transistors.

[0037] By adopting the above technical solution, the anode voltage of the display pixel 30 can be quickly changed to a low level when the display pixel 30 is controlled to switch from displaying a bright image to displaying a dark image, thereby quickly turning off the display pixel 30, so that the turn-off speed of the display pixel 30 is not affected by the slow recombination speed of the charge on the capacitor existing in the display pixel 30.

[0038] In some embodiments, the on and off of the fourth transistor M4 may be controlled by a data signal Data, such as Figure 2 As shown. Figure 2 In the embodiment, the gate of the fourth transistor M4 is connected to the node Q', which is the data signal output terminal of the third transistor M3. In this way, the gate voltage of the fourth transistor M4 can change with the data signal Data, so that when the data signal Data switches from a high level to a low level to prepare to write a dark image to the display pixel 30, the fourth transistor M4 can quickly capture this switching opportunity, so that when the display pixel 30 is controlled to switch from displaying a bright image to displaying a dark image, the fourth transistor M4 can be turned on in time to write a low level to the anode of the display pixel 30.

[0039] Figure 4 FIG. 1 is a schematic diagram of another pixel driving circuit according to an exemplary embodiment. Figure 4 As shown, the pixel driving circuit according to the embodiment of the present disclosure may further include a reset circuit 40 for resetting the display pixel 30. Resetting the display pixel 30 helps to improve the life of the display pixel 30.

[0040] The reset circuit 40 can be implemented in various ways. Figure 2 FIG. 4 shows one implementation of the reset circuit 40. Figure 2 As shown, the reset circuit 40 includes a fifth transistor M5, which can be a driving thin film transistor or other types of transistors. The fifth transistor M5, the driving transistor M1 and the display pixel 30 are connected in series in sequence. During the display period of the display pixel 30, the fifth transistor M5 is turned on, and during the non-display period of the display pixel 30, the fifth transistor M5 is turned off to reset the display pixel 30. That is, during the display period of the display pixel 30, the gate voltage Vref of the fifth transistor M5 is always maintained at a low level, so that the fifth transistor M5 can always remain in the on state, so that the opening and closing of the display pixel 30 are only controlled by the driving transistor M1; and during the non-display period of the display pixel 30, the gate voltage Vref of the fifth transistor M5 is reset to a high level, so that the fifth transistor M5 is always in the off state, so that the display pixel 30 is also always in the closed state, so as to achieve the reset of the display pixel 30. The reset of the gate voltage Vref of the fifth transistor M5 can be achieved by Figure 2 It is implemented by the reset signal RST in order to avoid increasing the circuit complexity.

[0041] In addition, it should be noted that although Figure 2 In FIG, transistors M2 and M3 are N-type transistors, and transistors M5, M1 and M4 are P-type transistors, but those skilled in the art will appreciate that Figure 2 This is only for illustration. In actual applications, the transistors M2 and M3 may be P-type transistors, while the transistors M5, M1 and M4 may be N-type transistors.

[0042] Next, combine Figure 5 The working sequence shown is described Figure 2 The working process of the pixel driving circuit shown.

[0043] like Figure 5As shown, the RST signal is only valid in the blank area (i.e., the non-display period of the display pixel 30). In the blank area, the RST signal is at a high level, thereby resetting the gate voltage of the fifth transistor M5 of the reset circuit 40 to a high level, causing the fifth transistor M5 to turn off and reset the display pixel 30. Since the reset circuit 40 is set for each display pixel 30, all display pixels 30 are reset in the blank area. In other timing regions outside the blank area, the RST signal is at a low level, causing the fifth transistor M5 to turn on, thereby placing the display pixel 30 in the display period.

[0044] During the display period of the display pixel 30, the gate voltage Vref of the fifth transistor M5 is kept at a low level. Figure 5 When the display pixel 30 is “bright” in the image (the image is “on” in the image), the scanning signal scan is high, the data signal data is high, the node Q' is written with a high voltage, and the first inverter I1 and the second inverter I2 form a static random-access memory (SRAM) structure composed of two-stage inverters, so that the voltage at the node Q is locked into a low level and the voltage at the node Q' is locked into a high level. At this time, the fifth transistor M5 and the driving transistor M1 are turned on, so that the anode voltage of the display pixel 30 is a high voltage, and the display pixel 30 emits light.

[0045] When a dark image is to be written to the display pixel 30 during the display period of the display pixel 30 (corresponding to Figure 5 When the display is dark (in the image), the data signal data is at a low level. When the scanning signal scan is at a high level, the third transistor M3 is turned on, and the node Q' is written to a low level. After passing through the first inverter I1 and the second inverter I2, the level at the node Q is maintained at a high level, so that the driving transistor M1 is turned off. At the same time, the level at the node Q' is maintained at a low level, which turns on the fourth transistor M4. Therefore, the low level Vref is written to the anode of the display pixel 30, which can quickly turn off the display pixel 30, maintain a good black state, and ensure contrast.

[0046] According to another embodiment of the present disclosure, a display device is provided, comprising the pixel driving circuit according to the embodiment of the present disclosure. The pixel driving circuit writes a low level to the anode of the display pixel 30 when the display pixel 30 is controlled to switch from displaying a bright image to displaying a dark image, thereby controlling the display pixel 30 to be quickly turned off. This enables the display device according to the embodiment of the present disclosure to achieve a high refresh rate, improves the contrast of the displayed image and the accuracy of grayscale control, and facilitates improving the on-off ratio of the display pixel 30 and achieving high resolution and high bit count.

[0047] Figure 6FIG. 1 is a flowchart of a pixel driving method according to an exemplary embodiment. Figure 6 As shown, the pixel driving method includes the following steps S61 to S63.

[0048] In step S61, a data signal is received, and a driving signal is generated based on the data signal;

[0049] In step S62, the driving transistor is controlled to be turned on and off by the driving signal, so as to control the display pixel to display a bright image when the driving transistor is turned on and to control the display pixel to display a dark image when the driving transistor is turned off; and

[0050] In step S63 , when the display pixel is controlled to switch from displaying a bright image to displaying a dark image, the display pixel is controlled to be turned off by writing a low level to the anode of the display pixel.

[0051] By adopting the above technical solution, since a low level can be written to the anode of the display pixel by using the write circuit when the display pixel is controlled to switch from displaying a bright image to displaying a dark image, the anode of the display pixel can be quickly converted to a low level, and the display pixel can be controlled to be quickly turned off, so that the display pixel can achieve a high refresh rate, improve the contrast of the display image and the accuracy of grayscale control, which is conducive to improving the switching ratio of the display pixel and the realization of high resolution and high bit number.

[0052] Regarding the method in the above embodiment, the specific manner of performing the operation in each step has been described in detail in the embodiment related to the pixel driving circuit, and will not be elaborated here.

[0053] Other embodiments of the present disclosure will readily occur to those skilled in the art after considering the specification and practicing the present disclosure. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, with the true scope and spirit of the present disclosure being indicated by the following claims.

[0054] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes can be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A pixel driving circuit, characterized in that: The pixel driving circuit includes a driving signal generating circuit, a driving transistor and a writing circuit, wherein: The driving signal generating circuit is configured to receive a data signal and generate a driving signal according to the data signal; The driving transistor is turned on and off by the driving signal, so as to control the display pixel to display a bright image when the driving transistor is turned on and to control the display pixel to display a dark image when the driving transistor is turned off; The writing circuit is used for writing a low level to the anode of the display pixel to control the display pixel to turn off when the display pixel is controlled to switch from displaying the bright image to displaying the dark image; The writing circuit includes a fourth transistor, wherein the fourth transistor is turned on when the display pixel is controlled to switch from displaying the bright image to displaying the dark image, so as to write the low level into the anode of the display pixel; the turning on and off of the fourth transistor is controlled by the data signal; The pixel driving circuit also includes a reset circuit for resetting the display pixel, the reset circuit including a fifth transistor, wherein the fifth transistor, the driving transistor and the display pixel are connected in series in sequence, the fifth transistor is turned on during the display period of the display pixel, and the fifth transistor is turned off during the non-display period of the display pixel to reset the display pixel, and the resetting of the gate voltage of the fifth transistor is achieved by the reset signal input to the second transistor in the driving signal generating circuit.

2. The pixel driving circuit according to claim 1, wherein: The driving signal generating circuit includes a second transistor, a third transistor, a first inverter, a second inverter and a third inverter, wherein: The gate of the third transistor receives a scan signal, one of the source and the drain of the third transistor receives the data signal, and the other is connected to the input end of the first inverter and the output end of the second inverter; The output terminal of the first inverter, the input terminal of the second inverter, and the input terminal of the third inverter are electrically connected to each other; The gate of the second transistor receives a reset signal, one of the source and the drain of the second transistor receives the data signal, and the other is connected to the output terminal of the third inverter; and An output terminal of the first inverter is connected to a gate of the driving transistor.

3. The pixel driving circuit according to claim 1, wherein: The fourth transistor is a thin film transistor.

4. The pixel driving circuit according to claim 1, wherein: The fifth transistor is a driving thin film transistor.

5. A pixel driving method, characterized in that: Applied to the pixel driving circuit according to any one of claims 1 to 4, the method comprises: receiving a data signal, and generating a driving signal based on the data signal; Controlling the on and off of the driving transistor by the driving signal, so as to control the display pixel to display a bright picture when the driving transistor is turned on and to control the display pixel to display a dark picture when the driving transistor is turned off; and When the display pixel is controlled to switch from displaying the bright image to displaying the dark image, controlling the display pixel to be turned off by writing a low level to the anode of the display pixel; The writing circuit includes a fourth transistor, wherein the fourth transistor is turned on when the display pixel is controlled to switch from displaying the bright image to displaying the dark image, so as to write the low level into the anode of the display pixel; the turning on and off of the fourth transistor is controlled by the data signal; The pixel driving circuit also includes a reset circuit for resetting the display pixel, the reset circuit including a fifth transistor, wherein the fifth transistor, the driving transistor and the display pixel are connected in series in sequence, the fifth transistor is turned on during the display period of the display pixel, and the fifth transistor is turned off during the non-display period of the display pixel to reset the display pixel, and the resetting of the gate voltage of the fifth transistor is achieved by the reset signal input to the second transistor in the driving signal generating circuit.

6. A display device, characterized in that: The device comprises the pixel driving circuit according to any one of claims 1 to 4.

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