A quick start control circuit for a motor

Abstract

This invention provides a fast start control circuit for a motor. The control circuit includes: a first resistor, a second resistor, a third resistor, a fourth resistor, a first inductor, a second inductor, a third inductor, a fourth inductor, a first MOSFET, a second MOSFET, a third MOSFET, and a fourth MOSFET. A first terminal of the first inductor receives a first PWM signal, a first terminal of the second inductor receives a second PWM signal, a first terminal of the third inductor receives a third PWM signal, and a first terminal of the fourth inductor receives the third PWM signal. By adjusting the magnitude of the system overshoot using the first, second, third, and fourth inductors, the charging of the parasitic capacitance in each MOSFET is accelerated, thereby speeding up the turn-on time of the MOSFETs and improving the system overshoot time.

Description

Technical Field

[0001] This invention relates to the field of motor drive technology, and in particular to a fast start control circuit for motors. Background Technology

[0002] DC brushless motor drive control systems are widely used in the motor field. They typically employ an H-bridge bipolar drive mode, using two sets of complementary PWM signals to switch the H-bridge MOSFETs on and off. By controlling the switching sequence and timing of the MOSFETs, the motor speed and direction are controlled.

[0003] In practical applications, due to the parasitic capacitance between the gate and source of the MOSFET (the equivalent capacitance of the process capacitance and PCB trace capacitance between the gate and source of the MOSFET), when the PWM signal of the upper bridge arm changes from low to high, the MOSFET needs to wait for the parasitic capacitance charge to reach a certain amplitude before it will turn on. When the parasitic capacitance is large, the PWM signal will preferentially charge the parasitic capacitance, causing the MOSFET to turn on untimely. Furthermore, the addition of a current-limiting resistor in front of the MOSFET gate, with a resistance value generally ranging from 100Ω to 10kΩ, further increases the response time of the MOSFET, ultimately resulting in poor dynamic response performance of the system.

[0004] It is evident that existing technologies suffer from poor dynamic response performance. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a fast start control circuit for motors, which solves the problem of poor dynamic response performance of existing systems.

[0006] The present invention provides a fast start control circuit for an electric motor, the control circuit comprising: a first resistor, a second resistor, a third resistor, a fourth resistor, a first inductor, a second inductor, a third inductor, a fourth inductor, a first MOSFET, a second MOSFET, a third MOSFET, and a fourth MOSFET;

[0007] The first terminal of the first inductor is used to receive the first PWM signal. The second terminal of the first inductor is connected to the first terminal of the first resistor. The second terminal of the first resistor is connected to the gate of the first MOSFET. The first inductor and the gate parasitic capacitance of the first MOSFET constitute a second-order underdamped system. By adjusting the inductance value of the first inductor, the system generates an overshoot, which overcharges the gate parasitic capacitance of the first MOSFET.

[0008] The drain of the first MOSFET is connected to the first power supply terminal, and the source of the first MOSFET is connected to the drain of the second MOSFET and the first terminal of the motor, respectively.

[0009] The first end of the second inductor is used to receive the second PWM signal. The second end of the second inductor is connected to the first end of the second resistor. The second end of the second resistor is connected to the gate of the second MOSFET. The second inductor and the gate parasitic capacitance of the second MOSFET constitute a second-order underdamped system. By adjusting the inductance value of the second inductor, the system generates an overshoot, which overcharges the gate parasitic capacitance of the second MOSFET.

[0010] The source of the second MOSFET is grounded;

[0011] The first terminal of the third inductor is used to receive the third PWM signal. The second terminal of the third inductor is connected to the first terminal of the third resistor. The second terminal of the third resistor is connected to the gate of the third MOS transistor. The third inductor and the gate parasitic capacitance of the third MOS transistor form a second-order underdamped system. By adjusting the inductance value of the third inductor, the system generates an overshoot, which overcharges the gate parasitic capacitance of the third MOS transistor.

[0012] The drain of the third MOS transistor is connected to the first power supply terminal, and the source of the third MOS transistor is connected to the drain of the fourth MOS transistor and the second terminal of the motor, respectively.

[0013] The first terminal of the fourth inductor is used to receive the third PWM signal. The second terminal of the fourth inductor is connected to the first terminal of the fourth resistor. The second terminal of the fourth resistor is connected to the gate of the fourth MOS transistor. The fourth inductor and the gate parasitic capacitance of the fourth MOS transistor form a second-order underdamped system. By adjusting the inductance value of the fourth inductor, the system generates an overshoot, which overcharges the gate parasitic capacitance of the fourth MOS transistor.

[0014] The source of the fourth MOS transistor is grounded.

[0015] Optionally, the control circuit further includes: a first transistor, a second transistor, a third transistor, and a fourth transistor;

[0016] The base of the first transistor is connected to the second end of the first inductor, the emitter of the first transistor is connected to the first end of the first resistor, and the collector of the first transistor is grounded.

[0017] The base of the second transistor is connected to the second terminal of the second inductor, the emitter of the second transistor is connected to the first terminal of the second resistor, and the collector of the second transistor is grounded.

[0018] The base of the third transistor is connected to the second terminal of the third inductor, the emitter of the third transistor is connected to the first terminal of the third resistor, and the collector of the third transistor is grounded.

[0019] The base of the fourth transistor is connected to the second terminal of the fourth inductor, the emitter of the fourth transistor is connected to the first terminal of the fourth resistor, and the collector of the fourth transistor is grounded.

[0020] Optionally, the control circuit further includes: a first drive signal generation module and an MCU;

[0021] The input terminal of the first drive signal generation module is connected to the MCU, and the output terminal of the first drive signal generation module is connected to the first terminal of the first inductor and the first terminal of the second inductor respectively. It is used to send a first PWM signal to the first terminal of the first inductor according to the first control signal sent by the MCU, and to send a second PWM signal to the first terminal of the second inductor according to the second control signal sent by the MCU.

[0022] Optionally, the control circuit further includes: a second drive signal generation module;

[0023] The input terminal of the second drive signal generation module is connected to the MCU, and the output terminal of the second drive signal generation module is connected to the first terminal of the third inductor and the first terminal of the fourth inductor respectively. It is used to send a first PWM signal to the first terminal of the third inductor according to the third control signal sent by the MCU, and also to send a fourth PWM signal to the first terminal of the fourth inductor according to the fourth control signal sent by the MCU.

[0024] Optionally, the first drive signal generation module includes: a fifth resistor, a first drive signal generation chip, a sixth resistor, a seventh resistor, an eighth resistor, a first diode, a ninth resistor, and a ninth capacitor;

[0025] The first end of the fifth resistor is connected to the MCU, and the second end of the fifth resistor is connected to the first drive signal generating chip;

[0026] The first end of the sixth resistor is connected to the MCU, and the second end of the sixth resistor is connected to the first drive signal generating chip;

[0027] The first end of the seventh resistor is connected to the first driving signal generating chip, and the second end of the seventh resistor is connected to the first end of the first inductor.

[0028] The first end of the eighth resistor is connected to the first driving signal generating chip, and the second end of the eighth resistor is connected to the first end of the second inductor.

[0029] The negative terminal of the first diode is connected to the first terminal of the eighth resistor, and the positive terminal of the first diode is grounded;

[0030] The first end of the ninth resistor is connected to the second end of the eighth resistor, and the second end of the ninth resistor is grounded;

[0031] The first end of the ninth capacitor is connected to the second pin of the first drive signal generating chip, and the second end of the ninth capacitor is connected to the fourth pin of the first drive signal generating chip.

[0032] The first drive signal generating chip is also connected to the first power supply terminal.

[0033] Optionally, the first drive signal generation module further includes: a first capacitor and a second capacitor;

[0034] The first terminal of the first capacitor is connected to the first power supply terminal, and the second terminal of the first capacitor is grounded.

[0035] The second capacitor is connected in parallel with the first capacitor.

[0036] Optionally, the second drive signal generation module includes: a tenth resistor, a second drive signal generation chip, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a second diode, a tenth capacitor, and a fourteenth resistor;

[0037] The first end of the tenth resistor is connected to the MCU, and the second end of the tenth resistor is connected to the second drive signal generating chip;

[0038] The first end of the eleventh resistor is connected to the MCU, and the second end of the eleventh resistor is connected to the second drive signal generating chip.

[0039] The first end of the twelfth resistor is connected to the second drive signal generating chip, and the second end of the twelfth resistor is connected to the first end of the third inductor;

[0040] The first end of the thirteenth resistor is connected to the second driving signal generating chip, and the second end of the thirteenth resistor is connected to the second end of the fourth inductor.

[0041] The negative terminal of the second diode is connected to the first terminal of the thirteenth resistor, and the positive terminal of the second diode is grounded.

[0042] The first end of the fourteenth resistor is connected to the second end of the thirteenth resistor, and the second end of the fourteenth resistor is grounded.

[0043] The first end of the tenth capacitor is connected to the second pin of the second drive signal generating chip, and the second end of the tenth capacitor is connected to the fourth pin of the second drive signal generating chip.

[0044] The second drive signal generating chip is also connected to the first power supply terminal.

[0045] Optionally, the second drive signal generation module further includes a fifth capacitor and a sixth capacitor;

[0046] The first terminal of the fifth capacitor is connected to the first power supply terminal, and the second terminal of the fifth capacitor is grounded.

[0047] The sixth capacitor is connected in parallel with the fifth capacitor.

[0048] Optionally, the first drive signal generation module further includes a third capacitor and a fourth capacitor; the second drive signal generation module further includes a seventh capacitor and an eighth capacitor.

[0049] The first terminal of the third capacitor is connected to the second terminal of the fifth resistor, and the second terminal of the third capacitor is grounded.

[0050] The first terminal of the fourth capacitor is connected to the second terminal of the sixth resistor, and the second terminal of the fourth capacitor is grounded.

[0051] The first terminal of the seventh capacitor is connected to the second terminal of the tenth resistor, and the second terminal of the seventh capacitor is grounded.

[0052] The first terminal of the eighth capacitor is connected to the second terminal of the eleventh resistor, and the second terminal of the eighth capacitor is grounded.

[0053] Optionally, the control circuit further includes: a current setting module, a current sampling module, and an error amplifier;

[0054] The current setting module is used to set the operating current value of the motor;

[0055] The current sampling module is connected to the motor and is used to obtain the actual operating current value of the motor.

[0056] The error amplifier is connected to the current setting module, the current sampling module, and the MCU, respectively. It is used to obtain the preset operating current value output by the current setting module and the actual operating current value output by the current sampling module. It is also used to obtain an adjustment current value based on the preset operating current value and the actual operating current value. Furthermore, it is used to send the adjustment current value to the MCU, so that the MCU outputs a first control signal, a second control signal, a third control signal, and a fourth control signal based on the adjustment current value.

[0057] Compared with the prior art, the present invention has the following beneficial effects:

[0058] This invention provides a fast start control circuit for a motor. The control circuit includes: a first resistor, a second resistor, a third resistor, a fourth resistor, a first inductor, a second inductor, a third inductor, a fourth inductor, a first MOSFET, a second MOSFET, a third MOSFET, and a fourth MOSFET. A first terminal of the first inductor receives a first PWM signal, a first terminal of the second inductor receives a second PWM signal, a first terminal of the third inductor receives a third PWM signal, and a first terminal of the fourth inductor receives the third PWM signal. By adjusting the magnitude of the system overshoot using the first, second, third, and fourth inductors, the charging of the parasitic capacitance in each MOSFET is accelerated, thereby speeding up the turn-on time of the MOSFETs and improving the system overshoot time. Attached Figure Description

[0059] Figure 1 A circuit diagram of a fast start control circuit for a motor provided in an embodiment of the present invention;

[0060] Figure 2 This is a circuit diagram of a motor starting control circuit in the prior art;

[0061] Figure 3 This is the equivalent circuit diagram of the control circuit in the prior art when no inductor is added;

[0062] Figure 4 This is a schematic diagram of the first-order gate response waveform of a MOS transistor in the prior art;

[0063] Figure 5 An equivalent circuit diagram with added inductor excitation provided in an embodiment of the present invention;

[0064] Figure 6 A schematic diagram of the second-order gate response waveform of a MOS transistor provided in an embodiment of the present invention;

[0065] Figure 7 A circuit diagram of another motor fast start control circuit provided in an embodiment of the present invention;

[0066] Figure 8 A circuit diagram of another type of fast start control circuit for a motor provided in an embodiment of the present invention;

[0067] Figure 9 An internal circuit diagram of a drive signal generation chip provided in an embodiment of the present invention;

[0068] Figure 10 A circuit diagram of another motor fast start control circuit provided in an embodiment of the present invention. Detailed Implementation

[0069] The technical solutions of the present invention will be further described below with reference to the accompanying drawings and embodiments.

[0070] Figure 1 A circuit diagram of a fast start control circuit for a motor M provided in an embodiment of the present invention is shown below. Figure 1 As shown,

[0071] The control circuit includes: a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a first MOSFET Q1, a second MOSFET Q2, a third MOSFET Q3, and a fourth MOSFET Q4; the first terminal of the first inductor is used to receive a first PWM signal, the second terminal of the first inductor is connected to the first terminal of the first resistor, the second terminal of the first resistor is connected to the gate of the first MOSFET, the drain of the first MOSFET is connected to a first power supply terminal, and the source of the first MOSFET is connected to the drain of the second MOSFET and the first terminal of the motor; the first terminal of the second inductor is used to receive a second PWM signal, and the second terminal of the second inductor is connected to the gate of the first MOSFET. The first end of the resistor is connected to the first terminal, and the second end of the second resistor is connected to the gate of the second MOSFET. The source of the second MOSFET is grounded. The first end of the third inductor is used to receive the third PWM signal, and the second end of the third inductor is connected to the first end of the third resistor. The second end of the third resistor is connected to the gate of the third MOSFET. The drain of the third MOSFET is connected to the first power supply terminal, and the source of the third MOSFET is connected to the drain of the fourth MOSFET and the second terminal of the motor. The first end of the fourth inductor is used to receive the third PWM signal, and the second end of the fourth inductor is connected to the first end of the fourth resistor. The second end of the fourth resistor is connected to the gate of the fourth MOSFET. The source of the fourth MOSFET is grounded.

[0072] Figure 2 The circuit diagram of the motor M starting control circuit in the prior art is shown below. Figure 2 As shown, the control circuit does not include inductor excitation. When the first PWM signal PWM1 and the fourth PWM signal PWM4 go from low level to high level, or the second PWM signal PWM2 and the third PWM signal PWM3 go from low level to high level, the parasitic capacitance Cgs between the gate and source of each MOS transistor can be approximated as a zero-state response step response because there is a parasitic capacitance Cgs between the gate and source of each MOS transistor. The schematic diagram of the first MOS transistor Q1 in the figure can be seen. Figure 3 The equivalent circuit diagram of the control circuit without an inductor in the prior art is shown below. In the frequency domain, the capacitor voltage is Uc(s), and in the time domain, the loop current is:

[0073]

[0074] According to the Laplace differential property:

[0075]

[0076] The H-bridge MOS gate equivalent circuit in the frequency domain satisfies the KVL equation:

[0077]

[0078] The transfer function is:

[0079]

[0080] The transfer function reveals it to be a first-order state response function. Differentiation of the transfer function shows that the system exhibits an extremum only at t = ∞, and the first-order state response function shows no voltage overshoot. Figure 4 This is a schematic diagram of the first-order gate response waveform of a MOS transistor in the prior art, such as... Figure 4 As shown in the figure, the horizontal axis represents t, and the vertical axis represents... State function The rise time is relatively slow.

[0081] Figure 5 An equivalent circuit diagram with added inductor excitation provided in an embodiment of the present invention, such as... Figure 5 As shown, according to Figure 3 We can determine that the KVL equation satisfied in the frequency domain after adding the inductor is:

[0082]

[0083] Its transfer function can be:

[0084]

[0085] As can be seen from the transfer function, by adding an inductor, the system changes from a first-order system to a second-order system, and its transfer function can be adjusted to a polynomial form:

[0086]

[0087] During the response process, overshoot will occur, and both the overshoot and rise time can be adjusted by adjusting the inductance. Rise time:

[0088]

[0089] Its overshoot:

[0090] , 0≤x≤1

[0091] The overshoot can be increased by adjusting the inductance value. The overshoot can then overcharge the parasitic capacitance Cgs, allowing Cgs to quickly reach the response voltage value, thereby accelerating the response time of the MOSFET system. Figure 6 A schematic diagram of the second-order gate response waveform of a MOS transistor provided in an embodiment of the present invention is shown below. Figure 6 As shown in the figure, the horizontal axis represents t, and the vertical axis represents... State function The rise time is relatively fast, from Figure 4 and Figure 6 The comparison reveals that the state function The rise time is significantly better than By adjusting the size of the system overshoot through the first inductor L1, the second inductor L2, the third inductor L3, and the fourth inductor L4, the charging of the parasitic capacitance Cgs in each MOSFET is accelerated, thereby speeding up the turn-on time of the MOSFET and improving the overshoot time of the system.

[0092] Figure 7 A circuit diagram of another fast start control circuit for motor M provided in an embodiment of the present invention is shown below. Figure 7 As shown, the control circuit further includes: a first transistor P1, a second transistor P2, a third transistor P3, and a fourth transistor P4; the base of the first transistor P1 is connected to the second terminal of the first inductor L1, the emitter of the first transistor P1 is connected to the first terminal of the first resistor R1, and the collector of the first transistor P1 is grounded; the base of the second transistor P2 is connected to the second terminal of the second inductor L2, the emitter of the second transistor P2 is connected to the first terminal of the second resistor R2, and the collector of the second transistor P2 is grounded; the base of the third transistor P3 is connected to the second terminal of the third inductor L3, the emitter of the third transistor P3 is connected to the first terminal of the third resistor R3, and the collector of the third transistor P3 is grounded; the base of the fourth transistor P4 is connected to the second terminal of the fourth inductor L4, the emitter of the fourth transistor P4 is connected to the first terminal of the fourth resistor R4, and the collector of the fourth transistor P4 is grounded.

[0093] In this embodiment, the first transistor P1, the second transistor P2, the third transistor P3, and the fourth transistor P4 are PNP transistors. When the first PWM signal PWM1 and the fourth PWM signal PWM4 change from high level to low level, and the second PWM signal PWM2 and the third PWM signal PWM3 change from low level to high level, a discharge circuit is formed by the first parasitic capacitance Cgs on the first MOSFET Q1, the first transistor P1, and ground. The charge on the first parasitic capacitance Cgs is released in the discharge circuit, accelerating the shutdown of the first MOSFET Q1 and preventing the first MOSFET Q1 and the second MOSFET Q2 from being turned on simultaneously. Similarly, the fourth parasitic capacitance Cgs on the fourth MOSFET Q4, the fourth transistor P4, and ground form a discharge circuit, and the charge on the fourth parasitic capacitance Cgs is released in the discharge circuit, accelerating the shutdown of the fourth MOSFET Q4 and preventing the third MOSFET Q3 and the fourth MOSFET Q4 from being turned on simultaneously. When the second PWM signal PWM2 and the third PWM signal PWM3 change from high level to low level, and the first PWM signal PWM1 and the fourth PWM signal PWM4 change from low level to high level, the discharge circuit formed by the second parasitic capacitance Cgs on the second MOSFET Q2, the second transistor P2, and ground releases the charge on the second parasitic capacitance Cgs in the discharge circuit, accelerating the turn-off of the second MOSFET Q2 and preventing the first MOSFET Q1 and the second MOSFET Q2 from being turned on simultaneously; the discharge circuit formed by the third parasitic capacitance Cgs on the third MOSFET Q3, the third transistor P3, and ground releases the charge on the third parasitic capacitance Cgs in the discharge circuit, accelerating the turn-off of the third MOSFET Q3 and preventing the third MOSFET Q3 and the fourth MOSFET Q4 from being turned on simultaneously.

[0094] Figure 8 A circuit diagram of another fast start control circuit for motor M provided in an embodiment of the present invention is shown below. Figure 8 As shown, the control circuit further includes: a first drive signal generation module and an MCU; the input terminal of the first drive signal generation module is connected to the MCU, and the output terminal of the first drive signal generation module is connected to the first terminal of the first inductor L1 and the first terminal of the second inductor L2 respectively, for generating a first PWM signal PWM1 to the first terminal of the first inductor L1 according to the first control signal INPWM1 issued by the MCU, and for generating a second PWM signal PWM2 to the first terminal of the second inductor L2 according to the second control signal INPWM2 issued by the MCU.

[0095] The control circuit further includes: a second drive signal generation module; the input terminal of the second drive signal generation module is connected to the MCU, and the output terminal of the second drive signal generation module is connected to the first terminal of the third inductor L3 and the first terminal of the fourth inductor L4 respectively, for generating a third PWM signal PWM3 to the first terminal of the third inductor L3 according to the third control signal INPWM3 issued by the MCU, and for generating a fourth PWM signal PWM4 to the first terminal of the fourth inductor L4 according to the fourth control signal INPWM4 issued by the MCU.

[0096] In this embodiment, a first PWM signal PWM1 and a second PWM signal PWM2 are generated by a first drive signal generation module, and a third PWM signal PWM3 and a fourth PWM signal PWM4 are generated by a second drive signal generation module. This enables the first PWM signal PWM1 to control the first MOSFET Q1, the second PWM signal PWM2 to control the second MOSFET Q2, the third PWM signal PWM3 to control the third MOSFET Q3, and the fourth PWM signal PWM4 to control the fourth MOSFET Q4.

[0097] In another embodiment of the present invention, the first drive signal generation module includes: a fifth resistor R5, a first drive signal generation chip U1, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first diode D1, and a ninth resistor R9; the first end of the fifth resistor R5 is connected to the MCU, and the second end of the fifth resistor R5 is connected to the first drive signal generation chip U1; the first end of the sixth resistor R6 is connected to the MCU, and the second end of the sixth resistor R6 is connected to the first drive signal generation chip U1; the first end of the seventh resistor R7 is connected to the first drive signal generation chip U1, and the second end of the seventh resistor R7 is connected to the first end of the first inductor L1; the first end of the eighth resistor R8 is connected to the first drive signal generation chip U1, and the second end of the eighth resistor R8 is connected to the first end of the second inductor L2; the cathode of the first diode D1 is connected to the first end of the eighth resistor R8, and the anode of the first diode D1 is grounded; the first end of the ninth resistor R9 is connected to the second end of the eighth resistor R8, and the second end of the ninth resistor R9 is grounded; the first drive signal generation chip U1 is also connected to a first power supply terminal. The first signal generation module further includes: a first capacitor C1, a second capacitor C2, a third capacitor C3, and a fourth capacitor C4; the first terminal of the first capacitor C1 is connected to the first power supply terminal, and the second terminal of the first capacitor C1 is grounded; the second capacitor C2 is connected in parallel with the first capacitor C1; the first terminal of the third capacitor C3 is connected to the second terminal of the fifth resistor R5, and the second terminal of the third capacitor C3 is grounded; the first terminal of the fourth capacitor C4 is connected to the second terminal of the sixth resistor R6, and the second terminal of the fourth capacitor C4 is grounded. The first drive signal generation module further includes: a ninth capacitor C9; the first terminal of the ninth capacitor C9 is connected to pin 2 of the first drive signal generation chip U1, and the second terminal of the ninth capacitor C9 is connected to pin 4 of the first drive signal generation chip U1.

[0098] In this embodiment, Figure 9 An internal circuit diagram of a drive signal generation chip provided in an embodiment of the present invention is shown below. Figure 9As shown, the gate of the first MOS transistor Q1 receives the first PWM signal PWM1 through the control pin H0, and the gate of the second MOS transistor Q2 receives the second PWM signal PWM2 through the control pin LO. The first PWM signal PWM1 and the second PWM signal PWM2 are a pair of complementary control PWM signals. The first driving signal generation chip U1 adopted in this embodiment is controlled by a bootstrap driving circuit. In the figure, the chip model of the first driving signal generation chip U1 is UCC27201. Assuming VDD = 12V, VM = 7.4V, and the turn-on voltage Vth of the MOS transistor is 6V. In the first stage, first input the first INPWM signal and the second INPWM signal, so that HO and LO respectively output high level and low level through the internal control circuit of the first driving chip. At this time, the first MOS transistor Q1 is turned off, and the second MOS transistor Q2 is turned on. At the same time, VDD charges the ninth capacitor C9 through the bootstrap diode, that is, the first diode D1, so that the voltage difference between the two ends of the ninth capacitor C9 is VDD = 12V. In the second stage, input the first INPWM signal and the second INPWM signal, so that HO and LO respectively output low level and high level through the internal control circuit of the first driving chip. The first MOS transistor Q1 is turned on, and the second MOS transistor Q2 is turned off. Since the voltage on the ninth capacitor C9 cannot change suddenly, the first MOS transistor Q1 can remain turned on for a certain period of time. At this time, the voltage of the source of the first MOS transistor Q1 to the ground is approximately equal to VM = 7.4V, the voltage of the gate to the ground is approximately equal to VM + VDD = 19.4V, and the voltage across the capacitor is 12V. Therefore, the first MOS transistor Q1 can be normally turned on. It should be noted that because the ninth capacitor C9 is continuously discharging, the voltage difference between the two ends of the first nine capacitors will decrease, the voltage of the ninth capacitor C9 to the ground will drop to VDD, and the gate-source voltage of the first MOS transistor Q1 will be approximately equal to VDD - VM = 12V - 7.6V = 4.4V < Vth = 6V, and the high-end first MOS transistor Q1 will still be turned off.

[0099] The second drive signal generation module includes: a tenth resistor R10, a second drive signal generation chip U2, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a second diode D2, and a fourteenth resistor; the first terminal of the tenth resistor R10 is connected to the MCU, and the second terminal of the tenth resistor R10 is connected to the second drive signal generation chip U2; the first terminal of the eleventh resistor R11 is connected to the MCU, and the second terminal of the eleventh resistor R11 is connected to the second drive signal generation chip U2; the first terminal of the twelfth resistor R12 is connected to the second drive signal generation chip U2; the first terminal of the twelfth resistor R12 is connected to the second drive signal generation chip U2; the first terminal of the twelfth resistor R12 is connected to the second drive signal generation chip U2; the first terminal of the twelfth resistor R12 is connected to the second drive signal generation chip U2; the second ... Chip U2 is connected; the second end of the twelfth resistor R12 is connected to the first end of the third inductor L3; the first end of the thirteenth resistor R13 is connected to the second drive signal generating chip U2; the second end of the thirteenth resistor R13 is connected to the second end of the fourth inductor L4; the cathode of the second diode D2 is connected to the first end of the thirteenth resistor R13; the anode of the second diode D2 is grounded; the first end of the fourteenth resistor is connected to the second end of the thirteenth resistor R13; the second end of the fourteenth resistor is grounded; the second drive signal generating chip U2 is also connected to the first power supply terminal. The second drive signal generation module further includes: a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, and an eighth capacitor C8; the first terminal of the fifth capacitor C5 is connected to the first power supply terminal, and the second terminal of the fifth capacitor C5 is grounded; the sixth capacitor C6 is connected in parallel with the fifth capacitor C5; the first terminal of the seventh capacitor C7 is connected to the second terminal of the tenth resistor R10, and the second terminal of the seventh capacitor C7 is grounded; the first terminal of the eighth capacitor C8 is connected to the second terminal of the eleventh resistor R11, and the second terminal of the eighth capacitor C8 is grounded. The second drive signal generation module also includes: a tenth capacitor C10; the first terminal of the tenth capacitor C10 is connected to pin 2 of the second drive signal generation chip U2, and the second terminal of the tenth capacitor C10 is connected to pin 4 of the second drive signal generation chip U2.

[0100] In this embodiment, the second drive signal generating chip U2 is model UCC27201. The working principle of the second drive signal generating module is the same as that of the first drive module, and will not be described again here.

[0101] Figure 10 A circuit diagram of another fast start control circuit for motor M provided in an embodiment of the present invention is shown below. Figure 10As shown, the control circuit further includes: a current setting module, a current sampling module, and an error amplifier; the current setting module is used to set the operating current value of the motor M; the current sampling module is connected to the motor M and is used to obtain the actual operating current value of the motor M; the error amplifier is connected to the current setting module, the current sampling module, and the MCU respectively, and is used to obtain the preset operating current value output by the current setting module and the actual operating current value output by the current sampling module, and is also used to obtain an adjustment current value based on the preset operating current value and the actual operating current value, and is also used to send the adjustment current value to the MCU, so that the MCU outputs a first control signal INPWM1, a second control signal INPWM2, a third control signal INPWM3, and a fourth control signal INPWM4 based on the adjustment current value.

[0102] In this embodiment, Figure 9 The H-bridge driver module consists of four MOSFETs: Q1, Q2, Q3, and Q4. The magnitude of the current determines the speed of motor M. The operating current of motor M is set via a current setting module, i.e., the preset speed of motor M. The actual operating current of motor M, i.e., the actual speed of motor M, is acquired via a current sampling module. The preset operating current value output by the current setting module and the actual operating current value output by the current sampling module are obtained. Based on the preset operating current value and the actual operating current value, an adjustment current value is derived. The MCU then outputs four control signals: INPWM1, INPWM2, INPWM3, and INPWM4, thereby adjusting the speed of motor M. It should be noted that in this embodiment, no modifications to the computer program are involved in the MCU.

[0103] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0104] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A fast start control circuit for a motor, characterized in that, The control circuit includes: a first resistor, a second resistor, a third resistor, a fourth resistor, a first inductor, a second inductor, a third inductor, a fourth inductor, a first MOSFET, a second MOSFET, a third MOSFET, and a fourth MOSFET; The first terminal of the first inductor is used to receive the first PWM signal. The second terminal of the first inductor is connected to the first terminal of the first resistor. The second terminal of the first resistor is connected to the gate of the first MOSFET. The first inductor and the gate parasitic capacitance of the first MOSFET constitute a second-order underdamped system. By adjusting the inductance value of the first inductor, the system generates an overshoot, which overcharges the gate parasitic capacitance of the first MOSFET. The drain of the first MOSFET is connected to the first power supply terminal, and the source of the first MOSFET is connected to the drain of the second MOSFET and the first terminal of the motor, respectively. The first end of the second inductor is used to receive the second PWM signal. The second end of the second inductor is connected to the first end of the second resistor. The second end of the second resistor is connected to the gate of the second MOSFET. The second inductor and the gate parasitic capacitance of the second MOSFET constitute a second-order underdamped system. By adjusting the inductance value of the second inductor, the system generates an overshoot, which overcharges the gate parasitic capacitance of the second MOSFET. The source of the second MOSFET is grounded; The first terminal of the third inductor is used to receive the third PWM signal. The second terminal of the third inductor is connected to the first terminal of the third resistor. The second terminal of the third resistor is connected to the gate of the third MOS transistor. The third inductor and the gate parasitic capacitance of the third MOS transistor form a second-order underdamped system. By adjusting the inductance value of the third inductor, the system generates an overshoot, which overcharges the gate parasitic capacitance of the third MOS transistor. The drain of the third MOS transistor is connected to the first power supply terminal, and the source of the third MOS transistor is connected to the drain of the fourth MOS transistor and the second terminal of the motor, respectively. The first terminal of the fourth inductor is used to receive the third PWM signal. The second terminal of the fourth inductor is connected to the first terminal of the fourth resistor. The second terminal of the fourth resistor is connected to the gate of the fourth MOS transistor. The fourth inductor and the gate parasitic capacitance of the fourth MOS transistor form a second-order underdamped system. By adjusting the inductance value of the fourth inductor, the system generates an overshoot, which overcharges the gate parasitic capacitance of the fourth MOS transistor. The source of the fourth MOS transistor is grounded.

2. The fast start control circuit for a motor as described in claim 1, characterized in that, The control circuit further includes: a first transistor, a second transistor, a third transistor, and a fourth transistor; The base of the first transistor is connected to the second end of the first inductor, the emitter of the first transistor is connected to the first end of the first resistor, and the collector of the first transistor is grounded. The base of the second transistor is connected to the second terminal of the second inductor, the emitter of the second transistor is connected to the first terminal of the second resistor, and the collector of the second transistor is grounded. The base of the third transistor is connected to the second terminal of the third inductor, the emitter of the third transistor is connected to the first terminal of the third resistor, and the collector of the third transistor is grounded. The base of the fourth transistor is connected to the second terminal of the fourth inductor, the emitter of the fourth transistor is connected to the first terminal of the fourth resistor, and the collector of the fourth transistor is grounded.

3. The fast start control circuit for a motor as described in claim 1, characterized in that, The control circuit further includes: a first drive signal generation module and an MCU; The input terminal of the first drive signal generation module is connected to the MCU, and the output terminal of the first drive signal generation module is connected to the first terminal of the first inductor and the first terminal of the second inductor respectively. It is used to send a first PWM signal to the first terminal of the first inductor according to the first control signal sent by the MCU, and to send a second PWM signal to the first terminal of the second inductor according to the second control signal sent by the MCU.

4. The fast start control circuit for a motor as described in claim 3, characterized in that, The control circuit further includes: a second drive signal generation module; The input terminal of the second drive signal generation module is connected to the MCU, and the output terminal of the second drive signal generation module is connected to the first terminal of the third inductor and the first terminal of the fourth inductor respectively. It is used to send a first PWM signal to the first terminal of the third inductor according to the third control signal sent by the MCU, and also to send a fourth PWM signal to the first terminal of the fourth inductor according to the fourth control signal sent by the MCU.

5. The fast start control circuit for a motor as described in claim 4, characterized in that, The first drive signal generation module includes: a fifth resistor, a first drive signal generation chip, a sixth resistor, a seventh resistor, an eighth resistor, a first diode, a ninth resistor, and a ninth capacitor; The first end of the fifth resistor is connected to the MCU, and the second end of the fifth resistor is connected to the first drive signal generating chip; The first end of the sixth resistor is connected to the MCU, and the second end of the sixth resistor is connected to the first drive signal generating chip; The first end of the seventh resistor is connected to the first driving signal generating chip, and the second end of the seventh resistor is connected to the first end of the first inductor. The first end of the eighth resistor is connected to the first driving signal generating chip, and the second end of the eighth resistor is connected to the first end of the second inductor. The negative terminal of the first diode is connected to the first terminal of the eighth resistor, and the positive terminal of the first diode is grounded; The first end of the ninth resistor is connected to the second end of the eighth resistor, and the second end of the ninth resistor is grounded; The first end of the ninth capacitor is connected to the second pin of the first drive signal generating chip, and the second end of the ninth capacitor is connected to the fourth pin of the first drive signal generating chip. The first drive signal generating chip is also connected to the first power supply terminal.

6. The rapid start control circuit for a motor as described in claim 5, characterized in that, The first drive signal generation module further includes: a first capacitor and a second capacitor; The first terminal of the first capacitor is connected to the first power supply terminal, and the second terminal of the first capacitor is grounded. The second capacitor is connected in parallel with the first capacitor.

7. The fast start control circuit for a motor as described in claim 5, characterized in that, The second drive signal generation module includes: a tenth resistor, a second drive signal generation chip, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a second diode, a tenth capacitor, and a fourteenth resistor; The first end of the tenth resistor is connected to the MCU, and the second end of the tenth resistor is connected to the second drive signal generating chip; The first end of the eleventh resistor is connected to the MCU, and the second end of the eleventh resistor is connected to the second drive signal generating chip. The first end of the twelfth resistor is connected to the second drive signal generating chip, and the second end of the twelfth resistor is connected to the first end of the third inductor; The first end of the thirteenth resistor is connected to the second driving signal generating chip, and the second end of the thirteenth resistor is connected to the second end of the fourth inductor. The negative terminal of the second diode is connected to the first terminal of the thirteenth resistor, and the positive terminal of the second diode is grounded. The first end of the fourteenth resistor is connected to the second end of the thirteenth resistor, and the second end of the fourteenth resistor is grounded. The first end of the tenth capacitor is connected to the second pin of the second drive signal generating chip, and the second end of the tenth capacitor is connected to the fourth pin of the second drive signal generating chip. The second drive signal generating chip is also connected to the first power supply terminal.

8. The fast start control circuit for a motor as described in claim 7, characterized in that, The second drive signal generation module further includes: a fifth capacitor and a sixth capacitor; The first terminal of the fifth capacitor is connected to the first power supply terminal, and the second terminal of the fifth capacitor is grounded. The sixth capacitor is connected in parallel with the fifth capacitor.

9. The fast start control circuit for a motor as described in claim 8, characterized in that, The first drive signal generation module further includes a third capacitor and a fourth capacitor; the second drive signal generation module further includes a seventh capacitor and an eighth capacitor. The first terminal of the third capacitor is connected to the second terminal of the fifth resistor, and the second terminal of the third capacitor is grounded. The first terminal of the fourth capacitor is connected to the second terminal of the sixth resistor, and the second terminal of the fourth capacitor is grounded. The first terminal of the seventh capacitor is connected to the second terminal of the tenth resistor, and the second terminal of the seventh capacitor is grounded. The first terminal of the eighth capacitor is connected to the second terminal of the eleventh resistor, and the second terminal of the eighth capacitor is grounded.

10. The fast start control circuit for a motor as described in claim 4, characterized in that, The control circuit also includes: a current setting module, a current sampling module, and an error amplifier; The current setting module is used to set the operating current value of the motor; The current sampling module is connected to the motor and is used to obtain the actual operating current value of the motor. The error amplifier is connected to the current setting module, the current sampling module, and the MCU, respectively. It is used to obtain the preset operating current value output by the current setting module and the actual operating current value output by the current sampling module. It is also used to obtain an adjustment current value based on the preset operating current value and the actual operating current value. Furthermore, it is used to send the adjustment current value to the MCU, so that the MCU outputs a first control signal, a second control signal, a third control signal, and a fourth control signal based on the adjustment current value.

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