Array substrate, driving method thereof, display panel and display device

Abstract

The application discloses an array substrate and a driving method thereof, a display panel and a display device. In an embodiment, the array substrate comprises a pixel circuit and a light sensor circuit, the pixel circuit and the light sensor circuit have a common control end sharing a common control signal, the pixel circuit comprises a light emitting control end, the light sensor circuit comprises a setting unit connected to a first power signal end, the common control end and a first node, the setting unit sets the first node in response to a signal of the common control end, a light sensing unit connected to the first node and a second power signal end, the light sensing unit writes a photoelectric conversion level to the first node in response to a received light signal, and a sensing unit connected to the first node, a third power signal end, a sensing control end and a sensing end, the sensing unit generates a sensing current in response to a potential of the first node and outputs the sensing current to the sensing end in response to a signal of the sensing control end. The embodiment simplifies the structure of the light sensor circuit by using the common control end of the common pixel circuit.

Description

Technical Field

[0001] This application relates to the field of display technology. More specifically, it relates to an array substrate and its driving method, a display panel, and a display device. Background Technology

[0002] With the rapid development of the information industry, biometric technology has been used more and more widely. In particular, due to the uniqueness of skin patterns such as fingerprints or palm prints, it is easy to verify user identity. Therefore, pattern recognition technology has been widely used in mobile terminals, smart homes and other fields to provide security for user information.

[0003] Currently, in order to achieve full-screen display while simultaneously recognizing fingerprints, a fingerprint recognition on display (FOD) technology has been developed. This technology places the fingerprint sensor under the screen of the display panel and senses the fingerprint on the screen. However, current display products can only achieve partial fingerprint recognition, and the control of fingerprint recognition requires independent wiring, which is inconvenient to use and has a complex layout. Summary of the Invention

[0004] The purpose of this application is to provide an array substrate and its driving method, a display panel, and a display device to solve at least one of the problems existing in the prior art.

[0005] To achieve the above objectives, this application adopts the following technical solution:

[0006] A first aspect of this application provides an array substrate, comprising: pixel circuits and photosensitive sensor circuits corresponding one-to-one with the pixel circuits, wherein the pixel circuits and the photosensitive sensor circuits have a common control terminal for a shared control signal, wherein...

[0007] The pixel circuit includes: a light-emitting control unit configured to control the light-emitting unit to emit light in response to a signal from the light-emitting control terminal;

[0008] The optical sensor circuit includes:

[0009] The setting unit is electrically connected to a first power signal terminal, a common control terminal, and a first node, and is configured to set the first node in response to a signal from the common control terminal.

[0010] The optical sensing unit is electrically connected to the first node and the second power signal terminal, and writes a photoelectric conversion level to the first node in response to the received optical signal; and

[0011] The sensing unit is electrically connected to the first node, the third power signal terminal, the sensing control terminal, and the sensing terminal, and is configured to generate a sensing current in response to the potential of the first node and output the sensing current to the sensing terminal in response to the signal of the sensing control terminal.

[0012] In some alternative embodiments, the optical sensing unit includes: a photoelectric sensor and a first capacitor, wherein,

[0013] The first end of the photoelectric sensor is electrically connected to the second power signal terminal, and the second end is electrically connected to the first node.

[0014] The first terminal of the first capacitor is electrically connected to the second power signal terminal, and the second terminal is electrically connected to the first node.

[0015] In some alternative embodiments, the array substrate includes: a driving circuit layer disposed on a substrate, the driving circuit layer including an active layer.

[0016] The photoelectric sensor is set on the same layer as the active layer.

[0017] In some alternative embodiments, wherein,

[0018] The set unit includes: a first transistor, the first electrode of which is electrically connected to a first power signal terminal, the second electrode of which is electrically connected to a first node, and the control electrode of which is electrically connected to a common control terminal.

[0019] The sensing unit includes a second transistor and a third transistor. The first electrode of the second transistor is electrically connected to the third power signal terminal, and the second electrode is electrically connected to the first electrode of the third transistor. The control electrode is electrically connected to the first node. The second electrode of the third transistor is electrically connected to the sensing terminal, and the control electrode is electrically connected to the sensing control terminal.

[0020] In some optional embodiments, the pixel circuit further includes: a driving unit, a compensation unit, a data input unit, a first reset unit, and a second reset unit, wherein,

[0021] The driving unit, electrically connected to the second node, the third node, and the fourth node, is configured to control the driving current for driving the light-emitting unit to emit light in response to a signal from the fourth node.

[0022] The compensation unit, electrically connected to the compensation control terminal, the second node, and the fourth node, is configured to perform threshold compensation on the drive unit in response to signals from the compensation control terminal.

[0023] The data input unit is electrically connected to the data signal terminal, the row scan signal terminal, and the third node, and is configured to write the data signal from the data signal terminal to the third node in response to a signal from the row scan signal terminal.

[0024] The first reset unit is electrically connected to the reset control terminal, the second node, and the first reset signal terminal, and is configured to reset the potential of the second node using the signal from the first reset signal terminal in response to a signal from the reset control terminal.

[0025] The second reset unit is electrically connected to the reset control terminal, the fifth node, and the second reset signal terminal, and is configured to reset the potential of the fifth node using the signal from the second reset signal terminal in response to the signal from the reset control terminal.

[0026] In some alternative embodiments, wherein,

[0027] The driving unit includes: a fourth transistor, the first electrode of which is electrically connected to the second node, the second electrode of which is electrically connected to the third node, and the control electrode of which is electrically connected to the fourth node.

[0028] The compensation unit includes: a fifth transistor, the first electrode of which is electrically connected to the fourth node, the second electrode of which is electrically connected to the second node, and the control electrode of which is electrically connected to the compensation control terminal.

[0029] The data input unit includes a sixth transistor, whose first electrode is electrically connected to the data signal terminal, its second electrode is electrically connected to the third node, and its control electrode is electrically connected to the row scan signal terminal.

[0030] The light-emitting control unit includes a seventh transistor and an eighth transistor. The first electrode of the seventh transistor is connected to the third power supply signal terminal, the second electrode is connected to the second node, and the control electrode is connected to the light-emitting control terminal. The first electrode of the eighth transistor is connected to the third node, the second electrode is connected to the fifth node, and the control electrode is connected to the light-emitting control terminal.

[0031] The first reset unit includes: a ninth transistor, the first electrode of which is electrically connected to a first reset signal terminal, the second electrode of which is electrically connected to a second node, and the control electrode of which is electrically connected to a reset control terminal.

[0032] The second reset unit includes: a tenth transistor, the first electrode of the tenth transistor is electrically connected to the second reset signal terminal, the second electrode is electrically connected to the fifth node, and the control electrode is electrically connected to the reset control terminal.

[0033] In some optional embodiments, the light emission control terminal of the pixel circuit serves as the common control terminal, and the setting unit sets the first node in response to the signal from the light emission control terminal.

[0034] In some optional embodiments, the reset control terminal of the pixel circuit serves as the common control terminal, and the setting unit sets the first node in response to the signal from the reset control terminal.

[0035] In some optional embodiments, the row scan signal terminal of the pixel circuit serves as the common control terminal, and the setting unit sets the first node in response to the signal from the row scan signal terminal.

[0036] In some alternative embodiments, the first and third transistors are metal-oxide transistors, and the second transistor is a low-temperature polysilicon transistor.

[0037] In some alternative embodiments, the fifth transistor is a metal-oxide transistor, and the fourth, seventh, and eighth transistors are low-temperature polycrystalline silicon transistors.

[0038] A second aspect of this application provides a display panel, comprising:

[0039] The array substrate described above,

[0040] A light-emitting unit layer formed on an array substrate, the light-emitting unit layer comprising multiple light-emitting units, and

[0041] A color filter layer is formed on the light-emitting unit layer. The color filter layer includes a black matrix and color filters disposed in front of the black matrix. Each color filter corresponds to one light-emitting unit.

[0042] Each pixel circuit drives a light-emitting unit to emit light, and the orthographic projection of the photoelectric sensor in each light-sensing unit onto the array substrate falls within the orthographic projection of the color filter of the corresponding light-emitting unit onto the array substrate.

[0043] A third aspect of this application provides a display device, including the display panel described above.

[0044] A fourth aspect of this application provides a driving method for the array substrate described above, comprising:

[0045] In the first stage, the setting unit sets the first node in response to the signal at the common control terminal being at the first level.

[0046] In the second stage, the light-emitting control unit responds to the signal from the light-emitting control terminal by controlling the light-emitting unit to emit light at the second level, and the light-sensing unit responds to the received light by writing the photoelectric conversion level to the first node and using the potential of the first node to control the sensing unit to output the sensing current to the sensing terminal when the sensing control terminal receives an effective level.

[0047] The beneficial effects of this application are as follows:

[0048] This application addresses existing problems by providing an array substrate and its driving method, a display panel, and a display device. By setting up photosensitive circuits corresponding one-to-one with pixel circuits, and electrically connecting the setting units of the photosensitive circuits to a common control terminal of the pixel circuits, the signals from the shared control terminal are used as control signals for the setting units, thereby enabling full-screen fingerprint recognition. Furthermore, by sharing a signal from a specific signal terminal with the pixel circuits, the wiring is greatly simplified while maintaining full-screen fingerprint recognition functionality, resulting in a simple circuit structure layout and broad application prospects. Attached Figure Description

[0049] The specific embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0050] Figure 1 A schematic block diagram of a pixel circuit and a light sensing circuit in an array substrate according to an embodiment of this application is shown.

[0051] Figure 2 A circuit diagram of a pixel circuit and a photosensitive circuit in an array substrate according to an embodiment of this application is shown.

[0052] Figure 3 A timing diagram of each key signal terminal in an array substrate according to an embodiment of the present application is shown;

[0053] Figure 4 A schematic cross-sectional view of a display panel according to an embodiment of this application is shown;

[0054] Figure 5 A schematic top view of a display panel according to an embodiment of this application is shown;

[0055] Figure 6 A circuit schematic diagram of a pixel circuit and a photosensing circuit in an array substrate according to another embodiment of this application is shown; and

[0056] Figure 7 The diagram shows the circuit schematic of the pixel circuit and the light sensing circuit in an array substrate according to another embodiment of the present application. Detailed Implementation

[0057] To more clearly illustrate this application, the following description, in conjunction with embodiments and accompanying drawings, further clarifies the application. Similar components in the drawings are represented by the same or similar reference numerals. Those skilled in the art should understand that the specific description below is illustrative rather than restrictive and should not be construed as limiting the scope of protection of this application.

[0058] It should be noted that the terms "having," "comprising," and "including" used in this application are all open-ended, meaning that when a module is described as "having," "comprising," or "including" a first element, a second element, and / or a third element, it indicates that the module includes other elements in addition to the first, second, and / or third elements. Furthermore, the ordinal numbers "first," "second," and "third" used in this application are not intended to specify a specific order, but only to distinguish between the various parts.

[0059] The terms “on…”, “formed on…”, and “set on…” used in this application can indicate that one layer is directly formed or set on another layer, or that one layer is indirectly formed or set on another layer, meaning that there are other layers between the two layers.

[0060] Furthermore, in this application, the term "co-layer arrangement" refers to two layers, components, elements, or portions that can be formed using the same fabrication process (e.g., patterning process), and these two layers, components, elements, or portions are generally formed from the same material. For example, co-layer arrangement of two or more functional layers means that these co-layer functional layers can be formed using the same material layer and the same fabrication process, thereby simplifying the fabrication process of the display substrate.

[0061] In all embodiments of this invention, the transistors used can be thin-film transistors, field-effect transistors, or other devices with the same characteristics. Since the source and drain of the transistors used here are symmetrical, their sources and drains are interchangeable. In the embodiments of this invention, the gate of the transistor is called the control electrode, and one of the source and drain is called the first electrode, and the other is called the second electrode. The embodiments of this invention can be applied to products using LPTS technology (i.e., the circuit includes only low-temperature polysilicon transistors) or LTPO technology (i.e., the circuit includes both low-temperature polysilicon transistors and metal-oxide-semiconductor transistors). When applied to LTPO technology products, the circuit includes both P-type transistors and N-type transistors. For the sake of consistency, this application uses the direction of current flow in the transistor to define the first and second electrodes, with the current inflow end being the first electrode and the current outflow end being the second electrode as an example. That is, if the transistor is N-type, the first electrode is called the drain and the second electrode is called the source; if the transistor is P-type, the first electrode represents the source and the second electrode represents the drain.

[0062] Reference Figure 1 As shown, an embodiment of this application provides an array substrate, including: a pixel circuit 10 and a photosensitive sensor circuit 20 corresponding to each pixel circuit 10. The pixel circuit and the photosensitive sensor circuit have a common control terminal CTL for a shared control signal.

[0063] Pixel circuit 10 includes: light emission control unit 11, configured to control the light emission unit to emit light in response to a signal from light emission control terminal EM;

[0064] The optical sensor circuit 20 includes:

[0065] The setting unit 21 is electrically connected to the first power signal terminal VDC, the common control terminal CTL, and the first node N1, and is configured to set the first node N1 in response to the signal of the common control terminal CTL.

[0066] Optical sensing unit 22 is electrically connected to the first node N1 and the second power signal terminal VCC, and writes a photoelectric conversion level to the first node N1 in response to the received optical signal; and

[0067] The sensing unit 23 is electrically connected to the first node N1, the third power signal terminal VDD, the sensing control terminal SW_SEN, and the sensing terminal Vsensor. It is configured to generate a sensing current in response to the potential of the first node N1 and output the sensing current to the sensing terminal Vsensor in response to the signal of the sensing control terminal SW_SEN.

[0068] In this embodiment, by setting up optical sensing circuits that correspond one-to-one with the pixel circuits, and sharing a control terminal between the setting unit of the optical sensing circuit and the pixel circuit, the signal from a certain control terminal in the pixel circuit is used as the control signal for the setting unit, thereby enabling full-screen fingerprint recognition. In a preferred embodiment, the optical sensing circuit and the pixel circuit share a light-emitting control terminal. Utilizing the characteristic of the light-emitting control terminal to control the light-emitting duration, the light-emitting unit of the pixel circuit is used as the light source for optical sensing and to control the sensing duration of the optical sensing circuit. Furthermore, the light-emitting control signal has a long pulse width; using this signal as the control signal for the setting unit provides a longer setting time for the optical sensing circuit, ensuring the accuracy of the potential of the first node N1 and improving the light sensing accuracy of the optical sensing circuit. By sharing a signal from a certain signal terminal with the pixel circuit, the wiring is greatly simplified while maintaining full-screen fingerprint recognition functionality, resulting in a simple circuit structure layout.

[0069] To illustrate in detail the structure and functional advantages of the pixel circuits and corresponding optical sensing circuits included in the array substrate in the embodiments of this application, the following detailed explanation is provided with reference to specific examples and circuit structures.

[0070] In one specific embodiment, combined with Figure 1 and Figure 2 As shown, where Figure 1 A block diagram of pixel circuitry and photosensing circuitry in an array substrate according to an embodiment of this application is shown. Figure 2 The circuit diagram shows a specific embodiment of a control terminal EM that satisfies the block diagram, with the light emission control terminal EM serving as a shared control terminal for both the pixel circuit and the setting unit.

[0071] like Figure 1 As shown, each pixel circuit 10 in the array substrate includes a corresponding light sensing circuit 20. The pixel circuit 10 includes a light-emitting control unit 11, which controls the light-emitting unit D to emit light based on a signal from a light-emitting control terminal EM. Those skilled in the art should understand that the signal from the light-emitting control terminal EM directly controls the duration of light emission from the light-emitting unit D; the light-emitting unit D only emits light when this signal is valid relative to the light-emitting control unit 11.

[0072] It should be noted that this application does not limit the specific type of the light-emitting unit D driven by the pixel circuit. When the array substrate and the light-emitting unit D constitute a display panel, the type of the light-emitting unit D depends on the specific configuration of the display panel. For example, the light-emitting unit D can be an organic light-emitting diode (OLED), a quantum light-emitting diode (Q-LED), a mini light-emitting diode (Mini LED), or a micro light-emitting diode (Micro LED), or other types of light-emitting devices, which will not be elaborated here.

[0073] Specific reference Figure 2 As shown, in addition to the light-emitting control unit 11, the pixel circuit 10 also includes: a driving unit 12, a compensation unit 13, a data input unit 14, a first reset unit 15, and a second reset unit 16.

[0074] The driving unit 12 is electrically connected to the second node N2, the third node N3, and the fourth node N4, and is configured to control the driving current for driving the light-emitting unit D to emit light in response to the signal from the fourth node N4. Specifically... Figure 2 In the example, the driving unit 12 includes a fourth transistor T4, the first electrode of the fourth transistor T4 is electrically connected to the second node N2, the second electrode is electrically connected to the third node N3, and the control electrode is electrically connected to the fourth node N4.

[0075] The compensation unit 13 is electrically connected to the compensation control terminal Gaten, the second node N2, and the fourth node N4, and is configured to perform threshold compensation on the drive unit 12 in response to the signal from the compensation control terminal Gaten. Specifically... Figure 2 In the example, the compensation unit 13 includes: a fifth transistor T5, the first electrode of the fifth transistor T5 is electrically connected to the fourth node N4, the second electrode is electrically connected to the second node N2, and the control electrode is electrically connected to the compensation control terminal Gaten.

[0076] Data input unit 14 is electrically connected to the data signal terminal Vdata, the row scan signal terminal Gate, and the third node N3, and is configured to write the data signal of the data signal terminal Vdata to the third node N3 in response to the signal of the row scan signal terminal Gate. For a specific example, refer to... Figure 2 As shown, the data input unit 14 includes a sixth transistor T6, the first electrode of the sixth transistor T6 is electrically connected to the data signal terminal Vdata, the second electrode is electrically connected to the third node N3, and the control electrode is electrically connected to the row scan signal terminal Gate.

[0077] Reference Figure 2 As shown, the light-emitting control unit 11 includes a seventh transistor T7 and an eighth transistor T8. The first electrode of the seventh transistor T7 is electrically connected to the third power supply signal terminal VDD, the second electrode is electrically connected to the second node N2, and the control electrode is electrically connected to the light-emitting control terminal EM. The first electrode of the eighth transistor is electrically connected to the third node N3, the second electrode is electrically connected to the fifth node N5, and the control electrode is electrically connected to the light-emitting control terminal EM.

[0078] The first reset unit 15 is electrically connected to the reset control terminal Reset, the second node N2, and the first reset signal terminal Vref, and is configured to reset the potential of the second node N2 using the signal of the first reset signal terminal Vref in response to the signal of the reset control terminal Reset. Specifically... Figure 2 For example, the first reset unit 15 includes: a ninth transistor T9, the first electrode of the ninth transistor T9 is electrically connected to the first reset signal terminal Vref, the second electrode is electrically connected to the second node N2, and the control electrode is electrically connected to the reset control terminal Reset.

[0079] The second reset unit 16 is electrically connected to the reset control terminal Reset, the fifth node N5, and the second reset signal terminal Vinit1, and is configured to reset the potential of the fifth node N5 using the signal of the second reset signal terminal Vinit1 in response to the signal of the reset control terminal Reset.

[0080] The circuit above may also include a storage capacitor Cst, which stores the potential of the fourth node N4 and is used to assist the compensation unit in completing threshold voltage compensation.

[0081] To reduce leakage current in the pixel circuit 10, in a preferred embodiment of this application, the fifth transistor T5, electrically connected to one terminal of the storage capacitor Cst, is a metal-oxide-semiconductor transistor (IGZO), and the fourth transistor T4, seventh transistor T7, and eighth transistor T8 located on the driving branch are low-temperature polysilicon transistors (LTPS). This utilizes the low leakage current characteristic of IGZO to reduce power consumption and eliminates the need for an excessively high refresh rate to maintain the voltage value stored on the capacitor when displaying static images. Furthermore, it is preferable that the sixth transistor T6 is a dual-gate transistor. Dual-gate transistors have low leakage current, preventing low voltage at the third node N3 during low grayscale display and preventing current backflow from Vdata to the third node N3.

[0082] Specifically, continue to refer to Figure 1 As shown in the embodiments of this application, each pixel circuit 10 drives a light-emitting unit D to emit light, and at the same time, each pixel circuit 10 corresponds to a single optical sensing channel 20 for sensing light signals to perform fingerprint recognition.

[0083] Specifically, the optical sensing circuit 20 includes a setting unit 21, an optical sensing unit 22, and a sensing unit 23.

[0084] Reference Figure 1 As shown, the setting unit 21 is electrically connected to the first power signal terminal VDC, the common control terminal CTL, and the first node N1, and is configured to set the first node N1 in response to the signal of the common control terminal CTL.

[0085] Specifically, continue to refer to Figure 2 As shown, the setting unit 21 includes a first transistor T1. The first electrode of the first transistor T1 is electrically connected to the first power supply signal terminal VDC, the second electrode is electrically connected to the first node N1, and the control electrode is electrically connected to the light emission control terminal EM. When the level of the light emission control terminal EM is an effective level, the signal level of the first power supply signal terminal VDC is set to the first node N1.

[0086] In this embodiment, where the photosensitive circuit and the pixel circuit share a common light-emitting control terminal, the light-emitting unit of the pixel circuit is used as the light source for photosensitive sensing and to control the sensing duration of the photosensitive circuit, taking advantage of the characteristic of the light-emitting control terminal to control the light-emitting duration. Furthermore, the light-emitting control signal has a long pulse width; using this signal as the control signal for the set unit provides a longer set time for the photosensitive circuit, ensuring the accuracy of the potential of the first node N1 and improving the photosensitive accuracy of the photosensitive circuit.

[0087] Reference Figure 1 As shown, the optical sensing unit 22 is electrically connected to the first node N1 and the second power signal terminal VCC, and writes the photoelectric conversion level to the first node N1 in response to the received optical signal.

[0088] Specifically, continue to refer to Figure 2 As shown, the optical sensing unit 22 includes a photoelectric sensor PD and a first capacitor C1. The first terminal of the photoelectric sensor PD is electrically connected to the second power signal terminal VCC, and the second terminal is electrically connected to the first node N1. The first terminal of the first capacitor C1 is electrically connected to the second power signal terminal VCC, and the second terminal is electrically connected to the first node N1. When the photoelectric sensor PD receives an optical signal, it performs a corresponding photoelectric conversion process based on the signal strength of the received optical signal to generate an electrical signal, which is then written to the first node N1 to indicate the photoelectric conversion level. Specifically, in this embodiment, by providing the first capacitor C1 connected across the two ends of the photoelectric sensor PD, its storage characteristics can be used to stabilize the potential of the first node N1.

[0089] Additionally, although not shown in this stage, the array substrate includes a driving circuit layer disposed on the substrate, and the pixel circuit 10 and photoelectric sensing circuit 20 are disposed in the driving circuit layer. Therefore, the driving circuit layer includes an active layer constituting a transistor, and the photoelectric sensor PD is disposed on the same layer as the active layer.

[0090] Reference Figure 1 As shown, the sensing unit 23 is electrically connected to the first node N1, the third power signal terminal VDD, the sensing control terminal SW_SEN, and the sensing terminal Vsensor. It is configured to generate a sensing current in response to the potential of the first node N1 and output the sensing current to the sensing terminal Vsensor in response to the signal of the sensing control terminal SW_SEN to complete the fingerprint sensing and recognition.

[0091] Specifically, continue to refer to Figure 2As shown, the sensing unit 23 includes a second transistor T2 and a third transistor T3. The first electrode of the second transistor T2 is electrically connected to the third power supply signal terminal VDD, and the second electrode is electrically connected to the first electrode of the third transistor T3. The control electrode is electrically connected to the first node N1. The second electrode of the third transistor T3 is electrically connected to the sensing terminal Vsensor, and the control electrode is electrically connected to the sensing control terminal SW_SEN. In the embodiments of this application, the conduction state of the second transistor T2 is controlled by the potential of the first node N1, thereby controlling the magnitude of the sensing current in the path of the sensing unit 23. That is, the second transistor T2 and the first transistor T1 are not turned on simultaneously. When the first transistor T1 is turned on and sets the first node N1, the second transistor T2 is turned off. When the optical sensing unit 22 receives the optical signal and writes the photoelectric conversion level to the first node N1, the second transistor T2 is turned on based on the potential of the first node N1 at this time, and the on state of the second transistor T2 is controlled based on this potential, thereby generating a corresponding sensing current in the branch of the sensing unit 23 according to its amplification characteristics, so that the sensing terminal can receive the sensing current and output the sensing signal. It is worth noting that in this embodiment, the sensing signal is read out by turning on the third crystal T3. That is, in response to the sensing control terminal SW_SEN connected to the control electrode of the third transistor T3 receiving a valid level signal, the sensing terminal Vsensor is controlled to read the sensing signal on the branch of the sensing unit 23.

[0092] More preferably, in the embodiments of this application, the first transistor T1 and the third transistor T3 are metal-oxide transistors (IGZO), and the second transistor T2 is a low-temperature polysilicon transistor (LTPS). The purpose of doing so is to improve the sensing accuracy of the sensing unit by replacing the non-sensing transistor with IGZO and taking advantage of the low leakage current of IGZO.

[0093] The above setup, by configuring a photosensitive circuit 20 corresponding one-to-one with the pixel circuit 10 and sharing a common light-emitting control terminal EM, utilizes the light-emitting unit D driven by the pixel circuit 10 as the light source for the photosensitive unit 20. During the stage where the light-emitting unit is driven to emit light by the light-emitting control terminal EM, the fingerprint receives the light and reflects it to the photosensitive circuit 20. The photoelectric sensor PD performs photoelectric conversion and writes the photoelectric conversion voltage into the first node N1 to control the sensing unit 23 to generate a sensing signal, which is output through the sensing terminal Vsensor. In other words, through the above setup, the signal from the shared light-emitting control terminal EM, through the light-emitting control of the light-emitting unit D, provides a sensing light source for the photosensitive circuit 20 and realizes the sensing function. Furthermore, by sharing a signal line, the structure and control principle are simple, thus realizing full-screen fingerprint recognition function with a simple circuit structure. In addition, by using the function of controlling the light-emitting duration through the light-emitting control terminal EM, the fingerprint recognition duration is also controlled, thereby adjusting the fingerprint recognition time and improving fingerprint detection accuracy.

[0094] To further understand the above functions, and to further combine them... Figure 3 The timing diagram shown details the method for driving the array substrate, which includes the pixel circuit 10 and the light sensing circuit 20.

[0095] Reference Figure 3 As shown, a complete driving process of the optical sensing circuit 20 can be divided into a reset circuit stage and a data reading stage. The data reading stage of the optical sensing circuit 20 is within the light-emitting stage of the pixel circuit 10. That is, when the light-emitting unit D is driven to emit light, if the sensing control terminal SW_SEN is at an effective level, the sensing data can be read through the sensing terminal Vsensor. Therefore, because the light-emitting control terminal EM is shared, the various stages of the two circuits are interconnected. The timing description of the two circuits is described below in conjunction with the overall process of the two circuits. In addition, to facilitate the illustration of the influence of the signal of the light-emitting control terminal EM on the pixel circuit 10 and the optical sensing circuit 20, the timing of the two light-emitting control terminals is shown in the figure for different circuit modules. The two are essentially the same and will not be explained further below.

[0096] It should be noted that, Figure 3 The timing diagram shown is a timing diagram of the array substrate in a display panel based on the preferred example of LPTO technology. That is, the first transistor T1, the third transistor T3, and the fifth transistor T5 are IGZO and are N-type transistors, while the other transistors are LTPS and are P-type transistors.

[0097] Specifically, in the first stage (reset circuit stage), the light emission control terminal EM is at a high level, and only the first transistor T1 of the setting unit 21 in the photosensitive circuit is turned on, setting the first node N1 through the potential of the first power supply signal terminal VDC.

[0098] Simultaneously, during this stage, the seventh transistor T7 and the eighth transistor T8 in the light-emitting control unit 11 of the pixel circuit 10 are turned off, and no light-emitting path is formed. However, during this stage, the reset control terminal Reset is connected to a low-level signal, and the ninth transistor T9 in the first reset unit 15 and the tenth transistor T10 in the second reset unit 16 are turned on. The second node is reset using the first reset signal terminal Vref, and the fifth node N5 (i.e., the anode of the light-emitting unit D) is reset using the second reset signal terminal Vinit1.

[0099] Furthermore, in the first stage, when the compensation control terminal Gaten is high and the row scan signal terminal Gate is low, the sixth transistor T6, the fourth transistor T4, and the fifth transistor T5 are all turned on, while the other transistors are turned off. Data is written to the data signal terminal Vdata and charged to the fourth node N4 via the fourth transistor T4 and the fifth transistor T5 until it reaches Vdata + Vth (the voltage is indicated by the signal terminal markings for clarity). At this time, the voltage stored in the storage capacitor Cst is Vdata + Vth - VDD, and the voltage at the third node is Vdata.

[0100] In the second stage (i.e., the data reading stage), the light emission control terminal EM goes low, and in this stage, the pixel circuit 10 controls the light emission unit D to emit light.

[0101] For the photosensitive circuit 20, the light emitted by the light-emitting unit D is emitted onto the surface of the display panel and reflected back to the photosensitive unit. The photoelectric sensor PD receives the light signal and performs photoelectric conversion, writing the photoelectric conversion level into the first node N1 and storing it in the first capacitor C1 to stabilize the potential of the first node N1. In response to the potential change of the first node N1, the second transistor T2 turns on, and based on the magnitude of the photoelectric conversion level, the second transistor T2 amplifies and generates a corresponding sensing current Ids. Simultaneously, in response to the sensing control terminal SW_SEN being high, the third transistor T3 turns on, and the sensing terminal Vsensor reads the sensing signal to complete fingerprint recognition.

[0102] Specifically, in the light-emitting section of pixel circuit 10, during this stage, transistors T4, T7, and T8 are turned on, while the other transistors are turned off. The potential of node N4 remains Vdata + Vth due to the storage capacitor Cst, while the potential of node N2 is VDD. The gate-source voltage of transistor T4 is Vgs = Vdata + Vth - VDD, and the driving current Ids flowing through the light-emitting unit D is K(Vgs - Vth). 2 =K(Vdata+Vth-VDD-Vth) 2 =K(Vdata-VDD) 2 As can be seen, after the compensation unit, the driving current is independent of the threshold voltage of the fourth transistor T4, thus achieving threshold compensation for the fourth transistor T4.

[0103] Although the figure only shows a long low-level light emission phase of the light emission control terminal EM, this application is not intended to be limiting. Those skilled in the art should understand that in practical applications, the light emission control terminal EM can include multiple light emission phases. The sum of the times of these light emission phases determines the total light emission duration of the light emission unit in one light emission phase. Correspondingly, as long as a valid sensing control terminal signal is given within each corresponding light emission duration, each sensing signal reading can be completed. That is, the sensing time is adjusted by using the time of the light emission control terminal EM, thereby improving the fingerprint sensing accuracy.

[0104] Corresponding to the aforementioned embodiments that use the light-emitting control terminal EM as the shared control terminal for the setting unit and the pixel circuit, another embodiment of this application uses the line scanning signal terminal as the shared control terminal, such as... Figure 6 As shown, the set unit sets the first node in response to the signal from the row scan signal terminal Gate. Those skilled in the art will understand that this embodiment can be used in conjunction with other embodiments in this application; for the sake of brevity, further details are omitted here.

[0105] Corresponding to the aforementioned embodiment that uses the light-emitting control terminal EM as the shared control terminal for the setting unit and the pixel circuit, another embodiment of this application uses the reset control terminal as the shared control terminal, such as... Figure 7 As shown, the set unit sets the first node in response to the Reset signal from the Reset control terminal. Those skilled in the art will understand that this embodiment can be used in conjunction with other embodiments in this application; for the sake of brevity, further details are omitted here.

[0106] By sharing a signal from a certain signal terminal with the pixel circuit as the control signal for the light sensor circuit's setting unit, the fingerprint recognition function in different working modes can be realized on the entire screen, while greatly simplifying the wiring and making the circuit structure layout simple.

[0107] Corresponding to the array substrate, embodiments of this application also provide a driving method for driving the array substrate, including:

[0108] In the first stage, the setting unit sets the first node in response to the signal at the light-emitting control terminal being at the first level.

[0109] In the second stage, the light-emitting control unit responds to the signal from the light-emitting control terminal by controlling the light-emitting unit to emit light at the second level, and the light-sensing unit responds to the received light by writing the photoelectric conversion level to the first node and using the potential of the first node to control the sensing unit to output the sensing current to the sensing terminal when the sensing control terminal receives an effective level.

[0110] It should be noted that the specific process has been described in detail in the description of the specific functions of the array substrate embodiment above, and will not be repeated here.

[0111] In this embodiment, by sharing the signal of the light-emitting control terminal as the control signal of the setting unit, the full-screen fingerprint recognition function can be realized. By utilizing the characteristic of the light-emitting control terminal to control the light-emitting duration, the light-emitting unit of the pixel circuit is used as the light source of the light sensor and is used to control the sensing duration of the light sensor circuit, thus achieving a high-precision fingerprint sensing effect.

[0112] Based on the same inventive concept, referring to Figure 4 and Figure 5 As shown, embodiments of this application also provide a display panel, including:

[0113] The array substrate described in the above embodiments;

[0114] A light-emitting unit layer formed on an array substrate, the light-emitting unit layer comprising multiple light-emitting units, and

[0115] A color filter layer is formed on the light-emitting unit layer. The color filter layer includes a black matrix and color filters disposed in front of the black matrix. Each color filter corresponds to one light-emitting unit.

[0116] Each pixel circuit drives a light-emitting unit to emit light, and the orthographic projection of the photoelectric sensor in each light-sensing unit onto the array substrate falls within the orthographic projection of the color filter of the corresponding light-emitting unit onto the array substrate.

[0117] Specifically, refer to Figure 4 As shown, the array substrate includes a driving circuit layer 102 formed on the substrate 101. The pixel circuit 10 and the photosensitive circuit 20 are disposed in the driving circuit layer 102. The figure shows a photoelectric sensor 112, which is disposed with the active layer coating in the driving circuit layer. When sensing a fingerprint, it is used to receive the light reflected from the peaks and troughs of the finger. By controlling the conduction current of the second transistor T2 through different photoelectric conversion voltage values, different sensing information is obtained. After the sensing end Vsensor collects the sensing information, it is transmitted to the corresponding fingerprint sensing chip for specific calculation to obtain the fingerprint recognition result.

[0118] Continue to refer to Figure 4 As shown, a light-emitting unit layer 103 is located on the driving circuit layer, where the anode 113 of the light-emitting unit is shown. The light-emitting layer and cathode are omitted in the figure, and the light-emitting unit is indicated by dashed lines as the light source of the photoelectric sensor 112 and emits light. In addition, a color filter layer 104 is located on the light-emitting unit layer 103. The color filter layer 104 includes a black matrix 114 and color filters disposed between the black matrix 114. Each color filter corresponds to one light-emitting unit and its color is consistent with the color of the light to be emitted.

[0119] In addition, combined Figure 4 Each light-emitting unit corresponds to a photoelectric sensor, further referencing Figure 5 The layout (the black matrix is ​​omitted because the size of the black matrix is ​​very small, so the spacing between the color filters is extremely small and will not be explained further in this article) shows that the orthographic projection of the photoelectric sensor in each photosensitive unit onto the array substrate falls within the orthographic projection of the color filter of the corresponding light-emitting unit onto the array substrate. With this setting, the photoelectric sensor 112 can effectively receive and identify the light signal emitted by the light-emitting unit as a light source after being reflected by the peaks and troughs of the fingerprint, thereby improving the fingerprint sensing accuracy.

[0120] Additionally, it should be noted that the specific structure between the various membrane layers in this application is not intended to achieve [the desired effect]. Figure 4 The cross-sectional view is specifically defined, that is, for example, for the color filter layer 104, it is intended to illustrate the relative positional relationship between the layers and the relative positional relationship between the color filter 124 and the photoelectric sensor 112. As for the setting of the black matrix, it is only schematic. In order to achieve effective light reception during the actual fingerprint recognition process, the shape of the black matrix can be appropriately adjusted, which will not be elaborated here.

[0121] Since the array substrate included in the display panel provided in this application corresponds to the array substrate provided in the above-mentioned embodiments, the previous embodiments are also applicable to this embodiment, and will not be described in detail in this embodiment.

[0122] By providing a shared light-emitting control terminal for the light-emitting sensor circuit in the pixel circuit and using the shared signal of the light-emitting control terminal as the control signal for the set unit, full-screen fingerprint recognition can be achieved. Furthermore, by utilizing the light-emitting control terminal's ability to control the light-emitting duration, the light-emitting unit of the pixel circuit is used as the light source for the light sensor and to control the sensing duration of the light-emitting circuit, achieving high-precision fingerprint sensing. The one-to-one correspondence between the pixel circuit and the light-emitting sensor circuit enables in-screen integrated full-screen fingerprint recognition, and the shared circuitry simplifies the circuit layout, making it suitable for a wide range of applications.

[0123] Based on the same inventive concept, embodiments of this application also provide a display device, including the display panel described in the above embodiments.

[0124] Since the display panel included in the display device provided in this application corresponds to the display panel provided in the above-mentioned embodiments, the previous embodiments are also applicable to this embodiment, and will not be described in detail in this embodiment.

[0125] In this embodiment, the display device can be any product or component with display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, in-vehicle display, digital photo frame or navigator. By loading the above display panel, full-screen fingerprint recognition integrated in the screen can be realized, with high recognition accuracy and simple process.

[0126] This application addresses existing problems by providing an array substrate and its driving method, a display panel, and a display device. By setting up photosensitive circuits corresponding one-to-one with pixel circuits, and electrically connecting the setting unit of the photosensitive circuit to the light-emitting control terminal of the pixel circuit, the signal from the light-emitting control terminal is shared as the control signal for the setting unit. This enables full-screen fingerprint recognition. Furthermore, by utilizing the light-emitting control terminal's ability to control the light-emitting duration, the light-emitting unit of the pixel circuit is used as the light source for photosensitive sensing and to control the sensing duration of the photosensitive circuit. Sharing this signal terminal also greatly simplifies wiring while maintaining full-screen fingerprint recognition functionality, resulting in a simple circuit structure layout and broad application prospects.

[0127] Obviously, the above embodiments of this application are merely examples for clearly illustrating this application, and are not intended to limit the implementation of this application. For those skilled in the art, other variations or modifications can be made based on the above description. It is impossible to exhaustively list all implementation methods here. Any obvious variations or modifications derived from the technical solutions of this application are still within the protection scope of this application.

Claims

1. An array substrate, characterized in that, include: The system includes pixel circuits and corresponding optical sensor circuits, each with a shared control terminal for a common control signal. The pixel circuit includes: The light-emitting control unit is configured to control the light-emitting unit to emit light in response to a signal from the light-emitting control terminal; The optical sensor circuit includes: A setting unit is electrically connected to a first power signal terminal, a common control terminal, and a first node, and is configured to set the first node in response to a signal from the common control terminal. The optical sensing unit is electrically connected to the first node and the second power signal terminal, and writes a photoelectric conversion level to the first node in response to the received optical signal; and The sensing unit is electrically connected to the first node, the third power signal terminal, the sensing control terminal, and the sensing terminal, and is configured to generate a sensing current in response to the potential of the first node and output the sensing current to the sensing terminal in response to the signal of the sensing control terminal.

2. The array substrate according to claim 1, characterized in that, The optical sensing unit includes: a photoelectric sensor and a first capacitor, wherein... The first end of the photoelectric sensor is electrically connected to the second power signal terminal, and the second end is electrically connected to the first node. The first terminal of the first capacitor is electrically connected to the second power signal terminal, and the second terminal is electrically connected to the first node.

3. The array substrate according to claim 2, characterized in that, include: A driving circuit layer disposed on a substrate, the driving circuit layer including an active layer. The photoelectric sensor is disposed on the same layer as the active layer.

4. The array substrate according to claim 2, characterized in that, in, The setting unit includes: a first transistor, wherein a first electrode of the first transistor is electrically connected to the first power signal terminal, a second electrode is electrically connected to the first node, and a control electrode is electrically connected to the common control terminal. The sensing unit includes a second transistor and a third transistor. The first electrode of the second transistor is electrically connected to the third power signal terminal, the second electrode is electrically connected to the first electrode of the third transistor, and the control electrode is electrically connected to the first node. The second electrode of the third transistor is electrically connected to the sensing terminal, and the control electrode is electrically connected to the sensing control terminal.

5. The array substrate according to claim 1, characterized in that, The pixel circuit further includes: a driving unit, a compensation unit, a data input unit, a first reset unit, and a second reset unit, wherein... The driving unit is electrically connected to the second node, the third node, and the fourth node, and is configured to control the driving current for driving the light-emitting unit to emit light in response to a signal from the fourth node. The compensation unit is electrically connected to the compensation control terminal, the second node, and the fourth node, and is configured to perform threshold compensation on the driving unit in response to a signal from the compensation control terminal. The data input unit is electrically connected to the data signal terminal, the row scan signal terminal, and the third node, and is configured to write the data signal from the data signal terminal to the third node in response to a signal from the row scan signal terminal. The first reset unit is electrically connected to a reset control terminal, the second node, and a first reset signal terminal, and is configured to reset the potential of the second node using the signal from the first reset signal terminal in response to a signal from the reset control terminal. The second reset unit is electrically connected to the reset control terminal, the fifth node, and the second reset signal terminal, and is configured to reset the potential of the fifth node in response to a signal from the reset control terminal using a signal from the second reset signal terminal.

6. The array substrate according to claim 5, characterized in that, in, The driving unit includes a fourth transistor, wherein the first electrode of the fourth transistor is electrically connected to the second node, the second electrode is electrically connected to the third node, and the control electrode is electrically connected to the fourth node. The compensation unit includes a fifth transistor, wherein the first electrode of the fifth transistor is electrically connected to the fourth node, the second electrode is electrically connected to the second node, and the control electrode is electrically connected to the compensation control terminal. The data input unit includes a sixth transistor, wherein the first electrode of the sixth transistor is electrically connected to the data signal terminal, the second electrode is electrically connected to the third node, and the control electrode is electrically connected to the row scan signal terminal. The light-emitting control unit includes a seventh transistor and an eighth transistor. The first electrode of the seventh transistor is electrically connected to the third power signal terminal, the second electrode is electrically connected to the second node, and the control electrode is electrically connected to the light-emitting control terminal. The first electrode of the eighth transistor is electrically connected to the third node, the second electrode is electrically connected to the fifth node, and the control electrode is electrically connected to the light-emitting control terminal. The first reset unit includes a ninth transistor, wherein the first electrode of the ninth transistor is electrically connected to the first reset signal terminal, the second electrode is electrically connected to the second node, and the control electrode is electrically connected to the reset control terminal. The second reset unit includes a tenth transistor, wherein the first electrode of the tenth transistor is electrically connected to the second reset signal terminal, the second electrode is electrically connected to the fifth node, and the control electrode is electrically connected to the reset control terminal.

7. The array substrate according to claim 5, characterized in that, The light emission control terminal of the pixel circuit serves as the common control terminal, and the setting unit sets the first node in response to the signal from the light emission control terminal.

8. The array substrate according to claim 5, characterized in that, The reset control terminal of the pixel circuit serves as the common control terminal, and the setting unit sets the first node in response to the signal from the reset control terminal.

9. The array substrate according to claim 5, characterized in that, The row scanning signal terminal of the pixel circuit serves as the common control terminal, and the setting unit sets the first node in response to the signal from the row scanning signal terminal.

10. The array substrate according to claim 4, characterized in that, The first transistor and the third transistor are metal-oxide transistors, and the second transistor is a low-temperature polycrystalline silicon transistor.

11. The array substrate according to claim 6, characterized in that, The fifth transistor is a metal-oxide transistor, and the fourth, seventh, and eighth transistors are low-temperature polycrystalline silicon transistors.

12. A driving method for an array substrate according to any one of claims 1-11, characterized in that, include: In the first stage, the setting unit sets the first node in response to the signal at the common control terminal being a first level. In the second stage, the light-emitting control unit responds to the signal of the light-emitting control terminal by controlling the light-emitting unit to emit light at a second level, and the light-sensing unit responds to the received light by writing a photoelectric conversion level to the first node and using the potential of the first node to control the sensing unit to output the sensing current to the sensing terminal when the sensing control terminal receives a valid level.

13. A display panel, characterized in that, include: The array substrate according to any one of claims 1-11, A light-emitting unit layer formed on the array substrate, the light-emitting unit layer comprising a plurality of light-emitting units, and A color filter layer is formed on the light-emitting unit layer. The color filter layer includes a black matrix and color filters disposed in front of the black matrix. Each color filter corresponds to one light-emitting unit. Each pixel circuit drives one light-emitting unit to emit light, and the orthographic projection of the photoelectric sensor in each light-sensing unit onto the array substrate falls within the orthographic projection of the color filter of the corresponding light-emitting unit onto the array substrate.

14. A display device, characterized in that, include: The display panel as claimed in claim 13.

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