A light-emitting diode with self-constant current function and its fabrication method

Abstract

This invention relates to a light-emitting diode (LED) with self-constant current function and its fabrication method, belonging to the field of optoelectronics. It includes a P-type single-crystal silicon substrate, a constant-current JFET chip on the substrate, and an LED chip. The constant-current JFET chip includes an epitaxial layer, an oxide / insulating layer, and a P-type single-crystal silicon substrate. + Separation wall, P + gate area and N + The LED chip includes a drain-source region, a current spreading layer, a P-type ohmic contact layer, a multiple quantum well layer, and an N-type ohmic contact layer. The wafer also has P and N electrodes for the JFET, and P and N electrodes for the LED, with the N electrodes of the JFET and the LED connected together to form a wire bonding electrode. This invention simultaneously functions as an LED chip and a constant current JFET chip, completing the chip manufacturing process in a single step. It is applicable to various substrates during packaging, requiring only a single die bonding and wire bonding operation, thus significantly reducing production costs and simplifying the packaging process.

Description

Technical Field

[0001] This invention relates to a light-emitting diode with self-constant current function and its fabrication method, belonging to the field of optoelectronic technology. Background Technology

[0002] As one of the most valued light source technologies, LEDs are characterized by their small size, low current and low voltage driving characteristics, and numerous other advantages such as robust structure, strong impact and shock resistance, and ultra-long lifespan.

[0003] Since LED devices require constant current driving during use, they need to be used in conjunction with constant current chips. Generally, pre-packaged constant current chips are used, or the LED chip and constant current JFET chip are packaged in the same bracket. Both of these methods require the LED chip and constant current chip to be manufactured and packaged separately. Downstream packaging plants then perform die bonding and wire bonding to package them together, resulting in complex packaging processes and the need for large-size brackets during packaging. Summary of the Invention

[0004] To address the aforementioned issues, this invention proposes a light-emitting diode with self-constant current function and its fabrication method. This chip simultaneously functions as an LED chip and a constant current JFET chip, completing the chip process in a single step instead of the previously separate one. Furthermore, it is compatible with various substrates during packaging and can be completed in a single die bonding and wire bonding process, thus significantly reducing production costs and simplifying the packaging process.

[0005] The present invention adopts the following technical solution:

[0006] A light-emitting diode with self-constant current function includes a P-type monocrystalline silicon substrate and a constant current JFET chip and an LED chip located on the P-type monocrystalline silicon substrate;

[0007] The constant current JFET chip includes a JFET epitaxial layer, an oxide / insulating layer, and a P layer. + Separation wall, P + gate area and N + Drain-source region; the LED chip includes a bonding layer, a current spreading layer, a P-type ohmic contact layer, a multiple quantum well layer, and an N-type ohmic contact layer;

[0008] The P-type ohmic contact layer and the N-type ohmic contact layer are respectively provided with P-type ohmic contact metal and N-type ohmic contact metal to form a wafer. A passivation layer is grown on the upper surface of the wafer. The wafer is also provided with the P electrode of JEFT, the N electrode of JEFT, the P electrode of LED and the N electrode of LED, wherein the N electrode of JEFT and the N electrode of LED are connected together to form a bonding wire electrode.

[0009] A method for fabricating the above-mentioned light-emitting diode with self-constant current function includes the following steps:

[0010] (1) A JEFT epitaxial layer is grown on a P-type single crystal silicon substrate;

[0011] (2) A layer of oxide is thermally grown on the JEFT epitaxial layer, and then P is formed by photolithography and etching. + An isolation window is created by etching away the oxide layer to expose the underlying JEFT epitaxial layer; hence the name "window." Its size is determined by the device and is not specified here. + The function of the isolation window is to form an ion implantation window;

[0012] (3) In P + The isolation window is formed by ion implantation to create P + The wall of separation, P + The function of the isolation wall is to confine the depletion layer within this range, with a surface concentration of 1e18-1e19 cm⁻¹. -3 The junction depth is greater than the thickness of the JEFT epitaxial layer. The annealing temperature is 1000-1150℃ and the time is 1-2 hours. Then all oxide layers are removed.

[0013] (4) A layer of oxide is thermally grown on the upper surface of the device obtained in step (3), and then P is formed by photolithography and etching. + Fence window;

[0014] (5) In P + The gate window is formed by ion implantation to create P + The gate region has a surface concentration of 1e18-1e19 cm⁻¹ -3 The junction depth is 2.5-3.5μm, the annealing temperature is 1000-1150℃, the time is 3.5-4.5h, and then the oxide layer is completely removed;

[0015] (6) A second oxide layer is thermally grown on the upper surface of the device obtained in step (5), and then N is formed by photolithography and etching. + Source / drain area window;

[0016] (7) In N + The source / drain region window is formed by ion implantation to create N + The source / drain region has a surface concentration of 1e19-1e20 cm⁻¹ -3 The junction depth is 0.1-0.3μm, the annealing temperature is 1000-1150℃, the time is 3.5-4.5h, and then the oxide layer is completely removed;

[0017] (8) An insulating layer is deposited on the surface of the device obtained in step (7) by PECVD (this insulating layer and the oxide layer mentioned above are both made of SiO2, but the growth method is different);

[0018] (9) A current spreading layer is deposited on the LED epitaxial wafer, and then the LED epitaxial wafer is bonded to the device obtained in step (8) at a temperature of 300-400℃, a time of 40-50 minutes, and a pressure of 800kg through a bonding process, so that the current spreading layer and the insulating layer of the LED chip are bonded together. Then the n-GaAs substrate of the bonded LED epitaxial wafer is removed (the substrate can be removed directly by chemical reaction, which is a conventional process).

[0019] (10) Using photolithography and ICP processes, the area outside the LED chip is etched to the wafer surface of step (7) to expose the JFET device surface. Specifically, the insulating layer is etched away to expose the JFET epitaxial layer and P. + Separation wall, P + gate area and N + Source / leakage zone;

[0020] (11) The other side of the LED chip is etched to the P-type ohmic contact layer again through photolithography and ICP process;

[0021] (12) P-type ohmic contact metal and N-type ohmic contact metal of LED chip are formed by photolithography, evaporation and stripping respectively. The P-type ohmic contact metal is Au / AuZn / Au, the alloying temperature is 400-600℃, 8-12min, and the N-type ohmic contact is Au / AuGeNi / Au, the alloying temperature is 300-400℃, 8-12min.

[0022] (13) A SiN passivation layer is grown on the wafer surface formed in step (12) by PECVD;

[0023] (14) The P electrode of JEFT, the N electrode of JEFT, the P electrode of LED and the N electrode of LED are formed again by photolithography, evaporation and stripping, wherein the N electrode of LED and the N electrode of JFET are connected, and the electrode material is Al.

[0024] (15) Grind the wafer obtained in step (4) to keep the thickness of the entire chip between 120-180μm, and obtain the light-emitting diode by laser scribing and diamond knife cutting.

[0025] Preferably, in step (1), the doping concentration of the P-type single-crystal silicon substrate is 1e15-8e15cm. -3 The thickness of the JEFT epitaxial layer is 5-10 μm, the resistivity is 4-8 Ω·cm, and the JEFT epitaxial layer is polycrystalline silicon.

[0026] Preferably, in step (2), the oxide layer is SiO2 formed by thermal oxidation at a production temperature of 750-1100℃ and the thickness of the oxide layer is 300-800 angstroms.

[0027] Preferably, in steps (3), (5), and (7), the oxide layer is removed using HF acid or BOE solution.

[0028] Preferably, the oxide layer thickness in step (4) is 600 angstroms and the oxide layer thickness in step (6) is 300 angstroms. The difference in thickness is due to the difference in particle injection depth.

[0029] Preferably, the insulating layer in step (8) is SiO2 with a thickness of 1 μm;

[0030] Preferably, in step (9), the current spreading layer is ITO, ZnO or GZO, and the bonding layer in the bonding process uses insulating materials such as SiO2 or polymer.

[0031] Preferably, in step (9), a mixed solution of ammonia, hydrogen peroxide and water is used to remove the bonded n-GaAs substrate, and the volume ratio of ammonia, hydrogen peroxide and water in the mixed solution is 1:6:8.

[0032] Preferably, in step (13), the thickness of the SiN passivation layer is 3000 angstroms.

[0033] The light-emitting diode with self-constant current function obtained by this invention will operate under a constant current of 5mA when the input voltage is between 10-20V, without the need for additional constant current devices.

[0034] For any aspects not covered in this invention, please refer to existing technologies for manufacturing light-emitting diodes.

[0035] The beneficial effects of this invention are as follows:

[0036] 1) In the chip manufacturing process, the present invention integrates the constant current JFET chip structure and the LED chip structure on the same substrate, completing the chip that originally needed to be manufactured separately in one process. Moreover, it is applicable to various brackets during packaging and can be completed in one die bonding and wire bonding process, thus greatly reducing production costs and simplifying the packaging process.

[0037] 2) As can be seen from the principle of constant current JFET chips, when the input voltage varies within a certain range, its output current remains basically constant. Therefore, it can be used in series with LED chips, such as... Figure 8 As shown, a constant current power supply can be provided for the LED chip. In the chip manufacturing stage, this invention fabricates two types of chips on the same substrate using a specific process, and connects them in series during electrode deposition, as shown... Figure 9 As shown, the packaging effect is achieved at the chip level, thus simplifying the packaging process. Attached Figure Description

[0038] Figure 1This is a schematic diagram of the light-emitting diode structure with self-constant current function according to the present invention;

[0039] Figure 2 To complete P in this invention + A schematic diagram of the structure after the partition wall construction;

[0040] Figure 3 To complete P in this invention + A schematic diagram of the structure after the gate area process;

[0041] Figure 4 To complete N for this invention + A schematic diagram of the structure after the drain source region has undergone processing;

[0042] Figure 5 This is a schematic diagram of the structure of the substrate after the bonding process of the present invention has been completed and the substrate has been etched.

[0043] Figure 6 This is a schematic diagram of the structure of the JFET surface after ICP etching is completed according to the present invention;

[0044] Figure 7 This is a schematic diagram of the structure for fabricating the LED P and N ohmic contact metal according to the present invention.

[0045] Figure 8 This is a schematic diagram of the connection method for traditional light-emitting diodes;

[0046] Figure 9 This is a schematic diagram of the connection method of the light-emitting diode junction with self-constant current function according to the present invention;

[0047] Among them, 1-P type monocrystalline silicon substrate, 2-P type monocrystalline silicon substrate, 3-oxide layer / insulating layer, 4-P + Separation wall, 5-P + Gate area, 6-N + Drain-source region, 7-bonding layer, 8-current spread layer, 9-P-type ohmic contact layer, 10-multiple quantum well layer, 11-N-type ohmic contact layer, 12-N-type ohmic contact metal, 13-passivation layer, 14-P-type ohmic contact metal, 15-P electrode of JEFT, 16-P electrode of LED, 17-wire bonding electrode. Detailed implementation method:

[0048] To make the technical problems, technical solutions and advantages of the present invention clearer, a detailed description will be given below in conjunction with the accompanying drawings and specific embodiments. However, this description is not limited thereto. All aspects not described in detail in the present invention are based on conventional techniques in the field.

[0049] Example 1:

[0050] A light-emitting diode with self-constant current function, such as Figure 1As shown, it includes a P-type monocrystalline silicon substrate 1 and a constant current JFET chip and an LED chip located on the P-type monocrystalline silicon substrate;

[0051] The constant current JFET chip includes a JEFT epitaxial layer 2, an oxide / insulating layer 3, and a P-type epitaxial layer 4. + 4. P isolation wall + Gate 5 and N + Drain-source region 6; The LED chip includes a bonding layer 7, a current spreading layer 8, a P-type ohmic contact layer 9, a multiple quantum well layer 10, and an N-type ohmic contact layer 11;

[0052] P-type ohmic contact layer 9 and N-type ohmic contact layer 11 are respectively provided with P-type ohmic contact metal 14 and N-type ohmic contact metal 12 to form a wafer. A passivation layer 13 is grown on the upper surface of the wafer. The wafer is also provided with JEFT P electrode 15, JEFT N electrode, LED P electrode 16 and LED N electrode, wherein the JEFT N electrode and LED N electrode are connected together to form a bonding wire electrode 17.

[0053] Example 2:

[0054] A method for fabricating a light-emitting diode with self-constant current function, such as... Figure 1-7 As shown, it includes the following steps:

[0055] (1) A JEFT epitaxial layer is grown on a P-type single crystal silicon substrate. The thickness of the JEFT epitaxial layer is 5 μm and the resistivity is 4 Ω·cm.

[0056] (2) A layer of oxide is thermally grown on the JEFT epitaxial layer, and then P is formed by photolithography and etching. + An isolation window is created by etching away the oxide layer to expose the underlying JEFT epitaxial layer; hence the name "window." Its size is determined by the device and is not specified here. + The function of the isolation window is to form an ion implantation window;

[0057] The oxide layer is SiO2 formed by thermal oxidation at a temperature of 750-1100℃, and the thickness of the oxide layer is 800 angstroms.

[0058] (3) In P + The isolation window is formed by ion implantation to create P + The wall of separation, P + The function of the isolation wall is to confine the depletion layer within this area, where its surface concentration is 5e18cm. -3 The junction depth is 6 μm, the annealing temperature is 1100℃, the time is 100 min, and then the oxide layer is completely removed;

[0059] (4) A 600 angstrom oxide layer is thermally grown on the upper surface of the device obtained in step (3), and then P is formed by photolithography and etching. + Fence window;

[0060] (5) In P + The gate window is formed by ion implantation to create P + The gate region has a surface concentration of 7e18cm. -3 The junction depth is 3μm, the annealing temperature is 1100℃ and the time is 240min, and then the oxide layer is completely removed;

[0061] like Figure 1 As shown, P + The gate location is at two P + Between the four isolation walls, the gate region, source region, and drain region are the fixed structure of the JFET chip, which will not be described in detail here;

[0062] (6) A third oxide layer with a thickness of 300 angstroms is thermally grown on the upper surface of the device obtained in step (5), and then N is formed by photolithography and etching. + Source / drain area window;

[0063] (7) In N + The source / drain region window is formed by ion implantation to create N + The source / drain region has a surface concentration of 5e19cm. -3 The junction depth is 0.2 μm, the annealing temperature is 1100℃ and the time is 250 min, and then the oxide layer is completely removed;

[0064] (8) An insulating layer with a thickness of 1 μm is deposited on the surface of the device obtained in step (7) by PECVD (this insulating layer and the oxide layer mentioned above are both made of SiO2, but the growth method is different).

[0065] (9) An ITO current spreading layer is deposited on the LED epitaxial wafer. Then, the LED epitaxial wafer is bonded to the device obtained in step (8) at a temperature of 360°C, a time of 45 minutes, and a pressure of 800 kg, so that the current spreading layer and the insulating layer of the LED chip are bonded together. Then, the n-GaAs substrate of the bonded LED epitaxial wafer is removed. Specifically, a mixed solution of ammonia, hydrogen peroxide, and water can be used to remove the bonded n-GaAs substrate. The volume ratio of ammonia, hydrogen peroxide, and water in the mixed solution is 1:6:8.

[0066] (10) Using photolithography and ICP processes, the area outside the LED chip is etched to the wafer surface of step (7) to expose the JFET device surface. Specifically, the insulating layer is etched away to expose the JFET epitaxial layer and P. + Separation wall, P + gate area and N + Source / leakage zone;

[0067] (11) The other side of the LED chip is etched to the P-type ohmic contact layer again through photolithography and ICP process;

[0068] (12) P-type ohmic contact metal and N-type ohmic contact metal of LED chip are formed by photolithography, vapor deposition and stripping respectively. The P-type ohmic contact metal is Au / AuZn / Au, the alloy temperature is 500℃, 10min, and the N-type ohmic contact is Au / AuGeNi / Au, the alloy temperature is 350℃, 10min.

[0069] (13) A SiN passivation layer is grown on the wafer surface formed in step (12) by PECVD. The SiN passivation layer has a thickness of 3000 angstroms. Figure 1 As shown, the black area is the SiN passivation layer, and the discontinuous area is the contact area between the metal electrode and the epitaxial material.

[0070] (14) The P electrode of JEFT, the N electrode of JEFT, the P electrode of LED and the N electrode of LED are formed again by photolithography, evaporation and stripping, wherein the N electrode of LED and the N electrode of JFET are connected, and the electrode material is Al.

[0071] (15) Grind the wafer obtained in step (4) to keep the thickness of the entire chip at 150 μm, and obtain the light-emitting diode by laser scribing and diamond knife cutting.

[0072] The light-emitting diode with self-constant current function obtained by this invention will operate under a constant current of 5mA when the input voltage is between 10-20V, without the need for additional constant current devices. The constant current working principle is determined by the characteristics of the constant current JFET chip, which is comparable to existing technologies.

[0073] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method for fabricating a light-emitting diode with self-constant current function, characterized in that, The light-emitting diode includes a P-type monocrystalline silicon substrate and a constant current JFET chip and an LED chip located on the P-type monocrystalline silicon substrate; The constant current JFET chip includes a JFET epitaxial layer, an oxide / insulating layer, and a P layer. + Separation wall, P + gate area and N + Drain-source region; the LED chip includes a bonding layer, a current spreading layer, a P-type ohmic contact layer, a multiple quantum well layer, and an N-type ohmic contact layer; The P-type ohmic contact layer and the N-type ohmic contact layer are respectively provided with P-type ohmic contact metal and N-type ohmic contact metal to form a wafer. A passivation layer is grown on the upper surface of the wafer. The wafer is also provided with the P electrode of JEFT, the N electrode of JEFT, the P electrode of LED and the N electrode of LED, wherein the N electrode of JEFT and the N electrode of LED are connected together to form a bonding wire electrode. The preparation method includes the following steps: (1) A JEFT epitaxial layer is grown on a P-type single-crystal silicon substrate; (2) A layer of oxide is thermally grown on the JEFT epitaxial layer, and then P is formed by photolithography and etching. + Isolation window; (3) In P + The isolation window is formed by ion implantation to create P + The isolation wall has a surface concentration of 1e18-1e19 cm⁻¹ -3 The junction depth is greater than the thickness of the JEFT epitaxial layer. The annealing temperature is 1000-1150℃ and the time is 1-2 hours. Then all oxide layers are removed. (4) An oxide layer is thermally grown on the upper surface of the device obtained in step (3), and then P is formed by photolithography and etching. + Fence window; (5) In P + The gate window is formed by ion implantation to create P + The gate region has a surface concentration of 1e18-1e19 cm⁻¹ -3 The junction depth is 2.5-3.5μm, the annealing temperature is 1000-1150℃, the time is 3.5-4.5h, and then the oxide layer is completely removed; (6) A second oxide layer is thermally grown on the upper surface of the device obtained in step (5), and then N is formed by photolithography and etching. + Source / drain area window; (7) In N + The source / drain region window is formed by ion implantation to create N + The source / drain region has a surface concentration of 1e19-1e20 cm⁻¹ -3 The junction depth is 0.1-0.3μm, the annealing temperature is 1000-1150℃, the time is 3.5-4.5h, and then the oxide layer is completely removed; (8) An insulating layer is deposited on the surface of the device obtained in step (7) by PECVD; (9) A current spreading layer is deposited on the LED epitaxial wafer, and then the LED epitaxial wafer is bonded to the device obtained in step (8) at a temperature of 300-400℃, a time of 40-50 minutes, and a pressure of 800kg by a bonding process, so that the current spreading layer and the insulating layer of the LED chip are bonded together, and then the n-GaAs substrate of the bonded LED epitaxial wafer is removed. (10) Using photolithography and ICP processes, the area outside the LED chip is etched to the wafer surface of step (7) to expose the JFET device surface. Specifically, the insulating layer is etched away to expose the JFET epitaxial layer and P. + Separation wall, P + gate area and N + Source / leakage zone; (11) The other side of the LED chip is etched to the P-type ohmic contact layer again by photolithography and ICP process; (12) P-type ohmic contact metal and N-type ohmic contact metal of LED chip are formed by photolithography, evaporation and stripping respectively. The P-type ohmic contact metal is Au / AuZn / Au, the alloying temperature is 400-600℃, 8-12min, and the N-type ohmic contact is Au / AuGeNi / Au, the alloying temperature is 300-400℃, 8-12min. (13) A SiN passivation layer is grown on the wafer surface formed in step (12) by PECVD; (14) The P electrode of JEFT, the N electrode of JEFT, the P electrode of LED and the N electrode of LED are formed again by photolithography, evaporation and stripping, wherein the N electrode of LED and the N electrode of JFET are connected, and the electrode material is Al. (15) Grind the wafer obtained in step (4) to keep the thickness of the entire chip between 120-180μm, and obtain the light-emitting diode by laser scribing and diamond knife cutting.

2. The method for fabricating a light-emitting diode with self-constant current function according to claim 1, characterized in that, In step (1), the doping concentration of the P-type single-crystal silicon substrate is 1e15-8e15cm. -3 The thickness of the JEFT epitaxial layer is 5-10 μm, the resistivity is 4-8 Ω·cm, and the JEFT epitaxial layer is polycrystalline silicon.

3. The method for fabricating a light-emitting diode with self-constant current function according to claim 2, characterized in that, In step (2), the oxide layer is SiO2 formed by thermal oxidation at a production temperature of 750-1100℃ and the thickness of the oxide layer is 300-800 angstroms.

4. The method for fabricating a light-emitting diode with self-constant current function according to claim 3, characterized in that, In steps (3), (5), and (7), the oxide layer is removed using HF acid or BOE solution.

5. The method for fabricating a light-emitting diode with self-constant current function according to claim 4, characterized in that, The oxide layer thickness in step (4) is 600 angstroms, and the oxide layer thickness in step (6) is 300 angstroms.

6. The method for fabricating a light-emitting diode with self-constant current function according to claim 5, characterized in that, The insulating layer in step (8) is SiO2 with a thickness of 1 μm.

7. The method for fabricating a light-emitting diode with self-constant current function according to claim 6, characterized in that, In step (9), the current spreading layer is ITO, ZnO or GZO, and the bonding layer in the bonding process is SiO2 or a polymer insulating material.

8. The method for fabricating a light-emitting diode with self-constant current function according to claim 7, characterized in that, In step (9), a mixed solution of ammonia, hydrogen peroxide and water is used to remove the bonded n-GaAs substrate. The volume ratio of ammonia, hydrogen peroxide and water in the mixed solution is 1:6:

8.

9. The method for fabricating a light-emitting diode with self-constant current function according to claim 8, characterized in that, In step (13), the thickness of the SiN passivation layer is 3000 angstroms.

Images