A hardware-implemented method and system for fast measurement of sparse impedance spectrum

Abstract

The application provides a hardware-implemented sparse impedance spectrum fast measurement method and system. The system comprises an excitation signal generation and gain module, an impedance voltage conversion and data acquisition module, a signal demodulation module, a data uploading module and a host computer. The excitation signal generation and gain module generates a multi-frequency excitation signal and applies the signal to the impedance to be measured. The impedance voltage conversion and data acquisition module converts the impedance to be measured into a voltage signal and then performs analog-digital conversion, and inputs the signal into the signal demodulation module. A rearrangement factor is selected through simulation, and the spectrum downsampling without frequency collision is realized in hardware. The result is transmitted to the host computer through the data uploading module. According to the known frequency, the amplitude and phase change of the impedance to be measured are recovered through one-time hash inverse mapping, and the fast measurement of the sparse impedance spectrum is realized. The application has the characteristics that the spectrum downsampling without frequency collision is realized through one-time signal rearrangement, the data storage and operation amount is greatly reduced, and the fast measurement of the impedance spectrum is realized.

Description

TECHNICAL FIELD

[0001] The application relates to a hardware-implemented method and system for rapidly measuring a sparse impedance spectrum. BACKGROUND

[0002] Impedance is an inherent property of circuit materials or electronic components and is a basic parameter associated with materials, components and circuits. In the actual industrial field, impedance is often used to characterize the electrical properties of materials, structural distribution and circuit performance. Impedance measurement technology is a method widely used to characterize the electrical properties of materials and components. In actual industrial applications, impedance measurement is the basis of many measurement technologies because impedance can reflect important information of the region of interest, such as temperature range, stress change, fluid velocity and dielectric constant distribution. For example, the impedance value can reflect the thermophysical properties of a calorimeter, the complex ratio of power supply impedance and load impedance can reflect the stability of three-phase alternating current, can be used to locate line faults, can be used for electrical parameter tomography, and can obtain the law of parameter distribution change with time or space in multiphase flow (Wang H X. Electrical tomography technology [J]. Automation and Instrumentation, 2017, 38(5): 1-6.). The Cole-Cole curve model used for oil and gas monitoring in geological exploration is also based on high-precision impedance measurement.

[0003] The method of impedance measurement is also progressing. Generally, the principle of impedance measurement is based on Ohm's law and the characteristics of alternating current, using alternating current to stimulate the measured resistance, which will change the amplitude and phase of the voltage in the circuit, so that the measured impedance can be measured by demodulating the changed voltage amplitude and phase. In the early stage, impedance measurement mainly used analog circuit demodulation, common methods mainly have bridge method, resonance method and network analysis method, etc. (Li Wenqiang, Huang Gang, Yang Lu. Research on large range full-automatic impedance measuring instrument [J]. Journal of Instrument and Approach, 2014, 35(4): 859-865.). In 1994, Yang published an article entitled "High frequency and high-resolution capacitance measuring circuit for process tomography" in IEE Proceedings-Circuits, Devices and Systems, Vol. 141, No. 3, pp. 215-219, using CMOS switch to develop a measurement circuit suitable for anti-interference under high frequency excitation alternating current, the measured signal is multiplied by the reference signal and then filtered by low-pass filter to realize the demodulation of signal amplitude and phase. In 2011, Chen published an article entitled "Design of Impedance Measuring Circuits Based on Phase-Sensitive Demodulation Technique" in IEEE Transactions on Instrumentation and Measurement, Vol. 60, No. 4, pp. 1276-1282, designed a measurement circuit for double-frequency sinusoidal signal, which can measure capacitance and resistance at the same time. The analog circuit demodulation method has been developed for a long time, with mature theoretical and practical experience, and high demodulation accuracy and wide measurement frequency range, but the circuit structure is relatively complex, the flexibility is limited, especially the demodulation speed is limited by the response time of analog low-pass filter, so digital signal demodulation method is more and more valued by scholars (Zhao Dechun, Ren Chaoshu, Sha Hong, et al. Error analysis of EIT high-precision digital demodulation method [J]. Journal of Instrument and Approach, 2010, 31(09): 1933-1938.).

[0004] The digital demodulation method is to demodulate the signal by means of digital signal processing, which can overcome the error caused by the non-ideal characteristics of the device in the analog demodulation method, has the advantages of high speed and high precision, simple operation, easy transmission, etc., and because of the programmability of digital signal, it can flexibly demodulate different sinusoidal signals. With the development of integrated circuits, digital demodulation methods are becoming mature, and common digital demodulation methods include fast Fourier transform method and orthogonal demodulation method, etc. (Yin W L, Wang B, Wang H X. Digital demodulation method based on half-cycle sampling in electromagnetic tomography [J]. Journal of Tianjin University, 2011, 44(12): 1118-1123.). These methods have high demodulation accuracy and reliability, and can effectively demodulate sinusoidal signals, extract signal information, and then realize analysis and processing. Although the digital demodulation method can demodulate the signal with high precision, it is constrained by the sampling theorem, and the measurement bandwidth is limited. At present, various digital demodulation methods are used in the field of impedance measurement, which can be selected and applied according to the actual measurement requirements.

[0005] The whole cycle digital demodulation method is a demodulation technique based on digital signal processing, which is based on the periodicity of the sampled signal and uses the whole sampling cycle to complete signal demodulation. This method mainly includes sampling, filtering, digital multiplication, whole cycle integration and demodulation output steps. Among them, the integration of the signal must be completed in the whole sampling cycle, which further improves the demodulation accuracy and reduces the demodulation noise, and has certain flexibility and adjustability. In 1992, Smith published an article entitled "Design of a phase-sensitive detector to maximize signal-to-noise ratio in the presence of Gaussian wideband noise" in Measurement Science and Technology, Vol. 3, No. 11, pp. 1054-1062. The article multiplies the sampled signal to be measured with the same frequency reference signal digitally and integrates it in the whole cycle, and realizes the demodulation of amplitude and phase in the DSP chip. In 2011, Cui published an article entitled "A high-performance digital system for electrical capacitance tomography" in Measurement Science and Technology, Vol. 22, No. 5. The article realizes the digital quadrature demodulation technology on the field-programmable gate array (FPGA) chip, and reduces the burden of high-speed data transmission by fully utilizing the high-speed operation capability of FPGA. However, the digital quadrature demodulation method needs to collect the whole signal cycle, which greatly limits the demodulation speed.

[0006] With the increasing requirement of demodulation speed, iterative demodulation method is more and more used. This method breaks through the speed bottleneck of the whole period demodulation method, which needs at least one complete signal period to calculate, and further improves the demodulation speed. In 2013, Xu published an article titled “A recursive least squares-based demodulator for electrical tomography” in Review of Scientific Instruments, Vol. 84, No. 4. In this article, an iterative demodulation algorithm is proposed, which uses the least squares method to realize impedance demodulation in one complete signal period. In 2014, Sun published an article titled “A high-speed electrical impedance measurement circuit based on information-filtering demodulation” in IEEE Transactions on Instrumentation and Measurement, Vol. 25, No. 7. In this article, a high-speed impedance measurement circuit is proposed, which uses an information filter to demodulate the result in one period and reduces the computational complexity and resource occupancy to some extent. The signal-to-noise ratio of the demodulation result is greater than 75 dB. In 2017, Sun published an article titled “Digital Recursive Demodulator Based on Kalman Filter” in IEEE Transactions on Instrumentation and Measurement, Vol. 66, No. 12, pp. 3138-3147. In this article, a recursive demodulation method based on Kalman filter is proposed, which further reduces the calculation time and resource consumption. When calculating the samples of an integer number of signal periods, the accuracy of this method is equivalent to that of the quadrature demodulation method.In 2018, Sun published an article entitled "A Recursive Demodulator for Real-Time Measurement of Multiple Sinusoids" in IEEE Sensors Journal, Vol. 18, No. 15, pages 6281-6289, which realized the demodulation of the amplitude and phase of multiple frequency sinusoidal signals by using a recursive demodulation method, and had high speed. However, the demodulation accuracy of this iterative demodulation algorithm is lower than that of the whole period demodulation algorithm when the number of sampling points is small, and when it is applied to the field of multiple frequency signal demodulation, the calculation amount increases exponentially with the number of frequencies, so it is necessary to study a demodulation method which can demodulate the amplitude and phase of multiple frequency signals with small calculation amount while ensuring the demodulation accuracy and speed.

[0007] Based on the above background, the present application provides a sparse impedance spectrum fast measurement method and system suitable for hardware implementation, which realizes frequency collision-free spectrum downsampling by selecting a rearrangement factor, thereby compressing large-dimensional signals to greatly reduce the calculation amount while ensuring accuracy, and using a non-iterative demodulation method to realize fast and high-precision demodulation of sinusoidal signals under random noise and specific frequency domain noise conditions. SUMMARY

[0008] The purpose of the present application is to provide a sparse impedance spectrum fast measurement method and system suitable for hardware implementation, which realizes frequency domain processing of sparse impedance signals at the hardware level, compresses the data dimension through hash mapping, reduces redundant data, reduces the calculation scale, and improves the time-frequency analysis efficiency. The overall system of the present application includes an excitation signal generation and gain module, an impedance voltage conversion and data acquisition module, a signal demodulation module, a data upload module, and a host computer. The excitation signal generation and gain module generates an initial multi-frequency signal through a direct digital frequency synthesizer, and uses a multi-stage operational amplifier to amplify the initial excitation signal. Then the excitation signal passes through the measured impedance, and the impedance voltage conversion and acquisition module retains the spectrum information of the measured impedance, and performs analog-to-digital conversion on the measured signal. Finally, the demodulation result is transmitted to the host computer through the data upload module, and the sparse impedance spectrum is finally recovered.

[0009] The present application provides a sparse impedance spectrum fast measurement method and system suitable for hardware implementation, which takes field programmable gate array (FPGA) as an example, including the following steps:

[0010] Step one, the excitation signal generation and gain module generates a serial control signal to control the DDS chip to generate an initial multi-frequency signal containing K frequency components f1, f2, f3, …, f kThe multi-frequency sinusoidal superimposed signal is amplified by a signal gain module and used as a voltage excitation for detecting the impedance spectrum of the to-be-measured impedance.

[0011]

[0012] Wherein, k is the frequency sequence number of the excitation signal multi-frequency component, k∈[1,K], A k is the amplitude of the kth frequency component, ω k =2πf k is the angular frequency of the kth frequency component, is the phase of the kth frequency component, and ε is the random noise occurring in the measurement.

[0013] Step two, the 50M crystal oscillator is divided by FPGA, and a high-precision data acquisition chip is controlled by a sampling clock to convert the analog electrical signal into a digital signal. s The sampling number N is determined according to the frequency spectrum resolution, and the sampling signal is converted into FPGA for subsequent demodulation processing. The mathematical expression of the sampling signal is:

[0014]

[0015] Wherein, n is the sampling point sequence number, and n∈[1,N], Ω k =2πf k / f s is the discrete angular frequency of the kth frequency component.

[0016] Step three, an integer coprime with the sampling point number N is simulated and traversed until a rearrangement factor is selected which will not cause frequency collision in subsequent basket operation. The selection of the rearrangement factor is crucial for subsequent basket operation without frequency collision and reducing the degree of spectral line aggregation. For the selection of the rearrangement factor, the following steps are determined:

[0017] Random number generation step: a random number in the range of [0, N] is generated in simulation, wherein N is the sampling point number, and it is verified whether the random number is coprime with N; if the condition of being coprime with N is met, the next step is performed, otherwise the step is repeated;

[0018] Rearrangement factor determination step: the above selected random number is used as the rearrangement factor, and simulation test is performed to observe whether frequency collision occurs in the simulation amplitude demodulation result; if no frequency collision occurs, the random number is selected as the rearrangement factor of the system, otherwise the rearrangement factor selection step one is repeated;

[0019] In the simulation process, the selection standard of the rearrangement factor is as follows:

[0020] The multi-frequency discrete sequence x(n) collected by the high-precision data acquisition chip is rearranged by using a rearrangement factor σ, that is, a pseudo-random nonlinear transformation is performed on the sequence number of the sampling signal. The mathematical expression of the sequence number of the sampling point after the pseudo-random nonlinear transformation is:

[0021] i = nσ mod N (3)

[0022] wherein n is the original sequence sampling point sequence number, i is the transformed sampling point sequence number, N is the total number of sampling points, mod represents the remainder operation, the remainder c obtained by dividing a by b is denoted as c = a mod b, σ is a rearrangement factor, which is an integer coprime with N, and σ -1 is denoted as σ, and the selection of σ needs to satisfy the following mathematical relationship:

[0023]

[0024] wherein ω represents the width of the flat window function, and represent the new positions of the frequency points corresponding to any two frequencies in the original excitation signal component after the pseudo-random nonlinear transformation, and the expression indicates that the difference between any two sequence numbers after the transformation should be greater than or equal to Otherwise, the probability of frequency collision in the subsequent basket operation will be increased. The new position expression of the frequency point after the transformation is as follows:

[0025]

[0026] wherein and are any two frequencies in the original excitation signal component, k1, k2 ∈ [1, K], f s is the sampling frequency, which should be greater than the Nyquist sampling frequency of the maximum frequency component; by multiple simulation iterations and integers coprime with the number of sampling points N, a positive integer satisfying the above standard is selected as the rearrangement factor σ;

[0027] Step four, utilize the rearrangement factor to realize effective data dimension reduction, and utilize the low-dimensional fast Fourier transform to greatly reduce the overall operation complexity. The impedance data is transmitted to the upper computer through the data upload module, the sparse impedance spectrum is recovered by combining the prior information that the signal component frequency is known, and the amplitude A and phase θ of the to-be-measured frequency component are solved. For the recovery of the sparse impedance spectrum, the following steps are taken:

[0028] Rearrangement step: the rearrangement factor selected by simulation is used to start the recovery of the sparse impedance spectrum. First, the rearrangement factor is used to perform a pseudo-random nonlinear transformation on the sampling sequence number, that is, the sampling sequence is rearranged, so that the sampling signal spectrum is approximately uniformly distributed. The mathematical expression of the sequence after rearrangement is:

[0029] p(i) = x(iσ mod N) (6)

[0030] where p(i) represents the rearranged discrete sequence, and x(i) represents the original sampling sequence;

[0031] The sampling sequence is then filtered by a flat window function to remove a large number of redundant sampling points, and a smooth sequence is obtained, and the mathematical expression is:

[0032] y(i) = p(i)g(i) (7)

[0033] where y(i) is the smooth sequence, and g(i) is the time-domain expression of the flat window function;

[0034] The basket step: the smooth sequence is compressed and frequency-spectrum down-sampled by using the aliasing coefficient M, and the N-dimensional sequence is reduced to B-dimensional by frequency aliasing, and a reduced dimension sequence s(i) is obtained, and the time-domain expression of the sequence is:

[0035]

[0036] where M = N / B is the aliasing coefficient, B is the dimension of the aliasing sequence after dimension reduction, and the value of the aliasing coefficient M is generally:

[0037]

[0038] The B-point fast Fourier transform is performed on the aliasing sequence after dimension reduction, and the frequency spectrum S(k) is obtained, denoted as:

[0039]

[0040] where n and k are the sampling point numbers in the time domain and the frequency domain, respectively, and n, k ∈ [1, B]; the time complexity of the conventional fast Fourier transform (Fast Fourier Transform Algorithm, FFT) for transforming N points is O(N log N), and the time complexity of the down-sampled fast Fourier transform after dimension reduction is greatly reduced, which is:

[0041]

[0042] The result of the B-point fast Fourier transform is then transmitted to the host computer through the data upload module for subsequent demodulation;

[0043] Hash inverse mapping step: the frequency spectrum is demodulated by using hash inverse mapping in the host computer, and the B-dimensional frequency spectrum is restored to N-dimensional, and the phase and amplitude distortion caused by hash mapping is eliminated. As can be seen from the excitation signal, the frequency spectrum contains K frequency components, so the frequency spectrum The positions and values of the K largest spectral lines are recovered, and the mathematical expression for recovering the spectral line positions is:

[0044] n = iCσ -1 mod N (12)

[0045] where n is the recovered original spectral sample ordinal value, σ -1 is the modular inverse of σ, and the mathematical expression for recovering the spectral line values is:

[0046] X(n) = S(i) / G(o σ (i)) (13)

[0047] where X(n) is the recovered excitation signal spectral estimate value, G(i) is the frequency domain expression of the flat window function, o σ (i) is the hash mapping offset;

[0048] The recovered spectrum step: in the host computer, the calculated spectral signal estimate value X(n) is used to solve the amplitude A and phase θ of the to-be-measured frequency component; since the excitation signal frequency component is known, the frequency point position of the to-be-demodulated signal component can be obtained in combination with this prior information, and the estimated value of the sparse impedance spectrum can be recovered according to the frequency point position as follows:

[0049] I k = [Nf1 / f s ,Nf2 / f s ,…,Nf k / f s ] (14)

[0050] where I k is the target frequency component spectral line ordinal set, f k represents the kth frequency value in the original excitation signal component; according to the recovered spectral estimate value, the amplitude expression of the to-be-measured impedance signal can be calculated using the following formula:

[0051] A(k) = 2|X(I k )| (15)

[0052] where A is the estimated value of the impedance signal amplitude, and the phase expression of the to-be-measured impedance signal is:

[0053] θ(k) = arctan[Im(X(I k )) / Re(X(I k ))] (16)

[0054] where θ is the estimated value of the impedance signal phase.

[0055] The present application has the beneficial effects that: the present application combines prior knowledge of excitation signal frequency, greatly simplifies the classical sparse Fourier transform algorithm, and is applied to online measurement of impedance spectrum, realizes one-step selection of rearrangement factor to avoid subsequent aliasing frequency point collision, filters large-dimension sampling points through a flat window function, further reduces dimension compression of data quantity by using spectrum aliasing coefficients, greatly reduces data storage requirements, maintains strong anti-noise capability, reduces algorithm calculation complexity, and improves calculation efficiency and demodulation speed. BRIEF DESCRIPTION OF DRAWINGS

[0056] Figure 1 It is a flow chart of a sparse impedance spectrum fast measurement method suitable for hardware implementation.

[0057] Figure 2 It is a sparse impedance spectrum fast measurement system device diagram suitable for hardware implementation.

[0058] Figure 3 It is an amplitude simulation result of the sparse impedance spectrum fast measurement method suitable for hardware implementation.

[0059] Figure 4 It is a phase simulation result of the sparse impedance spectrum fast measurement method suitable for hardware implementation. DETAILED DESCRIPTION

[0060] The present application, namely a sparse impedance spectrum fast measurement method and system suitable for hardware implementation, comprises the following steps:

[0061] Step one, in the excitation signal generation and gain module, a DDS is used to generate a multi-frequency sinusoidal superposition signal containing K=4 frequency components: f1=1kHz, f2=2kHz, f3=6kHz, and f4=7kHz through frequency, amplitude, and phase control words controlled by a field programmable gate array, and the signal is amplified through a signal gain module and used as a voltage excitation for detecting the impedance spectrum to be measured. After passing through the impedance to be measured, an impedance voltage conversion module converts the impedance information to be measured into an electrical signal, and the mathematical expression is:

[0062]

[0063] Wherein, k is the frequency ordinal number of the multi-frequency component of the excitation signal, k∈[1,4], A k is the amplitude of the kth frequency component, ω k =2πf k is the angular frequency of the kth frequency component, is the phase of the kth frequency component, and ε is a plurality of types of noise that may occur in measurement, and random noise with a variance of 1% of the signal amplitude is added here;

[0064] Step two, a high-precision data acquisition chip is used to sample at a sampling rate fs = 40.96 kHz The analog electrical signal is converted into a digital electrical signal, the spectral resolution Δf = 1 kHz is determined according to the sampling signal and the frequency component of the signal to be measured, thereby determining the appropriate number of samples N, and the number of sampling points is generally selected as an integer power of 2, and the number of sampling points is selected as N = 4096 here; the sampling signal is sampled into a field programmable gate array for subsequent demodulation processing, and the mathematical expression of the sampling signal is:

[0065]

[0066] wherein n is the sampling point sequence number, and n ∈ [1, 4096], Ω k = 2πf k / f s is the angular frequency of the kth frequency component;

[0067] Step three, use the simulation to traverse the integer which is coprime with the number of sampling points N = 4096 until the rearrangement factor which will not cause frequency collision in subsequent basket rearrangement is selected, and the rearrangement factor is selected according to the following steps:

[0068] Random number generation step: generate a random number in the range of [0, N] in simulation, and check whether the random number is coprime with N; if the condition of being coprime with N is met, the next step is performed, otherwise the step is repeated;

[0069] Rearrangement factor determination step: the selected random number is used as the rearrangement factor, and simulation test is performed to observe whether frequency collision occurs in the simulation amplitude demodulation result; if no frequency collision occurs, the random number is selected as the rearrangement factor of the system, otherwise the rearrangement factor selection step one is repeated;

[0070] The selection standard of the rearrangement factor is as follows:

[0071] For the multi-frequency discrete sequence x(n) collected by the high-precision data acquisition chip, the rearrangement factor σ is used to rearrange the sampling signal sequence number, that is, to perform a pseudo-random nonlinear transformation, and the mathematical expression of the sampling point sequence number after the pseudo-random nonlinear transformation is:

[0072] i = nσ mod N (19)

[0073] wherein n is the original sequence sampling point sequence number, i is the transformed sampling point sequence number, N is the total number of sampling points, mod represents the remainder operation, σ is the rearrangement factor, which is an integer coprime with N, and the selection of σ needs to meet the following mathematical relationship:

[0074]

[0075] wherein ω represents the width of the flat window function, which is set as ω = 384 here, With The new position of the frequency point corresponding to any two frequencies in the original excitation signal component after the pseudo-random nonlinear transformation, the formula indicates that the difference value of any two ordinal numbers after transformation should be greater than or equal to Otherwise, it will increase the probability of frequency collision in the subsequent basket operation, and the new position of the frequency point after transformation is as follows:

[0076]

[0077] Wherein, With Any two frequencies in the original excitation signal component, k1, k2∈[1, K], f s The sampling frequency should be greater than the Nyquist sampling frequency of the maximum frequency component; through multiple simulation iterations of integers coprime with the sampling point number N, the rearrangement factor σ=105 that meets the above standard is selected;

[0078] Step four, rearrange the sampled signal using the selected rearrangement factor σ=105, so that there will be no frequency collision in the subsequent basket operation, realize the dimension reduction of effective data, and use the low-dimensional fast Fourier transform to greatly reduce the overall operation complexity, input the impedance data into the upper computer through the data upload module, combine the prior information that the signal component frequency is known, realize the recovery of sparse impedance spectrum, and solve the amplitude A and phase θ of the measured frequency component; for the recovery of sparse impedance spectrum and the solution of amplitude and phase, the following steps are taken:

[0079] Rearrangement step: use the selected rearrangement factor σ to perform pseudo-random nonlinear transformation on the sampling point ordinal number n, and perform pseudo-random rearrangement on the data of the input signal. This step can reduce the spectral line concentration and realize approximate uniform distribution. The mathematical expression of the nonlinear transformed sequence is:

[0080] p(i)=x(iσmod N) (22)

[0081] Wherein, i is the ordinal number after rearrangement, p(i) is the discrete sequence after ordinal number transformation, a flat window function is obtained by convolution of a rectangular window function and a Gaussian function, the sampling sequence is filtered to remove a large number of redundant sampling points, and Gibbs oscillation is controlled, and the mathematical expression of the smoothed sequence is:

[0082] y(i)=p(i)g(i) (23)

[0083] Wherein, y(i) is the smoothed sequence, and g(i) is the time domain expression of the flat window function.

[0084] The step of dividing the basket includes: dividing the spectrum of the original signal into several sub-bands, then only retaining a part of them for processing, using aliasing coefficient M to compress the smoothing sequence, here M=64 is selected, reducing the dimension of the N-dimensional sequence to B-dimensional to realize the spectrum downsampling, the time domain mathematical expression of the process is:

[0085]

[0086] The formula is expanded into a matrix form:

[0087]

[0088] Wherein, M is the aliasing coefficient, B is the dimension of the aliasing sequence after dimension reduction, and calculation shows that B=64;

[0089] The B-point fast Fourier transform of the time-domain aliasing sequence after dimension reduction is performed to complete the frequency domain downsampling, that is, the spectrum S(k) is obtained by equally spaced sampling the spectrum of the smoothing sequence, and the frequency domain mathematical expression of the process is:

[0090] S(k) = Y(Mk) (26)

[0091] Wherein, S is the Fourier transform of s, and Y is the Fourier transform of y; then the result of the B-point fast Fourier transform is transmitted to the upper computer through the data upload module for subsequent demodulation;

[0092] The step of hash inverse mapping includes: using hash inverse mapping in the upper computer to demodulate the spectrum, restoring the N-dimensional spectrum from the B-dimensional spectrum, eliminating the phase and amplitude distortion caused by the hash mapping, and knowing from the excitation signal that the spectrum contains K frequency components, so the positions and amplitudes of the K largest spectral lines in the spectrum S are restored, and the mathematical expression is:

[0093] n = iCσ -1 mod N (27)

[0094] Wherein, n is the restored original spectrum sample ordinal value, σ -1 is the modular inverse of σ -1 , σ

[0095] X(n) = S(i) / G(o σ (i)) (28)

[0096] Wherein, X(n) is the restored excitation signal spectrum estimation value, G(i) is the frequency domain expression of the flat window function, and o σ (i) is the hash mapping offset;

[0097] Recovering spectrum step: in the host computer, the calculated spectrum signal estimation value X(n) is used to solve the amplitude A and phase θ of the to-be-measured frequency component; since the frequency component of the excitation signal is known, the frequency point position of the to-be-demodulated signal component can be obtained in combination with the prior information, and the estimated value of the sparse impedance spectrum can be recovered according to the frequency point position as follows:

[0098] I k = [100, 200, 600, 700] (29)

[0099] wherein, I k is the target frequency component spectrum line number set; according to the recovered spectrum estimation value, the amplitude expression of the to-be-measured impedance signal can be calculated by using the following formula:

[0100] A(k) = 2|X(I k )| (30)

[0101] wherein, A is the estimated value of the impedance signal amplitude, and the phase expression of the to-be-measured impedance signal is:

[0102] θ(k) = arctan[Im(X(I k )) / Re(X(I k ))] (31)

[0103] The application will be further described in detail below in combination with the drawings and specific embodiments.

[0104] The excitation signal is generated by the 101 excitation signal generation and gain module, wherein the excitation signal includes a multi-frequency superimposed signal and other random noise signals. Specifically, the frequency components of interest are multiple ideal sinusoidal signals, and the following four frequency components are set respectively: the frequency f1 = 1 kHz, the amplitude is 500, and the phase is 0.1 rad; the frequency f2 = 2 kHz, the amplitude is 370, and the phase is 0.2 rad; the frequency f3 = 6 kHz, the amplitude is 210, and the phase is 0.7 rad; the frequency f4 = 7 kHz, the amplitude is 160, and the phase is 1 rad. In actual measurement, the 101 excitation signal generation and gain module generates an initial multi-frequency signal, and an operational amplifier is used to amplify the signal amplitude, so that the excitation signal still has a suitable voltage value range after passing through the to-be-measured impedance for the signal sequence extraction chip. On the basis of the original multi-frequency signal, 1% random noise is added to simulate a measurement signal with a signal-to-noise ratio of 40-60 dB. After the excitation signal is applied to the 102 to-be-measured impedance, the to-be-measured signal is sampled by the 103 impedance voltage conversion and data acquisition module, and the selected sampling frequency is f s= 40.96kHz, the spectral resolution of the signal and the sampling frequency can determine the sampling calculation point number as 4096 points. Then the sampling signal is input into the signal demodulation module 104 to realize the data dimension reduction and fast Fourier transform of the multi-frequency impedance signal, and then the demodulation result is input into the host computer 106 through the data uploading module 105 to restore the impedance spectrum to be measured by using the prior information that the frequency is known, so that the amplitude and phase of the impedance to be measured at different frequencies are obtained. Simulation verifies the good effect of the sparse impedance spectrum fast measurement method suitable for hardware implementation proposed in the application.

[0105] The above description of the application and its embodiments is not limited to this, and the drawings shown are only one of the embodiments of the application. Without departing from the purpose of the application, similar structures or embodiments can be designed without creativity, which belong to the protection scope of the application.

Claims

1. A rapid measurement method for sparse impedance spectrum suitable for hardware implementation, the system comprising an excitation signal generation and gain module (101), an impedance to be measured (102), an impedance-to-voltage conversion and data acquisition module (103), a signal demodulation module (104), a data upload module (105), and a host computer (106); the steps of implementing the rapid measurement method for sparse impedance spectrum are as follows: Step 1: The excitation signal generation and gain module (101) generates an initial multi-frequency signal through a direct digital frequency synthesizer. The signal gain module amplifies the initial multi-frequency signal using an operational amplifier, and then applies the amplified multi-frequency signal to the impedance to be measured (102). Step 2: Using the impedance-voltage conversion and data acquisition module (103), the impedance value to be measured is converted into a voltage signal, then analog-to-digital conversion and acquisition are performed, and the acquired signal is input into the signal demodulation module (104). Step 3: Use simulation to iterate through integers that are coprime to the number of sampling points N until an integer that will not cause frequency collisions in subsequent binning is selected as the rearrangement factor. Step 4: In the signal demodulation module (104), the rearrangement factor is used to achieve effective data dimensionality reduction, and the low-dimensional fast Fourier transform is used to significantly reduce the overall computational complexity. The impedance data is transmitted to the host computer (106) through the data upload module (105). Combined with the prior information that the frequency of the signal components is known, the sparse impedance spectrum is recovered, and the amplitude A and phase θ of the frequency component to be measured are solved.

2. A fast measurement method for sparse impedance spectrum suitable for hardware implementation according to claim 1, characterized in that, By combining prior information about the known excitation signal frequency, an integer that will not cause frequency collisions in subsequent binning is selected as the rearrangement factor through simulation. This allows for rapid measurement of the sparse impedance spectrum through only a single rearrangement and downsampling Fast Fourier Transform. The selection of the rearrangement factor is determined according to the following steps: Random number generation steps: Generate a random number in the range [0, N] in the simulation, where N is the number of sampling points, and check whether this random number is coprime with N; if it satisfies the condition of being coprime with N, proceed to the next step; otherwise, repeat this step. Rearrangement factor determination steps: Use the random number selected above as the rearrangement factor, conduct simulation experiments, and observe whether frequency collision occurs in the simulation amplitude demodulation results; if no frequency collision occurs, use this random number as the rearrangement factor selected by this system; otherwise, repeat the random number generation steps.

3. A rapid measurement method for sparse impedance spectrum suitable for hardware implementation according to claim 1, characterized in that, After selecting the rearrangement factor σ, the sampling points are rearranged using this factor in the hardware chip, and the sparse impedance spectrum is recovered. After performing a pseudo-random nonlinear transformation on the sampling point ordinal numbers, the mathematical expression of the sequence is: p(i)=x(iσmodN) (1) Where mod represents the modulo operation, p(i) represents the rearranged discrete sequence, and x(i) represents the original sampled sequence; then the Fourier transform of the rearranged sequence is: P(a)=X(aσ -1 ) (2) Where P(a) represents the Discrete Fourier Transform of the re-sampled sequence, and X(a) represents the Discrete Fourier Transform of the original sampled sequence; then, the sampled sequence is filtered by a flat window function to remove a large number of redundant sampling points, resulting in the smoothed sequence. The mathematical expression is as follows: y(i)=x(i)g(i) (3) Where g(i) is the time-domain expression of the flat window function; The smoothed sequence is compressed and its spectrum is downsampled using the aliasing coefficient M. The N-dimensional sequence is reduced to B-dimensionality through spectral aliasing, resulting in the reduced-dimensional sequence s(i). The time-domain expression of this sequence is: Where M = N / B is the aliasing coefficient, and B is the dimension of the aliased sequence after dimensionality reduction; a B-point Fast Fourier Transform is performed on the aliased sequence after dimensionality reduction to obtain the spectrum S(k); the above content can be regarded as the process of the hash mapping model, all of which are implemented in the hardware demodulation module; then the result of the B-point Fast Fourier Transform is transmitted to the host computer through the data upload module for subsequent demodulation; using the conventional Fast Fourier Transform, the time complexity of transforming N points is O(N log N), while the time complexity of the downsampling Fast Fourier Transform of the dimensionality-reduced sequence is greatly reduced to The host computer reads the data uploaded by the hardware demodulation unit and uses hash inverse mapping to demodulate the spectrum, restoring the B-dimensional spectrum to N dimensions and eliminating the phase and amplitude distortion caused by hash mapping. Since the excitation signal indicates that the spectrum contains K frequency components, the K largest spectral lines in the spectrum S(k) are selected to restore their positions and amplitudes. The mathematical expression for ordinal restoration is: n=iCσ -1 modN (5) Where n is the ordinal number of the recovered original spectrum sampling points, σ -1 Let be the modulo inverse element of σ; the mathematical expression for spectral line recovery is: X(n)=S(i) / G(o σ (i)) (6) Where X(n) is the estimated spectrum of the recovered excitation signal, G(i) is the frequency domain expression of the flat window function, and o σ (i) represents the hash mapping offset; since the frequency components of the excitation signal are known, the frequency position of the component to be demodulated is obtained from this prior information. Based on the frequency position, the estimated value of the sparse impedance spectrum can be recovered as follows: I k =[Nf1 / f s ,Nf2 / f s ,…,Nf k / f s ] (7) Among them, I k For the set of ordinal numbers of the spectral lines of the target frequency components, f k Let k represent the k-th frequency value in the original excitation signal component; based on the recovered spectrum estimate, the amplitude expression of the impedance signal under test can be calculated using the following formula: A(k)=2|X(I k )| (8) Where A is the estimated amplitude of the impedance signal, and the phase expression of the impedance signal to be measured is: θ(k)=arctan[Im(X(I k )) / Re(X(I k ))] (9) Where θ is the estimated value of the phase of the impedance measurement signal.

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