A method for optimizing the uniformity of an HfO2-based ferroelectric field effect transistor memory device

Abstract

The application discloses a kind of HfO2-based ferroelectric field effect transistor memory device uniformity optimization methods, comprising: preparation of a cylindrical insulating layer, increase a hollow cylindrical channel layer on the periphery of the insulating layer, increase a hollow cylindrical second insulating layer on the periphery of the channel layer, increase a hollow cylindrical HfO2-based ferroelectric film layer on the periphery of the second insulating layer, increase hollow cylindrical source layer, hollow cylindrical drain electrode layer respectively at the both ends of the insulating layer;Form HfO2-based ferroelectric field effect transistor memory device.The HfO2-based ferroelectric field effect transistor memory device uniformity optimization method described in the application can effectively change the drift of threshold value, the change of storage window, so as to improve the uniformity of HfO2-based ferroelectric field effect transistor memory.

Description

Technical Field

[0001] This invention relates to semiconductor device technology, and more particularly to a method for optimizing the uniformity of HfO2-based ferroelectric field-effect transistor memory devices. Background Technology

[0002] Hafnium oxide (HfO2)-based ferroelectric field-effect transistors (FeFETs) offer advantages such as simple structure, non-destructive readout, and low operating voltage, making them highly promising for applications. Even at thicknesses of a few nanometers, doped HfO2 films retain excellent ferroelectric properties and are compatible with CMOS processes. This allows HfO2-based FeFETs to meet the demands for high integration and stability in electronic devices, making Hafnium oxide-based FeFET memories a current research hotspot and an important development direction for novel semiconductor memories.

[0003] However, HfO2-based ferroelectric thin films in FeFETs are polycrystalline and multiphase structures. Randomly distributed ferroelectric / paraelectric grains, grain orientations, and phase boundaries cause performance differences between small-area HfO2-based ferroelectric thin films, affecting, for example, the degree of polarization reversal and the magnitude of ferroelectric polarization. This is a technical bottleneck hindering the industrialization of FeFET memories. The ferroelectric phase exhibits spontaneous polarization and is a metastable orthorhombic phase structure with an asymmetric center. The paraelectric phase does not exhibit spontaneous polarization and is a general term for monoclinic, tetragonal, and cubic phase structures. Hafnium oxide-based FeFET memories rely on the polarization reversal of the ferroelectric phase in the hafnium oxide ferroelectric thin film to complete the read and write processes. In experiments involving the random probability generation of the ferroelectric phase, the degree of ferroelectric phase polarization reversal varies due to differences in the content and distribution of the generated ferroelectric phase, resulting in significant differences in the electrical performance of the obtained HfO2-based FeFET memories. For example, the threshold (Vth) drift and the storage window (MW) change, affecting the uniformity of the memory device. Summary of the Invention

[0004] The technical problem to be solved by this invention is to provide an optimization method to improve the uniformity of existing HfO2-based ferroelectric field-effect transistor memory devices, which suffers from poor uniformity.

[0005] To address the aforementioned technical problems, embodiments of the present invention provide a method for optimizing the uniformity of HfO2-based ferroelectric field-effect transistor memory devices, comprising:

[0006] S1: Prepare a cylindrical insulating layer, wherein the insulating layer is composed of one or more of SiO2, SiON, Al2O3, HfO2, ZrO2, TiO2, La2O3, HfSiON and GeO2, and the diameter of the insulating layer is a;

[0007] S2: Add a hollow cylindrical channel layer on the periphery of the insulating layer, the channel layer having a thickness of b;

[0008] S3: A hollow cylindrical second insulating layer is added to the periphery of the channel layer. The second insulating layer is composed of one or more of SiO2, SiON, Al2O3, HfO2, ZrO2, TiO2, La2O3, HfSiON and GeO2. The thickness of the second insulating layer is c.

[0009] S4: Add a hollow cylindrical HfO2-based ferroelectric thin film layer on the periphery of the second insulating layer. The HfO2-based ferroelectric thin film layer is one or more of HfO2, doped HfO2, ZrO2, or doped ZrO2, and the thickness of the HfO2-based ferroelectric thin film layer is d.

[0010] S5: Hollow cylindrical source layer and hollow cylindrical drain layer are added to both ends of the insulating layer, respectively. The source layer and drain layer have the same thickness, which is e.

[0011] S6: Forming HfO2-based ferroelectric field-effect transistor memory devices;

[0012] Wherein, the diameter 'a' of the insulating layer and the thickness 'c' of the second insulating layer are expressed using the equivalent oxide layer thickness, and the formula for the equivalent oxide layer thickness is:

[0013]

[0014] The t EOT Where t is the equivalent oxide layer thickness, kox is the dielectric constant of silicon dioxide, t is the insulation layer thickness, and k is the dielectric constant of the insulation layer.

[0015] The equivalent oxide layer thickness of the second insulating layer is between 0.5 and 1.5 nm.

[0016] Preferably, a gate voltage is also added to the HfO2-based ferroelectric field-effect transistor memory device, wherein the gate voltage is ±4-±6V.

[0017] Preferably, the thickness b of the channel layer is less than the thickness d of the HfO2-based ferroelectric thin film layer.

[0018] Preferably, the thickness b of the channel layer is 6-7 nm; and the thickness d of the HfO2-based ferroelectric thin film layer is 15-18 nm.

[0019] Preferably, the equivalent oxide layer thickness of the insulating layer is between 87nm and 89nm.

[0020] Preferably, the channel layer, the second insulating layer, and the HfO2-based ferroelectric thin film layer have the same length, and are all shorter than the length of the insulating layer; and the thickness e of the source layer and the drain layer are the same as the thickness b of the channel layer.

[0021] Preferably, the channel layer is one or more of silicon, germanium, silicon-germanium, or gallium arsenide.

[0022] Preferably, in step S4, the doping element is one or more of Si, Al, Zr, La, Ce, Sr, Lu, Gd, Sc, Nd, Ge, and N.

[0023] Implementing the embodiments of the present invention has the following beneficial effects:

[0024] (1) In this embodiment of the invention, the HfO2-based ferroelectric field-effect transistor memory device is constructed by a specific structure, and the equivalent oxide layer thickness of the second insulating layer between the channel and hafnium oxide is increased; this reduces the voltage drop of the HfO2-based ferroelectric thin film layer and decreases the polarization reversal degree of the ferroelectric phase in the HfO2-based ferroelectric thin film layer; the ferroelectric polarization becomes smaller, which reduces the polarization difference between the ferroelectric phase and the dielectric phase, and the electrical performance difference of the resulting HfO2-based FeFET memory is also smaller, thereby improving the uniformity of the HfO2-based ferroelectric field-effect transistor memory device.

[0025] (2) In this embodiment of the invention, the uniformity of the HfO2-based ferroelectric field-effect transistor memory device is improved by reducing the gate voltage. While keeping the thickness of other layers constant, reducing the gate voltage helps to reduce the voltage division in the HfO2-based ferroelectric thin film layer. At a lower voltage, the polarization reversal degree of the HfO2-based ferroelectric thin film is smaller, and the ferroelectric polarization is smaller. The electrical performance difference of the resulting hafnium oxide-based FeFET memory is also smaller, which helps to promote the uniformity of the HfO2-based ferroelectric field-effect transistor memory. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a flowchart illustrating the steps of the uniformity optimization method for HfO2-based ferroelectric field-effect transistor memory devices provided in the first embodiment of the present invention.

[0028] Figure 2 This is a schematic diagram of the HfO2-based ferroelectric field-effect transistor memory structure provided in the first embodiment of the present invention;

[0029] Figure 3 This is a top view schematic diagram of the HfO2-based ferroelectric field-effect transistor memory provided in the first embodiment of the present invention;

[0030] Figure 4 This is a schematic cross-sectional view of the HfO2-based ferroelectric field-effect transistor memory provided in the first embodiment of the present invention;

[0031] Figure 5 This is a schematic diagram of the ferroelectric phase distribution in the HfO2-based ferroelectric thin film layer of the first embodiment of the present invention;

[0032] Figure 6 This is a probability distribution diagram of different effective oxide layer thickness thresholds and storage windows for the uniformity optimization method of HfO2-based ferroelectric field-effect transistor memory devices provided in the second embodiment of the present invention.

[0033] Figure 7 This is a probability distribution diagram of different gate voltage thresholds and storage windows for the uniformity optimization method of HfO2-based ferroelectric field-effect transistor memory devices provided in the second embodiment of the present invention. Detailed Implementation

[0034] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0035] Example 1

[0036] Please see Figure 1 The first embodiment of the present invention provides a method for optimizing the uniformity of HfO2-based ferroelectric field-effect transistor memory devices. Specifically, it includes:

[0037] S1: Prepare a cylindrical insulating layer, wherein the insulating layer is composed of one or more of SiO2, SiON, Al2O3, HfO2, ZrO2, TiO2, La2O3, HfSiON and GeO2, and the diameter of the insulating layer is a;

[0038] S2: Add a hollow cylindrical channel layer on the periphery of the insulating layer, the channel layer having a thickness of b;

[0039] S3: A hollow cylindrical second insulating layer is added to the periphery of the channel layer. The second insulating layer is composed of one or more of SiO2, SiON, Al2O3, HfO2, ZrO2, TiO2, La2O3, HfSiON and GeO2. The thickness of the second insulating layer is c.

[0040] S4: Add a hollow cylindrical HfO2-based ferroelectric thin film layer on the periphery of the second insulating layer. The HfO2-based ferroelectric thin film layer is one or more of HfO2, doped HfO2, ZrO2, or doped ZrO2, and the thickness of the HfO2-based ferroelectric thin film layer is d.

[0041] S5: Hollow cylindrical source layer and hollow cylindrical drain layer are added to both ends of the insulating layer, respectively. The source layer and drain layer have the same thickness, which is e.

[0042] S6: Form HfO2-based ferroelectric field-effect transistor memory devices.

[0043] The diameter *a* of the insulating layer and the thickness *c* of the second insulating layer are expressed using the equivalent oxide layer thickness to avoid inconsistencies in thickness caused by factors such as dielectric constant. The formula for the equivalent oxide layer thickness is:

[0044]

[0045] The t EOT t is the equivalent oxide layer thickness, kOx is the dielectric constant of silicon dioxide, t is the insulation layer thickness, and k is the dielectric constant of the insulation layer.

[0046] In step S2, the channel layer is one or more of silicon, germanium, silicon-germanium, or gallium arsenide.

[0047] In step S4, the doping element is one or more of Si, Al, Zr, La, Ce, Sr, Lu, Gd, Sc, Nd, Ge, and N.

[0048] See Figures 2-4The HfO2-based ferroelectric field-effect transistor (FET) memory device prepared by the uniformity optimization method mainly includes an insulating layer 1, a source layer 2, a drain layer 3, a second insulating layer 4, an HfO2-based ferroelectric thin film layer 5, and a channel layer 6. The insulating layer 1 has a cylindrical structure, and its equivalent oxide layer thickness is between 87 nm and 89 nm. The source layer 2 and drain layer 3, together with the channel layer 6, enclose the insulating layer 1 at its upper and lower ends. The source layer 2, drain layer 3, and channel layer 6 have the same thickness, 6-7 nm, and the sum of their heights is the same as the height of the insulating layer 1. The second insulating layer 4 and the HfO2-based ferroelectric thin film layer 5 have the same length as the channel layer 6 and are sequentially wrapped around it. The equivalent oxide layer thickness of the second insulating layer 4 is between 0.5 and 1.5 nm. The thickness of the HfO2-based ferroelectric thin film layer 5 is between 15-18 nm.

[0049] See Figure 5 The ferroelectric / paraelectric grains within the HfO2-based ferroelectric thin film layer 5 are completely randomly distributed, where A represents ferroelectric grains and B represents paraelectric grains. See also Figures 1-4 In HfO2-based ferroelectric field-effect transistor memory devices using this structure, the thickness of the second insulating layer 4 is controlled between 0.5-1.5 nm. The voltage drop across the HfO2-based ferroelectric thin film layer 5 is reduced, and the polarization reversal degree of the ferroelectric phase in the HfO2-based ferroelectric thin film layer 5 is decreased. The smaller ferroelectric polarization reduces the polarization difference between the ferroelectric and dielectric phases, resulting in smaller differences in the electrical performance of the obtained HfO2-based FeFET memory. This improves the uniformity of the HfO2-based ferroelectric field-effect transistor memory device. Furthermore, adding a gate voltage outside the HfO2-based ferroelectric thin film layer 5, with the voltage magnitude between ±4 and ±6 V, also improves the uniformity of the HfO2-based ferroelectric field-effect transistor memory device. Reducing the gate voltage added outside the HfO2-based ferroelectric thin film layer 5 while keeping the HfO2-based ferroelectric field-effect transistor memory device unchanged helps reduce the voltage drop across the HfO2-based ferroelectric thin film layer. At lower voltages, the polarization reversal of HfO2-based ferroelectric thin films is smaller, and the ferroelectric polarization is smaller; the electrical performance differences of the resulting hafnium oxide-based FeFET memory are also smaller, and the uniformity of the HfO2-based ferroelectric field-effect transistor memory can also be improved to a certain extent.

[0050] Example 2

[0051] The present invention also utilizes the method of Embodiment 1 to perform performance testing on components of different thicknesses within the HfO2-based ferroelectric field-effect transistor memory. See also... Figure 6This invention also provides threshold values ​​for different equivalent oxide layer thicknesses and probability distribution maps of the storage window for the second insulating layer 4. The equivalent oxide layer thicknesses of the insulating layer 1 are 89 nm, 88 nm, and 87 nm, respectively, and the height of the insulating layer 1 is 70 nm. The thickness of the channel layer 6 is always 6 nm, and the height is 30 nm. The equivalent oxide layer thickness of the second insulating layer 4 corresponds to that of the insulating layer 1; the decrease in the thickness of the insulating layer 1 is the same as the increase in the thickness of the second insulating layer 4, which are 0.5 nm, 1 nm, and 1.5 nm, respectively; the height of the second insulating layer 4 is 30 nm. The thickness of the HfO2-based ferroelectric thin film layer 5 is always 15 nm, and the height is 30 nm. The source layer 2 and drain layer 3 have the same shape and size, both with a thickness of 6 nm and a height of 20 nm. In the electrical performance transfer characteristic (Id-Vg) curve test, the drain voltage is set to 0.1 V, and the gate voltage is ±6 V. The formula is Vth = (Wm / Lm)·10. -7 MW = High Vth - Low Vth, Wm and Lm are the thickness and height of the channel layer 6, respectively. As shown in the figure, the increase in the equivalent oxide layer thickness of the second insulating layer 4 increases the probability of the storage window, thus improving the uniformity of the HfO2-based ferroelectric field-effect transistor memory.

[0052] Example 3

[0053] This invention also utilizes the method of Embodiment 1 to perform performance testing on the HfO2-based ferroelectric field-effect transistor memory with different gate voltages applied externally. See also Figure 7 This invention also provides probability distribution diagrams for different gate voltage thresholds and storage windows. Specifically, the equivalent oxide layer thickness of the insulating layer 1 is 89 nm, and its height is 70 nm; the channel layer 6 has a constant thickness of 6 nm and a height of 30 nm; the equivalent oxide layer thickness of the second insulating layer 4 is 0.5 nm, and its height is 30 nm; the HfO2-based ferroelectric thin film layer 5 has a thickness of 15 nm and a height of 30 nm; the source layer 2 and drain layer 3 have the same shape and size, both with a thickness of 6 nm and a height of 20 nm. In the electrical performance transfer characteristic (Id-Vg) curve test, the drain voltage was set to 0.1 V, and the gate voltages were ±4, ±5, and ±6 V, respectively. The formula Vth = (Wm / Lm)·10 -7 MW = High Vth - Low Vth, Wm and Lm are the thickness and height of the channel layer 6, respectively. As shown in the figure, the decrease in gate voltage increases the probability of the storage window, thus improving the uniformity of the HfO2-based ferroelectric transistor memory.

[0054] The above description discloses only one preferred embodiment of the present invention, and should not be construed as limiting the scope of the present invention. Those skilled in the art will understand that all or part of the processes of the above embodiments can be implemented, and equivalent changes made in accordance with the claims of the present invention are still within the scope of the invention.

Claims

1. A method for optimizing the uniformity of HfO2-based ferroelectric field-effect transistor memory devices, characterized in that, include: S1: Prepare a cylindrical insulating layer, wherein the insulating layer is composed of one or more of SiO2, SiON, Al2O3, HfO2, ZrO2, TiO2, La2O3, HfSiON and GeO2, and the diameter of the insulating layer is a; S2: Add a hollow cylindrical channel layer on the periphery of the insulating layer, the channel layer having a thickness of b; S3: A hollow cylindrical second insulating layer is added to the periphery of the channel layer. The second insulating layer is composed of one or more of SiO2, SiON, Al2O3, HfO2, ZrO2, TiO2, La2O3, HfSiON and GeO2. The thickness of the second insulating layer is c. S4: Add a hollow cylindrical HfO2-based ferroelectric thin film layer on the periphery of the second insulating layer. The HfO2-based ferroelectric thin film layer is doped HfO2 and the thickness of the HfO2-based ferroelectric thin film layer is d. S5: Hollow cylindrical source layer and hollow cylindrical drain layer are added to both ends of the insulating layer, respectively. The source layer and drain layer have the same thickness, which is e. S6: Forming HfO2-based ferroelectric field-effect transistor memory devices; Wherein, the diameter 'a' of the insulating layer and the thickness 'c' of the second insulating layer are expressed using the equivalent oxide layer thickness, and the formula for the equivalent oxide layer thickness is: t EOT = t The t EOT k is the equivalent oxide layer thickness. ox t is the dielectric constant of silicon dioxide, t is the thickness of the insulating layer, and k is the dielectric constant of the insulating layer. The equivalent oxide layer thickness of the second insulating layer is between 0.5 and 1.5 nm; In step S4, the doping element is one or more of Si, Al, Zr, La, Ce, Sr, Lu, Gd, Sc, Nd, Ge, and N.

2. The method for optimizing the uniformity of HfO2-based ferroelectric field-effect transistor memory devices according to claim 1, characterized in that, The HfO2-based ferroelectric field-effect transistor memory device also requires the addition of a gate voltage, which is ±4-±6V.

3. The method for optimizing the uniformity of HfO2-based ferroelectric field-effect transistor memory devices according to claim 1, characterized in that, The thickness b of the channel layer is less than the thickness d of the HfO2-based ferroelectric thin film layer.

4. The method for optimizing the uniformity of HfO2-based ferroelectric field-effect transistor memory devices according to claim 3, characterized in that, The thickness b of the channel layer is 6-7 nm; the thickness d of the HfO2-based ferroelectric thin film layer is 15-18 nm.

5. The method for optimizing the uniformity of HfO2-based ferroelectric field-effect transistor memory devices according to claim 1, characterized in that, The equivalent oxide layer thickness of the insulating layer is between 87nm and 89nm.

6. The method for optimizing the uniformity of HfO2-based ferroelectric field-effect transistor memory devices according to claim 1, characterized in that, The channel layer, the second insulating layer, and the HfO2-based ferroelectric thin film layer have the same length, and are all shorter than the length of the insulating layer; and the thickness e of the source layer and the drain layer are the same as the thickness b of the channel layer.

7. The method for optimizing the uniformity of HfO2-based ferroelectric field-effect transistor memory devices according to claim 1, characterized in that, The channel layer is composed of one or more of silicon, germanium, silicon-germanium, or gallium arsenide.

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