In-vehicle relay device

Abstract

A vehicle-mounted relay device, an FPGA (120a) that executes functions from the first layer to the third layer includes a first exception recording unit that records exception frames detected during data relay, and a first exception recording processing unit that records the exception frames in the first exception recording unit when an exception frame is detected. A microcomputer (140a) that executes functions above the fourth layer includes a second vehicle information recording unit (147) that records vehicle information sequentially transmitted from a terminal ECU (20), and a first diagnosis recording processing unit (143a) that reads out the exception frames recorded in the first exception recording unit and records them together with the vehicle information recorded in the second vehicle information recording unit (147) in a diagnosis information recording unit (144) as diagnosis information.

Description

[0001] Cross - reference to related applications

[0002] This application is based on Japanese Patent Application No. 2020 - 158706 filed on September 23, 2020, and incorporates the entire contents of the base application by reference. Technical field

[0003] This disclosure relates to an in - vehicle relay device. Background art

[0004] There is known a technology of using a relay device in an in - vehicle communication network. The relay device has a plurality of ports and transmits a signal input to one port to other terminals, which are terminals connected to the same relay device and are specified by a destination included in the input signal. In addition, as a relay device, there is known an in - vehicle ECU having a relay function, in which the physical layer and the data link layer in the OSI reference model are configured by ASICs and the layers above them are configured by a microcomputer. In such an in - vehicle ECU, when the relay function is implemented through the network layer as the third layer, the microcomputer implements the relay function by software.

[0005] However, since the relay in the network layer requires cross - network relay, the processing load is high. Therefore, even when using a high - performance microcomputer, communication delay may occur. In addition, due to the high processing load, there is also a problem of large heat generation. Then, as a technology for solving this problem, Patent Document 1 discloses an in - vehicle relay device in which the functions of the first to third layers are executed by a hardware circuit and the functions above the fourth layer are executed by a microcomputer.

[0006] Prior art documents

[0007] Patent documents

[0008] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2019 - 106584 Summary of the invention

[0009] However, in Patent Document 1, as the functions in the second and third layers executed by the hardware circuit, functions other than the relay function are not assumed. Therefore, when an abnormal frame is detected during relay in the second and third layers, even if the abnormal frame can be recorded, diagnostic information (hereinafter referred to as "diagnostic information") formed by incorporating information (hereinafter referred to as "in - vehicle information") sent from other electronic control devices into the abnormal frame cannot be recorded.

[0010] In addition, in the case of reading an abnormal frame using a diagnostic tool, since there is no application layer in the hardware circuit, no response can be made. In contrast, if it is addressed by mounting an application layer on the hardware part, the hardware part needs to be changed every time the specifications of the application layer are changed, increasing the development cost.

[0011] An object of the present disclosure is to provide a vehicle-mounted relay device that hardly causes communication delay, can suppress heat generation, and can not only read diagnostic information for an abnormal frame detected during relaying in the hardware part, but also suppress the development cost.

[0012] The above object is achieved by a combination of features described in the independent claims. In addition, the dependent claims specify more advantageous specific examples of the disclosure. The reference numerals in parentheses described in the claims indicate the correspondence with the specific elements described in the embodiments described as one mode later, and do not limit the technical scope of the present disclosure.

[0013] To achieve the above object, a first vehicle-mounted relay device of the present disclosure is used for a vehicle and includes a hardware part that operates hardware and a software part that operates software. The functions of the first to third layers in the OSI reference model are executed by the operation of the hardware, and the functions above the fourth layer are executed by the operation of the software. The hardware part has a second-layer relay part that realizes the relay function in the second layer and a third-layer relay part that realizes the relay function in the third layer. Among them, the software part includes a vehicle information recording processing part that records vehicle information, which is information sequentially sent from other devices mounted on the vehicle, in a vehicle information recording part that can be read from the software part. The hardware part includes a first abnormal recording processing part that, when detecting an abnormal frame detected during the relaying of data in either the second-layer relay part or the third-layer relay part, records the abnormal frame in a first abnormal recording part that can be read from the software part. The software part includes a first diagnostic recording processing part that reads the abnormal frame recorded in the first abnormal recording part and records the abnormal frame together with the vehicle information recorded in the vehicle information recording part as diagnostic information in a diagnostic information recording part that can be read from the software part.

[0014] According to the above structure, the second-layer relay unit that implements the relay function in the second layer of the OSI reference model and the third-layer relay unit that implements the relay function in the third layer are provided in the hardware unit. Therefore, the second-layer relay unit and the third-layer relay unit are executed by the operation of the hardware. By using the operation of the hardware to execute the second-layer relay unit and the third-layer relay unit, the processing becomes fast. Therefore, it is difficult to generate communication delays. In addition, by using the operation of the hardware to execute, heat generation can also be suppressed. Moreover, since the software unit only needs to execute functions above the fourth layer, a device that operates the software can also use a device with not-so-high performance.

[0015] In addition, according to the above structure, the software unit reads out the abnormal frame recorded in the first abnormal recording unit by the operation of the hardware unit, and records it together with the vehicle-mounted information recorded in the vehicle-mounted information recording unit by the operation of the software unit as diagnostic information in the diagnostic information recording unit that can be read out by the software unit. Therefore, even when an abnormal frame is detected by the operation of the hardware unit and vehicle-mounted information is recorded by the operation of the software unit, the diagnostic information obtained by incorporating the vehicle-mounted information sent from other electronic control devices into the abnormal frame can be read out by the software unit. Since the software unit executes functions above the fourth layer, the functions of the application layer are executed by the software unit. Therefore, the diagnostic information recorded in the diagnostic information recording unit can be read out by a diagnostic tool. Moreover, even if the application layer is not mounted in the hardware unit, the diagnostic information can be read out. Therefore, the change of the application layer specification becomes easy, and the development cost can also be suppressed.

[0016] As a result, it is difficult to generate communication delays and heat generation can also be suppressed. Moreover, not only can diagnostic information be read out for the abnormal frame detected during relaying in the hardware part, but also the development cost can be suppressed.

[0017] To achieve the above object, a second in-vehicle relay device of the present disclosure is used in a vehicle and includes a hardware unit for operating hardware and a software unit for operating software. The functions of the first to third layers in the OSI reference model are executed by the hardware unit, and the functions above the fourth layer are executed by the software unit. The hardware unit includes a second-layer relay unit for implementing the relay function in the second layer and a third-layer relay unit for implementing the relay function in the third layer. The software unit includes an in-vehicle information transmission unit that transmits in-vehicle information, which is information sequentially sent from other devices mounted on the vehicle, to the hardware unit. The hardware unit includes a second exception recording and processing unit that, when an abnormal frame is detected during the relay of data in either the second-layer relay unit or the third-layer relay unit, records the abnormal frame and the in-vehicle information transmitted from the in-vehicle information transmission unit at the time of detecting the abnormal frame in a second exception recording unit that can be read out by the software unit. The software unit includes a second diagnosis recording and processing unit that reads out the abnormal frame recorded in the second exception recording unit and the in-vehicle information associated with the abnormal frame, and records the abnormal frame and the in-vehicle information as diagnosis information in a diagnosis information recording unit that can be read out by the software unit.

[0018] According to the above structure, the second-layer relay unit for implementing the relay function in the second layer of the OSI reference model and the third-layer relay unit for implementing the relay function in the third layer are provided in the hardware unit. Therefore, the second-layer relay unit and the third-layer relay unit are executed by the operation of the hardware. By using the operation of the hardware to execute the second-layer relay unit and the third-layer relay unit, the processing becomes fast. Therefore, it is difficult to generate communication delays. In addition, by using the operation of the hardware to execute, heat generation can also be suppressed. Moreover, since the software unit only needs to execute the functions above the fourth layer, a device for operating the software can also use a device with relatively low performance.

[0019] In addition, according to the above structure, the second diagnosis recording and processing unit of the software unit reads out the abnormal frame detected during the relay of data in either the second-layer relay unit or the third-layer relay unit, which is recorded by the operation of the hardware unit, and the in-vehicle information transmitted from the in-vehicle information transmission unit at the time of detecting the abnormal frame, and records them as diagnosis information in a diagnosis information recording unit that can be read out by the software unit. Therefore, the diagnosis information formed by incorporating the in-vehicle information sent from other electronic control devices at the time of detecting the abnormal frame into the abnormal frame can be recorded in a manner that can be read out by the software unit. Since the software unit executes the functions above the fourth layer, the functions of the application layer are executed by the software unit. Therefore, the diagnosis information recorded in the diagnosis information recording unit can be read out by a diagnosis tool. Moreover, even if the application layer is not mounted on the hardware unit, the diagnosis information can be read out. Therefore, the change of the application layer specifications becomes easy, and the development cost can also be suppressed.

[0020] As a result, it is difficult to generate communication delays and it is also possible to suppress heat generation. Moreover, it is possible not only to read out diagnostic information for abnormal frames detected during relaying in the hardware part, but also to suppress development costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 FIG. is a diagram showing an example of a schematic configuration of the in-vehicle communication system 1.

[0022] Figure 2 FIG. is a diagram showing an example of a schematic configuration of the in-vehicle relay device 10.

[0023] Figure 3 FIG. is a diagram showing an example of a schematic configuration of the FPGA 120.

[0024] Figure 4 FIG. is a diagram showing an example of a schematic configuration of the microcomputer 140.

[0025] Figure 5 FIG. is a flowchart showing an example of the process of diagnostic record association processing in the microcomputer 140.

[0026] Figure 6 FIG. is a diagram for explaining an example of a case where an abnormal frame recorded in the FPGA 120 cannot be read correctly.

[0027] Figure 7 FIG. is a diagram showing an example of a schematic configuration of the in-vehicle relay device 10a.

[0028] Figure 8 FIG. is a diagram showing an example of a schematic configuration of the FPGA 120a.

[0029] Figure 9 FIG. is a diagram showing an example of a schematic configuration of the microcomputer 140a.

[0030] Figure 10 FIG. is a flowchart showing an example of the process of diagnostic record association processing in the microcomputer 140a.

[0031] Figure 11 FIG. is a diagram showing an example of a schematic configuration of the in-vehicle relay device 10b.

[0032] Figure 12 FIG. is a diagram showing an example of a schematic configuration of the FPGA 120b.

[0033] Figure 13 FIG. is a diagram showing an example of a schematic configuration of the microcomputer 140b.

[0034] Figure 14 FIG. is a flowchart showing an example of the process of diagnostic record association processing in the FPGA 120b.

[0035] Figure 15 This is a diagram showing an example of the schematic structure of the in-vehicle relay device 10c.

[0036] Figure 16 This is a diagram showing an example of the schematic structure of the memory 220.

[0037] Figure 17 This is a diagram showing an example of the schematic structure of the relay circuit 230.

[0038] Figure 18 This is a diagram showing an example of the schematic structure of the CPU 240.

[0039] Figure 19 This is a diagram showing an example of the schematic structure of the in-vehicle relay device 10d.

[0040] Figure 20 This is a diagram showing an example of the schematic structure of the memory 320.

[0041] Figure 21 This is a diagram showing an example of the schematic structure of the relay circuit 330.

[0042] Figure 22 This is a diagram showing an example of the schematic structure of the CPU 340.

[0043] Figure 23 This is a diagram showing an example of the schematic structure of the in-vehicle relay device 10e.

[0044] Figure 24 This is a diagram showing an example of the schematic structure of the memory 420.

[0045] Figure 25 This is a diagram showing an example of the schematic structure of the relay circuit 430.

[0046] Figure 26 This is a diagram showing an example of the schematic structure of the CPU 440. Detailed Implementation Modes

[0047] A plurality of disclosed embodiments will be described with reference to the accompanying drawings. In addition, for ease of explanation, sometimes between a plurality of embodiments, parts having the same function as those shown in the drawings used in the previous description are denoted by the same reference numerals, and their description is omitted. For parts denoted by the same reference numerals, the description in other embodiments can be referred to.

[0048] (Embodiment 1)

[0049] <Overview Structure of In-Vehicle Communication System 1>

[0050] Hereinafter, this embodiment will be described with reference to the accompanying drawings. First, Figure 1 the in-vehicle communication system 1 will be described. The in-vehicle communication system 1 is configured, for example, according to the in-vehicle Ethernet standard. In addition, Ethernet is a registered trademark. The in-vehicle communication system 1 is mounted on a vehicle. Hereinafter, the vehicle on which the in-vehicle communication system 1 is mounted will be referred to as the host vehicle.

[0051] As Figure 1 shown, the in-vehicle communication system 1 includes an in-vehicle relay device 10, a terminal ECU 20, and a cable 30. In Figure 1 this example, the in-vehicle communication system 1 includes six terminal ECUs 20, but it is not limited thereto. The in-vehicle communication system 1 can include any number of terminal ECUs 20.

[0052] The terminal ECU 20 is a device corresponding to a node connected to the in-vehicle relay device 10 via the cable 30. The node can also be a device other than an electronic control device (i.e., ECU) such as a sensor. In addition, other in-vehicle relay devices 10 can also be connected as nodes. Each terminal ECU 20 communicates directly only with the in-vehicle relay device 10. When the terminal ECU 20 sends a signal containing data to other nodes, the signal includes the address of the destination node. The terminal ECU 20 outputs the signal to the in-vehicle relay device 10 via the cable 30. The cable 30 is, for example, a two-strand twisted cable.

[0053] The in-vehicle relay device 10 divides the multiple nodes connected to the in-vehicle relay device 10 into two VLANs (Virtual Local Area Networks) 40 and 50. In addition, the in-vehicle relay device 10 can also be configured to divide the multiple nodes connected to the in-vehicle relay device 10 into three or more.

[0054] <Schematic Structure of the In-Vehicle Relay Device 10>

[0055] Next, Figure 2 an example of the schematic structure of the in-vehicle relay device 10 will be described. As Figure 2 shown, the in-vehicle relay device 10 includes a power supply circuit 100, a PHY 110, an FPGA (Field-Programmable Gate Array) 120, and a microcomputer (hereinafter referred to as "MCU") 140.

[0056] The power supply circuit 100 supplies power to the PHY 110, the FPGA 120, and the MCU 140. The PHY 110 has multiple ports P. In Figure 2 this example, it is assumed to have six ports P. One end of the cable 30 is connected to each of these ports P. The other end of the cable 30 is connected to the terminal ECU 20.

[0057] PHY110 converts the signal supplied from FPGA120 into an electrical signal that can be transmitted to cable 30. In addition, PHY110 converts the signal supplied from terminal ECU20 via cable 30 into a signal that can be processed by FPGA120. PHY110 corresponds to the physical layer (i.e., the first layer) L1 in the OSI reference model. In PHY110, in addition to the above signal conversion, frame encoding, serial-parallel conversion, signal waveform conversion, etc. are also performed.

[0058] PHY110 is a hardware circuit including an analog circuit, etc. PHY110 corresponds to the hardware part. As an example, PHY110 is an IC. In addition, in Figure 2 as an example, one PHY110 having a plurality of ports P is shown, but it is not limited thereto. PHY110 may also be divided into a plurality of structures such as a structure independent for each port P.

[0059] FPGA120 is a kind of integrated electronic circuit such as a so-called PLD (Programmable Logic Device). FPGA120 also corresponds to a hardware circuit and a hardware part. FPGA120 is programmed to be able to execute the functions of the second layer L2 and the third layer L3 in the OSI reference model.

[0060] The second layer L2 is the data link layer. FPGA120 relays the communication within the same VLANs 40 and 50 through the function of the second layer L2. The third layer L3 is the network layer. FPGA120 relays the communication between different networks through the function of the third layer L3.

[0061] The microcomputer 140 is, for example, a general-purpose computer including a processor, a memory, I / O, and a bus connecting them. The microcomputer 140 executes various processes by executing a control program stored in the memory. The microcomputer 140 executes the functions of the fourth layer L4, the fifth layer L5, the sixth layer L6, and the seventh layer L7 by executing the program stored in the memory. That is, the functions of the fourth layer L4, the fifth layer L5, the sixth layer L6, and the seventh layer L7 are realized by software processing. The memory mentioned here is a non-transitory tangible storage medium that stores programs and data that can be read by a computer non-temporarily. In addition, the non-transitory tangible storage medium is implemented by a semiconductor memory, a magnetic disk, or the like. The microcomputer 140 corresponds to the software part.

[0062] The fourth layer L4 is the transport layer. The microcomputer 140 performs inter-program communication and data transmission guarantee through the functions of the fourth layer L4. The fifth layer L5 is the session layer. The sixth layer L6 is the presentation layer. The seventh layer L7 is the application layer. The microcomputer 140 performs user authentication through the functions of the fifth layer L5. The microcomputer 140 performs data encoding and decoding through the functions of the sixth layer L6. The microcomputer 140 performs user interface through the functions of the seventh layer L7. In addition, the in-vehicle relay device 10 having these functions can also be called a switching hub ECU.

[0063] <Overview Structure of FPGA 120>

[0064] Next, use Figure 3 to illustrate an example of the schematic structure of the FPGA 120. As Figure 3 shown, the FPGA 120 includes a second-layer relay unit 121, a third-layer relay unit 122, a second-layer anomaly detection unit 123, a third-layer anomaly detection unit 124, a first anomaly recording processing unit 125, and a first anomaly recording unit 126 as functional blocks.

[0065] The second-layer relay unit 121 relays communications within the same VLANs 40 and 50. The second-layer relay unit 121 can determine the node of the transmission signal based on the MAC (Media Access Control) address. The function of the second layer implemented by the second-layer relay unit 121 is sometimes also referred to as a switch.

[0066] The third-layer relay unit 122 relays communications between different networks. The third-layer relay unit 122 can determine the node of the transmission signal based on the IP (Internet Protocol) address. The function of the third layer implemented by the third-layer relay unit 122 is sometimes also referred to as a switch.

[0067] The second-layer anomaly detection unit 123 detects abnormal frames of the signals relayed by the second-layer relay unit 121. The abnormal frames mentioned here are frames with abnormalities that cannot be relayed. As an example, it detects abnormalities in the IP address and MAC address of the source and destination of the transmission. The abnormalities in the IP address and MAC address refer to abnormalities that are not permitted access in the ACL (access control list). In addition, it can be configured to detect communication of an undefined protocol as an abnormal frame. The second-layer anomaly detection unit 123 may not relay the detected abnormal frames.

[0068] The third - layer anomaly detection unit 124 detects anomaly frames of the signals relayed by the third - layer relay unit 122. As an example, it can detect anomalies in the IP addresses of the source and destination of the transmission. In addition, it can be configured to detect communication with an undefined protocol as an anomaly frame. The third - layer anomaly detection unit 124 may not relay the detected anomaly frames.

[0069] When the second - layer anomaly detection unit 123 detects an anomaly frame, the first anomaly recording processing unit 125 records the anomaly frame in the first anomaly recording unit 126. Additionally, when the third - layer anomaly detection unit 124 detects an anomaly frame, the first anomaly recording processing unit 125 records the anomaly frame in the first anomaly recording unit 126. As the first anomaly recording unit 126, for example, a volatile memory can be used. That is, the first anomaly recording unit 126 is a buffer. In addition, as the first anomaly recording unit 126, it can also be configured to use a non - volatile memory.

[0070] The first anomaly recording processing unit 125 can be configured to store the detected anomaly frames in the first anomaly recording unit 126 whenever either the second - layer anomaly detection unit 123 or the third - layer anomaly detection unit 124 detects anomaly data. When the first anomaly recording processing unit 125 records an anomaly frame in the first anomaly recording unit 126, it can record the anomaly frame in chronological order. Since the recording capacity of the first anomaly recording unit 126 is limited, it can be configured to overwrite in order starting from the oldest record when the recording capacity is exceeded.

[0071] To make it difficult to burden the memory of the first anomaly recording unit 126, the first anomaly recording processing unit 125 preferably records the part of the frame header other than the frame payload in the first anomaly recording unit 126 as an anomaly frame. In addition, the first anomaly recording processing unit 125 can also be configured to record the part of the frame including the frame payload and the frame header in the first anomaly recording unit 126 as an anomaly frame.

[0072] <Overview Structure of Microcomputer 140>

[0073] Next, Figure 4 An example of the schematic structure of the microcomputer 140 will be described. As Figure 4 shown, the microcomputer 140 includes an in - vehicle information recording and processing unit 141, an in - vehicle information recording unit 142, a first diagnostic recording and processing unit 143, and a diagnostic information recording unit 144 as functional blocks.

[0074] The in-vehicle information recording and processing unit 141 records the information sequentially transmitted from the terminal ECU 20 (hereinafter referred to as "in-vehicle information") in the in-vehicle information recording unit 142. That is, the in-vehicle information sequentially transmitted from other devices mounted on the vehicle is recorded in the in-vehicle information recording unit 142. As an example of the in-vehicle information, time information, the cumulative value of the section distance on the short-distance odometer, the cumulative value of the cumulative driving distance on the odometer, etc. can be cited. The in-vehicle information mentioned here can be information associated with the information on the abnormal condition of the vehicle, that is, diagnostic information (hereinafter referred to as "diagnostic information"). The in-vehicle information recording and processing unit 141 can be configured, for example, to record only one latest piece of in-vehicle information in the in-vehicle information recording unit 142.

[0075] As the in-vehicle information recording unit 142, for example, a volatile memory can be used. That is, the in-vehicle information recording unit 142 is a buffer. In addition, as the in-vehicle information recording unit 142, a structure using a non-volatile memory can also be set.

[0076] The first diagnostic record processing unit 143 periodically reads out the abnormal frames recorded in the first abnormal record unit 126 of the FPGA 120. And the first diagnostic record processing unit 143 records them together with the in-vehicle information recorded in the in-vehicle information recording unit 142 as diagnostic information in the diagnostic information recording unit 144. The association between the abnormal frames and the in-vehicle information can be performed by combining the information respectively recorded in the first abnormal record unit 126 and the in-vehicle information recording unit 142 in order from the latest information. As an example, it can be configured to read out a specified number of abnormal frames and in-vehicle information traced back from the nearest, and combine them in order from the latest information. The specified number mentioned here can be one or more. As the diagnostic information recording unit 144, for example, a non-volatile memory can be used.

[0077] <Diagnostic Record Association Processing in the Microcomputer 140>

[0078] Next, the Figure 5 flowchart is used to illustrate an example of the process of the process related to the recording of diagnostic information in the microcomputer 140 (hereinafter referred to as "diagnostic record association processing"). Figure 5 The flowchart of

[0079] First, in step S1, when vehicle-mounted information is sent from the terminal ECU20 (yes in S1), the process moves to step S2. On the other hand, when vehicle-mounted information is not sent from the terminal ECU20 (no in S1), the process moves to step S7. In step S2, the vehicle-mounted information recording processing unit 141 records the vehicle-mounted information sent from the terminal ECU20 in the vehicle-mounted information recording unit 142. It can be configured to overwrite the vehicle-mounted information recorded in the vehicle-mounted information recording unit 142 whenever new vehicle-mounted information is recorded, and only record the latest vehicle-mounted information.

[0080] In step S3, when it is the period for reading the abnormal frame from the first abnormal recording unit 126 of the FPGA120 (hereinafter referred to as "abnormal reading period") (yes in S3), the process moves to step S4. On the other hand, when it is not the abnormal reading period (no in S3), the process moves to step S7. The period for reading the abnormal frame can be set to an arbitrarily set time interval.

[0081] In step S4, when an abnormal frame is recorded in the first abnormal recording unit 126, that is, when there is an abnormal frame (yes in S4), the process moves to step S5. On the other hand, when no abnormal frame is recorded in the first abnormal recording unit 126, that is, when there is no abnormal frame (no in S4), the process moves to step S7.

[0082] In step S5, the first diagnosis recording processing unit 143 reads the abnormal frame recorded in the first abnormal recording unit 126. In step S6, the first diagnosis recording processing unit 143 records the abnormal frame read in S5 and the vehicle-mounted information recorded in the vehicle-mounted information recording unit 142 corresponding to the reading time of the abnormal frame as diagnosis information in the diagnosis information recording unit 144. As an example, the first diagnosis recording processing unit 143 can record the abnormal frame read in S5 and the latest vehicle-mounted information recorded in the vehicle-mounted information recording unit 142 as diagnosis information in the diagnosis information recording unit 144. In addition, in the FPGA120, it can be configured to delete the abnormal frame read from the first abnormal recording unit 126 from the recording in the first abnormal recording unit 126.

[0083] In step S7, when it is the end timing of the diagnosis record association process (yes in S7), the diagnosis record association process ends. As an example of the end timing of the diagnosis record association process, it can be set to the case where the power switch becomes off, etc. That is, it can be set to the case where the IG becomes off, etc. On the other hand, when it is not the end timing of the diagnosis record association process (no in S7), the process returns to S1 and the process is repeated.

[0084] <Summary of Embodiment 1>

[0085] According to the structure of Embodiment 1, since the in-vehicle relay device 10 is configured with the FPGA 120 as a hardware circuit for the second layer L2 and the third layer L3, the second-layer relay unit 121 and the third-layer relay unit 122 are also hardware circuits. By configuring the second-layer relay unit 121 and the third-layer relay unit 122 as hardware circuits, the processing becomes fast. Therefore, it is difficult to generate communication delays. In addition, by being configured as a hardware circuit, heat generation can also be suppressed. Moreover, since the microcomputer 140 only needs to execute the processing above the fourth layer L4, the microcomputer 140 can also use a device with relatively low performance.

[0086] In addition, according to the structure of Embodiment 1, diagnostic information formed by incorporating in-vehicle information such as time information sent from other electronic control devices into an abnormal frame can be recorded on the microcomputer 140 side. Since the microcomputer 140 executes functions above the fourth layer, the application layer is mounted on the microcomputer 140 side. Therefore, the diagnostic information recorded in the diagnostic information recording unit 144 can be read out using a diagnostic tool. Moreover, since the diagnostic information can be read out even if an application device is not mounted in the hardware circuit, the development cost can also be suppressed. As a result, it is difficult to generate communication delays and heat generation can also be suppressed, and not only can the diagnostic information of the abnormal frame detected during relaying in the hardware circuit be read out, but also the development cost can be suppressed.

[0087] (Embodiment 2)

[0088] In Embodiment 1, a structure in which the microcomputer 140 periodically reads out the abnormal frames recorded in the FPGA 120 is shown, but it is not necessarily limited to this. For example, a structure that solves the problems left by the structure of Embodiment 1 (hereinafter referred to as "Embodiment 2") can also be adopted. Hereinafter, an example of Embodiment 2 will be described with reference to the drawings.

[0089] First, the problems left by the structure of Embodiment 1 will be described. Considering the case where the microcomputer 140 periodically reads out the abnormal frames recorded in the FPGA 120, it is possible that correct information cannot be read in. Here, Figure 6 A specific example is used. Figure 6 is a diagram schematically showing the abnormal frames of the first abnormal recording unit 126 recorded in the FPGA 120. In Figure 6 's example, the case where up to four abnormal frames can be recorded in the first abnormal recording unit 126 is described.

[0090] When the microcomputer 140 periodically reads out the abnormal frames recorded in the FPGA 120, the timing of reading out the abnormal frames from the FPGA 120 and the timing of detecting the abnormal frames in the FPGA 120 may coincide. In this case, the order of the abnormal frames recorded in the first abnormal recording unit 126 may become incorrect. If Figure 6An example will be described as follows. If the fifth abnormal frame is detected during the process of reading the first abnormal frame, it is possible that the fifth abnormal frame is recorded in the area where the first abnormal frame is recorded, rather than after the fourth abnormal frame. In this case, after the first abnormal frame, the fifth abnormal frame will be read, and the second abnormal frame will not be read. The structure of Embodiment 2 can solve such problems.

[0091] The in-vehicle communication system 1 of Embodiment 2 is the same as the in-vehicle communication system 1 of Embodiment 1 except that the in-vehicle relay device 10a is included instead of the in-vehicle relay device 10.

[0092] <Overview Structure of In-Vehicle Relay Device 10a>

[0093] Next, Figure 7 an example of the schematic structure of the in-vehicle relay device 10a will be described. As Figure 7 shown, the in-vehicle relay device 10a includes a power supply circuit 100, a PHY 110, an FPGA 120a, and a microcomputer 140a. The in-vehicle communication system 1 of Embodiment 2 is the same as the in-vehicle relay device 10 of Embodiment 1 except that the FPGA 120a and the microcomputer 140a are included instead of the FPGA 120 and the microcomputer 140.

[0094] <Overview Structure of FPGA 120a>

[0095] Next, Figure 8 an example of the schematic structure of the FPGA 120a will be described. As Figure 8 shown, the FPGA 120a includes a second-layer relay unit 121, a third-layer relay unit 122, a second-layer abnormality detection unit 123, a third-layer abnormality detection unit 124, a first abnormality recording processing unit 125, a first abnormality recording unit 126, a counter 127, a count value recording processing unit 128, and a count value recording unit 132 as functional blocks. The FPGA 120a is the same as the FPGA 120 of Embodiment 1 except that the counter 127, the count value recording processing unit 128, and the count value recording unit 132 are included.

[0096] The counter 127 counts the number of occurrences of abnormal frames in either the second-layer relay unit 121 or the third-layer relay unit 122. The counter 127 can be configured to increment the count by 1 each time an abnormal frame is detected by either the second-layer abnormality detection unit 123 or the third-layer abnormality detection unit 124. The count value recording processing unit 128 records the count value counted by the counter 127 in the count value recording unit 132.

[0097] As the count value recording unit 132, for example, a volatile memory can be used. In addition, as the count value recording unit 132, a structure using a non-volatile memory can also be adopted. Further, the count value recording unit 132 can also be configured as a different storage area in the same memory as the first abnormality recording processing unit 125.

[0098] <Overview Structure of Microcomputer 140a>

[0099] Next, Figure 9 an example of the schematic structure of the microcomputer 140a will be described. As Figure 9 shown, the microcomputer 140a includes an in-vehicle information recording processing unit 141a, a first in-vehicle information recording unit 142a, a first diagnostic recording processing unit 143a, a diagnostic information recording unit 144, a difference detection unit 145, a count value recording unit 146, and a second in-vehicle information recording unit 147 as functional blocks. The microcomputer 140a is the same as the microcomputer 140 of Embodiment 1 except that it includes an in-vehicle information recording processing unit 141a, a first in-vehicle information recording unit 142a, a second in-vehicle information recording unit 147, and a first diagnostic recording processing unit 143a instead of the in-vehicle information recording processing unit 141, the in-vehicle information recording unit 142, and the first diagnostic recording processing unit 143, and that it includes a difference detection unit 145 and a count value recording unit 146.

[0100] The difference detection unit 145 periodically reads out the count value recorded in the count value recording unit 132 of the FPGA 120. That is, the difference detection unit 145 periodically reads out the number of generated abnormal frames recorded in the count value recording unit 132. The period mentioned here can be set to an arbitrarily set time interval. The difference detection unit 145 records the read count value in the count value recording unit 146. As the count value recording unit 146, for example, a volatile memory can be used. In addition, as the count value recording unit 146, a structure using a non-volatile memory can also be adopted. Further, each time the difference detection unit 145 reads out the count value, it detects the difference between the read count value and the count value at the time of the last read recorded in the count value recording unit 132.

[0101] The in-vehicle information recording processing unit 141a is the same as the in-vehicle information recording processing unit 141 of Embodiment 1 except that a part of the recording processing of the in-vehicle information sequentially transmitted from the terminal ECU 20 is different. The in-vehicle information recording processing unit 141a records only, for example, one latest piece of in-vehicle information among the in-vehicle information sequentially transmitted from the terminal ECU 20 in the first in-vehicle information recording unit 142a. That is, only the recording of the latest in-vehicle information is left in the first in-vehicle information recording unit 142a. As the first in-vehicle information recording unit 142a, for example, a volatile memory can be used. In addition, as the first in-vehicle information recording unit 142a, a structure using a non-volatile memory can also be adopted.

[0102] In addition, when the difference detection unit 145 detects a difference of 1 or more, the vehicle information recording processing unit 141a records the vehicle information corresponding to the number of times of the detected difference in the second vehicle information recording unit 147. As an example, when the difference detection unit 145 detects a difference of 1 or more, the vehicle information recording processing unit 141a may record the latest vehicle information recorded in the first vehicle information recording unit 142a in the second vehicle information recording unit 147 the number of times of the detected difference. The second vehicle information recording unit 147 corresponds to the vehicle information recording unit.

[0103] For example, when the detected difference is 1, one copy of the latest vehicle information is recorded in the second vehicle information recording unit 147. For example, when the detected difference is 3, three copies of the same latest vehicle information are recorded in the second vehicle information recording unit 147. Thus, it is possible to record the vehicle information closer to the time of generation of the abnormal frame corresponding to the number of copies of the detected abnormal frame. Each time the difference detection unit 145 detects a difference of 1 or more, the vehicle information recording processing unit 141a may record the latest vehicle information recorded in the first vehicle information recording unit 142a in the second vehicle information recording unit 147 the number of times of the detected difference in chronological order. As the second vehicle information recording unit 147, for example, a volatile memory can be used. In addition, as the second vehicle information recording unit 147, it may also be configured to use a non-volatile memory.

[0104] By shortening the period in which the difference detection unit 145 periodically detects the count value, it is possible to reduce the situation where a difference of 2 or more is detected, and it is possible to record the vehicle information transmitted from the terminal ECU 20 closer to the time of generation of the abnormal frame in the second vehicle information recording unit 147. Therefore, the period in which the difference detection unit 145 periodically detects the count value is preferably set, for example, to a period presumed to perform multiple detections within an average one trip. Here, the trip refers to the period from when the power switch is turned on to when it is turned off.

[0105] When the data relay in the second-layer relay unit 121 and the third-layer relay unit 122 stops, the first diagnosis record processing unit 143a reads out the abnormal frames recorded in the first abnormal record unit 126 of the FPGA 120. As an example, the first diagnosis record processing unit 143a may be configured to read out the abnormal frames when the power switch of the vehicle becomes off. That is, it may be configured to perform reading when the IG becomes off. When the IG is off, the vehicle relay device 10a can receive power supply from the backup power supply and execute the processing of the first diagnosis record processing unit 143a.

[0106] Further, the first diagnostic record processing unit 143a records the read abnormal frame and the vehicle information recorded in the second vehicle information recording unit 147 as diagnostic information in the diagnostic information recording unit 144. The first diagnostic record processing unit 143a may record the vehicle information recorded in the second vehicle information recording unit 147 and the abnormal frame recorded in the first abnormal recording unit 126 as diagnostic information in the diagnostic information recording unit 144 by establishing correspondence in the order of the recording time series.

[0107] <Diagnostic Record Association Processing in Microcomputer 140a>

[0108] Next, a flowchart of Figure 10 is used to illustrate an example of the process of diagnostic record association processing in the microcomputer 140a. Similar to the flowchart of Figure 5 the flowchart of Figure 10 can be configured to start when the power switch is turned on. In other words, it can be configured to start when the ignition is on.

[0109] First, in step S21, when vehicle information is sent from the terminal ECU 20 (Yes in S21), the process moves to step S22. On the other hand, when vehicle information is not sent from the terminal ECU 20 (No in S21), the process moves to step S28. In step S22, the vehicle information recording processing unit 141 records the vehicle information sent from the terminal ECU 20 in the first vehicle information recording unit 142a. It can be configured to overwrite the vehicle information recorded in the first vehicle information recording unit 142a whenever new vehicle information is recorded and only record the latest vehicle information.

[0110] In step S23, when it is the period for reading the count value of the count value recording unit 132 from the FPGA 120 (Yes in S23), the process moves to step S24. On the other hand, when it is not the reading period (No in S23), the process moves to step S28.

[0111] In step S24, the difference detection unit 145 reads the count value recorded in the count value recording unit 128. In step S25, the difference detection unit 145 calculates the difference between the previously read count value and the currently read count value. In step S26, when the count value calculated in S25 is 1 or more, that is, when there is a difference (Yes in S26), the process moves to step S27. On the other hand, when the count value calculated in S25 is 0, that is, when there is no difference (No in S26), the process moves to step S28.

[0112] In step S27, the vehicle information recording processing unit 141a records the latest vehicle information recorded in the first vehicle information recording unit 142a in the second vehicle information recording unit 147 the number of times of the difference detected in S25. In step S28, when the IG is turned off (Yes in S28), the process proceeds to step S29. On the other hand, when the IG is not turned off (No in S28), the process returns to S21 and the processing is repeated.

[0113] In step S29, when an abnormal frame is recorded in the first abnormality recording unit 126 (Yes in S29), the process proceeds to step S30. On the other hand, when no abnormal frame is recorded in the first abnormality recording unit 126 (No in S29), the diagnostic record association process ends.

[0114] In step S30, the first diagnostic record processing unit 143a reads out the abnormal frame recorded in the first abnormality recording unit 126. In step S31, the first diagnostic record processing unit 143a associates the abnormal frame read out in S30 with the vehicle information recorded in the second vehicle information recording unit 147 in the order of the recording time series, records the abnormal frame and the vehicle information together as diagnostic information in the diagnostic information recording unit 144, and ends the diagnostic record association process.

[0115] In addition, the vehicle information recording processing unit 141a may be configured to delete the vehicle information that has already been recorded as diagnostic information from the recording in the second vehicle information recording unit 147.

[0116] <Summary of Embodiment 2>

[0117] The structure of Embodiment 2 is also such that the vehicle relay device 10a uses the FPGA 120a as a hardware circuit to constitute the second layer L2 and the third layer L3. Therefore, similar to Embodiment 1, it is difficult to generate communication delays and heat generation can also be suppressed. In addition, since the microcomputer 140a only needs to execute the processing above the fourth layer L4, a device with not-so-high performance can also be used for the microcomputer 140a.

[0118] Moreover, the structure of Embodiment 2 is also such that diagnostic information formed by incorporating vehicle information sent from other electronic control devices into an abnormal frame can be recorded on the microcomputer 140a side. Therefore, similar to Embodiment 1, it is difficult to generate communication delays and heat generation can also be suppressed, and not only can diagnostic information be read out for the abnormal frames detected during relaying in the hardware circuit, but also the development cost can be suppressed.

[0119] In addition, according to the structure of Embodiment 2, since the abnormal frames recorded in the FPGA 120a are read out when the relaying of the second-layer relay unit 121 and the third-layer relay unit 122 stops, it is possible to prevent the order of the abnormal frames recorded in the first abnormal recording unit 126 from becoming incorrect. Further, according to the structure of Embodiment 2, since the in-vehicle information corresponding to the number of times of difference from the number of occurrences of the abnormally read frames read out periodically is recorded in the second in-vehicle information recording unit 147, it is possible to record the number of in-vehicle information corresponding to the number of detected abnormal frames and closer to the time of generation of the abnormal frames. Thus, when the relaying of the second-layer relay unit 121 and the third-layer relay unit 122 stops, the abnormal frames recorded in the FPGA 120a can be read out, and the in-vehicle information corresponding to the generated abnormal frames can be recorded together as diagnostic information.

[0120] (Embodiment 3)

[0121] In the foregoing embodiments, a structure in which the association between the detected abnormal frames and the in-vehicle information is shown on the side of the microcomputers 140 and 140a has been described, but it is not limited thereto. For example, a structure in which the association between the detected abnormal frames and the in-vehicle information is made on the hardware circuit side (hereinafter referred to as "Embodiment 3") may be adopted. Hereinafter, an example of Embodiment 3 will be described with reference to the drawings. The in-vehicle communication system 1 of Embodiment 3 is the same as the in-vehicle communication system 1 of Embodiment 1 except that the in-vehicle relay device 10b is included instead of the in-vehicle relay device 10.

[0122] <Overview Structure of In-vehicle Relay Device 10b>

[0123] Next, an example of the schematic structure of the in-vehicle relay device 10b will be described using Figure 11 As shown in Figure 11 , the in-vehicle relay device 10b includes a power supply circuit 100, a PHY 110, an FPGA 120b, and a microcomputer 140b. The in-vehicle communication system 1 of Embodiment 3 is the same as the in-vehicle relay device 10 of Embodiment 1 except that the FPGA 120b and the microcomputer 140b are included instead of the FPGA 120 and the microcomputer 140.

[0124] <Overview Structure of FPGA 120b>

[0125] Next, an example of the schematic structure of the FPGA 120b will be described using Figure 12 As shown in Figure 8As shown, the FPGA 120b includes a second-layer relay unit 121, a third-layer relay unit 122, a second-layer anomaly detection unit 123, a third-layer anomaly detection unit 124, a second anomaly recording and processing unit 125b, a second anomaly recording unit 126b, a vehicle information recording and processing unit 129, and a vehicle information recording unit 130 as functional blocks. The FPGA 120b is the same as the FPGA 120 in Embodiment 1 except that it includes the second anomaly recording and processing unit 125b and the second anomaly recording unit 126b instead of the first anomaly recording and processing unit 125 and the first anomaly recording unit 126, and that it includes the vehicle information recording and processing unit 129 and the vehicle information recording unit 130.

[0126] The vehicle information recording and processing unit 129 records the aforementioned vehicle information sequentially sent from the terminal ECU 20 in the vehicle information recording unit 130 via the microcomputer 140b. That is, the vehicle information sequentially sent from other devices mounted on the vehicle is recorded in the vehicle information recording unit 130 via the microcomputer 140b. The reason why the FPGA 120b does not directly acquire and record the vehicle information sent from the terminal ECU 20 is that the content of the frame cannot be determined as vehicle information without passing through the microcomputer 140b.

[0127] As the vehicle information recording unit 130, for example, a volatile memory can be used. In addition, as the vehicle information recording unit 130, a structure using a non-volatile memory can also be adopted. The vehicle information recording and processing unit 129 can be configured, for example, to overwrite and record whenever vehicle information is sent, and only record the latest piece of vehicle information in the vehicle information recording unit 130.

[0128] When an abnormal frame is detected by the second-layer anomaly detection unit 123 or the third-layer anomaly detection unit 124, the second anomaly recording and processing unit 125b records the abnormal frame in the second anomaly recording unit 126b in association with the vehicle information transmitted by being sent from the vehicle information transmission unit 148 of the microcomputer 140b described later when the abnormal frame is detected. As an example, when an abnormal frame is detected by the second-layer anomaly detection unit 123 or the third-layer anomaly detection unit 124, the abnormal frame can be recorded in the second anomaly recording unit 126b in association with the latest vehicle information recorded in the vehicle information recording unit 130. Thereby, it is possible to associate with the vehicle information closer to the time when the abnormal frame is detected. As the second anomaly recording unit 126b, for example, a volatile memory can be used, or a non-volatile memory can also be used.

[0129] <Overview Structure of the Microcomputer 140b>

[0130] Next, Figure 13 An example of the schematic structure of the microcomputer 140b will be described. As Figure 13As shown, the microcomputer 140b includes an in-vehicle information transmission unit 148, a second diagnostic record processing unit 143b, and a diagnostic information recording unit 144 as functional blocks. The microcomputer 140b is the same as the microcomputer 140 of Embodiment 1 except that it does not include an in-vehicle information recording and processing unit 141 and an in-vehicle information recording unit 142, includes a second diagnostic record processing unit 143b instead of a first diagnostic record processing unit 143, and includes an in-vehicle information transmission unit 148.

[0131] The in-vehicle information transmission unit 148 transmits the aforementioned in-vehicle information sequentially sent from the terminal ECU 20 to the FPGA 120b.

[0132] The second diagnostic record processing unit 143b reads out an abnormal frame recorded in the second abnormal record unit 126b of the FPGA 120b and the in-vehicle information associated with the abnormal frame, and records them as diagnostic information in the diagnostic information recording unit 144. The timing at which the second diagnostic record processing unit 143b reads out the group of the abnormal frame and the in-vehicle information from the FPGA 120b can be regular or at the occurrence time of a specified event. As an example of the specified event, it can be cited that the power switch is turned off, that is, the IG is turned off.

[0133] In addition, the second abnormal record processing unit 125b of the FPGA 120b can be configured to delete the group of the abnormal frame and the in-vehicle information read out by the microcomputer 140b from the record in the second abnormal record unit 126b.

[0134] <Diagnostic Record Association Processing in FPGA 120b>

[0135] Next, an example of the process of the diagnostic record association processing in the FPGA 120b will be described using Figure 14 the flowchart. Figure 14 The flowchart can be configured to start when the power switch is turned on. In other words, it can be configured to start when the IG is turned on.

[0136] First, in step S41, when in-vehicle information is sent from the microcomputer 140b (Yes in S41), the process proceeds to step S42. On the other hand, when in-vehicle information is not sent from the microcomputer 140b (No in S41), the process proceeds to step S45. In step S42, the in-vehicle information recording and processing unit 129 records the in-vehicle information sent from the microcomputer 140b in the in-vehicle information recording unit 130. It can be configured to overwrite the in-vehicle information recorded in the in-vehicle information recording unit 130 whenever new in-vehicle information is recorded, and only record the latest in-vehicle information.

[0137] In step S43, when an abnormal frame is detected by the second-layer abnormality detection unit 123 or the third-layer abnormality detection unit 124 (Yes in S43), the process moves to step S44. On the other hand, when an abnormal frame is not detected by the second-layer abnormality detection unit 123 and the third-layer abnormality detection unit 124 (No in S43), the process moves to step S45.

[0138] In step S44, the second abnormality recording processing unit 125b records the abnormal frame detected in S43 in the second abnormality recording unit 126b in association with the latest vehicle-mounted information recorded in the vehicle-mounted information recording unit 130.

[0139] In step S45, when it is the end timing of the diagnostic record association process (Yes in S45), the diagnostic record association process ends. As an example of the end timing of the diagnostic record association process, it can be set to the case where the power switch is turned off, etc. That is, it can be set to the case where the IG is turned off, etc. On the other hand, when it is not the end timing of the diagnostic record association process (No in S45), the process returns to S41 and the process is repeated.

[0140] <Summary of Embodiment 3>

[0141] In the structure of Embodiment 3 as well, the in-vehicle relay device 10b uses the FPGA 120b as a hardware circuit to constitute the second layer L2 and the third layer L3. Therefore, similar to Embodiment 1, it is difficult for communication delay to occur and heat generation can also be suppressed. In addition, since the microcomputer 140b only needs to execute the processing above the fourth layer L4, the microcomputer 140b can also use a device with not-so-high performance.

[0142] Moreover, according to the structure of Embodiment 3, it is possible to record diagnostic information formed by incorporating vehicle-mounted information sent from other electronic control devices when an abnormal frame is detected into the abnormal frame on the microcomputer 140b side. Therefore, it is difficult for communication delay to occur and heat generation can also be suppressed. In addition, it is possible to read out diagnostic information for abnormal frames detected during relaying in the hardware circuit, and at the same time, development costs can be suppressed.

[0143] (Embodiment 4)

[0144] In the foregoing embodiments, a structure in which the PHY 110 is separately provided from the FPGAs 120, 120a, and 120b is shown, but it is not necessarily limited thereto. For example, it can also be configured such that the FPGAs 120, 120a, and 120b also have the function of the PHY 110.

[0145] (Embodiment 5)

[0146] In addition, the hardware circuit can also be a hardware circuit equipped with a processor such as a CPU.

[0147] (Embodiment 6)

[0148] In Embodiment 1, a structure is shown in which the software part that executes the functions of the fourth layer L4 to the seventh layer L7 is separately provided from the hardware circuit, but it is not necessarily limited thereto. For example, it may be configured such that the software part that executes the functions of the fourth layer L4 to the seventh layer L7 is mounted on the hardware circuit (hereinafter, referred to as "Embodiment 6"). Hereinafter, an example of Embodiment 6 will be described with reference to the drawings.

[0149] The in-vehicle communication system 1c of Embodiment 6 is the same as the in-vehicle communication system 1 of Embodiment 1 except that the in-vehicle relay device 10c is included instead of the in-vehicle relay device 10.

[0150] <Schematic Structure of In-Vehicle Relay Device 10c>

[0151] Next, Figure 15 an example of the schematic structure of the in-vehicle relay device 10c will be described. As Figure 15 shown, the in-vehicle relay device 10 includes a power supply circuit 100 and an FPGA 200.

[0152] The power supply circuit 100 is the same as the power supply circuit of Embodiment 1 and supplies power to the FPGA 200. The FPGA 200 is a type of integrated electronic circuit such as a so-called PLD. The FPGA 200 also corresponds to a hardware circuit. The FPGA 200 is programmed to be able to execute the functions of the first layer L1 to the third layer L3 in the OSI reference model.

[0153] The FPGA 200 converts the signal supplied from the terminal ECU 20 via the cable 30 into a signal that can be processed by the FPGA 200 through the function of the first layer L1. In addition, the FPGA 200 converts the signal supplied from the FPGA 200 into an electrical signal that can be transmitted to the cable 30 through the function of the first layer L1. The FPGA 200 performs signal conversion, frame encoding, serial-parallel conversion, signal waveform conversion, etc. The FPGA 200 relays the communication within the same VLANs 40 and 50 through the function of the second layer L2. The FPGA 200 relays the communication between different networks through the function of the third layer L3.

[0154] <Schematic Structure of FPGA 200>

[0155] Next, Figure 15 an example of the schematic structure of the FPGA 200 will be described. As Figure 15 shown, the FPGA 200 includes a PHY 210, a memory 220, a relay circuit 230, and a CPU 240.

[0156] PHY210 can be the same as PHY110 in Embodiment 1 except that it is included in FPGA200. PHY210 corresponds to the physical layer (i.e., the first layer) L1 in the OSI reference model. PHY210 corresponds to the hardware part.

[0157] Memory 220 is a common memory for relay circuit 230 and CPU 240. Memory 220 can at least read out the information recorded by relay circuit 230 and the information recorded by CPU 240 from CPU 240. Memory 220 can be set as a volatile memory. For example, as Memory 220, a structure using RAM can be set. As Memory 220, a structure using registers can also be set. In addition, as Memory 220, a structure using a non-volatile memory can also be set. Hereinafter, the case where RAM is used as Memory 220 will be taken as an example for explanation.

[0158] Relay circuit 230 undertakes the function of communication relay. Relay circuit 230 is a logic circuit that executes the relay function in the second layer L2 and the third layer L3 by making the hardware operate without making the software operate. Relay circuit 230 can also be renamed as a logic circuit designed in hardware language. Relay circuit 230 corresponds to the hardware part.

[0159] CPU 240 is a processor that makes the software operate to execute functions. CPU 240 executes various processes by executing a control program. This control program can be set as a structure stored in the non-volatile memory of FPGA 200. CPU 240 realizes the functions of the fourth layer L4, the fifth layer L5, the sixth layer L6, and the seventh layer L7 through software processing. CPU 240 corresponds to the software part.

[0160] <Overview Structure of Memory 220>

[0161] Next, use Figure 16 to illustrate an example of the schematic structure of Memory 220. As Figure 16 shown, Memory 220 includes a first exception recording unit 221, a vehicle information recording unit 222, and a diagnostic information recording unit 223 as functional blocks.

[0162] The first exception recording unit 221 records exception frames through a first exception recording processing unit 235 described later. The vehicle information recording unit 222 records vehicle information through a vehicle information recording processing unit 241 described later. The diagnostic information recording unit 223 records diagnostic information obtained by combining vehicle information and exception frames through a first diagnostic recording processing unit 242 described later.

[0163] <Overview Structure of Relay Circuit 230>

[0164] Next, use Figure 17An example of the schematic structure of the relay circuit 230 will be described. As Figure 17 shown, the relay circuit 230 includes a second-layer relay unit 231, a third-layer relay unit 232, a second-layer anomaly detection unit 233, a third-layer anomaly detection unit 234, and a first anomaly recording and processing unit 235 as functional blocks.

[0165] The second-layer relay unit 231 is the same as the second-layer relay unit 121 in Embodiment 1, and relays communications within the same VLANs 40 and 50. The third-layer relay unit 232 is the same as the third-layer relay unit 122 in Embodiment 1, and relays communications between different networks. The second-layer anomaly detection unit 233 is the same as the second-layer anomaly detection unit 123 in Embodiment 1, and detects abnormal frames of the signals relayed by the second-layer relay unit 231. The third-layer anomaly detection unit 234 is the same as the third-layer anomaly detection unit 124 in Embodiment 1, and detects abnormal frames of the signals relayed by the third-layer relay unit 232.

[0166] When an abnormal frame is detected by the second-layer anomaly detection unit 233, the first anomaly recording and processing unit 235 records the abnormal frame in the first anomaly recording unit 221 of the memory 220 in the same manner as the first anomaly recording and processing unit 125 in Embodiment 1. Additionally, when an abnormal frame is detected by the third-layer anomaly detection unit 234, the first anomaly recording and processing unit 235 records the abnormal frame in the first anomaly recording unit 221 of the memory 220 in the same manner as the first anomaly recording and processing unit 125 in Embodiment 1.

[0167] <Overview of the Schematic Structure of CPU 240>

[0168] Next, an example of the schematic structure of the CPU 240 will be described using Figure 18 As Figure 18 shown, the CPU 240 includes an in-vehicle information recording and processing unit 241 and a first diagnostic recording and processing unit 242 as functional blocks.

[0169] The in-vehicle information recording and processing unit 241 records the in-vehicle information sequentially sent from the terminal ECU 20 in the in-vehicle information recording unit 222 of the memory 220 in the same manner as the in-vehicle information recording and processing unit 141 in Embodiment 1. The in-vehicle information recording and processing unit 241 can be configured, for example, to record only one latest piece of in-vehicle information in the in-vehicle information recording unit 222.

[0170] The first diagnostic record processing unit 242 periodically reads out the abnormal frames recorded in the first abnormal record unit 221 of the memory 220. Then, the first diagnostic record processing unit 242 records the abnormal frames together with the vehicle-mounted information corresponding to the time when the abnormal frames are detected and recorded in the vehicle-mounted information record unit 222 of the memory 220 as diagnostic information in the diagnostic information record unit 223 of the memory 220. The first diagnostic record processing unit 242 can establish the correspondence between the abnormal frames and the vehicle-mounted information by sequentially combining the information recorded in the first abnormal record unit 221 and the vehicle-mounted information record unit 222 starting from the latest information. As an example, it can be configured to read out a specified number of abnormal frames and vehicle-mounted information traced back from the most recent one, and sequentially combine them starting from the latest information. The specified number mentioned here can be one or multiple.

[0171] Regarding the diagnostic record association processing associated with the recording of diagnostic information in the CPU 240, it can be configured to perform the same as the diagnostic record association processing shown in the Figure 5 flowchart.

[0172] <Summary of Embodiment 6>

[0173] In the structure of Embodiment 6, the in-vehicle relay device 10c also executes the second layer L2 and the third layer L3 through the operation of hardware. Therefore, similar to Embodiment 1, communication delay is less likely to occur and heat generation can also be suppressed. In addition, since the CPU 240 only needs to execute the processing above the fourth layer L4, a device with relatively low performance can also be used for the CPU 240.

[0174] According to the structure of Embodiment 6, the CPU 240 reads out the abnormal frames recorded in the first abnormal record unit 221 through the relay circuit 230, and records the abnormal frames together with the vehicle-mounted information recorded in the vehicle-mounted information record unit 222 through the CPU 240 as diagnostic information in the diagnostic information record unit 223 that can be read out by the CPU 240. Therefore, even when an abnormal frame is detected through the operation of the relay circuit 230 as a hardware unit and the vehicle-mounted information is recorded through the operation of the CPU 240 as a software unit, the CPU 240 as a software unit can read out the diagnostic information in which the vehicle-mounted information sent from other electronic control devices is incorporated into the abnormal frames. Since the functions of the application layer are executed by the CPU 240, the diagnostic information recorded in the diagnostic information record unit 223 can be read out by a diagnostic tool. Moreover, even if the application layer is not installed in the hardware unit, the diagnostic information can still be read out. Therefore, the change of the specifications of the application layer becomes easier, and the development cost can also be suppressed.

[0175] (Embodiment 7)

[0176] In Embodiment 2, a structure is shown in which the software unit that executes the functions of the fourth layer L4 to the seventh layer L7 is separately provided from the hardware circuit, but it is not necessarily limited thereto. For example, it may be configured such that the software unit that executes the functions of the fourth layer L4 to the seventh layer L7 is mounted on the hardware circuit (hereinafter, referred to as "Embodiment 7"). Hereinafter, an example of Embodiment 7 will be described with reference to the drawings.

[0177] In the structure of Embodiment 6, when the CPU 240 periodically reads the abnormal frames recorded in the memory 220, the timing of reading the abnormal frames may coincide with the timing of detecting the abnormal frames, similar to the structure of Embodiment 1. In this case, the order of the abnormal frames recorded in the first abnormal record unit 221 may become incorrect. The structure of Embodiment 7 can solve such a problem.

[0178] The in-vehicle communication system 1d of Embodiment 7 is the same as the in-vehicle communication system 1a of Embodiment 2 except that the in-vehicle relay device 10d is included instead of the in-vehicle relay device 10a.

[0179] <Overview Structure of In-Vehicle Relay Device 10d>

[0180] Next, an example of the schematic structure of the in-vehicle relay device 10d will be described using Figure 19 As shown in Figure 19 , the in-vehicle relay device 10d includes a power supply circuit 100 and an FPGA 300.

[0181] The power supply circuit 100 is the same as the power supply circuit of Embodiment 6 and supplies power to the FPGA 300. The FPGA 300 is the same as the FPGA 200 of Embodiment 6 except that a part of the processing is different.

[0182] <Overview Structure of FPGA 300>

[0183] Next, an example of the schematic structure of the FPGA 300 will be described using Figure 19 As shown in Figure 19 , the FPGA 300 includes a PHY 210, a memory 320, a relay circuit 330, and a CPU 340.

[0184] The memory 320 is the same as the memory 220 of Embodiment 6 except that a part of the functional blocks are different. The memory 320 can read the information recorded by the relay circuit 330 and the information recorded by the CPU 340 from the relay circuit 330 and the CPU 340.

[0185] The relay circuit 330 is the same as the relay circuit 220 of Embodiment 6 except for some different functional blocks. That is, the relay circuit 330 is a logic circuit that executes the relay function in the second layer L2 and the third layer L3 by operating hardware without operating software. The relay circuit 330 can also be referred to as a logic circuit designed in hardware language. The relay circuit 330 also corresponds to the hardware part. The CPU 340 is the same processor as the CPU 240 of Embodiment 8 except for some different functional blocks. The CPU 340 also corresponds to the software part.

[0186] <Schematic Structure of Memory 320>

[0187] Next, use Figure 20 to illustrate an example of the schematic structure of the memory 320. As Figure 20 shown, the memory 320 includes a first exception recording unit 221, a diagnostic information recording unit 223, a count value recording unit 321, a first vehicle-mounted information recording unit 322, and a second vehicle-mounted information recording unit 323 as functional blocks. That is, the memory 320 is the same as the memory 220 of Embodiment 6 except for including the count value recording unit 321 and including the first vehicle-mounted information recording unit 322 and the second vehicle-mounted information recording unit 323 instead of the vehicle-mounted information recording unit 222.

[0188] The count value recording unit 321 records, through a count value recording processing unit 332 described later, a count value that counts the number of generated abnormal frames in either the second-layer relay unit 231 or the third-layer relay unit 232. The first vehicle-mounted information recording unit 322 records, through a vehicle-mounted information recording processing unit 341 described later, only, for example, one latest piece of vehicle-mounted information among the vehicle-mounted information sequentially transmitted from the terminal ECU 20. The second vehicle-mounted information recording unit 323 records, through the vehicle-mounted information recording processing unit 341 described later, the number of times of the difference detected by a difference detection unit 341 described later for the latest vehicle-mounted information recorded in the first vehicle-mounted information recording unit 322.

[0189] <Schematic Structure of Relay Circuit 330>

[0190] Next, use Figure 21 to illustrate an example of the schematic structure of the relay circuit 330. As Figure 21 shown, the relay circuit 330 includes a second-layer relay unit 231, a third-layer relay unit 232, a second-layer abnormality detection unit 233, a third-layer abnormality detection unit 234, a first exception recording processing unit 235, a counter 331, and a count value recording processing unit 332 as functional blocks. The first exception recording processing unit 235 is the same as the first exception recording processing unit 235 of Embodiment 6 except for recording in the memory 320.

[0191] The counter 331 is the same as the counter 127 in Embodiment 2, and counts the number of abnormal frames generated in either the second-layer relay unit 231 or the third-layer relay unit 232. The count value recording processing unit 332 records the count value counted by the counter 331 in the count value recording unit 321 of the memory 330.

[0192] <Overview Structure of CPU 340>

[0193] Next, use Figure 22 to illustrate an example of the schematic structure of the CPU 340. As Figure 22 shown, the CPU 340 includes a difference detection unit 341, a vehicle information recording processing unit 342, and a first diagnostic recording processing unit 343 as functional blocks.

[0194] The difference detection unit 341 periodically reads out the count value recorded in the count value recording unit 321 of the memory 320. That is, it periodically reads out the number of abnormal frames generated and recorded in the count value recording unit 321. The period mentioned here can be set to an arbitrarily set time interval. The difference detection unit 341 records the read count value in the count value recording unit 321. Each time the difference detection unit 341 reads the count value, it detects the difference between the read count value and the count value read last time and recorded in the count value recording unit 321.

[0195] The vehicle information recording processing unit 342 records only, for example, one latest piece of vehicle information among the vehicle information sequentially transmitted from the terminal ECU 20 in the first vehicle information recording unit 322. That is, only the record of the latest vehicle information is left in the first vehicle information recording unit 322.

[0196] In addition, the vehicle information recording processing unit 342 is the same as the vehicle information recording processing unit 141a in Embodiment 2. When the difference detection unit 341 detects a difference of 1 or more, it records the vehicle information corresponding to the detected difference in the second vehicle information recording unit 323. This second vehicle information recording unit 323 also corresponds to the vehicle information recording unit. Each time the difference detection unit 341 detects a difference of 1 or more, the vehicle information recording processing unit 342 only needs to record the latest vehicle information recorded in the first vehicle information recording unit 322 in the second vehicle information recording unit 323 in the order of time series for the number of times of the detected difference.

[0197] The first diagnostic record processing unit 343 is the same as the first diagnostic record processing unit 143a in Embodiment 2. When the data relay in the second-layer relay unit 231 and the third-layer relay unit 232 stops, it reads out the abnormal frames recorded in the first abnormal record unit 221 of the memory 320. And, similar to the first diagnostic record processing unit 143a in Embodiment 2, the first diagnostic record processing unit 343 records the read abnormal frames together with the vehicle-mounted information recorded in the second vehicle-mounted information record unit 323 as diagnostic information in the diagnostic information record unit 223.

[0198] Regarding the diagnostic record association processing related to the recording of diagnostic information in the CPU 340, it can be configured to be the same as the Figure 10 diagnostic record association processing shown in the flowchart.

[0199] <Summary of Embodiment 7>

[0200] The structure of Embodiment 7 is also such that the vehicle-mounted relay device 10d executes the second layer L2 and the third layer L3 through the operation of hardware. Therefore, similar to Embodiment 1, it is difficult to generate communication delays and can also suppress heat generation. In addition, since the CPU 340 only needs to execute the processing above the fourth layer L4, a device with not-so-high performance can also be used for the CPU 340.

[0201] Moreover, the structure of Embodiment 7 can also read out the diagnostic information in which the vehicle-mounted information sent from other electronic control devices is incorporated into the abnormal frames through the operation of the CPU 340 as a software unit. Therefore, similar to Embodiment 1, it is difficult to generate communication delays and can also suppress heat generation, and it can not only read out the diagnostic information for the abnormal frames detected during relay in the hardware circuit, but also suppress the development cost.

[0202] In addition to this, according to the structure of Embodiment 7, since the abnormal frames recorded in the memory 220 are read out when the relay in the second-layer relay unit 231 and the third-layer relay unit 232 stops, it is possible to prevent the order of the abnormal frames recorded in the first abnormal record unit 221 from becoming incorrect. Also, according to the structure of Embodiment 7, since the vehicle-mounted information corresponding to the number of times of the difference from the generation times of the regularly read abnormal frames is recorded in the second vehicle-mounted information record unit 323, it is possible to record the vehicle-mounted information closer to the time of generation of the abnormal frames corresponding to the number of copies of the detected abnormal frames. Thus, it is possible to read out the abnormal frames recorded in the memory 220 when the relay in the second-layer relay unit 231 and the third-layer relay unit 232 stops, and record them together with the vehicle-mounted information corresponding to the generated abnormal frames respectively as diagnostic information.

[0203] (Embodiment 8)

[0204] In Embodiment 3, a configuration is shown in which the software unit that executes the functions of the fourth layer L4 to the seventh layer L7 is separately provided from the hardware circuit, but it is not necessarily limited to this. For example, the software unit that executes the functions of the fourth layer L4 to the seventh layer L7 may be mounted on the hardware circuit (hereinafter, referred to as "Embodiment 8"). Hereinafter, an example of Embodiment 8 will be described with reference to the drawings.

[0205] The in-vehicle communication system 1d of Embodiment 8 is the same as the in-vehicle communication system 1b of Embodiment 3 except that the in-vehicle relay device 10e is included instead of the in-vehicle relay device 10b.

[0206] <Overview Structure of In-Vehicle Relay Device 10e>

[0207] Next, Figure 23 an example of the schematic structure of the in-vehicle relay device 10e will be described. As Figure 23 shown, the in-vehicle relay device 10e includes a power supply circuit 100 and an FPGA 400.

[0208] The power supply circuit 100 is the same as the power supply circuit of Embodiment 8 and supplies power to the FPGA 400. The FPGA 400 is the same as the FPGA 200 of Embodiment 6 except that a part of the processing is different.

[0209] <Overview Structure of FPGA 400>

[0210] Next, Figure 23 an example of the schematic structure of the FPGA 400 will be described. As Figure 23 shown, the FPGA 400 includes a PHY 210, a memory 420, a relay circuit 430, and a CPU 440.

[0211] The memory 420 is the same memory as the memory 220 of Embodiment 6 except that a part of the functional blocks are different. The memory 420 can also read the information recorded by the relay circuit 430 and the information recorded by the CPU 440 from the relay circuit 430 and the CPU 440. The relay circuit 430 is the same as the relay circuit 220 of Embodiment 6 except that a part of the functional blocks are different. The relay circuit 430 also corresponds to the hardware unit. The CPU 440 is the same processor as the CPU 240 of Embodiment 6 except that a part of the functional blocks are different. The CPU 440 also corresponds to the software unit.

[0212] <Overview Structure of Memory 420>

[0213] Next, Figure 24 an example of the schematic structure of the memory 420 will be described. As Figure 24As shown in the figure, the memory 420 includes an in-vehicle information recording unit 421, a second abnormality recording unit 422, and a diagnostic information recording unit 223 as functional blocks. That is, the memory 420 is the same as the memory 220 of Embodiment 6 except that it includes the second abnormality recording unit 422 instead of the first abnormality recording unit 221 and includes the in-vehicle information recording unit 421 instead of the in-vehicle information recording unit 222.

[0214] The in-vehicle information recording unit 421 records, via the in-vehicle information transmission unit 441 described later, only, for example, the latest in-vehicle information among the in-vehicle information sequentially transmitted from the terminal ECU 20. The second abnormality recording unit 422 records the abnormality frame in association with the in-vehicle information via the second abnormality recording processing unit 431 described later. The diagnostic information recording unit 223 records the diagnostic information obtained by combining the in-vehicle information and the abnormality frame via the second diagnostic recording processing unit 442 described later.

[0215] <Overview Structure of Relay Circuit 430>

[0216] Next, Figure 25 an example of the schematic structure of the relay circuit 430 will be described. As Figure 25 shown in the figure, the relay circuit 430 includes a second-layer relay unit 231, a third-layer relay unit 232, a second-layer abnormality detection unit 233, a third-layer abnormality detection unit 234, and a second abnormality recording processing unit 431 as functional blocks.

[0217] When an abnormality frame is detected by the second-layer abnormality detection unit 233 or the third-layer abnormality detection unit 234, the second abnormality recording processing unit 431 records the abnormality frame in association with the in-vehicle information transmitted via the in-vehicle information transmission unit 441 of the CPU 440 and recorded in the in-vehicle information recording unit 421 at the time of detecting the abnormality frame in the second abnormality recording unit 422. Since the in-vehicle information recording unit 421 can also be read out from the relay circuit 430 as a hardware unit, the in-vehicle information is transmitted to the relay circuit 430 by recording the in-vehicle information in the in-vehicle information recording unit 421 via the in-vehicle information transmission unit 441 of the CPU 440. As an example, the second abnormality recording processing unit 431 may record the abnormality frame in association with the latest in-vehicle information recorded in the in-vehicle information recording unit 421 of the memory 420 by the in-vehicle information transmission unit 441 in the second abnormality recording unit 422. Thereby, it is possible to associate with the in-vehicle information closer to the time when the abnormality frame is detected.

[0218] <Overview Structure of CPU 440>

[0219] Next, Figure 26 an example of the schematic structure of the CPU 440 will be described. As Figure 26As shown, the CPU 440 includes an in-vehicle information transmission unit 441 and a second diagnostic record processing unit 442 as functional blocks.

[0220] The in-vehicle information transmission unit 441 records only, for example, one latest piece of in-vehicle information among the aforementioned in-vehicle information sequentially transmitted from the terminal ECU 20 in the in-vehicle information recording unit 421 of the memory 420.

[0221] The second diagnostic record processing unit 442 reads out a group of an abnormal frame and in-vehicle information recorded in the second abnormal record unit 422 of the memory 420, and records it as diagnostic information in the diagnostic information recording unit 223 of the memory 420. In addition, it can be configured to delete the group of the abnormal frame and in-vehicle information read out by the second diagnostic record processing unit 442 from the records in the second abnormal record unit 422.

[0222] Regarding the diagnostic record association process associated with the recording of diagnostic information in the CPU 440, it can be configured to be the same as the diagnostic record association process shown in the Figure 14 flowchart.

[0223] <Summary of Embodiment 8>

[0224] The structure of Embodiment 8 is also such that the in-vehicle relay device 10e executes the second layer L2 and the third layer L3 through the operation of hardware. Therefore, similar to Embodiment 1, it is difficult to generate communication delays and heat generation can also be suppressed. In addition, since the CPU 440 only needs to execute processing above the fourth layer L4, a device with not-so-high performance can also be used for the CPU 440.

[0225] Moreover, the structure of Embodiment 8 is also such that diagnostic information formed by incorporating in-vehicle information transmitted from other electronic control devices into an abnormal frame can be read out through the operation of the CPU 440 as a software unit. Therefore, similar to Embodiment 1, it is difficult to generate communication delays and heat generation can also be suppressed, and not only can the diagnostic information of the abnormal frame detected during relaying in the hardware circuit be read out, but also the development cost can be suppressed.

[0226] (Embodiment 9)

[0227] In the foregoing Embodiments 6 to 8, a structure in which the FPGAs 200, 300, 400 have the functions of the PHY 210 is shown, but it is not necessarily limited thereto. For example, it can also be configured to separately include the PHY 210 and the FPGAs 200, 300, 400.

[0228] (Embodiment 10)

[0229] In the foregoing embodiments, an example of using an FPGA as a hardware circuit is shown, but it is not necessarily limited thereto. It may also be configured to use a hardware circuit other than an FPGA as the hardware circuit. For example, it may be configured to use an ASIC or the like instead of an FPGA as the hardware circuit.

[0230] (Embodiment 11)

[0231] In addition, it may also be configured to separately provide a hardware circuit having the functions of the first layer L1 and the second layer L2 and a hardware circuit having the function of the third layer L3.

[0232] Furthermore, the present disclosure is not limited to the above-described embodiments, and various modifications can be made within the scope shown in the claims. Embodiments obtained by appropriately combining technical means separately disclosed in different embodiments are also included in the technical scope of the present disclosure.

Claims

1. A vehicle-mounted relay device is used in a vehicle and includes a hardware unit for operating hardware and a software unit for operating software. The functions of the first to third layers in the OSI reference model are executed by the operation of the hardware, while the functions above the fourth layer are executed by the operation of the software. The hardware unit includes a second-layer relay unit for implementing the relay function in the second layer and a third-layer relay unit for implementing the relay function in the third layer. The vehicle-mounted relay device is characterized in that the software unit includes a vehicle information recording and processing unit, which records vehicle information, that is, information sequentially sent from other devices mounted on the vehicle, in a vehicle information recording unit that can be read out from the software unit. The hardware unit includes a first anomaly recording and processing unit, which, when detecting an abnormal frame during the relay of data in either the second-layer relay unit or the third-layer relay unit, records the abnormal frame in a first anomaly recording unit that can be read out from the software unit. The software unit includes a first diagnosis recording and processing unit, which reads out the abnormal frame recorded in the first anomaly recording unit and records the abnormal frame together with the vehicle information recorded in the vehicle information recording unit as diagnostic information in a diagnostic information recording unit that can be read out from the software unit.

2. The vehicle-mounted relay device according to claim 1, characterized in that the first diagnosis recording and processing unit periodically reads out the abnormal frame recorded in the first anomaly recording unit and records the abnormal frame together with the vehicle information corresponding to the time of reading out the abnormal frame and recorded in the vehicle information recording unit as the diagnostic information in the diagnostic information recording unit.

3. The vehicle-mounted relay device according to claim 1, characterized in that the hardware unit includes: a counter for counting the number of occurrences of the abnormal frame in the relay unit; and a count value recording and processing unit for recording the number of occurrences of the abnormal frame counted by the counter in a count value recording unit that can be read out from the software unit; the software unit includes a difference detection unit, which periodically reads out the number of occurrences of the abnormal frame recorded in the count value recording unit and detects the difference between the number of occurrences of the abnormal frame at the current reading and the number of occurrences of the abnormal frame at the previous reading. When the difference detection unit detects a difference of 1 or more, the vehicle information recording and processing unit records the vehicle information corresponding to the detected difference in the vehicle information recording unit that can be read out from the software unit. The first diagnosis recording and processing unit reads out the abnormal frame recorded in the first anomaly recording unit when the relay of data in the relay unit stops and records the abnormal frame together with the vehicle information recorded in the vehicle information recording unit as the diagnostic information in the diagnostic information recording unit that can be read out from the software unit.

4. The vehicle-mounted relay device according to any one of claims 1 to 3, characterized in that the hardware unit is a hardware circuit, the software unit is a microcomputer. The functions of the first to third layers in the OSI reference model are executed by the hardware circuit, while the functions above the fourth layer are executed by the microcomputer.

5. The in-vehicle relay device according to claim 4, wherein the microcomputer includes the in-vehicle information recording unit and the diagnostic information recording unit, and the hardware circuit includes the first abnormality recording unit.

6. The in-vehicle relay device according to any one of claims 1 to 3, wherein the hardware unit is a logic circuit that operates the hardware in the hardware circuit, the software unit is a processor mounted on the hardware circuit, the functions of the first to third layers in the OSI reference model are executed by the logic circuit, while the functions above the fourth layer are executed by the processor.

7. The in-vehicle relay device according to claim 6, wherein the in-vehicle relay device includes a memory shared by the logic circuit and the processor and mounted on the hardware circuit, and the memory includes the in-vehicle information recording unit, the diagnostic information recording unit, and the first abnormality recording unit.

8. An in-vehicle relay device used in a vehicle, including a hardware unit that operates hardware and a software unit that operates software, wherein the functions of the first to third layers in the OSI reference model are executed by the hardware unit, while the functions above the fourth layer are executed by the software unit, the hardware unit has a second layer relay unit that implements the relay function in the second layer and a third layer relay unit that implements the relay function in the third layer, characterized in that the software unit includes an in-vehicle information transfer unit that transfers in-vehicle information, which is information sequentially sent from other devices mounted on the vehicle, to the hardware unit, the hardware unit includes a second abnormality recording and processing unit that, when an abnormal frame is detected during the relay of data in either the second layer relay unit or the third layer relay unit, records the abnormal frame and the in-vehicle information transferred from the in-vehicle information transfer unit when the abnormal frame is detected in a second abnormality recording unit that can be read out by the software unit in an associated manner, the software unit includes a second diagnostic recording and processing unit that reads out the abnormal frame and the in-vehicle information associated with the abnormal frame recorded in the second abnormality recording unit and records the abnormal frame and the in-vehicle information as diagnostic information in a diagnostic information recording unit that can be read out by the software unit.

9. The in-vehicle relay device according to claim 8, wherein the hardware unit is a hardware circuit, the software unit is a microcomputer, the functions of the first to third layers in the OSI reference model are executed by the hardware circuit, while the functions above the fourth layer are executed by the microcomputer.

10. The in-vehicle relay device according to claim 9, wherein the microcomputer includes the diagnostic information recording unit, and the hardware circuit includes the second abnormality recording unit.

11. The in-vehicle relay device according to claim 8, wherein The hardware unit is a logic circuit that causes the hardware in the hardware circuit to operate. The software unit is a processor mounted on the hardware circuit. The functions of the first to third layers in the OSI reference model are executed by the logic circuit, and the functions above the fourth layer are executed by the processor.

12. The in-vehicle relay device according to claim 11, wherein The in-vehicle relay device includes a memory shared by the logic circuit and the processor and mounted on the hardware circuit. The memory includes a vehicle information recording unit, a diagnostic information recording unit, and a second abnormality recording unit that record the vehicle information transmitted from the vehicle information transmission unit.

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