Driving method for a display panel and display device

Abstract

A driving method and a display device for a display panel. When switching from a first screen to a second screen and the second screen is displayed in at least two consecutive display frames, receive the display data of the second screen in the current display frame of the second screen (S10); determine whether the second screen is a defective screen according to the display data of the second screen and the defective screen determination condition (S20); when it is determined that the second screen is a defective screen, control the display panel to perform scanning driving at intervals of at least one row of sub-pixels, and when the driving of the first row of sub-pixels is completed and the driving of the second row of sub-pixels is in progress among the two rows of sub-pixels during the scanning driving, load the display data corresponding to the second row of sub-pixels onto the data line connected to the second row of sub-pixels (S30).

Description

Technical Field

[0001] The present disclosure relates to the field of display technologies, and particularly to a driving method for a display panel and a display device. Background Art

[0002] In displays such as liquid crystal displays (LCDs) and organic light-emitting diode (OLED) displays, there are generally multiple pixels. Each pixel may include a red sub-pixel, a green sub-pixel, and a blue sub-pixel. By controlling the display data corresponding to each sub-pixel, the display brightness of each sub-pixel is controlled, so as to mix the desired displayed colors to display a color image. Summary of the Invention

[0003] The driving method for a display panel provided by an embodiment of the present disclosure includes:

[0004] When switching from a first screen to a second screen and the second screen is displayed in at least two consecutive display frames, receiving the display data of the second screen in the current display frame of the second screen;

[0005] Determining whether the second screen is a defective screen according to the display data of the second screen and a defective screen determination condition;

[0006] When it is determined that the second screen is a defective screen, controlling the display panel to perform scanning driving at intervals of at least one row of sub-pixels, and when the driving of the first row of sub-pixels is completed and the driving of the second row of sub-pixels is in progress among the two rows of sub-pixels during the scanning driving, loading the display data corresponding to the second row of sub-pixels onto the data line connected to the second row of sub-pixels.

[0007] In some examples, the defective screen determination condition includes a set area threshold of a defective area and a set gray scale difference threshold between the gray scales of the display data corresponding to two adjacent sub-pixels in the same column;

[0008] The determination that the second screen is a defective screen specifically includes:

[0009] Determining a target area formed by sub-pixels corresponding to the display data that satisfies the set gray scale difference threshold in the display data of the second screen;

[0010] When the target area satisfies the set area threshold, determining that the second screen is a defective screen.

[0011] In some examples, the determination of the target area formed by sub-pixels corresponding to the display data that satisfies the set difference threshold in the display data of the second screen specifically includes:

[0012] Taking at least one column of pixel units in at least two adjacent rows as a unit group, dividing the pixel units in the display panel into multiple unit groups;

[0013] For the display data corresponding to each unit group, determining the gray-scale difference between the gray-scales of the display data corresponding to two adjacent sub-pixels in the same column;

[0014] When the gray-scale difference satisfies the set gray-scale difference threshold, defining the unit group where the sub-pixels corresponding to the gray-scale difference satisfying the set gray-scale difference threshold are located as the target unit group;

[0015] All the target unit groups form the target area.

[0016] In some examples, controlling the display panel to perform scanning driving at an interval of at least one row of sub-pixels, and when the first row of sub-pixels is driven completely and the second row of sub-pixels is being driven among the two rows of sub-pixels during scanning driving, loading the display data of the second picture onto the data line connected to the second row of sub-pixels, specifically including:

[0017] In the display frame after the current display frame, controlling the display panel to perform scanning driving at an interval of at least one row of sub-pixels, and when the first row of sub-pixels is driven completely and the second row of sub-pixels is being driven among the two rows of sub-pixels during scanning driving, loading the display data of the second picture onto the data line connected to the second row of sub-pixels.

[0018] In some examples, controlling the display panel to perform scanning driving at an interval of at least one row of sub-pixels, and when the first row of sub-pixels is driven completely and the second row of sub-pixels is being driven among the two rows of sub-pixels during scanning driving, loading the display data of the second picture onto the data line connected to the second row of sub-pixels, specifically including:

[0019] In the odd-numbered display frames after the current display frame, controlling the odd-numbered rows of sub-pixels of the display panel to perform scanning driving, and outputting the display data corresponding to the odd-numbered rows of sub-pixels to each data line;

[0020] In the even-numbered display frames after the current display frame, controlling the even-numbered rows of sub-pixels of the display panel to perform scanning driving, and outputting the display data corresponding to the even-numbered rows of sub-pixels to each data line.

[0021] In some examples, controlling the display panel to perform scanning driving at an interval of at least one row of sub-pixels, specifically including:

[0022] In the odd-numbered display frames after the current display frame, controlling the even-numbered rows of sub-pixels of the display panel to perform scanning driving, and outputting the display data corresponding to the even-numbered rows of sub-pixels to each data line;

[0023] In the even-numbered display frame after the current display frame, control the sub-pixels in the odd-numbered rows of the display panel to perform scanning driving, and output the display data corresponding to the sub-pixels in the odd-numbered rows to each data line.

[0024] In some examples, in the current display frame, determine whether the second picture is a defective picture according to the display data of the second picture and the defective picture determination condition.

[0025] The display device provided by the embodiments of the present disclosure includes:

[0026] A display panel;

[0027] A timing controller configured to, when switching from a first picture to a second picture and the second picture is displayed in at least two consecutive display frames, receive the display data of the second picture in the current display frame of the second picture; determine whether the second picture is a defective picture according to the display data of the second picture and the defective picture determination condition; when determining that the second picture is a defective picture, input an interlaced scanning control signal to the gate driving circuit in the display panel and input an interlaced data control signal to the source driving circuit in the display panel, control the display panel to perform scanning driving at intervals of at least one row of sub-pixels, and when the driving of the first row of sub-pixels is completed and the driving of the second row of sub-pixels is in progress among the two rows of sub-pixels for scanning driving, load the display data corresponding to the second row of sub-pixels onto the data lines connected to the second row of sub-pixels.

[0028] In some examples, the timing controller is further configured to, when determining that the second picture is not a defective picture, input a progressive scanning control signal to the gate driving circuit in the display panel and input a progressive data control signal to the source driving circuit in the display panel, control the display panel to perform scanning driving on the sub-pixels row by row, and load the display data corresponding to each row of sub-pixels onto each data line.

[0029] In some examples, the timing controller is coupled to the source driving circuit through a general-purpose input / output interface;

[0030] The timing controller is further configured to set the drive enable pin of the general-purpose input / output interface to an interlaced drive valid level to output the interlaced data control signal; and set the drive enable pin of the general-purpose input / output interface to a progressive drive valid level to output the progressive data control signal;

[0031] The source driver circuit is further configured to generate an interlaced data output signal when detecting that the level of the drive enable pin is the effective interlaced drive level, and load the display data corresponding to the second row of sub-pixels onto the data lines connected to the second row of sub-pixels according to the generated interlaced data output signal; and generate a progressive data output signal when detecting that the level of the drive enable pin is the effective progressive drive level, and load the display data corresponding to each row of sub-pixels onto the respective data lines according to the generated progressive data output signal.

[0032] In some examples, the timing controller is further configured to switch the level of the drive enable pin from a first level to a second level as the effective interlaced drive level; and maintain the level of the drive enable pin at the first level as the effective progressive drive level;

[0033] The source driver circuit is further configured to compare the voltage corresponding to the level of the drive enable pin with a stored set voltage threshold, generate the interlaced data output signal when the voltage corresponding to the level of the drive enable pin is higher than the set voltage threshold; and generate the progressive data output signal when the voltage corresponding to the level of the drive enable pin is not higher than the set voltage threshold.

[0034] In some examples, the timing controller and the level conversion circuit are coupled through a general-purpose input / output interface;

[0035] The timing controller is further configured to output, as the interlaced data control signal, a first set bit having a first number and a second set bit having a first number and a second number through the general-purpose input / output interface; and output, as the progressive drive enable signal, a first set bit having a second number through the general-purpose input / output;

[0036] The source driver circuit is further configured to generate the interlaced data output signal according to the second set bit when detecting that the first set bit is the first number; and generate the progressive data output signal when detecting that the first set bit is the second number. Description of the Drawings

[0037] Figure 1a Some structural diagrams of the display device in the embodiments of the present disclosure;

[0038] Figure 1b Structural diagram of the drive enable pin in the embodiments of the present disclosure;

[0039] Figure 1c Some other structural diagrams of the display device in the embodiments of the present disclosure;

[0040] Figure 2 Flow chart of the driving method in the embodiments of the present disclosure;

[0041] Figure 3 Schematic diagram of a defective area in the embodiments of the present disclosure;

[0042] Figure 4 Schematic diagram of a target area of a second screen in the embodiments of the present disclosure;

[0043] Figure 5a Some schematic diagrams of a second screen determined to be a defective screen in the embodiments of the present disclosure;

[0044] Figure 5b Some other schematic diagrams of a second screen determined to be a defective screen in the embodiments of the present disclosure;

[0045] Figure 5c Some more schematic diagrams of a second screen determined to be a defective screen in the embodiments of the present disclosure;

[0046] Figure 5d Some more schematic diagrams of a second screen determined to be a defective screen in the embodiments of the present disclosure;

[0047] Figure 5e Some more schematic diagrams of a second screen determined to be a defective screen in the embodiments of the present disclosure;

[0048] Figure 6 Some signal timing diagrams in the embodiments of the present disclosure;

[0049] Figure 7 Some other signal timing diagrams in the embodiments of the present disclosure;

[0050] Figure 8 Some more signal timing diagrams in the embodiments of the present disclosure;

[0051] Figure 9 Some more signal timing diagrams in the embodiments of the present disclosure;

[0052] Figure 10 Some more signal timing diagrams in the embodiments of the present disclosure. Detailed implementation manners

[0053] To make the objectives, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. Apparently, the described embodiments are some, but not all, of the embodiments of the present disclosure. And, without conflict, the embodiments and features in the embodiments of the present disclosure may be combined with each other. All other embodiments obtained by those of ordinary skill in the art based on the described embodiments of the present disclosure without creative efforts shall fall within the protection scope of the present disclosure.

[0054] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure shall have the ordinary meanings as understood by those of ordinary skill in the art to which the present disclosure pertains. The terms "first", "second", and similar terms used in the present disclosure do not denote any order, quantity, or importance, but are only used to distinguish different components. The terms such as "including" or "comprising" mean that the elements or items appearing before the term cover the elements or items listed after the term and their equivalents, without excluding other elements or items. The terms such as "connected" or "coupled" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

[0055] It should be noted that the sizes and shapes of the various figures in the drawings do not reflect the actual proportions, and the purpose is only to schematically illustrate the content of the present disclosure. And, the same or similar reference numerals throughout the drawings denote the same or similar elements or elements having the same or similar functions.

[0056] Referring to Figure 1a , the display device may include a display panel 100, a level shift circuit 200, and a timing controller 300. Among them, the display panel 100 may include a plurality of pixel units arranged in an array, a plurality of gate lines (for example, GA1, GA2, GA3, GA4), a plurality of data lines (for example, DA1, DA2, DA3), a gate driving circuit 110, and a source driving circuit 120. The gate driving circuit 110 is respectively coupled to the gate lines GA1, GA2, GA3, GA4, and the source driving circuit 120 is respectively coupled to the data lines DA1, DA2, DA3. Exemplarily, each pixel unit includes a plurality of sub-pixels SPX. For example, the pixel unit may include a red sub-pixel, a green sub-pixel, and a blue sub-pixel, so that color mixing can be performed through red, green, and blue to achieve color display. Or, the pixel unit may also include a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel, so that color mixing can be performed through red, green, blue, and white to achieve color display. Of course, in actual applications, the emission colors of the sub-pixels in the pixel unit can be designed and determined according to the actual application environment, and are not limited herein.

[0057] See Figure 1a As shown, each sub-pixel includes a transistor 01 and a pixel electrode 02. Among them, one row of sub-pixels corresponds to one gate line, and one column of sub-pixels corresponds to one data line. The gate of the transistor 01 is electrically connected to the corresponding gate line, the source of the transistor 01 is electrically connected to the corresponding data line, and the drain of the transistor 01 is electrically connected to the pixel electrode 02. It should be noted that the pixel array structure of the present disclosure can also be a double-gate structure, that is, two gate lines are arranged between adjacent two rows of pixels. This arrangement can reduce the number of data lines by half, that is, some data lines are included between adjacent two columns of pixels, and some adjacent two columns of pixels do not include data lines. The specific pixel arrangement structure and the arrangement of data lines and scan lines are not limited.

[0058] With the rapid development of display panels in the fields of high refresh rate and high resolution, the requirements for image quality and driving ability are also increasing day by day. It is very difficult for large-size display panels to ensure a good charging rate when displaying certain special images, and there will be problems such as certain defective images and overheating of the driving IC. For example, for an 8K display panel, its refresh rate can be 120Hz, and the opening time of each row of sub-pixels is, for example, 1 / (120Hz×4500 rows)=1.85μs, and the pixel charging time is far from sufficient. When the refresh rate is 240Hz or higher, the charging time of sub-pixels will be further compressed, and ensuring the charging rate of sub-pixels will pose a greater challenge to the quality assurance of the displayed image quality. For example, when the display panel displays a static image, due to insufficient pixel charging time and large gray-scale differences between adjacent two sub-pixels in the same column, the display panel will be defective.

[0059] The driving method of the display panel provided by the embodiments of the present disclosure, as Figure 2 shown, may include the following steps:

[0060] S10. When switching from the first screen to the second screen and the second screen is displayed in at least two consecutive display frames, receive the display data of the second screen in the current display frame of the second screen.

[0061] S20. Determine whether the second screen is a defective screen according to the display data of the second screen and the defective screen determination condition; wherein, when it is determined that the second screen is a defective screen, step S30 is executed; when it is determined that the second screen is not a defective screen, step S40 is executed.

[0062] S30. Control the display panel to perform scanning driving at an interval of at least one row of sub-pixels, and when the first row of sub-pixels is driven and the second row of sub-pixels is being driven among the two rows of sub-pixels during the scanning driving, load the display data corresponding to the second row of sub-pixels onto the data line connected to the second row of sub-pixels.

[0063] S40. Control the display panel to perform scanning driving on sub-pixels row by row, and when scanning and driving the sub-pixels, load the display data corresponding to each row of sub-pixels onto each data line.

[0064] For the driving method provided by the embodiments of the present disclosure, when switching from the first screen to the second screen, it can be shown that the display panel has switched the screen. Moreover, if the second screen is displayed in at least two consecutive display frames, it can be shown that the display panel can maintain the display of the same screen for a certain period of time. For example, the second screen displayed can be a static screen. By setting the defective screen determination conditions, the display data of the second screen can be analyzed according to the defective screen determination conditions to determine whether the second screen is a defective screen. When it is determined that the second screen is a defective screen, the display panel can be controlled to perform scanning driving at an interval of at least one row of sub-pixels. And when driving the two rows of sub-pixels during scanning, when the driving of the first row of sub-pixels is completed and the driving of the second row of sub-pixels is in progress, the display data corresponding to the second row of sub-pixels is loaded onto the data line connected to the second row of sub-pixels. In this way, when displaying the second screen, by implementing the strategy of partially displaying sub-pixels and not displaying some sub-pixels, when displaying a static screen, only the sub-pixels that need to be displayed are scanned and driven and the display data is output, instead of scanning and driving all sub-pixels and outputting the display data. Therefore, the power consumption can be reduced, and the problem of excessive device temperature can be alleviated. Also, when displaying the second screen, since the display screen is performed at an interval of at least one row of sub-pixels, the remaining rows of sub-pixels are in a black state, and the sub-pixel rows in the black state no longer display the corresponding screen. Therefore, the problem of defective screens caused by insufficient pixel charging time and large differences in gray levels corresponding to adjacent two rows of sub-pixels in the same column can be avoided.

[0065] In an embodiment of the present disclosure, the timing controller may be configured to: when switching from a first screen to a second screen and the second screen is displayed in at least two consecutive display frames, receive the display data of the second screen in the current display frame of the second screen; determine whether the second screen is a defective screen according to the display data of the second screen and the defective screen determination condition; when it is determined that the second screen is a defective screen, input an interlaced scanning control signal to the gate driving circuit in the display panel and input an interlaced data control signal to the source driving circuit in the display panel, control the display panel to perform scanning driving at an interval of at least one row of sub-pixels, and when the driving of the first row of sub-pixels is completed and the driving of the second row of sub-pixels is in progress during the scanning driving of the two rows of sub-pixels, load the display data corresponding to the second row of sub-pixels onto the data lines connected to the second row of sub-pixels. It should be noted that, during the scanning driving of the two rows of sub-pixels, the two rows of sub-pixels here refer to the two rows corresponding to the opened gate lines. For example, in the case of interlaced scanning driving, the two rows of sub-pixels here may refer to the first row and the third row of sub-pixels; that is, when the scanning signals including valid levels are input interlacedly, for example, the first row inputs a scanning signal including a valid level and the third row inputs a scanning signal including a valid level, the display data is input to the first row and the third row. Optionally, for the display data, the first row and the second row continuously output the display data of the first row, and the third row and the fourth row continuously output the display data of the third row. In this way, when displaying the second screen, when the timing controller determines that the second screen is a defective screen, by enabling the working mode of interlaced driving, the display screen can be performed at an interval of at least one row of sub-pixels, and the remaining rows of sub-pixels are in a black state. The sub-pixel rows in the black state no longer display the corresponding screen, so that the problem of defective screen caused by insufficient pixel charging time and large gray-scale difference between adjacent two rows of sub-pixels in the same column can be avoided.

[0066] In an embodiment of the present disclosure, as Figure 1a shown, the timing controller 300 is connected to the gate driving circuit 110 through the level conversion circuit 200, and the timing controller 300 and the source driving circuit 120 may be coupled through a General Purpose Input Output (GPIO) interface to transmit signals through the GPIO interface. In an embodiment of the present disclosure, as Figure 1bAs shown, the driving enable pin OE_EN of the GPIO interface coupled between the timing controller and the source driver circuit 120 is illustrated. Among them, 120 represents the source driver circuit, 12 represents the Printed Circuit Board (PCB), 13 represents the Flexible Printed Circuit (FPC), and 14 represents the timing circuit board where the timing controller is located. Exemplarily, a resistor NS can be provided on the printed circuit board 12 to improve the pull-up driving ability of the driving enable pin OE_EN. Exemplarily, the resistance value of the resistor NS can be 4.7 KΩ. Of course, the resistance value of the resistor NS can also be determined according to the requirements of actual applications and is not limited herein.

[0067] Exemplarily, a timing controller can be provided on the timing circuit board, which can reduce the integration difficulty. Two timing controllers can also be provided on the timing circuit board (for example, one as the main timing controller and the other as the slave timing controller) to improve the driving ability and computing ability, which is beneficial for application in display panels with high refresh rates (such as 120 Hz, 240 Hz, etc.).

[0068] Exemplarily, the timing controller 300 can output an interlaced data control signal by setting the driving enable pin OE_EN of the general-purpose input / output interface to an interlaced driving effective level. And, when the source driver circuit detects that the level of the driving enable pin OE_EN is the interlaced driving effective level, it can generate an interlaced data output signal, and load the display data corresponding to the second row of sub-pixels to the data line connected to the second row of sub-pixels according to the generated interlaced data output signal. For example, the interlaced driving effective level is a high level. When the source driver circuit detects that the level of the driving enable pin OE_EN is a high level, it can generate an interlaced data output signal, thereby inputting the corresponding display data to the data line in the display panel.

[0069] In the embodiment of the present disclosure, the timing controller can switch the level of the driving enable pin OE_EN from the first level to the second level to be used as the interlaced driving effective level. And, the source driver circuit can compare the voltage corresponding to the level of the driving enable pin OE_EN with the stored set voltage threshold. When the voltage corresponding to the level of the driving enable pin OE_EN is higher than the set voltage threshold, the interlaced data output signal is generated (such as Figure 6 as Figure 7 shown tp). For example, if the interlaced driving effective level is a high level, the first level can be a low level and the second level can be a high level. Let H represent a high level and L represent a high level. Combining Figures 1a to 1c and Figure 6 with Figure 7, a display data and defective screen determination condition input data comparison module for the second screen to determine whether the second screen is a defective screen. When it is determined that the second screen is a defective screen, the driving enable pin OE_EN is set to the voltage corresponding to H. For example, when the driving enable pin OE_EN is pulled up from the voltage corresponding to L to the voltage corresponding to H, it can be stated that the driving enable pin OE_EN is the effective level for interlaced driving. The source driving circuit can compare the voltage corresponding to H of the driving enable pin OE_EN at this time with the stored set voltage threshold through a voltage comparator. When the voltage corresponding to H is higher than the set voltage threshold, it can enable the working mode of the source driving circuit corresponding to the interlaced data control signal, so that the source driving circuit outputs the display data to the buffer through the CDES receiver under the control of the interlaced data control signal, and the display data is output to the data line through the buffer, thereby realizing the interlaced output of the corresponding display data to the data line in the display panel. And, the timing controller also outputs an interlaced scanning control signal (such as Figure 6 AND Figure 7 shown stv-od, stv-ev) to the gate driving circuit through a level conversion circuit to interlace drive the gate lines, and further interlace drive the display panel. Referring to Figure 6 AND Figure 7 , optionally, tp represents an interlaced data output signal. The signal tp can latch data on the rising edge and output data on the falling edge, or can latch data on the falling edge and output data on the rising edge. The drawings only illustrate latching data on the rising edge and outputting data on the falling edge. It should be noted that the set voltage threshold can be determined according to the requirements of actual applications and is not limited herein.

[0070] In the embodiment of the present disclosure, when the timing controller determines that the second screen is not a defective screen, it can control the display panel to perform scanning driving on sub-pixels row by row and load the display data corresponding to each row of sub-pixels on each data line, so that each sub-pixel in the display panel is refreshed with data. Exemplarily, when the timing controller determines that the second screen is not a defective screen, it can input a progressive scanning control signal to the gate driving circuit through a level conversion circuit, and input a progressive data control signal to the source driving circuit to control the display panel to perform scanning driving on sub-pixels row by row and load the display data corresponding to each row of sub-pixels on each data line. For example, the effective level for progressive driving is a low level. When the source driving circuit detects that the level of the driving enable pin OE_EN is a low level, it can load the display data corresponding to each row of sub-pixels on each of the data lines. In this way, when the timing controller determines that the second screen is not a defective screen, by inputting a progressive data control signal to the source driving circuit, the working mode corresponding to the progressive data control signal is enabled, so that the source driving circuit can correspondingly drive the display panel. Furthermore, when displaying the second screen, it can drive the sub-pixels row by row to display the screen, thereby improving the display resolution.

[0071] In an embodiment of the present disclosure, the timing controller may output a line-by-line data control signal by setting the drive enable pin OE_EN of the GPIO interface to a line-by-line drive active level. And, when the source driver circuit detects that the level of the drive enable pin OE_EN is the line-by-line drive active level, it may generate a line-by-line data output signal (such as Figure 8 the tp shown), and load the display data corresponding to each sub-pixel of each row onto each data line according to the generated line-by-line data output signal. For example, the line-by-line drive active level is a low level. When the source driver circuit detects that the level of the drive enable pin OE_EN is a low level, it may generate a line-by-line data output signal.

[0072] In an embodiment of the present disclosure, the timing controller may maintain the level of the drive enable pin OE_EN at a first level as the line-by-line drive active level. And, when the voltage corresponding to the level of the drive enable pin OE_EN is not higher than a set voltage threshold, the source driver circuit may generate the line-by-line data output signal. For example, if the line-by-line drive active level is a low level, the first level may be a low level. Let L represent a high level. Combining Figures 1a to 1c and Figure 8 , a display data and defective picture determination condition input data comparison module for the second picture to determine whether the second picture is a defective picture. When it is determined that the second picture is not a defective picture, the drive enable pin OE_EN is set to the voltage corresponding to L. For example, the drive enable pin OE_EN may be maintained at the voltage corresponding to L, which may indicate the output of the line-by-line data control signal. The source driver circuit may compare the voltage corresponding to L of the drive enable pin OE_EN with the stored set voltage threshold through a voltage comparator. When the voltage corresponding to L is lower than the set voltage threshold, the working mode corresponding to the line-by-line data control signal in the source driver circuit may be enabled, so that the source driver circuit may generate a line-by-line data output signal (such as Figure 8 the tp shown). Thus, the source driver circuit outputs the display data to the buffer through the CDES receiver under the control of the line-by-line data output signal, and outputs the display data to the data line through the buffer, so as to realize the interlaced output of the corresponding display data to the data line in the display panel. And, the timing controller also outputs a line-by-line scan control signal (such as Figure 8 the stv-od, stv-ev shown) to the gate driver circuit through a level conversion circuit to drive the gate lines line by line, and further drive the display panel.

[0073] In an embodiment of the present disclosure, the defective picture determination conditions may be stored in the timing controller. Exemplarily, the defective picture determination conditions may include: a set area threshold for the defective area. Exemplarily, such as Figure 3As shown, P represents a screen displayed on the display panel. The lower left corner of the screen P is taken as the origin O(0, 0), the lower edge of the screen P is taken as the horizontal axis x, and the left edge of the screen P is taken as the vertical axis y. If the defective area BW can be a rectangle, the coordinates of the four vertices of the defective area BW are: the upper left corner coordinate Z1(x1, y2), the lower left corner coordinate Z2(x1, y1), the lower right corner coordinate Z3(x2, y1), and the upper right corner coordinate Z4(x2, y2). For example, if the resolution of the display panel is A columns × B rows, then according to the setting of x2 > x1, x1 and x2 can be selected from 0 to A, and according to the setting of y2 > y1, y1 and y2 can be selected from 0 to B. For example, for an 8K display panel with a resolution of 7680 columns × 4320 rows, that is, A = 7680 and B = 4320, then x1 and x2 can be selected from 0 to 7680, and y1 and y2 can be selected from 0 to 4320. For example, x1 = 0, x2 = 3840, y1 = 0, y2 = 2160. In this way, the area of the defective area in the screen can be set to 1 / 4 of the original screen. Or, it can also be said that x1, x2, y1, and y2 are selected with other values so that the area of the defective area in the screen is set to 1 / 4 of the original screen. Or, it can also be said that x1, x2, y1, and y2 are selected with other values so that the area of the defective area in the screen is set to 1 / 2 of the original screen. Or, it can also be said that x1, x2, y1, and y2 are selected with other values so that the area of the defective area in the screen is set to 1 / 3 of the original screen. Of course, in practical applications, the specific values selected for x1, x2, y1, and y2 can be determined according to the requirements of practical applications and are not limited herein.

[0074] In the embodiments of the present disclosure, the defective area can also be circular, elliptical, polygonal, etc., which are not limited herein.

[0075] In the embodiments of the present disclosure, the defective screen determination condition can also include: a set gray-scale difference threshold between the gray-scales of the display data corresponding to two adjacent sub-pixels in the same column. Exemplarily, when the display panel uses 256 gray-scales, the set gray-scale difference threshold can be selected from 10 to 150 gray-scales. For example, the set gray-scale difference threshold can be 150 gray-scales, the set gray-scale difference threshold can be 127 gray-scales, the set gray-scale difference threshold can also be 100 gray-scales, the set gray-scale difference threshold can also be 80 gray-scales, the set gray-scale difference threshold can also be 63 gray-scales, the set gray-scale difference threshold can also be 50 gray-scales, and the set gray-scale difference threshold can also be 10 gray-scales. Of course, in practical applications, the set gray-scale difference threshold can be determined according to the requirements of practical applications and is not limited herein.

[0076] In the embodiments of the present disclosure, determining that the second screen is a defective screen may specifically include: determining a target area formed by sub-pixels corresponding to display data that satisfies a set gray-scale difference threshold in the display data of the second screen. When the target area satisfies the set area threshold, it is determined that the second screen is a defective screen. In this way, by using two conditions in the defective screen determination condition to determine whether the second screen is a defective screen, the accuracy of determining that the second screen is a defective screen can be improved. Exemplarily, a target area formed by sub-pixels corresponding to display data not less than the set gray-scale difference threshold in the display data of the second screen is determined. When the target area is not less than the set area threshold, it is determined that the second screen is a defective screen. In this way, the sub-pixels corresponding to the display data not less than the set gray-scale difference threshold can be initially screened out to form a target area, and then by comparing the target area with the set area threshold, when the target area is not less than the set area threshold, it can be determined that the second screen is a defective screen, thereby improving the accuracy of determining that the second screen is a defective screen.

[0077] For example, let Sba represent the position of each sub-pixel of the display panel, where both a and b are integers, and 1 ≤ a ≤ A, 1 ≤ b ≤ B. As Figure 4 shown, taking A = 12 and B = 10 as an example, the sub-pixels in the first row to the tenth row of the first column are S11 to S101 respectively, the sub-pixels in the first row to the tenth row of the second column are S12 to S102 respectively, the sub-pixels in the first row to the tenth row of the third column are S13 to S103 respectively, the sub-pixels in the first row to the tenth row of the fourth column are S14 to S104 respectively, the sub-pixels in the first row to the tenth row of the fifth column are S15 to S105 respectively, the sub-pixels in the first row to the tenth row of the sixth column are S16 to S106 respectively, the sub-pixels in the first row to the tenth row of the seventh column are S17 to S107 respectively, the sub-pixels in the first row to the tenth row of the eighth column are S18 to S108 respectively, the sub-pixels in the first row to the tenth row of the ninth column are S19 to S109 respectively, the sub-pixels in the first row to the tenth row of the tenth column are S110 to S1010 respectively, the sub-pixels in the first row to the tenth row of the eleventh column are S111 to S1011 respectively, and the sub-pixels in the first row to the tenth row of the twelfth column are S112 to S1012 respectively.

[0078] In the first column, the difference in gray scale between the display data corresponding to sub-pixels S11 and S21 is less than the set gray-scale difference threshold, the difference in gray scale between the display data corresponding to sub-pixels S31 and S41 is also less than the set gray-scale difference threshold, the difference in gray scale between the display data corresponding to sub-pixels S51 and S61 is not less than the set gray-scale difference threshold, the difference threshold in gray scale between the display data corresponding to sub-pixels S71 and S81 is not less than the set gray-scale difference threshold, and the difference threshold in gray scale between the display data corresponding to sub-pixels S91 and S101 is not less than the set gray-scale difference threshold.

[0079] Moreover, in the second column, the difference between the grayscale levels of the display data corresponding to sub-pixels S12 and S22 is less than the set grayscale difference threshold, the difference between the grayscale levels of the display data corresponding to sub-pixels S32 and S42 is also less than the set grayscale difference threshold, the difference between the grayscale levels of the display data corresponding to sub-pixels S52 and S62 is not less than the set grayscale difference threshold, the difference threshold between the grayscale levels of the display data corresponding to sub-pixels S72 and S82 is not less than the set grayscale difference threshold, and the difference threshold between the grayscale levels of the display data corresponding to sub-pixels S92 and S102 is not less than the set grayscale difference threshold.

[0080] Moreover, in the third column, the difference between the grayscale levels of the display data corresponding to sub-pixels S13 and S23 is less than the set grayscale difference threshold, the difference between the grayscale levels of the display data corresponding to sub-pixels S33 and S43 is also less than the set grayscale difference threshold, the difference between the grayscale levels of the display data corresponding to sub-pixels S53 and S63 is not less than the set grayscale difference threshold, the difference threshold between the grayscale levels of the display data corresponding to sub-pixels S73 and S83 is not less than the set grayscale difference threshold, and the difference threshold between the grayscale levels of the display data corresponding to sub-pixels S93 and S103 is not less than the set grayscale difference threshold. Moreover, in the fourth to twelfth columns, the difference between the grayscale levels of the display data corresponding to the sub-pixels in adjacent two rows in the same column is less than the set grayscale difference threshold.

[0081] Then, sub-pixels S51 to S101 in the first column, sub-pixels S52 to S102 in the second column, and sub-pixels S53 to S103 in the third column form the target area M1. When the area of the target area M1 is not less than the set area threshold, the timing controller can determine that the second picture is a defective picture. When the area of the target area M1 is less than the set area threshold, it may make the target area M1 smaller and not easily noticeable by the human eye, then the timing controller can determine that the second picture is not a defective picture.

[0082] In the embodiments of the present disclosure, when determining the target area formed by the sub-pixels corresponding to the display data that meets the set difference threshold in the display data of the second picture, it may specifically include: taking at least one column of pixel units in at least two adjacent rows as a unit group, and dividing the pixel units in the display panel into multiple unit groups. For the display data corresponding to each unit group, determine the grayscale difference between the grayscale levels of the display data corresponding to the sub-pixels in adjacent two rows in the same column. When the grayscale difference meets the set grayscale difference threshold, define the unit group where the sub-pixels corresponding to the grayscale difference that meets the set grayscale difference threshold are located as the target unit group. All the target unit groups form the target area. In this way, by setting the unit group, at least two pixel units can be used as the minimum unit for screening the target area, reducing the calculation amount and power consumption.

[0083] Exemplarily, take the case where a pixel unit includes three sub-pixels, and a column of pixel units in two adjacent rows is taken as a unit group. As Figure 5a shown, in the first column of pixel units, sub-pixels S11, S12, S13, S21, S22, S23 are used as the first unit group, and sub-pixels S31, S32, S33, S41, S42, S43 are used as the second unit group. Sub-pixels S51, S52, S53, S61, S62, S63 are used as the third unit group. Sub-pixels S71, S72, S73, S81, S82, S83 are used as the fourth unit group. Sub-pixels S91, S92, S93, S101, S102, S103 are used as the fifth unit group. If, in the first unit group, the difference between the gray levels of the display data corresponding to sub-pixels S11 and S21, the difference between the gray levels of the display data corresponding to sub-pixels S12 and S22, and the difference between the gray levels of the display data corresponding to sub-pixels S13 and S23 are all less than the set gray level difference threshold, then the first unit group does not need to be defined as the target unit group. Similarly, the second unit group does not need to be defined as the target unit group. If, in the third unit group, the gray level of sub-pixel S51 is greater than the gray level of sub-pixel S61, and the difference between the gray levels of the display data corresponding to sub-pixels S51 and S61 is not less than the set gray level difference threshold. The gray level of sub-pixel S52 is greater than the gray level of sub-pixel S62, and the difference between the gray levels of the display data corresponding to sub-pixels S52 and S62 is not less than the set gray level difference threshold. The gray level of sub-pixel S53 is greater than the gray level of sub-pixel S63, and the difference between the gray levels of the display data corresponding to sub-pixels S53 and S63 is not less than the set gray level difference threshold, then the third unit group can be defined as the target unit group. Similarly, the fourth unit group and the fifth unit group are defined as the target unit groups.

[0084] Moreover, in the second column of pixel units, sub-pixels S14, S15, S16, S24, S25, S26 serve as the sixth unit group, sub-pixels S34, S35, S36, S44, S45, S46 serve as the seventh unit group. Sub-pixels S54, S55, S56, S64, S65, S66 serve as the eighth unit group. Sub-pixels S74, S75, S76, S84, S85, S86 serve as the ninth unit group. Sub-pixels S94, S95, S96, S104, S105, S106 serve as the tenth unit group. If, in the sixth unit group, the difference in gray levels between the display data corresponding to sub-pixels S14 and S24, the difference in gray levels between the display data corresponding to sub-pixels S15 and S25, and the difference in gray levels between the display data corresponding to sub-pixels S16 and S26 are all less than the set gray level difference threshold, then the sixth unit group is not defined as the target unit group. Similarly, the seventh unit group is not defined as the target unit group. If, in the eighth unit group, the gray level of sub-pixel S54 is less than the gray level of sub-pixel S64, and the difference in gray levels between the display data corresponding to sub-pixels S54 and S64 is not less than the set gray level difference threshold. The gray level of sub-pixel S55 is less than the gray level of sub-pixel S65, and the difference in gray levels between the display data corresponding to sub-pixels S55 and S65 is not less than the set gray level difference threshold. The gray level of sub-pixel S56 is less than the gray level of sub-pixel S66, and the difference in gray levels between the display data corresponding to sub-pixels S56 and S66 is not less than the set gray level difference threshold, then the eighth unit group can be defined as the target unit group. Similarly, the ninth unit group and the tenth unit group are defined as the target unit groups.

[0085] Moreover, in the third column of pixel units, sub-pixels S17, S18, S19, S27, S28, and S29 form the eleventh unit group, and sub-pixels S37, S38, S39, S47, S48, and S49 form the twelfth unit group. Sub-pixels S57, S58, S59, S67, S68, and S69 form the thirteenth unit group. Sub-pixels S77, S78, S79, S87, S88, and S89 form the fourteenth unit group. Sub-pixels S97, S98, S99, S107, S108, and S109 form the fifteenth unit group. If, in the eleventh unit group, the differences in gray levels between the display data corresponding to sub-pixels S17 and S27, between the display data corresponding to sub-pixels S18 and S28, and between the display data corresponding to sub-pixels S19 and S29 are all less than the set gray level difference threshold, then the eleventh unit group is not defined as the target unit group. Similarly, the twelfth unit group is not defined as the target unit group. If, in the thirteenth unit group, the gray level of sub-pixel S57 is greater than the gray level of sub-pixel S67, and the difference in gray levels between the display data corresponding to sub-pixels S57 and S67 is not less than the set gray level difference threshold; the gray level of sub-pixel S58 is greater than the gray level of sub-pixel S68, and the difference in gray levels between the display data corresponding to sub-pixels S58 and S68 is not less than the set gray level difference threshold; the gray level of sub-pixel S59 is greater than the gray level of sub-pixel S69, and the difference in gray levels between the display data corresponding to sub-pixels S59 and S69 is not less than the set gray level difference threshold, then the thirteenth unit group can be defined as the target unit group. Similarly, the fourteenth unit group and the fifteenth unit group are defined as the target unit groups to form the target area M1. Moreover, none of the other unit groups are defined as the target unit groups.

[0086] Exemplarily, as Figure 5bAs shown, in the first column of pixel units, sub-pixels S11, S12, S13, S21, S22, S23 form the first unit group, sub-pixels S31, S32, S33, S41, S42, S43 form the second unit group. Sub-pixels S51, S52, S53, S61, S62, S63 form the third unit group. Sub-pixels S71, S72, S73, S81, S82, S83 form the fourth unit group. Sub-pixels S91, S92, S93, S101, S102, S103 form the fifth unit group. In the second column of pixel units, sub-pixels S14, S15, S16, S24, S25, S26 form the sixth unit group, sub-pixels S34, S35, S36, S44, S45, S46 form the seventh unit group. Sub-pixels S54, S55, S56, S64, S65, S66 form the eighth unit group. Sub-pixels S74, S75, S76, S84, S85, S86 form the ninth unit group. Sub-pixels S94, S95, S96, S104, S105, S106 form the tenth unit group. In the third column of pixel units, sub-pixels S17, S18, S19, S27, S28, S29 form the eleventh unit group, sub-pixels S37, S38, S39, S47, S48, S49 form the twelfth unit group. Sub-pixels S57, S58, S59, S67, S68, S69 form the thirteenth unit group. Sub-pixels S77, S78, S79, S87, S88, S89 form the fourteenth unit group. Sub-pixels S97, S98, S99, S107, S108, S109 form the fifteenth unit group. The remaining divided unit groups can be obtained in the same way. If in the third unit group, the gray level corresponding to sub-pixel S51 is greater than the gray level corresponding to sub-pixel S61, the difference between the gray levels of the display data corresponding to sub-pixels S51 and S61 is not less than the set gray level difference threshold. The difference between the gray levels of the display data corresponding to sub-pixels S52 and S62 is less than the set gray level difference threshold. The difference between the gray levels of the display data corresponding to sub-pixels S53 and S63 is less than the set gray level difference threshold, then the third unit group can be defined as the target unit group. Similarly, the fourth unit group and the fifth unit group are defined as the target unit groups. Similarly, the eighth unit group, the ninth unit group, the tenth unit group, the thirteenth unit group, the fourteenth unit group, and the fifteenth unit group are defined as the target unit groups, forming the target area M1.

[0087] Exemplarily, as Figure 5cAs shown, in the first column of pixel units, sub-pixels S11, S12, S13, S21, S22, S23 form the first unit group, and sub-pixels S31, S32, S33, S41, S42, S43 form the second unit group. Sub-pixels S51, S52, S53, S61, S62, S63 form the third unit group. Sub-pixels S71, S72, S73, S81, S82, S83 form the fourth unit group. Sub-pixels S91, S92, S93, S101, S102, S103 form the fifth unit group. In the second column of pixel units, sub-pixels S14, S15, S16, S24, S25, S26 form the sixth unit group, and sub-pixels S34, S35, S36, S44, S45, S46 form the seventh unit group. Sub-pixels S54, S55, S56, S64, S65, S66 form the eighth unit group. Sub-pixels S74, S75, S76, S84, S85, S86 form the ninth unit group. Sub-pixels S94, S95, S96, S104, S105, S106 form the tenth unit group. In the third column of pixel units, sub-pixels S17, S18, S19, S27, S28, S29 form the eleventh unit group, and sub-pixels S37, S38, S39, S47, S48, S49 form the twelfth unit group. Sub-pixels S57, S58, S59, S67, S68, S69 form the thirteenth unit group. Sub-pixels S77, S78, S79, S87, S88, S89 form the fourteenth unit group. Sub-pixels S97, S98, S99, S107, S108, S109 form the fifteenth unit group. The remaining divided unit groups can be obtained in the same way. If in the third unit group, the gray level of sub-pixel S51 is greater than the gray level of sub-pixel S61, and the difference between the gray levels of the display data corresponding to sub-pixels S51 and S61 is not less than the set gray level difference threshold. The gray level of sub-pixel S52 is greater than the gray level of sub-pixel S62, and the difference between the gray levels of the display data corresponding to sub-pixels S52 and S62 is not less than the set gray level difference threshold. The gray level of sub-pixel S53 is greater than the gray level of sub-pixel S63, and the difference between the gray levels of the display data corresponding to sub-pixels S53 and S63 is not less than the set gray level difference threshold, then the third unit group can be defined as the target unit group. Similarly, the fourth unit group and the fifth unit group are defined as the target unit groups. Similarly, the eighth unit group, the ninth unit group, the tenth unit group, the thirteenth unit group, the fourteenth unit group, and the fifteenth unit group are defined as the target unit groups, forming the target area M1.

[0088] Exemplarily, as Figure 5dAs shown in the figure, in the first column of pixel units, sub-pixels S11, S12, S13, S21, S22, S23 form the first unit group, and sub-pixels S31, S32, S33, S41, S42, S43 form the second unit group. Sub-pixels S51, S52, S53, S61, S62, S63 form the third unit group. Sub-pixels S71, S72, S73, S81, S82, S83 form the fourth unit group. Sub-pixels S91, S92, S93, S101, S102, S103 form the fifth unit group. In the second column of pixel units, sub-pixels S14, S15, S16, S24, S25, S26 form the sixth unit group, and sub-pixels S34, S35, S36, S44, S45, S46 form the seventh unit group. Sub-pixels S54, S55, S56, S64, S65, S66 form the eighth unit group. Sub-pixels S74, S75, S76, S84, S85, S86 form the ninth unit group. Sub-pixels S94, S95, S96, S104, S105, S106 form the tenth unit group. In the third column of pixel units, sub-pixels S17, S18, S19, S27, S28, S29 form the eleventh unit group, and sub-pixels S37, S38, S39, S47, S48, S49 form the twelfth unit group. Sub-pixels S57, S58, S59, S67, S68, S69 form the thirteenth unit group. Sub-pixels S77, S78, S79, S87, S88, S89 form the fourteenth unit group. Sub-pixels S97, S98, S99, S107, S108, S109 form the fifteenth unit group. The remaining divided unit groups can be obtained in the same way.

[0089] If, in the third unit group, the gray level of sub-pixel S51 is greater than the gray level of sub-pixel S61, the difference between the gray levels of the display data corresponding to sub-pixels S51 and S61 is not less than the set gray level difference threshold. The difference between the gray levels of the display data corresponding to sub-pixels S52 and S62 is less than the set gray level difference threshold. The difference between the gray levels of the display data corresponding to sub-pixels S53 and S63 is less than the set gray level difference threshold, then the third unit group can be defined as the target unit group. Similarly, the fourth unit group and the fifth unit group are defined as the target unit groups. Similarly, the eighth unit group, the ninth unit group, the tenth unit group, the thirteenth unit group, the fourteenth unit group, and the fifteenth unit group are defined as the target unit groups to form the target area M1.

[0090] Exemplarily, taking the pixel unit including three sub-pixels and a column of pixel units in four adjacent rows as a unit group as an example. As Figure 5eAs shown in the figure, in the first column of pixel units, sub-pixels S11, S12, S13, S21, S22, S23, S31, S32, S33, S41, S42, S43 serve as the first unit group, and sub-pixels S51, S52, S53, S61, S62, S63, S71, S72, S73, S81, S82, S83 serve as the second unit group. Sub-pixels S91, S92, S93, S101, S102, S103, S111, S112, S113, S121, S122, S123 serve as the third unit group. In the second column of pixel units, sub-pixels S14, S15, S16, S24, S25, S26, S34, S35, S36, S44, S45, S46 serve as the fourth unit group, and sub-pixels S54, S55, S56, S64, S65, S66, S74, S75, S76, S84, S85, S86 serve as the fifth unit group. Sub-pixels S94, S95, S96, S104, S105, S106, S114, S115, S116, S124, S125, S126 serve as the sixth unit group. In the third column of pixel units, sub-pixels S17, S18, S19, S27, S28, S29, S37, S38, S39, S47, S48, S49 serve as the seventh unit group, and sub-pixels S57, S58, S59, S67, S68, S69, S77, S78, S79, S87, S88, S89 serve as the eighth unit group. Sub-pixels S97, S98, S99, S107, S108, S109, S117, S118, S119, S127, S128, S129 serve as the ninth unit group. The remaining unit groups are divided in the same way. The first unit group, the second unit group, the fourth unit group, the fifth unit group, the seventh unit group, and the eighth unit group can be defined as target unit groups according to the above rules to form a target area M1.

[0091] It should be noted that Figures 5a to 5e in, the sub-pixels with higher gray levels in the target area M1 are marked by shading.

[0092] In the embodiment of the present disclosure, the target area M1 is formed by the target unit group. After that, the area of the target area M1 can be compared with a set area threshold. If the area of the target area M1 is not less than the set area threshold, it is determined that the second picture is a defective picture. If the area of the target area M1 is less than the set area threshold, it may make the target area M1 smaller and not easily perceptible to the human eye, then it can be determined that the second picture is not a defective picture. In this way, the display panel can be controlled to scan and drive the sub-pixels row by row, and the display data of the second picture is loaded onto each data line, so that each sub-pixel in the display panel is refreshed with data.

[0093] In an embodiment of the present disclosure, in the current display frame, according to the display data of the second picture and the defective picture determination condition, it is determined whether the second picture is a defective picture. In the display frame after the current display frame, the display panel is controlled to perform scanning driving at intervals of at least one row of sub-pixels, and when the first row of sub-pixels is driven completely and the second row of sub-pixels is being driven among the two rows of sub-pixels during the scanning driving, the display data of the second picture is loaded onto the data line connected to the second row of sub-pixels. In practical applications, the display panel can be controlled to perform scanning driving on a row-by-row basis of sub-pixels in the current display frame, and the display data of the second picture is loaded onto each data line, so that each sub-pixel in the display panel is refreshed with data. That is, in the current display frame, each row of sub-pixels is controlled to be normally turned on, and the timing controller requires one display frame time to determine whether the second picture is a defective picture. In this way, it can be determined whether the second picture is a defective picture in the current display frame. After the determination is completed, in the display frame for displaying the second picture, in the display frames that appear after the current display frame, some rows of sub-pixels are controlled to be turned on and some rows of sub-pixels are in a black state. In this way, the picture display and the determination process can be carried out simultaneously without the determination process occupying extra time.

[0094] In an embodiment of the present disclosure, the timing controller can determine whether the second picture is a defective picture in the first display frame for displaying the second picture, and perform interlaced driving in the second display frame for displaying the second picture and the display frames after the second display frame. For example, in a video, pictures can be displayed through consecutive display frames. Among them, in the first display frame of the video, the first picture is displayed, in the second display frame, the first picture is also displayed, in the third display frame, the first picture is also displayed, in the fourth display frame, the second picture is displayed, in the fifth display frame, the second picture is also displayed, in the sixth display frame, the second picture is also displayed, in the seventh display frame, the second picture is also displayed, in the eighth display frame, the second picture is also displayed, and so on. In this way, the timing controller can determine whether the second picture is a defective picture in the fourth display frame, and perform interlaced driving in the fifth display frame, the sixth display frame, the seventh display frame, and the eighth display frame.

[0095] In the embodiments of the present disclosure, the display panel can be controlled to perform scan driving with a one-row sub-pixel interval, or the display panel can be controlled to perform scan driving with a two-row sub-pixel interval. For example, in a display frame, the odd-numbered rows of sub-pixels are controlled to perform scan driving. Then, the first-row sub-pixels and the third-row sub-pixels can be used as the two rows of sub-pixels for scan driving. At this time, when the first-row sub-pixels are driven and the second-row sub-pixels are being driven, the display data corresponding to the second-row sub-pixels is loaded onto the data line connected to the second-row sub-pixels. The third-row sub-pixels and the fifth-row sub-pixels can be used as the two rows of sub-pixels for scan driving. At this time, when the third-row sub-pixels are driven and the fifth-row sub-pixels are being driven, the display data corresponding to the fifth-row sub-pixels is loaded onto the data line connected to the fifth-row sub-pixels. The fifth-row sub-pixels and the seventh-row sub-pixels can be used as the two rows of sub-pixels for scan driving. At this time, when the fifth-row sub-pixels are driven and the seventh-row sub-pixels are being driven, the display data corresponding to the seventh-row sub-pixels is loaded onto the data line connected to the seventh-row sub-pixels. The rest can be inferred by analogy and will not be elaborated here.

[0096] For example, in a display frame, the even-numbered rows of sub-pixels are controlled to perform scan driving. Then, the second-row sub-pixels and the fourth-row sub-pixels can be used as the two rows of sub-pixels for scan driving. At this time, when the second-row sub-pixels are driven and the fourth-row sub-pixels are being driven, the display data corresponding to the fourth-row sub-pixels is loaded onto the data line connected to the fourth-row sub-pixels. The fourth-row sub-pixels and the sixth-row sub-pixels can be used as the two rows of sub-pixels for scan driving. At this time, when the fourth-row sub-pixels are driven and the sixth-row sub-pixels are being driven, the display data corresponding to the sixth-row sub-pixels is loaded onto the data line connected to the sixth-row sub-pixels. The sixth-row sub-pixels and the eighth-row sub-pixels can be used as the two rows of sub-pixels for scan driving. At this time, when the sixth-row sub-pixels are driven and the eighth-row sub-pixels are being driven, the display data corresponding to the eighth-row sub-pixels is loaded onto the data line connected to the eighth-row sub-pixels. The rest can be inferred by analogy and will not be elaborated here.

[0097] In the embodiments of the present disclosure, the display panel can also be controlled to perform scan driving with a three-row sub-pixel interval. In the embodiments of the present disclosure, for example, when controlling the first-row, fourth-row, seventh-row sub-pixels, etc. to perform scan driving in a display frame. Then, the first-row sub-pixels and the fourth-row sub-pixels can be used as the two rows of sub-pixels for scan driving. At this time, when the first-row sub-pixels are driven and the fourth-row sub-pixels are being driven, the display data corresponding to the fourth-row sub-pixels is loaded onto the data line connected to the fourth-row sub-pixels. The fourth-row sub-pixels and the seventh-row sub-pixels can be used as the two rows of sub-pixels for scan driving. At this time, when the fourth-row sub-pixels are driven and the seventh-row sub-pixels are being driven, the display data corresponding to the seventh-row sub-pixels is loaded onto the data line connected to the seventh-row sub-pixels. The rest can be inferred by analogy and will not be elaborated here.

[0098] In the embodiments of the present disclosure, the display panel can also be controlled to perform scanning driving with a four-line sub-pixel interval, or the display panel can be controlled to perform scanning driving with a five-line or more sub-pixel interval, which is not limited herein.

[0099] Combined with Figure 1a and Figure 6 , Figure 6 It shows a signal schematic diagram in the first display frame after the current display frame when it is determined that the second screen is a defective screen. In the embodiments of the present disclosure, when it is determined that the second screen is a defective screen, in the odd-numbered display frames after the current display frame, the odd-numbered rows of sub-pixels of the display panel can be controlled to perform scanning driving, and the display data corresponding to the odd-numbered rows of sub-pixels can be output to each data line. Exemplarily, in the odd-numbered display frames after the current display frame, the timing controller can input an interlaced scanning control signal (such as stv-od, stv-ev, clk1, clk2, clk3, clk4) to the gate driving circuit in the display panel through a level conversion circuit, so as to control the gate driving circuit to perform scanning driving on the odd-numbered rows of sub-pixels of the display panel (such as outputting signal ga1 to the gate line GA1 coupled to the first row of sub-pixels, outputting signal ga2 to the gate line GA2 coupled to the second row of sub-pixels, outputting signal ga3 to the gate line GA3 coupled to the third row of sub-pixels, and outputting signal ga4 to the gate line GA4 coupled to the fourth row of sub-pixels). And, the timing controller can input an interlaced data control signal to the source driving circuit in the display panel in the odd-numbered display frames after the current display frame, so that the source driving circuit generates an interlaced data output signal (such as signal tp), so as to output the display data corresponding to the odd-numbered rows of sub-pixels to each data line (for example, when the source driving circuit is triggered by the rising edge of signal tp, it can output the display data corresponding to one row of sub-pixels). For example, when the odd-numbered row clock signals (CLK) such as the first row, the third row, and the fifth row input valid levels, the gate lines of the odd-numbered rows such as the first row, the third row, and the fifth row are correspondingly turned on. At this time, under the control of the data control signal TP, the display data overlaps with the clock signal for 2H, where H represents the charging time of one row of pixels. Such a setting is equivalent to blanking out the data of the even rows and charging each odd row for 2H, which can ensure a more sufficient charging rate. Of course, the overlap between the display data and the clock signal can be greater than 2H, which can be set according to actual needs as long as the display panel has a sufficient charging rate.

[0100] For example, combined with Figure 6, the high level in signal ga1 controls all the transistors 01 in the first row of sub-pixels to be turned on, and the low level in signal ga1 controls all the transistors 01 in the first row of sub-pixels to be turned off. The high level in signal ga3 controls all the transistors 01 in the third row of sub-pixels to be turned on, and the low level in signal ga3 controls all the transistors 01 in the third row of sub-pixels to be turned off. Also, signal ga2 is at a low level in the first display frame to control all the transistors 01 in the second row of sub-pixels to be turned off in the first display frame. And, signal ga4 is at a low level in the first display frame to control all the transistors 01 in the fourth row of sub-pixels to be turned off in the first display frame.

[0101] Also, triggered by the first rising edge of the control signal tp, the display data corresponding to each sub-pixel in the first row is output. For example, the display data da1 of the first column in the first row is output to the data line DA1, so that the sub-pixel of the first column in the first row inputs the corresponding display data. The display data da2 of the second column in the first row is output to the data line DA2, so that the sub-pixel of the second column in the first row inputs the corresponding display data. The display data da3 of the third column in the first row is output to the data line DA3, so that the sub-pixel of the third column in the first row inputs the corresponding display data.

[0102] Also, triggered by the second rising edge of the control signal tp, the display data corresponding to each sub-pixel in the third row is output. For example, the display data da1 of the first column in the third row is output to the data line DA1, so that the sub-pixel of the first column in the third row inputs the corresponding display data. The display data da2 of the second column in the third row is output to the data line DA2, so that the sub-pixel of the second column in the third row inputs the corresponding display data. The display data da3 of the third column in the third row is output to the data line DA3, so that the sub-pixel of the third column in the third row inputs the corresponding display data.

[0103] The driving processes corresponding to the remaining odd-numbered rows are the same by analogy and will not be elaborated here.

[0104] Also, the working processes corresponding to the third display frame, the fifth display frame, etc. after the current display frame are basically the same and will not be elaborated here.

[0105] Combined Figure 1a with Figure 7 , Figure 7Schematically shows a signal schematic diagram in the second display frame after the current display frame when the second screen is determined to be a defective screen. In the embodiments of the present disclosure, when the second screen is determined to be a defective screen, in the even-numbered display frames after the current display frame, the even-numbered row sub-pixels of the display panel can be controlled to be scanned and driven, and the display data corresponding to the even-numbered row sub-pixels can be output to each data line. Exemplarily, in the even-numbered display frames after the current display frame, the level conversion circuit can input an interlaced scanning control signal (such as stv-od, stv-ev, clk1, clk2, clk3, clk4) to the gate driving circuit in the display panel through the level conversion circuit, so as to control the gate driving circuit to scan and drive the even-numbered row sub-pixels of the display panel (such as outputting signal ga1 to the gate line GA1 coupled to the first row sub-pixels, outputting signal ga2 to the gate line GA2 coupled to the second row sub-pixels, outputting signal ga3 to the gate line GA3 coupled to the third row sub-pixels, and outputting signal ga4 to the gate line GA4 coupled to the fourth row sub-pixels). And, the timing controller can input an interlaced data control signal to the source driving circuit in the display panel in the even-numbered display frames after the current display frame, so that the source driving circuit can generate an interlaced data output signal (such as signal tp), so as to output the display data corresponding to the even-numbered row sub-pixels to each data line. (For example, when triggered by the rising edge of signal tp, the source driving circuit can output the display data corresponding to one row of sub-pixels.) For example, when the even-numbered row clock signals (CLK) such as the second row, the fourth row, and the sixth row input valid levels, the gate lines of the second row, the fourth row, the sixth row, etc. are correspondingly turned on. At this time, under the control of the data control signal TP, the display data overlaps with the clock signal for 2H, where H represents the charging time of one row of pixels. Such a setting is equivalent to blanking out the data of the odd rows and charging each even row for 2H, which can ensure a sufficient charging rate for each row. Of course, the overlap between the display data and the clock signal can be greater than 2H, which can be set according to actual needs as long as the display panel has a sufficient charging rate is ensured.

[0106] For example, in combination with Figure 7 , the high level in signal ga2 controls all the transistors 01 in the second row sub-pixels to be turned on, and the low level in signal ga2 controls all the transistors 01 in the second row sub-pixels to be turned off. The high level in signal ga4 controls all the transistors 01 in the fourth row sub-pixels to be turned on, and the low level in signal ga4 controls all the transistors 01 in the fourth row sub-pixels to be turned off. And, signal ga1 is at a low level in the second display frame to control all the transistors 01 in the first row sub-pixels to be turned off in the second display frame. And, signal ga3 is at a low level in the second display frame to control all the transistors 01 in the third row sub-pixels to be turned off in the second display frame.

[0107] And, triggered by the first rising edge of the control signal tp, the display data corresponding to each sub-pixel in the second row is output. For example, the display data da1 in the first column of the second row is output to the data line DA1, so that the sub-pixel in the first column of the second row inputs the corresponding display data. The display data da2 in the second column of the second row is output to the data line DA2, so that the sub-pixel in the second column of the second row inputs the corresponding display data. The display data da3 in the third column of the second row is output to the data line DA3, so that the sub-pixel in the third column of the second row inputs the corresponding display data.

[0108] And, triggered by the second rising edge of the control signal tp, the display data corresponding to each sub-pixel in the fourth row is output. For example, the display data da1 in the first column of the fourth row is output to the data line DA1, so that the sub-pixel in the first column of the fourth row inputs the corresponding display data. The display data da2 in the second column of the fourth row is output to the data line DA2, so that the sub-pixel in the second column of the fourth row inputs the corresponding display data. The display data da3 in the third column of the fourth row is output to the data line DA3, so that the sub-pixel in the third column of the fourth row inputs the corresponding display data.

[0109] The driving processes corresponding to the remaining even rows are the same by analogy and will not be elaborated here.

[0110] Moreover, the working processes corresponding to the fourth display frame, the sixth display frame, etc. after the current display frame are basically the same and will not be elaborated here.

[0111] Combined Figure 1a with Figure 8 , Figure 8 It shows a signal schematic diagram in the first display frame after the current display frame when it is determined that the second screen is not a defective screen. In the embodiment of the present disclosure, when it is determined that the second screen is not a defective screen, in each display frame after the current display frame, the timing controller can input a line-by-line scanning control signal (such as stv-od, stv-ev, clk1, clk2, clk3, clk4) to the gate driving circuit in the display panel through the level conversion circuit to control the gate driving circuit to perform scanning driving on each row of sub-pixels in the display panel (such as outputting the signal ga1 to the gate line GA1 coupled to the first row of sub-pixels, outputting the signal ga2 to the gate line GA2 coupled to the second row of sub-pixels, outputting the signal ga3 to the gate line GA3 coupled to the third row of sub-pixels, and outputting the signal ga4 to the gate line GA4 coupled to the fourth row of sub-pixels). And, the timing controller can input a line-by-line data control signal to the source driving circuit in the display panel in each display frame after the current display frame, so that the source driving circuit generates a line-by-line data output signal (such as the signal tp) to output the display data corresponding to each row of sub-pixels to each data line. (For example, when the source driving circuit is triggered by the rising edge of the signal tp, it can output the display data corresponding to a row of sub-pixels.).

[0112] For example, in combination with Figure 8 , the high level in signal ga1 controls all the transistors 01 in the first row of sub-pixels to be turned on, and the low level in signal ga1 controls all the transistors 01 in the first row of sub-pixels to be turned off. The high level in signal ga2 controls all the transistors 01 in the second row of sub-pixels to be turned on, and the low level in signal ga2 controls all the transistors 01 in the second row of sub-pixels to be turned off. The high level in signal ga3 controls all the transistors 01 in the third row of sub-pixels to be turned on, and the low level in signal ga3 controls all the transistors 01 in the third row of sub-pixels to be turned off. The high level in signal ga4 controls all the transistors 01 in the fourth row of sub-pixels to be turned on, and the low level in signal ga4 controls all the transistors 01 in the fourth row of sub-pixels to be turned off.

[0113] Moreover, triggered by the first rising edge of the control signal tp, the display data corresponding to each sub-pixel in the first row is output. For example, the display data da1 of the first column in the first row is output to the data line DA1, so that the sub-pixel of the first column in the first row inputs the corresponding display data. The display data da2 of the second column in the first row is output to the data line DA2, so that the sub-pixel of the second column in the first row inputs the corresponding display data. The display data da3 of the third column in the first row is output to the data line DA3, so that the sub-pixel of the third column in the first row inputs the corresponding display data.

[0114] Moreover, triggered by the second rising edge of the control signal tp, the display data corresponding to each sub-pixel in the second row is output. For example, the display data da1 of the first column in the second row is output to the data line DA1, so that the sub-pixel of the first column in the second row inputs the corresponding display data. The display data da2 of the second column in the second row is output to the data line DA2, so that the sub-pixel of the second column in the second row inputs the corresponding display data. The display data da3 of the third column in the second row is output to the data line DA3, so that the sub-pixel of the third column in the second row inputs the corresponding display data.

[0115] Moreover, triggered by the second rising edge of the control signal tp, the display data corresponding to each sub-pixel in the third row is output. For example, the display data da1 of the first column in the third row is output to the data line DA1, so that the sub-pixel of the first column in the third row inputs the corresponding display data. The display data da2 of the second column in the third row is output to the data line DA2, so that the sub-pixel of the second column in the third row inputs the corresponding display data. The display data da3 of the third column in the third row is output to the data line DA3, so that the sub-pixel of the third column in the third row inputs the corresponding display data.

[0116] And, triggered by the fourth rising edge of the control signal tp, the display data corresponding to each sub-pixel in the fourth row is output, such as the display data da1 of the first column of the fourth row is output to the data line DA1, so that the sub-pixel in the first column of the fourth row inputs the corresponding display data. The display data da2 of the second column of the fourth row is output to the data line DA2, so that the sub-pixel in the second column of the fourth row inputs the corresponding display data. The display data da3 of the third column of the fourth row is output to the data line DA3, so that the sub-pixel in the third column of the fourth row inputs the corresponding display data.

[0117] The driving processes corresponding to the remaining rows are similar and will not be elaborated here.

[0118] Furthermore, the corresponding working processes of the second display frame, the third display frame, the fourth display frame, etc. after the current display frame are basically the same as this, and will not be described in detail here.

[0119] The embodiments of the present disclosure provide other display panel driving methods, which are modified from the implementation methods in the above embodiments. The following only describes the differences between this embodiment and the above embodiments, and the similarities are not repeated here.

[0120] In the embodiment of the present disclosure, Figure 1a and Figure 9 , Figure 9 The schematic diagram of the signal in the first display frame after the current display frame when the second picture is determined to be a bad picture is illustrated. In the embodiment of the present disclosure, when the second picture is determined to be a bad picture, the even-numbered row sub-pixels of the display panel can be controlled to be scan-driven in the odd-numbered display frame after the current display frame, and the display data corresponding to the even-numbered row sub-pixels are output to each data line. Exemplarily, in the odd-numbered display frame after the current display frame, the timing controller can input an interlaced scanning control signal (such as stv-od, stv-ev, clk1, clk2, clk3, clk4) to the gate drive circuit in the display panel through the level conversion circuit to control the gate drive circuit to scan and drive the even-numbered row sub-pixels of the display panel (such as outputting a signal ga1 to the gate line GA1 coupled to the first row sub-pixels, outputting a signal ga2 to the gate line GA2 coupled to the second row sub-pixels, outputting a signal ga3 to the gate line GA3 coupled to the third row sub-pixels, and outputting a signal ga4 to the gate line GA4 coupled to the fourth row sub-pixels). Furthermore, the timing controller may input an interlaced data control signal to a source driving circuit in the display panel in an even-numbered display frame after the current display frame, so that the source driving circuit generates an interlaced data output signal (such as a signal tp) to output display data corresponding to sub-pixels in an even-numbered row to each data line. (For example, the source driving circuit may be triggered by the rising edge of the signal tp to output display data corresponding to a row of sub-pixels).

[0121] For example, combined withFigure 9 When the high level in signal ga2 is present, it controls all the transistors 01 in the sub-pixels of the second row to be turned on, and when the low level in signal ga2 is present, it controls all the transistors 01 in the sub-pixels of the second row to be turned off. When the high level in signal ga4 is present, it controls all the transistors 01 in the sub-pixels of the fourth row to be turned on, and when the low level in signal ga4 is present, it controls all the transistors 01 in the sub-pixels of the fourth row to be turned off. Also, signal ga1 is at a low level in the first display frame to control all the transistors 01 in the sub-pixels of the first row to be turned off in the first display frame. And signal ga3 is at a low level in the first display frame to control all the transistors 01 in the sub-pixels of the third row to be turned off in the first display frame.

[0122] Also, triggered by the first rising edge of the control signal tp, the display data corresponding to each sub-pixel in the second row is output. For example, the display data da1 of the first column in the second row is output to the data line DA1, so that the sub-pixel of the first column in the second row inputs the corresponding display data. The display data da2 of the second column in the second row is output to the data line DA2, so that the sub-pixel of the second column in the second row inputs the corresponding display data. The display data da3 of the third column in the second row is output to the data line DA3, so that the sub-pixel of the third column in the second row inputs the corresponding display data.

[0123] Also, triggered by the second rising edge of the control signal tp, the display data corresponding to each sub-pixel in the fourth row is output. For example, the display data da1 of the first column in the fourth row is output to the data line DA1, so that the sub-pixel of the first column in the fourth row inputs the corresponding display data. The display data da2 of the second column in the fourth row is output to the data line DA2, so that the sub-pixel of the second column in the fourth row inputs the corresponding display data. The display data da3 of the third column in the fourth row is output to the data line DA3, so that the sub-pixel of the third column in the fourth row inputs the corresponding display data.

[0124] The driving processes corresponding to the remaining rows are carried out in the same way by analogy and will not be elaborated here.

[0125] And the working processes corresponding to the third display frame, the fifth display frame, etc. after the current display frame are basically the same and will not be elaborated here.

[0126] In the embodiment of the present disclosure, in combination with Figure 1a and Figure 10 , Figure 10Schematically shows a signal schematic diagram in the second display frame after the current display frame when the second screen is determined to be a defective screen. In the embodiments of the present disclosure, when the second screen is determined to be a defective screen, in the even-numbered display frames after the current display frame, the odd-numbered row sub-pixels of the display panel can be controlled to be scanned and driven, and the display data corresponding to the odd-numbered row sub-pixels can be output to each data line. Exemplarily, in the even-numbered display frames after the current display frame, the timing controller can input an interlaced scanning control signal (such as stv-od, stv-ev, clk1, clk2, clk3, clk4) to the gate driving circuit in the display panel through a level conversion circuit to control the gate driving circuit to scan and drive the odd-numbered row sub-pixels of the display panel (such as outputting signal ga1 to the gate line GA1 coupled to the first row sub-pixels, outputting signal ga2 to the gate line GA2 coupled to the second row sub-pixels, outputting signal ga3 to the gate line GA3 coupled to the third row sub-pixels, and outputting signal ga4 to the gate line GA4 coupled to the fourth row sub-pixels). And, the timing controller can input an interlaced data control signal to the source driving circuit in the display panel in the even-numbered display frames after the current display frame, so that the source driving circuit generates an interlaced data output signal (such as signal tp) to output the display data corresponding to the odd-numbered row sub-pixels to each data line (for example, the source driving circuit is triggered by the rising edge of signal tp and can output the display data corresponding to one row of sub-pixels. For example, triggered by the first rising edge of the control signal tp, the display data corresponding to each sub-pixel in the first row is output, such as the display data da1 in the first row and first column is output to the data line DA1, the display data da2 in the first row and second column is output to the data line DA2, and the display data da3 in the first row and third column is output to the data line DA3. Triggered by the second rising edge of the control signal tp, the display data corresponding to each sub-pixel in the third row is output, such as the display data da1 in the third row and first column is output to the data line DA1, the display data da2 in the third row and second column is output to the data line DA2, and the display data da3 in the third row and third column is output to the data line DA3.).

[0127] For example, in combination with Figure 10 , the high level in signal ga1 controls all the transistors 01 in the first row sub-pixels to be turned on, and the low level in signal ga1 controls all the transistors 01 in the first row sub-pixels to be turned off. The high level in signal ga3 controls all the transistors 01 in the third row sub-pixels to be turned on, and the low level in signal ga3 controls all the transistors 01 in the third row sub-pixels to be turned off. And, signal ga2 is at a low level in the second display frame to control all the transistors 01 in the second row sub-pixels to be turned off in the second display frame. And, signal ga4 is at a low level in the second display frame to control all the transistors 01 in the fourth row sub-pixels to be turned off in the second display frame.

[0128] And, triggered by the first rising edge of the control signal tp, the display data corresponding to each sub-pixel in the first row is output. For example, the display data da1 of the first column in the first row is output to the data line DA1, so that the sub-pixel of the first column in the first row inputs the corresponding display data. The display data da2 of the second column in the first row is output to the data line DA2, so that the sub-pixel of the second column in the first row inputs the corresponding display data. The display data da3 of the third column in the first row is output to the data line DA3, so that the sub-pixel of the third column in the first row inputs the corresponding display data.

[0129] And, triggered by the second rising edge of the control signal tp, the display data corresponding to each sub-pixel in the third row is output. For example, the display data da1 of the first column in the third row is output to the data line DA1, so that the sub-pixel of the first column in the third row inputs the corresponding display data. The display data da2 of the second column in the third row is output to the data line DA2, so that the sub-pixel of the second column in the third row inputs the corresponding display data. The display data da3 of the third column in the third row is output to the data line DA3, so that the sub-pixel of the third column in the third row inputs the corresponding display data.

[0130] The driving processes corresponding to the remaining odd rows are the same by analogy and will not be elaborated here.

[0131] Moreover, the working processes corresponding to the fourth display frame, the sixth display frame, etc. after the current display frame are basically the same and will not be elaborated here.

[0132] The embodiments of the present disclosure provide some other driving methods for display panels, which are variations of the implementation manners in the above embodiments. Only the differences between this embodiment and the above embodiments will be described below, and the same parts will not be elaborated here.

[0133] In the embodiments of the present disclosure, the timing controller and the source driver circuit can be coupled through a General Purpose Input Output (GPIO) interface to transmit signals through the GPIO interface.

[0134] Exemplarily, the timing controller may output, as an interlaced data control signal, a first set bit having a first number output by the general-purpose input / output interface and a second set bit having the first number and a second number. And the source driver circuit may generate an interlaced data output signal according to the second set bit when detecting that the first set bit is the first number. For example, the first number may be "1", the second number may be "0", the first set bit may be the 22nd bit, and the second set bit may be the 23rd bit. In this way, the 22nd bit can carry the digital signal "1", and the 23rd bit can carry the digital signals "1" and "0". The source driver circuit may store the received 22nd bit and 23rd bit in the control unit (Control packets). To make the working mode of the corresponding interlaced data control signal in the source driver circuit according to the digital signal "1" carried by the 22nd bit, so that the source driver circuit can drive the display panel accordingly. And, according to the digital signal "1" carried by the 23rd bit, in the even-numbered display frames after the current display frame, control the scanning drive of the even-numbered row sub-pixels of the display panel and output the display data corresponding to the even-numbered row sub-pixels to each data line. And, according to the digital signal "0" carried by the 23rd bit, in the odd-numbered display frames after the current display frame, control the scanning drive of the odd-numbered row sub-pixels of the display panel and output the display data corresponding to the odd-numbered row sub-pixels to each data line. Or, according to the digital signal "1" carried by the 23rd bit, in the even-numbered display frames after the current display frame, control the scanning drive of the odd-numbered row sub-pixels of the display panel and output the display data corresponding to the odd-numbered row sub-pixels to each data line. And, in the odd-numbered display frames after the current display frame, control the scanning drive of the even-numbered row sub-pixels of the display panel and output the display data corresponding to the even-numbered row sub-pixels to each data line.

[0135] Exemplarily, the timing controller may output, as a progressive data control signal, a first set bit having a second number output by the general-purpose input / output. And the source driver circuit may generate a progressive data output signal when detecting that the first set bit is the second number. For example, the first number may be "1", the second number may be "0", the first set bit may be the 22nd bit, and the second set bit may be the 23rd bit. In this way, the 22nd bit can carry the digital signal "0". The source driver circuit may store the received 22nd bit in the control unit (Controlpackets) to make the working mode of the corresponding progressive data control signal in the source driver circuit according to the digital signal "0" carried by the 23rd bit, so that the source driver circuit can drive the display panel accordingly.

[0136] Of course, the first number may also be "0", and the second number may also be "1". The first set bit and the second set bit may be other bits, which are not limited herein.

[0137] Those skilled in the art should understand that the embodiments of the present disclosure may be provided as a method, a system, or a computer program product. Therefore, the present disclosure may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present disclosure may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0138] The present disclosure is described with reference to the flowcharts and / or block diagrams of methods, apparatuses (systems), and computer program products according to the embodiments of the present disclosure. It should be understood that each flow and / or block in the flowchart and / or block diagram can be implemented by computer program instructions, and the combination of the flows and / or blocks in the flowchart and / or block diagram can also be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing devices generate a device for realizing the functions specified in one or more flows in the flowchart and / or one or more blocks in the block diagram.

[0139] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory generate a manufactured product including an instruction device, and the instruction device realizes the functions specified in one or more flows in the flowchart and / or one or more blocks in the block diagram.

[0140] These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operation steps are executed on the computer or other programmable device to generate a computer-implemented process. Therefore, the instructions executed on the computer or other programmable device provide steps for realizing the functions specified in one or more flows in the flowchart and / or one or more blocks in the block diagram.

[0141] Although the preferred embodiments of the present disclosure have been described, those skilled in the art can make additional changes and modifications to these embodiments once they learn the basic creative concepts. Therefore, the appended claims are intended to be construed as including the preferred embodiments and all changes and modifications falling within the scope of the present disclosure.

[0142] Obviously, those skilled in the art can make various changes and modifications to the embodiments of the present disclosure without departing from the spirit and scope of the embodiments of the present disclosure. Thus, if these modifications and variations of the embodiments of the present disclosure fall within the scope of the claims of the present disclosure and their equivalent technologies, the present disclosure also intends to include these changes and modifications.

Claims

1. A driving method for a display panel, comprising: When switching from a first screen to a second screen, and when the second screen is displayed in at least two consecutive display frames, receiving display data of the second screen in the current display frame of the second screen; Determining whether the second screen is a defective screen according to the display data of the second screen and a defective screen determination condition; When it is determined that the second screen is a defective screen, controlling the display panel to perform scanning driving at an interval of at least one row of sub-pixels, and when the first row of sub-pixels is driven completely and the second row of sub-pixels is being driven among the two rows of sub-pixels during scanning driving, loading the display data corresponding to the second row of sub-pixels onto the data line connected to the second row of sub-pixels; Among them, the controlling the display panel to perform scanning driving at an interval of at least one row of sub-pixels, and when the first row of sub-pixels is driven completely and the second row of sub-pixels is being driven among the two rows of sub-pixels during scanning driving, loading the display data of the second screen onto the data line connected to the second row of sub-pixels specifically includes: in the display frame after the current display frame, controlling the display panel to perform scanning driving at an interval of at least one row of sub-pixels, and when the first row of sub-pixels is driven completely and the second row of sub-pixels is being driven among the two rows of sub-pixels during scanning driving, loading the display data of the second screen onto the data line connected to the second row of sub-pixels; Among them, the controlling the display panel to perform scanning driving at an interval of at least one row of sub-pixels specifically includes: loading a clock signal with an effective level onto a row of sub-pixels that needs to be scanned, and the overlapping duration between the clock signal with the effective level and the data line loading the display data of the second screen is greater than or equal to 2H, where H represents the charging time of one row of sub-pixels.

2. The driving method of the display panel according to claim 1, wherein, The defective screen determination condition includes: a set area threshold for a defective area and a set gray-scale difference threshold between the gray-scales of the display data corresponding to two adjacent sub-pixels in the same column; The determining that the second screen is a defective screen specifically includes: Determining a target area formed by sub-pixels corresponding to display data that satisfies the set gray-scale difference threshold in the display data of the second screen; When the target area satisfies the set area threshold, determining that the second screen is a defective screen.

3. The driving method of the display panel according to claim 2, wherein, The determining the target area formed by sub-pixels corresponding to display data that satisfies the set gray-scale difference threshold in the display data of the second screen specifically includes: Taking at least one column of pixel units in at least two adjacent rows as a unit group, and dividing the pixel units in the display panel into multiple unit groups; For the display data corresponding to each unit group, determining the gray-scale difference between the gray-scales of the display data corresponding to two adjacent rows of sub-pixels in the same column; When the gray-scale difference satisfies the set gray-scale difference threshold, defining the unit group where the sub-pixels corresponding to the gray-scale difference that satisfies the set gray-scale difference threshold are located as the target unit group; All the target unit groups form the target area.

4. The driving method of the display panel according to any one of claims 1-3, wherein, The control scans and drives the display panel with at least one row of sub-pixels spaced apart, and when the first row of sub-pixels has been driven and the second row of sub-pixels is being driven among two rows of sub-pixels during the scan drive, loads the display data of the second screen onto the data lines connected to the second row of sub-pixels. Specifically, it includes: In the odd-numbered display frames after the current display frame, controls the odd-numbered rows of sub-pixels of the display panel to be scanned and driven, and outputs the display data corresponding to the odd-numbered rows of sub-pixels to each of the data lines; In the even-numbered display frames after the current display frame, controls the even-numbered rows of sub-pixels of the display panel to be scanned and driven, and outputs the display data corresponding to the even-numbered rows of sub-pixels to each of the data lines.

5. The driving method of the display panel according to any one of claims 1 to 3, wherein, The control of scanning and driving the display panel with at least one row of sub-pixels spaced apart specifically includes: In the odd-numbered display frames after the current display frame, controls the even-numbered rows of sub-pixels of the display panel to be scanned and driven, and outputs the display data corresponding to the even-numbered rows of sub-pixels to each of the data lines; In the even-numbered display frames after the current display frame, controls the odd-numbered rows of sub-pixels of the display panel to be scanned and driven, and outputs the display data corresponding to the odd-numbered rows of sub-pixels to each of the data lines.

6. The driving method of the display panel according to any one of claims 1-3, wherein, In the current display frame, determines whether the second screen is a defective screen according to the display data of the second screen and the defective screen determination condition.

7. A display device, comprising: A display panel; A timing controller configured to, when switching from a first screen to a second screen and the second screen is displayed in at least two consecutive display frames, receive the display data of the second screen in the current display frame of the second screen; determine whether the second screen is a defective screen according to the display data of the second screen and the defective screen determination condition; When it is determined that the second screen is a defective screen, inputs an interlaced scanning control signal to the gate driving circuit in the display panel and inputs an interlaced data control signal to the source driving circuit in the display panel, controls the display panel to scan and drive with at least one row of sub-pixels spaced apart, and when the first row of sub-pixels has been driven and the second row of sub-pixels is being driven among two rows of sub-pixels during the scan drive, loads the display data corresponding to the second row of sub-pixels onto the data lines connected to the second row of sub-pixels; The timing controller is further configured to, in the display frames after the current display frame, control the display panel to scan and drive with at least one row of sub-pixels spaced apart, and when the first row of sub-pixels has been driven and the second row of sub-pixels is being driven among two rows of sub-pixels during the scan drive, load the display data of the second screen onto the data lines connected to the second row of sub-pixels; Among them, the timing controller is further configured to control the display panel to perform scan driving at intervals of at least one row of sub-pixels in the display frame after the current display frame, specifically including: the timing controller controls a clock signal with an effective level to be loaded to a row of sub-pixels that needs to be scanned and driven, and the overlapping duration of the clock signal with the effective level and the display data of the second picture loaded on the data line is greater than or equal to 2H, where H represents the charging time of one row of sub-pixels.

8. The display device according to claim 7, wherein, The timing controller is further configured to, when determining that the second picture is not a defective picture, input a progressive scan control signal to the gate driving circuit in the display panel and input a progressive data control signal to the source driving circuit in the display panel, control the display panel to perform scan driving on each row of sub-pixels, and load the display data corresponding to each row of sub-pixels on each data line.

9. The display device according to claim 8, wherein, The timing controller is coupled to the source driving circuit through a general-purpose input / output interface; The timing controller is further configured to set the drive enable pin of the general-purpose input / output interface to an interlaced drive effective level as the output of the interlaced data control signal; And set the drive enable pin of the general-purpose input / output interface to a progressive drive effective level as the output of the progressive data control signal; The source driving circuit is further configured to generate an interlaced data output signal when detecting that the level of the drive enable pin is the interlaced drive effective level, and load the display data corresponding to the second row of sub-pixels on the data line connected to the second row of sub-pixels according to the generated interlaced data output signal; And generate a progressive data output signal when detecting that the level of the drive enable pin is the progressive drive effective level, and load the display data corresponding to each row of sub-pixels on each data line according to the generated progressive data output signal.

10. The display device according to claim 9, wherein, The timing controller is further configured to switch the level of the drive enable pin from a first level to a second level as the interlaced drive effective level; And keep the level of the drive enable pin at the first level as the progressive drive effective level; The source driving circuit is further configured to compare the voltage corresponding to the level of the drive enable pin with a stored set voltage threshold, generate the interlaced data output signal when the voltage corresponding to the level of the drive enable pin is higher than the set voltage threshold; and generate the progressive data output signal when the voltage corresponding to the level of the drive enable pin is not higher than the set voltage threshold.

11. The display device according to claim 9, wherein, The timing controller is coupled to the level conversion circuit through a general-purpose input / output interface; The timing controller is further configured to output a first set bit with a first number and a second set bit with a first number and a second number through the general-purpose input / output interface as the output of the interlaced data control signal; And output a first set bit with a second number through the general-purpose input / output as the output of the progressive data control signal; The source driving circuit is further configured to generate the interlaced data output signal according to the second set bit when detecting that the first set bit is the first digit; and generate the progressive data output signal when detecting that the first set bit is the second digit.

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