A data storage method

By dividing the EEPROM into storage blocks and employing a state cell comparison and I2C bus monitoring and error correction mechanism, the problem of fixed write addresses in EEPROM in automotive devices is solved, thereby improving the accuracy of data writing and extending the device's lifespan.

CN116414310BActive Publication Date: 2026-05-29FORYOU GENERAL ELECTRONICS

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
FORYOU GENERAL ELECTRONICS
Filing Date
2023-02-23
Publication Date
2026-05-29

Smart Images

  • Figure CN116414310B_ABST
    Figure CN116414310B_ABST
Patent Text Reader

Abstract

The application provides a data storage method, which comprises the following steps: step 1, system initialization, setting the content of the state unit of each storage block of an EEPROM to 0; step 2, determining a current storage block according to the content of the state unit of each storage block; step 3, determining a target storage block according to the current storage block; and step 4, writing target storage data into the target storage block. The application realizes a substantial increase in the service life of the EEPROM and improves the accuracy of data writing.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of data processing technology, and in particular to a data storage method. Background Technology

[0002] With the increasingly widespread application of smart devices, the use cases for embedded hardware and software are also expanding. In the embedded field, there is often a need to retain information after power failure so that it can be reused upon the next startup. For example, car audio systems and car air conditioners need to remember certain functional states after being turned off. EEPROM is an electronic device that can store information after power failure.

[0003] Currently, a typical EEPROM has about 1 million erase / write cycles, while a lower-cost one has 100,000 cycles. However, the data storage address of the EEPROM in automotive devices is fixed. This means that some parts of the EEPROM are frequently erased and written, while others are almost never erased or written. Over time, this makes the data from low-cost EEPROMs prone to errors. Furthermore, the automotive environment is complex, with significant electromagnetic interference and even sudden power outages, which can cause abnormalities in the EEPROM's I2C bus, leading to errors when writing data to the EEPROM.

[0004] Therefore, it is urgent to improve the current EEPROM data writing method in order to increase the lifespan of EEPROM and the accuracy of data writing. Summary of the Invention

[0005] This invention provides a data storage method that aims to overcome the shortcomings of existing technologies, significantly increase the lifespan of EEPROM, and improve the accuracy of data writing.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0007] A data storage method, comprising:

[0008] Step 1: System initialization, set the contents of the status cells of each storage block of EEPROM to 0;

[0009] Step 2: Determine the current storage block based on the content of the state unit of each storage block;

[0010] Step 3: Determine the target storage block based on the current storage block;

[0011] Step 4: Write the target storage data into the target storage block.

[0012] Specifically, step 2 includes:

[0013] Step 201: Read the content of the current state unit and compare it with the content of the adjacent state unit. If the two are inconsistent, determine the storage block corresponding to the current state unit as the current storage block; otherwise, proceed to the next step.

[0014] Step 202: Determine whether the current state unit is the last state unit. If yes, determine the last storage block as the current storage block; otherwise, return to the previous step.

[0015] Specifically, step 3 includes: determining whether the remaining space of the current storage block is greater than the length of the target storage data; if so, the current storage block is determined as the target storage block; otherwise, the adjacent storage blocks of the current storage block are determined as the target storage block.

[0016] Specifically, step 4 includes:

[0017] Step 401: If the target storage block is the current storage block, then after locating the data storage address in the current storage block, write the target storage data and erase the historical data in the current storage block;

[0018] Step 402: If the target storage block is an adjacent storage block of the current storage block, then start writing the target storage data from the starting address of the data unit of the target storage block, and rewrite the contents of the state units of the current storage block and the target storage block according to preset rules.

[0019] Specifically, the preset rule is an inversion operation.

[0020] Specifically, writing the target storage data after locating the data storage address within the current storage block includes:

[0021] Step 4011: Define and initialize the search address variable and the search count variable;

[0022] Step 4012: Determine whether the content at the current search address is the same as the data storage start identifier. If yes, proceed to step 4015; otherwise, proceed to the next step.

[0023] Step 4013: Increment the search address variable and the search count variable by a preset step size, and determine whether the search address variable is equal to the maximum address of the current page. If so, point the search address variable to the next page.

[0024] Step 4014: Determine whether the search count variable is equal to the maximum address of the current storage block. If yes, return a search failure message; otherwise, return to step 4012.

[0025] Step 4015: Read the target stored data from the buffer and increment the length of the target stored data by the number of searches variable;

[0026] Step 4016: Read the content at the target address and determine whether it is the same as the data storage end identifier. If it is, save the target address to the search address variable and proceed to step 4017. Otherwise, return to step 4013. The target address is the next address after adding the length of the target stored data to the current search address.

[0027] Step 4017: Start writing the target storage data from the address following the target address.

[0028] Specifically, the preset step size is 1.

[0029] Specifically, writing the target storage data includes writing the target storage data via the I2C bus.

[0030] Specifically, writing the target storage data via the I2C bus includes:

[0031] Step A1: During the writing of the target storage data, monitor whether the I2C bus is abnormal. If so, proceed to the next step; otherwise, repeat this step.

[0032] Step A2: Configure the SDA and SCL ports of the I2C master device to I / O mode;

[0033] Step A3: The I2C master device sends an I2C protocol start signal to the EEPROM;

[0034] Step A4: The I2C master device sends a preset number of I2C clock signals to the EEPROM;

[0035] Step A5: The I2C master device sends the start and stop signals of the I2C protocol to the EEPROM;

[0036] Step A6: The I2C master device reconfigures the SDA and SCL ports to I2C mode.

[0037] Specifically, the preset quantity is 1 + 8k (k ≥ 1).

[0038] The beneficial effects of this invention are as follows: This invention divides the EEPROM into several storage blocks, and divides each storage block into a status unit for storing the status parameters of the storage block and a data unit for storing the data content. Then, the current storage block is determined according to the content of the status unit of each storage block, the target storage block is determined according to the current storage block, and the target storage data is written into the target storage block. This invention achieves a significant increase in the service life of the EEPROM and improves the accuracy of data writing. Attached Figure Description

[0039] Figure 1 This is a flowchart illustrating the data storage method of the present invention;

[0040] Figure 2 This is a schematic diagram of the data packaging format of the present invention. Detailed Implementation

[0041] The embodiments of the present invention are described in detail below with reference to the accompanying drawings. The drawings are for reference and illustration only and do not constitute a limitation on the scope of protection of the present invention.

[0042] In the process described in the specification, claims, or drawings of this invention, each step is numbered (e.g., step 10, 20, etc.). These numbers are used only to distinguish the steps and do not represent any execution order. It should be noted that the terms "first," "second," etc., used herein are only for distinguishing the objects being described and do not represent a chronological order, nor do they indicate that "first," "second," etc., are different types.

[0043] like Figure 1 As shown, this embodiment provides a data storage method, including:

[0044] Step 1: System initialization, set the contents of the status cells of each storage block of EEPROM to 0.

[0045] In practical implementation, the EEPROM is divided into several storage blocks, and each storage block is divided into a status unit and a data unit. The status unit starts from the starting address of each storage block and is used to store the status parameters of the storage block, while the data unit is used to store the data content.

[0046] For example, if the EEPROM has a capacity of 512KB, an address range of 00000H to 7FFFFH, and 128 bytes per page, then there are a total of 4096 pages. If these are divided into 16 storage blocks, then each storage block has 256 pages and 32KB in size. Page 0 stores the status parameters of the corresponding storage block, and pages 1-255 are used to store the data content.

[0047] The system is initialized to the state of the EEPROM running for the first time and without any data written to it.

[0048] Step 2: Determine the current storage block based on the content of the state unit of each storage block.

[0049] In this embodiment, step 2 includes:

[0050] Step 201: Read the content of the current state unit M (M = 0, 1, 2...n-1, where n represents the number of storage blocks) and compare it with the content of the adjacent state unit M+1. If the two are inconsistent, the storage block corresponding to the current state unit M is determined to be the current storage block; otherwise, proceed to the next step.

[0051] Step 202: Determine whether the current state unit M is the last state unit. If yes, determine the last storage block as the current storage block; otherwise, return to the previous step.

[0052] In this embodiment, the current storage block is a storage block that already contains historical data.

[0053] In practice, a sequential reading method can be adopted, starting from the first state unit (i.e., M=0), and its content is compared with the content of the second state unit (i.e., M=1). If they match, the content of the second state unit (i.e., M=1) is compared with the content of the third state unit (i.e., M=2). If they match, the process continues in this manner.

[0054] If the contents of the status cells of all memory blocks are the same, it means that there is no data stored in the EEPROM. In this case, the current memory block can be set as the last memory block, and the adjacent memory block of the last memory block is the first memory block.

[0055] Step 3: Determine the target storage block based on the current storage block.

[0056] In this embodiment, step 3 includes: determining whether the remaining space of the current storage block is greater than the length of the target storage data; if so, the current storage block is determined as the target storage block; otherwise, the adjacent storage block M+1 of the current storage block is determined as the target storage block.

[0057] In this embodiment, the target storage block is the storage block on which new data content is about to be written.

[0058] Step 4: Write the target storage data into the target storage block.

[0059] In this embodiment, step 4 includes:

[0060] Step 401: If the target storage block is the current storage block, then after locating the data storage address in the current storage block, write the target storage data and erase the historical data in the current storage block;

[0061] Step 402: If the target storage block is an adjacent storage block of the current storage block, then start writing the target storage data from the starting address of the data unit of the target storage block, and rewrite the contents of the state units of the current storage block and the target storage block according to preset rules.

[0062] In this embodiment, the preset rule in step 402 is an inversion operation.

[0063] In this embodiment, the target stored data are all in accordance with Figure 2 The data is packaged in the format shown, where S1 is the data storage start identifier and S2 is the data storage end identifier, used to identify the start and end of the storage address of the data content (i.e., D(1), D(2)...D(N)). S1 and S2 use values ​​different from the data being stored.

[0064] In this embodiment, step 401, which involves locating the data storage address within the current storage block and then writing the target storage data, includes:

[0065] Step 4011: Define and initialize the search address variable p and the search count variable q;

[0066] Step 4012: Determine whether the content at the current search address is the same as the data storage start identifier S1. If yes, proceed to step 4015; otherwise, proceed to the next step.

[0067] Step 4013: Increment the search address variable p and the search count variable q by a preset step size, and determine whether the search address variable q is equal to the maximum address of the current page. If so, point the search address variable p to the next page.

[0068] In this embodiment, the preset step size is 1.

[0069] Step 4014: Determine whether the search count variable q is equal to the maximum address of the current storage block. If yes, return a search failure message; otherwise, return to step 4012.

[0070] Step 4015: Read the target stored data from the buffer and increment the search count variable q by the length N of the target stored data;

[0071] Step 4016: Read the content at the target address and determine whether it is the same as the data storage end identifier S2. If it is, save the target address to the search address variable p and proceed to step 4017. Otherwise, return to step 4013. The target address is the next address after adding the length of the target stored data to the current search address.

[0072] For example, if the current search address is a and the length of the target stored data is N, then the target address is a+N+1.

[0073] Step 4017: Start writing the target storage data from the address following the target address.

[0074] In this embodiment, writing the target storage data includes writing the target storage data via the I2C bus.

[0075] In this embodiment, writing the target storage data via the I2C bus includes:

[0076] Step A1: During the writing of the target storage data, monitor whether the I2C bus is abnormal. If so, proceed to the next step; otherwise, repeat this step.

[0077] Step A2: Configure the SDA and SCL ports of the I2C master device to I / O mode;

[0078] In this embodiment, the I2C master device is typically a processor (e.g., an MCU) connected to an EEPROM.

[0079] Step A3: The I2C master device sends an I2C protocol start signal to the EEPROM;

[0080] Step A4: The I2C master device sends a preset number of I2C clock signals to the EEPROM;

[0081] In this embodiment, the preset quantity is 1 + 8k (k ≥ 1).

[0082] Step A5: The I2C master device sends the start and stop signals of the I2C protocol to the EEPROM;

[0083] Step A6: The I2C master device reconfigures the SDA and SCL ports to I2C mode.

[0084] The above steps enable error correction when an I2C bus write error occurs, preventing accidental EEPROM writes.

[0085] The above-disclosed embodiments are merely preferred embodiments of the present invention and should not be construed as limiting the scope of protection of the present invention. Therefore, any equivalent variations made in accordance with the claims of the present invention are still within the scope of the present invention.

Claims

1. A data storage method, characterized in that, include: Step 1: System initialization, set the contents of the status cells of each storage block of EEPROM to 0; Step 2: Determine the current storage block based on the content of the state unit of each storage block; Step 3: Determine the target storage block based on the current storage block; Step 4: Write the target storage data into the target storage block; Step 4 includes: Step 401: If the target storage block is the current storage block, then after locating the data storage address in the current storage block, write the target storage data and erase the historical data in the current storage block; Step 402: If the target storage block is an adjacent storage block of the current storage block, then start writing the target storage data from the starting address of the data unit of the target storage block, and rewrite the contents of the state units of the current storage block and the target storage block according to preset rules; The step of locating the data storage address within the current storage block and then writing the target storage data includes: Step 4011: Define and initialize the search address variable and the search count variable; Step 4012: Determine whether the content at the current search address is the same as the data storage start identifier. If yes, proceed to step 4015; otherwise, proceed to the next step. Step 4013: Increment the search address variable and the search count variable by a preset step size, and determine whether the search address variable is equal to the maximum address of the current page. If so, point the search address variable to the next page. Step 4014: Determine whether the search count variable is equal to the maximum address of the current storage block. If yes, return a search failure message; otherwise, return to step 4012. Step 4015: Read the target stored data from the buffer and increment the length of the target stored data by the number of searches variable; Step 4016: Read the content at the target address and determine whether it is the same as the data storage end identifier. If it is, save the target address to the search address variable and proceed to step 4017. Otherwise, return to step 4013. The target address is the next address after adding the length of the target stored data to the current search address. Step 4017: Start writing the target storage data from the address following the target address.

2. The data storage method according to claim 1, characterized in that, Step 2 includes: Step 201: Read the content of the current state unit and compare it with the content of the adjacent state unit. If the two are inconsistent, determine the storage block corresponding to the current state unit as the current storage block; otherwise, proceed to the next step. Step 202: Determine whether the current state unit is the last state unit. If yes, determine the last storage block as the current storage block; otherwise, return to the previous step.

3. The data storage method according to claim 2, characterized in that, Step 3 includes: determining whether the remaining space of the current storage block is greater than the length of the target storage data; if so, the current storage block is determined as the target storage block; otherwise, the adjacent storage blocks of the current storage block are determined as the target storage block.

4. The data storage method according to claim 1, characterized in that, The preset rule is an inversion operation.

5. The data storage method according to claim 1, characterized in that, The preset step size is 1.

6. The data storage method according to claim 1, characterized in that, The process of writing the target storage data includes writing the target storage data via the I2C bus.

7. The data storage method according to claim 6, characterized in that, The step of writing the target storage data via the I2C bus includes: Step A1: During the writing of the target storage data, monitor whether the I2C bus is abnormal. If so, proceed to the next step; otherwise, repeat this step. Step A2: Configure the SDA and SCL ports of the I2C master device to I / O mode; Step A3: The I2C master device sends an I2C protocol start signal to the EEPROM; Step A4: The I2C master device sends a preset number of I2C clock signals to the EEPROM; Step A5: The I2C master device sends the start and stop signals of the I2C protocol to the EEPROM; Step A6: The I2C master device reconfigures the SDA and SCL ports to I2C mode.

8. The data storage method according to claim 7, characterized in that, The preset quantity is 1 + 8k (k ≥ 1).