An improved method of a lookup table algorithm based on simd instructions

Abstract

This invention provides an improved method for a table lookup algorithm based on SimD instructions. The method includes: S1: Designing two new types of SimD instructions, gshuf-type instructions and cmvw instructions; wherein the gshuf-type instructions include: gshufw vrd vrs vrp imm, gshufh vrd vrs vrp, gshufb vrd vrs vrp, gshufwh vrd vrs vrp, and gshufwb vrd vrs vrp; the cmvw instructions include cmvw vrd vrs vrp imm; S2: Using the SimD instructions in step S1 to implement the N-to-1 algorithm and the combined table lookup algorithm, that is, to look up N table entries simultaneously, where N=2, 8, 16, 32, 128, 256. Addressing the shortcomings and deficiencies of existing technical solutions, two innovative types of SimD instructions, gshuf-type instructions and cmvw instructions, are proposed. The table lookup algorithm is improved based on the simd gshuf and simd cmvw instructions. Compared with the traditional table lookup algorithm, it reduces the time consumption of memory access, reduces the number of unnecessary instructions in the algorithm, improves the parallelism, and significantly improves the execution speed of the table lookup algorithm.

Description

Technical Field

[0001] This invention relates to the field of data processing technology, and in particular to an improved method for a table lookup algorithm based on SIMD instructions. Background Technology

[0002] With the development of the internet and artificial intelligence, a large number of mathematical algorithms have been invented, and these increasingly complex algorithms have placed a heavy computational burden on processors. To address this issue, hardware designers have developed SIMD extended instructions for processors, which allow a single instruction to perform multiple data stream operations. SIMD extended instructions have significantly improved the processor's execution speed when processing large amounts of data.

[0003] SIMD stands for Single Instruction Multiple Data, a set of instructions that can copy multiple operands and pack them into a large register. Taking addition as an example, in a single-instruction, single-data CPU, after decoding the addition instruction, the execution unit first accesses memory to obtain the first operand; then it accesses memory again to obtain the second operand; only then can the summation operation be performed. However, in CPUs that support SIMD extensions, after instruction decoding, several execution units access memory simultaneously, obtaining all operands at once for computation. This characteristic makes SIMD particularly suitable for data-intensive computations such as multimedia applications.

[0004] SIMD technology: SIMD stands for Single Instruction Multiple Data. It's a technique that uses a single controller to control multiple processors, simultaneously performing the same operation on each element of a set of data (also known as a "data vector"), thus achieving spatial parallelism. In image processing, image data commonly uses formats like RGB565, RGBA8888, and YUV422. These formats represent a single component of a pixel using less than or equal to 8 bits of data. Using traditional processors, even with 32-bit or 64-bit registers, only the lower 8 bits are used to process this data, resulting in very low efficiency. By splitting a 64-bit register into eight 8-bit registers, eight operations can be performed simultaneously, increasing computational efficiency by eight times. This is the core idea behind SIMD instructions.

[0005] Table lookup algorithm: The so-called table lookup method is to compile pre-calculated or measured data into a table in a certain order. The task of the table lookup program is to find the final result required based on the value of the measured parameter or intermediate results. In computer data processing, the tables generally used are linear lists, which are sets of several data elements X0, X1, ..., Xn. The arrangement of each data element in the table and the number of memory units occupied by each element are the same. Therefore, the content to be searched is related to the arrangement of the table. By using the index of the given data element x, the address of the value corresponding to element x can be calculated through certain calculations, and then the content of that address unit can be retrieved. This ordered table requires that the arrangement format and space occupied by each element in the table must be consistent, and that each element is strictly arranged in order. The key is to find a formula for calculating the table address. As long as the formula exists, the lookup time is independent of the length of the table. Because of its strict requirements on the table, not all tables can be used. It is usually suitable for certain numerical calculation programs, function key address transfer programs, and digital conversion programs.

[0006] However, the existing technology has the following drawbacks:

[0007] 1. Traditional table lookup algorithms load table entries into a location in computer memory and retrieve them from memory. However, frequent access to memory by the computer slows down the execution speed of the method.

[0008] 2. Traditional table lookup algorithms are implemented using single instruction and single data instruction. This type of algorithm consumes a lot of cycles during execution and is slow.

[0009] 3. Although there are currently improvements to the table lookup algorithm using SimD instructions, the table lookup algorithm that is generally implemented using ordinary SimD instructions to perform a large number of logical operations can improve the execution speed of the table lookup algorithm, but the additional overhead is large and the benefit is small.

[0010] In addition, the terminology used in the prior art includes:

[0011] SIMD (Single Instruction Multiple Data) is an extended instruction set that enables efficient parallel processing.

[0012] The exp function: In advanced mathematics, an exponential function with the natural constant e as its base.

[0013] Instruction dependency: In program execution, the next instruction can only be executed after the previous instruction has been completed. In this case, the two instructions are dependent.

[0014] Table lookup algorithm: This involves compiling pre-calculated or measured data into a table in a certain order. The task of the table lookup program is to find the final result required based on the value of the measured parameter or intermediate results. Summary of the Invention

[0015] To address the aforementioned problems, this application aims to: based on research into traditional table lookup algorithms and leveraging the advantages of SIMD instructions (Single Instruction Multiple Data), extend existing processor SIMD instructions by innovatively proposing `gshuf`-type instructions and `cmvw` instructions. Simultaneously, these two instruction types are used to innovatively improve the table lookup algorithm, eliminating additional overhead during execution and enhancing parallelism. Compared to traditional table lookup algorithms, this significantly increases the processor's execution speed.

[0016] Specifically, this invention provides an improved method for a table lookup algorithm based on SimD instructions, the method comprising:

[0017] S1: Design two new classes of SimD instructions: gshuf-type instructions and cmvw instructions; the gshuf-type instructions include: gshufw vrd vrs vrp imm, gshufh vrd vrs vrp, gshufb vrd vrs vrp, gshufwh vrd vrsvrp, and gshufwb vrd vrs vrp; the cmvw instructions include cmvw vrd vrs vrp imm; where,

[0018] The instruction `gshufw vrd vrs vrp imm` is used to select a word from `vrs` and update the corresponding word in `vrd` using `vrp` and `imm` as conditions. Its specific design is as follows: `imm` is used as an index to select a byte from each word in `vrs`, and then this byte is used as an index to select a word from `vrp` to update the corresponding word in `vrd`.

[0019] The `gshufb vrd vrs vrp` instruction reorders the four bytes of each word in the `vrs` using `vrp` as a condition and updates the corresponding word in the `vrd`. Its specific design is as follows: It selects four bytes from the corresponding word in the `vrp` using the lower 8 bits of each word in the `vrs`: bits 1-0 are used as indices for byte 0, bits 3-2 for byte 1, bits 5-4 for byte 2, and bits 7-6 for byte 3; the set {byte 3, byte 2, byte 1, byte 0} is used to update the corresponding word in the `vrd`.

[0020] The instruction cmvw vrd vrs vrp imm: This instruction uses vrp and imm as conditions to determine whether the corresponding word in vrs needs to be updated to vrd. Its specific design is as follows: Use bits 3 to 0 of each word in vrp to compare with imm. If they are equal, take the corresponding word in vrs to update the corresponding word in vrd. Otherwise, the corresponding word in vrd remains unchanged.

[0021] in,

[0022] vrp: the first source operand in the simd instruction;

[0023] vrs: The second source operand in the simd instruction;

[0024] vrd: The destination operand in the simd instruction;

[0025] imm: The immediate value in the simd instruction;

[0026] bit: the smallest unit of data storage;

[0027] word: a character, 32 bits in length;

[0028] halfword: a word or phrase with a length of 16 bits;

[0029] byte: A byte, with a length of 8 bits;

[0030] S2: Use the simd instruction in step S1 to implement the N-to-1 algorithm and the combined lookup algorithm, that is, to look up N table entries at the same time, where N=2, 8, 16, 32, 128, 256.

[0031] The SIMD instruction width used in this method is 512 bits, which contains 32 registers, represented by vr0~vr31; vrx[](W): The x-th register in the 32 512-bit SIMD registers is divided by word, and each unit is operated on, x∈[0,31]; This method is not limited to retrieving 16 data from 256 table entries at the same time, but can also be used to retrieve multiple different table entries at the same time.

[0032] The implementation method for the 16-to-1 selection, i.e., when N=16:

[0033] The command `gshufw vr12, vr9, vr0, 0` is used. `vr0` contains 16 entries, each a word. Each word in `vr9` contains the index of the data to be retrieved from the entry. The command retrieves the data by its index and places it into the corresponding word in `vr12`. If word 0 in `vr9` contains the value 2, then after executing `gshufw vr12, vr9, vr0, 0`, word 0 in `vr12` will contain word 2 from `vr0`. This process continues, retrieving the values ​​of words 0 through 15 in `vr12`. The values ​​stored in words 15 through 0 in `vr9` are 15, 15, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 0, 1, and 2, respectively. Therefore, when `gshufw vr12, vr9, vr0, 0` is executed, the data will be retrieved. After instruction 0 is executed, the values ​​stored in word15 to word0 in vr12 come from vr0 word15, vr0word15, vr0 word13, vr0 word12, vr0 word11, vr0 word10, vr0 word9, vr0 word8, vr0word7, vr0 word6, vr0 word5, vr0 word4, vr0 word3, vr0 word0, vr0 word1, and vr0 word2, respectively.

[0034] The specific implementation steps are as follows:

[0035] Step 1 for selecting 16 items: Load the 16 table entries, each in word units, into vr0;

[0036] Step 2 of the 16-to-1 selection: Store the 16 labels from which data needs to be extracted into VR9 in word units;

[0037] Step 3 of the 16-choose-1 selection: Retrieve data from the table based on the label values ​​of the data to be retrieved;

[0038] The command `gshufw vr12, vr9, vr0, 0` is executed to select a word from `vr0` using each word in `vr9` as an index to update the corresponding word in `vr12`.

[0039] The above three steps of selecting one out of 16 can simultaneously achieve the selection of one out of 16 sets of data; the rules that must be met are as follows:

[0040] 1) vr9 contains 16 index values, each representing a word and requiring a 16-choose-1 selection.

[0041] 2) vr0 contains 16 table entries, each represented by a word.

[0042] 3) Each word in VR12 stores the table entry data retrieved from VR9;

[0043] 4) The improved algorithm can simultaneously retrieve data from 16 tables.

[0044] The method for implementing the 8-out-of-1 selection, i.e., when N=8:

[0045] The system consists of 8 CMVW instructions. Registers VR0-VR7 store 128 word-level entries, so each SIMD register stores 16 word-level entries. Each word in VR10 stores a label indicating the register number containing the data to be retrieved. Each CMV instruction can only retrieve data from one SIMD register (VR0-VR7) at a time. Since each entry occupies 8 SIMD registers, the CMV instruction needs to be executed 8 times, retrieving the required data from VR0, VR1, VR2, VR3, VR4, VR5, VR6, and VR7 respectively. The first instruction, `cmvw vr13, vr0, vr10, 0`, updates the data in VR0 based on VR10. Since word5 in VR10 currently contains a value of 0, it updates word5 in VR13. The second instruction, `cmvw vr13, vr0, vr10, ...`, updates the value in VR13. The first instruction updates the required data from VR1 based on VR10. Since word14, word6, and word4 in VR10 contain the value 1, the instructions update word14, word6, and word4 in VR13 to word14, word6, and word4 respectively. This process continues, executing the first instruction `cmvw vr13, vr0, vr10, 0` up to the eighth instruction `cmvw vr13, vr0, vr10, 7`, thus updating all data from VR0 to VR7 to VR13. These eight instructions allow for the simultaneous selection of 16 entries from eight SIMD registers.

[0046] The specific implementation steps are as follows:

[0047] Step 1 of the 8-choose-1 method: Load the 128 sets of table entries, each in word units, into vr0~vr7 in ascending order;

[0048] Step 2 of the 8-choose-1 method: Store the 16 register numbers from which data needs to be retrieved into VR10 in units of words;

[0049] Step 3 of the 8-choose-1 method: Update the required data from VR0 based on VR10;

[0050] The command cmvw vr13, vr0, vr10, 0 is executed as follows: Each word in vr10 is compared with 0. If they are equal, the corresponding word in vr0 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged.

[0051] Step 4 of the 8-choose-1 selection: Update the required data from VR1 based on VR10;

[0052] The command cmvw vr13, vr1, vr10, 1 is executed to compare each word in vr10 with 1. If they are equal, the corresponding word in vr1 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged.

[0053] Step 5 of the 8-choose-1 method: Update the required data from VR2 based on VR10;

[0054] The command cmvw vr13, vr2, vr10, 2 is executed to compare each word in vr10 with 2. If they are equal, the corresponding word in vr2 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged.

[0055] Step 6 of the 8-choose-1 method: Update the required data from VR3 based on VR10;

[0056] The command cmvw vr13, vr3, vr10, 3 is executed to compare each word in vr10 with 3. If they are equal, the corresponding word in vr3 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged.

[0057] Step 7 of the 8-choose-1 method: Update the required data from VR4 based on VR10;

[0058] The command cmvw vr13, vr4, vr10, 4 is executed to compare each word in vr10 with 4. If they are equal, the corresponding word in vr4 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged.

[0059] Step 8 of the 8-choose-1 method: Update the required data from VR5 based on VR10;

[0060] The command cmvw vr13, vr5, vr10, 5 is executed to compare each word in vr10 with word 5. If they are equal, the corresponding word in vr5 is used to update the corresponding word in vr13; otherwise, the corresponding word in vr13 remains unchanged.

[0061] Step 9 of the 8-choose-1 method: Update the required data from VR6 based on VR10;

[0062] The command cmvw vr13, vr6, vr10, 6 is executed to compare each word in vr10 with 6. If they are equal, the corresponding word in vr6 is used to update the corresponding word in vr13; otherwise, the corresponding word in vr13 remains unchanged.

[0063] Step 10 (choose 1 out of 8): Update the required data from VR7 based on VR10;

[0064] The command cmvw vr13, vr7, vr10, 7 is executed to compare each word in vr10 with 7. If they are equal, the corresponding word in vr7 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged.

[0065] The above 10 steps of selecting 1 out of 8 can simultaneously achieve the selection of 1 out of 16 sets of data, and the following rules must be met:

[0066] 1) Each word in .vr10 stores a label for the register number where the required data is located;

[0067] 2) vr0~vr7 stores 128 entries of data in words, so each simd register stores 16 entries of data in words.

[0068] 3) Each word in vr13 stores the results retrieved from vr10;

[0069] 4) This algorithm can simultaneously retrieve data from 16 tables.

[0070] The method for implementing the 2-out-of-1 choice, i.e., when N=2:

[0071] The 2-to-1 selection is implemented by the gshufb vr13, vr13, vr11 command, which updates the selected halfword to the lower halfword of the corresponding word; where each word in vr11 stores the halfword tag to be selected; and vr13 stores 16 original data.

[0072] The gshufb vr13, vr13, vr11 instructions determine whether to update the lower half word of the corresponding word in vr11 to the lower half word of vr13, or to update the higher half word to the lower half word of the corresponding word in vr13, for example, if the value stored in word0 of vr11 is 4, then the higher half word in word0 of vr13 is updated to the lower half word in word0 of vr13.

[0073] The specific implementation steps are as follows:

[0074] Step 1 (choose one of two): Load the 16 table entries, each in word units, into VR13;

[0075] Step 2 (choose 1 out of 2): Store the 16 tag values ​​from which halfwords need to be extracted into VR11 in units of word (when the lower halfword needs to be extracted, store 4 in the corresponding word in VR11, and store 14 in the corresponding word in VR11).

[0076] Step 3 (choose 1 out of 2): Select the halfword from the corresponding word based on the label value of the halfword to be obtained;

[0077] Executing the gshufb vr13, vr13, vr11 instruction: Determine whether to update the lower half of the halfword set {byte1, byte0} to each word in the vr13 register, or update the lower half of the halfword set {byte3, byte2} to each word in the vr13 register.

[0078] By using the three 2-to-1 selection steps described above, a 2-to-1 selection can be achieved simultaneously from 16 sets of data. The following rules must be met:

[0079] 1) Each word in .vr11 contains the tags for the required 2-choice data;

[0080] 2) vr13 contains 16 original data entries in word units (one of the two required).

[0081] 3) This 2-choose-1 algorithm can only update the lower half-word of the corresponding word from the upper half-word and the lower half-word of the same word;

[0082] 4) This algorithm can simultaneously retrieve data from 16 tables.

[0083] When N=256, which is 1 out of 256, this can be broken down into 1 out of 8, 1 out of 16, and 1 out of 2, and then combined. This is achieved by first selecting 1 out of 16, then 1 out of 8, and finally 1 out of 2.

[0084] The application scenario is set as follows:

[0085] 1) There are 256 entries in total; 2) Each entry is 16 bits; 3) 16 data entries are retrieved at a time.

[0086] 4) The algorithm needs to select 1 out of 256.

[0087] The method for implementing the 1-out-of-1 selection when N=128 is as follows:

[0088] This algorithm combines 16-to-1 and 8-to-1 selections to form a 128-to-1 selection. In VR8, each word stores the index of the data to be retrieved. For example, VR8 word 15 stores the value 32'b1111_x_000. This value means: 1111 represents the number of bits in the word containing the lookup data; x represents whether the lookup data (halfword) is in the higher or lower half of the word; 000 represents the register number where the lookup data is located. VR9 is derived from VR8, and VR9 represents the number of bits in the word containing the lookup data. VR10 is also derived from VR8, and VR8 represents the register number where the lookup data is located.

[0089] Step 1: Based on the value of each word in VR9, update all selected words from VR0 to VR12;

[0090] Step 2: Determine whether any word in VR10 was selected from VR0 based on the value of each word. If so, update the corresponding word in VR12 to VR13. Otherwise, leave VR13 unchanged. This completes the process of updating the selected word in VR0 to VR13. ......

[0092] Step 15: Update all selected words from VR7 to VR12 using each word in VR9;

[0093] Step 16: For each word in VR10, check if it was selected from VR7. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged. This completes the process of updating the selected words in VR7 to VR13.

[0094] The specific implementation steps are as follows:

[0095] Step 1 of the 128-choose-1 method: Load the table entry data into vr0~vr7;

[0096] Step 2 of the 128-choose-1 algorithm: Initialize the SIMD registers required by the algorithm;

[0097] VR9 is used to select from 16 words:

[0098] vr9[](W) = vr8[](W) >> 4

[0099] vr10 is used to select from 8 registers:

[0100] vr10[](W) = vr8[](W) & 7

[0101] VR11 is used to select the desired halfword:

[0102] vr11[](W) = vr8[](W) & 4

[0103] vr12[](W) = vr11[](W) >> 2

[0104] vr11[] = vr11[] | vr12[]

[0105] vr11[](W) = vr11[](W) | 4

[0106] Step 3 of the 128-choose-1 selection: Update the selected data in vr0 to vr13;

[0107] Update all selected words from VR0 to VR12 using each word in VR9;

[0108] The command `gshufw vr12, vr9, vr0, 0` selects a word from `vr0` using the lower 8 bits of each word in `vr9` as an index to update the corresponding word in `vr12`.

[0109] For each word in vr10, check if it was selected from vr0. If so, update the corresponding word in vr12 to vr13; otherwise, vr13 remains unchanged.

[0110] The instruction cmvw vr13, vr12, vr10, 0 is executed by comparing the lower 4 bits of each word in vr10 with 0. If they are equal, the corresponding word in vr12 is taken and the corresponding word in vr13 is updated; otherwise, the corresponding word in vr13 remains unchanged.

[0111] Step 4 of the 128-choose-1 selection: Update the selected data in VR1 to VR13;

[0112] Update all selected words from VR1 to VR12 using each word in VR9;

[0113] The command `gshufw vr12, vr9, vr1, 0` selects a word from `vr1` using the lower 8 bits of each word in `vr9` as an index to update the corresponding word in `vr12`.

[0114] For each word in VR10, check if it was selected from VR1. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged.

[0115] The instruction cmvw vr13, vr12, vr10, 1 is executed: the lower 4 bits of each word in vr10 are compared with 1. If they are equal, the corresponding word in vr12 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged.

[0116] Step 5 of the 128-choose-1 selection: Update the selected data in VR2 to VR13;

[0117] Update all selected words from VR2 to VR12 using each word in VR9;

[0118] Executing the gshufw vr12, vr9, vr2, 0 instruction: using the lower 8 bits of each word in vr9 as an index to select a word from vr2 to update the corresponding word in vr12;

[0119] For each word in VR10, check if it was selected from VR2. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged.

[0120] The instruction cmvw vr13, vr12, vr10, 2 is executed: the lower 4 bits of each word in vr10 are compared with 2. If they are equal, the corresponding word in vr12 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged.

[0121] Step 6 of the 128-choose-1 selection: Update the selected data in VR3 to VR13;

[0122] Update all selected words from VR3 to VR12 using each word in VR9;

[0123] Executing the gshufw vr12, vr9, vr3, 0 instruction: using the lower 8 bits of each word in vr9 as an index to select a word from vr3 to update the corresponding word in vr12;

[0124] For each word in VR10, check if it was selected from VR3. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged.

[0125] The instruction cmvw vr13, vr12, vr10, 3 is executed: the lower 4 bits of each word in vr10 are compared with 3. If they are equal, the corresponding word in vr12 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged.

[0126] Step 7 of the 128-choose-1 selection: Update the selected data in VR4 to VR13;

[0127] Update all selected words from VR4 to VR12 using each word in VR9;

[0128] Executing the gshufw vr12, vr9, vr4, 0 instruction: using the lower 8 bits of each word in vr9 as an index to select a word from vr4 to update the corresponding word in vr12;

[0129] For each word in VR10, check if it was selected from VR4. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged.

[0130] Executing cmvw vr13, vr12, vr10, 4: Use the lower 4 bits of each word in vr10 to compare with 4. If they are equal, take the corresponding word in vr12 and update the corresponding word in vr13. Otherwise, the corresponding word in vr13 remains unchanged.

[0131] Step 8 of the 128-choose-1 selection: Update the selected data in VR5 to VR13;

[0132] Update all selected words from VR5 to VR12 using each word in VR9;

[0133] Executing the gshufw vr12, vr9, vr5, 0 instruction: using the lower 8 bits of each word in vr9 as an index to select a word from vr5 to update the corresponding word in vr12;

[0134] For each word in VR10, check if it was selected from VR5. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged.

[0135] The command cmvw vr13, vr12, vr10, 5 is executed: the lower 4 bits of each word in vr10 are compared with 5. If they are equal, the corresponding word in vr12 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged.

[0136] Step 9 of the 128-choose-1 selection: Update the selected data in VR6 to VR13;

[0137] Update all selected words from VR6 to VR12 using each word in VR9;

[0138] Executing the gshufw vr12, vr9, vr6, 0 instruction: using the lower 8 bits of each word in vr9 as an index to select a word from vr6 to update the corresponding word in vr12;

[0139] For each word in VR10, check if it was selected from VR6. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged.

[0140] Executing cmvw vr13, vr12, vr10, 6: Use the lower 4 bits of each word in vr10 to compare with 6. If they are equal, take the corresponding word in vr12 and update the corresponding word in vr13. Otherwise, the corresponding word in vr13 remains unchanged.

[0141] Step 10 of the 128-choose-1 selection: Update the selected data in VR7 to VR13;

[0142] Update all selected words from VR7 to VR12 using each word in VR9;

[0143] Executing the gshufw vr12, vr9, vr7, 0 command: Uses the lower 8 bits of each word in vr9 as an index to select a word from vr7 to update the corresponding word in vr12;

[0144] For each word in VR10, check if it was selected from VR7. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged.

[0145] Executing cmvw vr13, vr12, vr10, 7: Use the lower 4 bits of each word in vr10 to compare with 7. If they are equal, take the corresponding word in vr12 and update the corresponding word in vr13. Otherwise, the corresponding word in vr13 remains unchanged.

[0146] The selection of one data item from 256 table entries is achieved by combining the 16-to-1, 8-to-1, and 2-to-1 options. After completing the algorithm to select one item from 128 entries, the gshufb vr13, vr11, vr13 instruction is used to place the selected halfword from vr13 into the lower halfword of vr13 based on the lower 8 bits of each word in vr11. Through the above algorithm combination, the 256-to-1 selection is finally completed.

[0147] The specific implementation steps are as follows:

[0148] 256-to-1 selection step: After completing the 128-to-1 selection step 10, based on the lower 8 bits of each word in VR11, place the selected halfword in VR13 on the lower halfword of VR13.

[0149] Executing the `gshufb vr13, vr11, vr13` instruction: using the lower 8 bits of each word in `vr11`, select 4 bytes from the corresponding word in `vr13`: bits 1-0 are used as indices for byte 0, bits 3-2 as indices for byte 1, bits 5-4 as indices for byte 2, and bits 7-6 as indices for byte 3; the set {byte 3, byte 2, byte 1, byte 0} is used to update the corresponding word in `vr13`.

[0150] The above steps allow for a 256-to-1 selection from 16 sets of data, subject to the following rules:

[0151] 1) The table has a total of 256 entries, each entry is 16 bits, and they are stored in the registers vr0~vr7 of 8 SIMDs;

[0152] 2) The 8-bit address is stored in VR8 in word format;

[0153] Of which: 8-bits: the high 4 bits are used to select from 16 words;

[0154] The lower 3 bits are used to select from 8 registers;

[0155] bit3 is used to select the high and low half words from the word;

[0156] 3) This algorithm can simultaneously retrieve data from 16 tables.

[0157] The method for implementing the 32-to-1 selection, i.e., when N=32:

[0158] The 32-to-1 selection can be accomplished using the gshufwh command: that is, using the gshufwh vr12, vr9, vr0 command; where vr0 stores 16 words, or 32 half-words, of table entry data; and each word in vr9 stores the table entry data label for which the value needs to be retrieved.

[0159] Each tag occupies the lower 10 bits of the corresponding word:

[0160] The lower 8 bits represent which word to select from, with a total of 16 words, thus achieving a 1-to-1 selection;

[0161] The 9th bit indicates which halfword of the corresponding word is selected from for halfword 0. Here, 1 represents selecting halfword 1 (the higher halfword), and 0 represents halfword 0 (the lower halfword).

[0162] The 10th position represents which halfword of the corresponding word the halfword1 of this word is selected from; since each word has 2 halfwords, it achieves a 2-to-1 selection;

[0163] By combining the above 16-choose-1 and 2-choose-1 options, a 32-choose-1 option can be achieved;

[0164] The specific implementation steps are as follows:

[0165] Step 1 of the 32-choose-1 method: Load the 16 table entries, each in word units, into VR0;

[0166] Step 2 of the 32-choose-1 method: Store the 16 labels from which data needs to be extracted into VR9 in word units;

[0167] Step 3 of the 32-choose-1 selection: Retrieve data from the table based on the label values ​​of the data to be retrieved;

[0168] Executing the gshufwh vr12, vr9, vr0 instruction: Use the lower 8 bits of each word in vr9 as an index to select a word from vr0, use its 9th bit to further select a halfword from the selected word as halfword0, similarly, use the 10th bit as halfword1, and finally the target halfword set {halfword1, halfword0} is used to update the corresponding words in vrd;

[0169] By following the three steps above to select one from 32 words, we can select one halfword from 16 words. Since 16 words are equivalent to 32 halfwords, we can select one halfword from 32 halfwords.

[0170] The specific instructions in step S1 also include the following:

[0171] The gshufh vrd vrs vrp instruction reorders the two halfwords of each word in vrs using vrp as a condition and updates the result to the corresponding word in vrd.

[0172] The specific design is as follows: Two halfwords are selected from the corresponding word in the VRP using the lower 2 bits of each word in the VRS. (Bit 0 is used as the index of halfword 0, and bit 1 is used as the index of halfword 1). The set {halfword 1, halfword 0} is used to update the corresponding word in the VRD.

[0173] The instruction `gshufwb vrd vrs vrp` selects a word from `vrs` using `vrp` as the overall condition, reorders the four bytes of the selected word, and finally updates the corresponding word in `vrd` with the result.

[0174] The specific design is as follows: Use bits 7~0 of each word in the vrs as an index to select a word from the vrp, use bits 9~8 to further select a byte from the selected word as byte0, similarly use bits 11~10 as byte1, bits 13~12 as byte2, and bits 15~14 as byte3. Finally, the target byte set {byte3, byte2, byte1, byte0} is used to update the corresponding word in the vrd.

[0175] The command `gshufwh vrd vrs vrp` selects a word from `vrs` using `vrp` as the overall condition, reorders the two halfwords of the selected word, and finally updates the corresponding word in `vrd` with the result.

[0176] The specific design is as follows: Use bits 7~0 of each word in the vrs as an index to select a word from the vrp, use its bit 8 to further select a halfword from the selected word as halfword0, similarly, use bit 9 as halfword1, and finally the target halfword set {halfword1, halfword0} is used to update the corresponding word in the vrd.

[0177] Therefore, the advantage of this application is:

[0178] 1. The improved method of the present invention loads table entry data into the SIMD register, and only the register needs to be accessed when accessing table entry data, thus avoiding the overhead of accessing memory.

[0179] 2. In view of the characteristics of the table lookup algorithm, the simd gshuf and simd cmvw instructions were innovatively designed, and the table lookup algorithm was improved by using these instructions, which greatly improved the execution speed of the method.

[0180] 3. It makes full use of the parallel characteristics of SIMD instructions, enabling simultaneous lookup of multiple table entries, thus improving the parallelism of the method. Attached Figure Description

[0181] The accompanying drawings, which are provided to further illustrate the invention and form part of this application, are not intended to limit the scope of the invention.

[0182] Figure 1 This is a table diagram illustrating the implementation of the 16-to-1 selection involved in this application.

[0183] Figure 2 This is a table diagram illustrating the implementation of the 8-choose-1 method involved in this application.

[0184] Figure 3 This is a table diagram illustrating the algorithm involved in this application that combines 128 choices into 1.

[0185] Figure 4 This is a table diagram illustrating the algorithm for combining 32 options into 1 involved in this application.

[0186] Figure 5 This is a flowchart illustrating the method involved in this application. Detailed Implementation

[0187] To better understand the technical content and advantages of the present invention, the present invention will now be described in further detail with reference to the accompanying drawings.

[0188] Traditional table lookup algorithms require storing table entries in a specific memory location. When data needs to be retrieved, a single-instruction, single-data instruction is used to retrieve the data from memory based on the table entry index. This invention leverages the advantages of SIMD instructions' single-instruction, multiple-data nature, based on the characteristics of table lookup algorithms. It extends existing processor SIMD instructions by innovatively designing `gshuf` and `cmvw` instructions, and optimizing the table lookup algorithm based on these two types of instructions. This method, using these two instruction sets, significantly improves execution speed.

[0189] The codes, instructions, and terms used in this application are as follows:

[0190] vrp: source operand number 1 in the simd instruction; vrs: source operand number 2 in the simd instruction; vrd: destination operand in the simd instruction; imm: immediate value in the simd instruction; bit: bit, the smallest unit of data storage; word: word, 32 bits in length; halfword: half word, 16 bits in length; byte: byte, 8 bits in length.

[0191] The SIMD instruction width used in this application is 512 bits, containing a total of 32 registers, represented by vr0~vr31. vrx[](W): The x-th register in the 32 512-bit SIMD registers is divided by word, and each unit is operated on (x∈[0,31]). This method is not limited to retrieving 16 data from 256 table entries at the same time, but can also be used to retrieve multiple different table entries at the same time.

[0192] The gshuf commands include: gshufw vrd vrs vrp imm, gshufh vrd vrs vrp, gshufbvrd vrs vrp, gshufwh vrd vrs vrp, and gshufwb vrd vrs vrp. The cmvw commands include cmv vrdvrs vrp imm.

[0193] The specific instructions are as follows:

[0194] gshuf commands:

[0195] `gshufw vrd vrs vrp imm`: This instruction selects a word from `vrs` using `vrp` and `imm` as conditions and updates the corresponding word in `vrd`. Its specific design is as follows: `imm` is used as an index to select a byte from each word in `vrs`, and then this byte is used as an index to select a word from `vrp` to update the corresponding word in `vrd`.

[0196] `gshufh vrd vrs vrp`: This instruction reorders the two halfwords of each word in `vrs` using `vrp` as a condition and updates the corresponding word in `vrd` with the result. Its specific design is as follows: It selects two halfwords from the corresponding word in `vrp` using the lower 2 bits of each word in `vrs` (bit 0 is the index of halfword 0, and bit 1 is the index of halfword 1). The set `{halfword 1, halfword 0}` is used to update the corresponding word in `vrd`.

[0197] `gshufb vrd vrs vrp`: This instruction reorders the four bytes of each word in `vrs` using `vrp` as a condition and updates the corresponding word in `vrd` with the result. Its specific design is as follows: It selects four bytes from the corresponding word in `vrp` using the lower 8 bits of each word in `vrs` (bits 1-0 are indices for byte 0, bits 3-2 for byte 1, bits 5-4 for byte 2, and bits 7-6 for byte 3). The set {byte 3, byte 2, byte 1, byte 0} is used to update the corresponding word in `vrd`.

[0198] `gshufwb vrd vrs vrp`: This instruction selects a word from `vrs` using `vrp` as the overall condition, reorders the four bytes of the selected word, and finally updates the corresponding word in `vrd`. Its specific design is as follows: Bits 7-0 of each word in `vrs` are used as indices to select a word from `vrp`. Bits 9-8 are used to further select bytes from the selected word as byte 0. Similarly, bits 11-10 are used as byte 1, bits 13-12 as byte 2, and bits 15-14 as byte 3. Finally, the target byte set {byte 3, byte 2, byte 1, byte 0} is used to update the corresponding word in `vrd`.

[0199] `gshufwh vrd vrs vrp`: This instruction selects a word from `vrs` using `vrp` as the overall condition, reorders the two halfwords of the selected word, and finally updates the corresponding word in `vrd`. Its specific design is as follows: Bits 7-0 of each word in `vrs` are used as indices to select a word from `vrp`. Bit 8 is used to further select a halfword from the selected word as halfword0. Similarly, bit 9 is used as halfword1. Finally, the target halfword set {halfword1, halfword0} is used to update the corresponding word in `vrd`.

[0200] cmvw command:

[0201] cmvw vrd vrs vrp imm: This instruction uses vrp and imm as conditions to determine whether the corresponding word in vrs needs to be updated in vrd. Its specific design is as follows: Bits 3-0 of each word in vrp are compared with imm. If they are equal, the corresponding word in vrs is used to update the corresponding word in vrd; otherwise, the corresponding word in vrd remains unchanged.

[0202] Improvements to table lookup algorithms:

[0203] The table lookup algorithm implemented using simd instructions is applicable to application scenarios with the following characteristics:

[0204] 1. Multiple table entries can be queried simultaneously;

[0205] 2. The table lookup method implemented using the simd instruction can be composed of 16-choose-1, 8-choose-1, and 2-choose-1 algorithms, and is applicable to application scenarios of 2-choose-1, 8-choose-1, 16-choose-1, 32-choose-1, 128-choose-1, and 256-choose-1.

[0206] One example of an application scenario for the improved table lookup method implemented using simd instructions is as follows:

[0207] set up:

[0208] 1. There are 256 entries in total; 2. Each entry is 16 bits; 3. 16 data entries are retrieved at a time.

[0209] 4. The algorithm needs to select 1 out of 256.

[0210] The SimD implementation of the lookup table algorithm needs to achieve the function of retrieving one data item from 256 data items based on the label, i.e., selecting 1 out of 256. To facilitate understanding of the 256-select-1 algorithm principle, this application breaks it down into 8-select-1, 16-select-1, and 2-select-1 for explanation. The final implementation of 256-select-1 is achieved by first performing the 16-select-1, then the 8-select-1, and finally the 2-select-1.

[0211] (1) Implementation of 16-choose-1: such as Figure 1 As shown.

[0212] The algorithm uses the command `gshufw vr12, vr9, vr0, 0`. `vr0` stores 16 table entries, each a word, while each word in `vr9` contains the index of the data to be retrieved from the table entries. The command `gshufw vr12, vr9, vr0` retrieves the data based on its index and places it into the corresponding word in `vr12`. Figure 1 As shown, word0 in vr9 contains the value 2. After executing the command `gshufw vr12, vr9, vr0, 0`, word0 in vr12 will contain word2 from vr0. This process can be repeated to retrieve the values ​​of words 0 through 15 in vr12.

[0213] like Figure 1 As shown, the values ​​stored in word15~word0 in vr9 are 15, 15, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 0, 1, and 2, respectively. After the `gshufw vr12, vr9, vr0, 0` command is executed, the values ​​stored in word15~word0 in vr12 come from vr0 word15, vr0 word15, vr0 word13, vr0 word12, vr0 word11, vr0 word10, vr0 word9, vr0 word8, vr0 word7, vr0 word6, vr0 word5, vr0 word4, vr0 word3, vr0 word0, vr0 word1, and vr0 word2, respectively.

[0214] The specific implementation steps are as follows:

[0215] Step 1: Load the 16 table entries, each in word units, into vr0.

[0216] Step 2: Store the 16 tags from which data needs to be extracted into VR9 in word units.

[0217] Step 3: Retrieve data from the table based on the label values ​​of the data to be retrieved.

[0218] => gshufw vr12, vr9, vr0, 0: Use each word in vr9 as an index to select a word in vr0 to update the corresponding word in vr12.

[0219] The above three steps can simultaneously achieve a 16-to-1 selection from 16 sets of data. The rules that must be met are as follows:

[0220] 1. VR9 stores 16 index values, each representing a word and selecting one out of 16.

[0221] 2. vr0 contains 16 table entries, each represented by a word.

[0222] 3. Each word in VR12 stores the table entry data retrieved from VR9;

[0223] 4. The improved algorithm can simultaneously retrieve data from 16 tables.

[0224] (2) Implementation of 8-choose-1: such as Figure 2 As shown.

[0225] like Figure 2 As shown, the code consists of 8 CMVW instructions. Registers VR0-VR7 store 128 word-based entries, so each SIMD register stores 16 word-based entries. Each word in VR10 stores a label indicating the register number containing the data to be retrieved. The CMVW instruction can only retrieve data from one SIMD register (VR0-VR7) at a time. Since each entry occupies 8 SIMD registers, the CMV instruction needs to be executed 8 times, retrieving the required data from VR0, VR1, VR2, VR3, VR4, VR5, VR6, and VR7 respectively each time. Step 1 updates the required data from VR0 based on VR10. We can see that word5 in VR10 currently contains a value of 0, so word5 in VR0 is updated to word5 in VR13. Step 2 involves updating the required data from VR1 based on VR10. We can see that word14, word6, and word4 in VR10 contain the value 1, so we update word14, word6, and word4 in VR13 accordingly. We continue in this manner, executing steps 1 through 8 sequentially, to update all data from VR0 to VR7 to VR13. These 8 steps allow us to simultaneously select 16 entries from 8 SIMD registers.

[0226] The specific implementation steps are as follows:

[0227] Step 1: Load the 128 sets of table entries, each in word units, into vr0~vr7 in ascending order.

[0228] Step 2: Store the 16 register numbers from which data needs to be retrieved into VR10 in units of words.

[0229] Step 3: Update the required data from vr0 based on vr10.

[0230] => cmvw vr13, vr0, vr10, 0: Compare each word in vr10 with 0. If they are equal, update the corresponding word in vr13 with the corresponding word in vr0. Otherwise, leave the corresponding word in vr13 unchanged.

[0231] Step 4: Update the required data from VR1 based on VR10.

[0232] => cmvw vr13, vr1, vr10, 1: Compare each word in vr10 with 1. If they are equal, update the corresponding word in vr13 with the corresponding word in vr1. Otherwise, leave the corresponding word in vr13 unchanged.

[0233] Step 5: Update the required data from VR2 based on VR10.

[0234] => cmvw vr13, vr2, vr10, 2: Compare each word in vr10 with 2. If they are equal, update the corresponding word in vr13 with the corresponding word in vr2. Otherwise, leave the corresponding word in vr13 unchanged.

[0235] Step 6: Update the required data from VR3 based on VR10.

[0236] => cmvw vr13, vr3, vr10, 3: Compare each word in vr10 with 3. If they are equal, update the corresponding word in vr13 with the corresponding word in vr3. Otherwise, leave the corresponding word in vr13 unchanged.

[0237] Step 7: Update the required data from VR4 based on VR10.

[0238] => cmvw vr13, vr4, vr10, 4: Compare each word in vr10 with 4. If they are equal, update the corresponding word in vr13 with the corresponding word in vr4. Otherwise, leave the corresponding word in vr13 unchanged.

[0239] Step 8: Update the required data from VR5 based on VR10.

[0240] => cmvw vr13, vr5, vr10, 5: Compare each word in vr10 with 5. If they are equal, update the corresponding word in vr13 with the corresponding word in vr5. Otherwise, leave the corresponding word in vr13 unchanged.

[0241] Step 9: Update the required data from VR6 based on VR10.

[0242] => cmvw vr13, vr6, vr10, 6: Compare each word in vr10 with 6. If they are equal, update the corresponding word in vr13 with the corresponding word in vr6. Otherwise, leave the corresponding word in vr13 unchanged.

[0243] Step 10: Update the required data from VR7 based on VR10.

[0244] => cmvw vr13, vr7, vr10, 7: Compare each word in vr10 with 7. If they are equal, update the corresponding word in vr13 with the corresponding word in vr7. Otherwise, leave the corresponding word in vr13 unchanged.

[0245] By following the 10 steps above, a selection of 1 out of 8 from 16 sets of data can be achieved simultaneously. The rules that must be met are as follows:

[0246] 1. Each word in VR10 stores a label for the register number where the required data is located;

[0247] 2. vr0~vr7 stores 128 entries of data in words, so each SIMD register stores 16 entries of data in words.

[0248] 3. Each word in VR13 stores the results retrieved from VR10;

[0249] 4. This algorithm can simultaneously retrieve data from 16 tables.

[0250] (3) Implementation of choosing 1 out of 2:

[0251] The 2-to-1 selection is implemented using gshufb vr13, vr13, and vr11, which updates the lower half-word of the corresponding word with the selected half-word. vr11 stores the half-word tag to be selected in each word. vr13 stores 16 original data entries.

[0252] The code `gshufb vr13, vr13, vr11` determines whether to update the lower half of the word in `vr11` to the lower half of the corresponding word in `vr13`, or to update the higher half of the word to the lower half of the corresponding word in `vr13`. For example, if the value in `vr11`'s `word0` is 4, then the higher half of `vr13`'s `word0` will be updated to the lower half of `vr13`'s `word0`.

[0253] The specific implementation steps are as follows:

[0254] Step 1: Load the 16 table entries, each in word units, into VR13.

[0255] Step 2: Store the 16 tag values ​​from which halfwords need to be extracted into VR11 in units of word. When a lower halfword needs to be retrieved, store 4 in the corresponding word in VR11, and store 14 in the corresponding word in VR11.

[0256] Step 3: Select the halfword from the corresponding word based on the required halfword tag value.

[0257] => gshufb vr13, vr13, vr11: Determine whether to update the lower half-word of each word in the vr13 register using the half-word set {byte1, byte0} for each word in the vr13 register, or update the lower half-word of each word in the vr13 register using the half-word set {byte3, byte2} for each word in the vr13 register.

[0258] The above three steps can simultaneously achieve a 2-to-1 selection from 16 sets of data, and the following rules must be met:

[0259] 1. Each word in VR11 contains labels for the required 2-choice data;

[0260] 2. vr13 contains 16 original data entries, each in word units, which are the data entries required to be selected from 2 options;

[0261] 3. This 2-choose-1 algorithm can only update the lower half-word of the corresponding word from the upper half-word and the lower half-word of the same word;

[0262] 4. This algorithm can simultaneously retrieve data from 16 tables.

[0263] By combining the above 16-choose-1, 8-choose-1, and 2-choose-1 options, one data item can be selected from 256 table entries, ultimately realizing a 256-choose-1 lookup algorithm based on SIMD instructions.

[0264] like Figure 3 The diagram shows an algorithm that combines 16-to-1 and 8-to-1 selections to form a 128-to-1 selection. Each word in VR8 stores the index of the data to be retrieved. For example, VR8 word 15 stores the value 32'b1111_x_000. This value means: 1111 represents the number of bits in the word containing the lookup data; x represents whether the lookup data (halfword) is in the higher or lower half of the word; and 000 represents the register number where the lookup data is located. VR9 is derived from VR8, and VR9 represents the number of bits in the word containing the lookup data. VR10 is also derived from VR8, and VR8 represents the register number where the lookup data is located.

[0265] Step 1: Update all selected words from VR0 to VR12 using the value of each word in VR9.

[0266] Step 2: Determine if any word selected from VR0 is present in the value of each word in VR10. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged. (This completes the process of updating the selected words in VR0 to VR13.) ......

[0268] Step 15: Update all selected words from VR7 to VR12 using each word in VR9.

[0269] Step 16: For each word in VR10, check if it was selected from VR7. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged. (This completes the update of selected words from VR7 to VR13.)

[0270] Finally, using gshufb vr13, vr11, vr13, based on the lower 8 bits of each word in vr11, the selected halfword from vr13 is placed in the lower halfword of vr13. Through this combination of algorithms, a 256-to-1 selection is finally achieved.

[0271] Since the simd instruction can process 16 words in parallel, it can simultaneously complete the selection of 1 out of 256 from 16 sets of data.

[0272] The specific implementation steps are as follows:

[0273] Step 1: Load the table entry data into vr0~vr7.

[0274] Step 2: Initialize the simd registers required by the algorithm.

[0275] VR9 is used to select from 16 words:

[0276] vr9[](W) = vr8[](W) >> 4

[0277] VR10 is used to select from 8 registers:

[0278] vr10[](W) = vr8[](W) & 7

[0279] vr11 is used to select the desired halfword:

[0280] vr11[](W) = vr8[](W) & 4

[0281] vr12[](W) = vr11[](W) >> 2

[0282] vr11[] = vr11[] | vr12[]

[0283] vr11[](W) = vr11[](W) | 4

[0284] Step 3: Update the selected data in vr0 to vr13.

[0285] Update all selected words from VR0 to VR12 using each word in VR9.

[0286] => gshufw vr12, vr9, vr0, 0: Use the lower 8 bits of each word in vr9 as an index to select a word from vr0 to update the corresponding word in vr12.

[0287] For each word in vr10, check if it was selected from vr0. If so, update the corresponding word in vr12 to vr13; otherwise, vr13 remains unchanged.

[0288] => cmvw vr13, vr12, vr10, 0: Use the lower 4 bits of each word in vr10 to compare with 0. If they are equal, take the corresponding word in vr12 and update the corresponding word in vr13. Otherwise, the corresponding word in vr13 remains unchanged.

[0289] Step 4: Update the selected data in vr1 to vr13.

[0290] Update all selected words from VR1 to VR12 using each word in VR9.

[0291] => gshufw vr12, vr9, vr1, 0: Use the lower 8 bits of each word in vr9 as an index to select a word from vr1 to update the corresponding word in vr12.

[0292] For each word in VR10, check if it was selected from VR1. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged.

[0293] => cmvw vr13, vr12, vr10, 1: Use the lower 4 bits of each word in vr10 to compare with 1. If they are equal, take the corresponding word in vr12 and update the corresponding word in vr13. Otherwise, the corresponding word in vr13 remains unchanged.

[0294] Step 5: Update the selected data in VR2 to VR13.

[0295] Update all selected words from VR2 to VR12 using each word in VR9.

[0296] => gshufw vr12, vr9, vr2, 0: Use the lower 8 bits of each word in vr9 as an index to select a word from vr2 to update the corresponding word in vr12.

[0297] For each word in VR10, check if it was selected from VR2. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged.

[0298] => cmvw vr13, vr12, vr10, 2: Use the lower 4 bits of each word in vr10 to compare with 2. If they are equal, take the corresponding word in vr12 and update the corresponding word in vr13. Otherwise, the corresponding word in vr13 remains unchanged.

[0299] Step 6: Update the selected data in VR3 to VR13.

[0300] Update all selected words from VR3 to VR12 using each word in VR9.

[0301] => gshufw vr12, vr9, vr3, 0: Use the lower 8 bits of each word in vr9 as an index to select a word from vr3 to update the corresponding word in vr12.

[0302] For each word in VR10, check if it was selected from VR3. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged.

[0303] => cmvw vr13, vr12, vr10, 3: Use the lower 4 bits of each word in vr10 to compare with 3. If they are equal, take the corresponding word in vr12 and update the corresponding word in vr13. Otherwise, the corresponding word in vr13 remains unchanged.

[0304] Step 7: Update the selected data in VR4 to VR13.

[0305] Update all selected words from VR4 to VR12 using each word in VR9.

[0306] => gshufw vr12, vr9, vr4, 0: Use the lower 8 bits of each word in vr9 as an index to select a word from vr4 to update the corresponding word in vr12.

[0307] For each word in VR10, check if it was selected from VR4. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged.

[0308] => cmvw vr13, vr12, vr10, 4: Use the lower 4 bits of each word in vr10 to compare with 4. If they are equal, take the corresponding word in vr12 and update the corresponding word in vr13. Otherwise, the corresponding word in vr13 remains unchanged.

[0309] Step 8: Update the selected data in VR5 to VR13.

[0310] Update all selected words from VR5 to VR12 using each word in VR9.

[0311] => gshufw vr12, vr9, vr5, 0: Use the lower 8 bits of each word in vr9 as an index to select a word from vr5 to update the corresponding word in vr12.

[0312] For each word in VR10, check if it was selected from VR5. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged.

[0313] => cmvw vr13, vr12, vr10, 5: Use the lower 4 bits of each word in vr10 to compare with 5. If they are equal, take the corresponding word in vr12 and update the corresponding word in vr13. Otherwise, the corresponding word in vr13 remains unchanged.

[0314] Step 9: Update the selected data in VR6 to VR13.

[0315] Update all selected words from VR6 to VR12 using each word in VR9.

[0316] => gshufw vr12, vr9, vr6, 0: Use the lower 8 bits of each word in vr9 as an index to select a word from vr6 to update the corresponding word in vr12.

[0317] For each word in VR10, check if it was selected from VR6. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged.

[0318] => cmvw vr13, vr12, vr10, 6: Use the lower 4 bits of each word in vr10 to compare with 6. If they are equal, take the corresponding word in vr12 and update the corresponding word in vr13. Otherwise, the corresponding word in vr13 remains unchanged.

[0319] Step 10: Update the selected data in VR7 to VR13.

[0320] Update all selected words from VR7 to VR12 using each word in VR9.

[0321] => gshufw vr12, vr9, vr7, 0: Use the lower 8 bits of each word in vr9 as an index to select a word from vr7 to update the corresponding word in vr12.

[0322] For each word in VR10, check if it was selected from VR7. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged.

[0323] => cmvw vr13, vr12, vr10, 7: Use the lower 4 bits of each word in vr10 to compare with 7. If they are equal, take the corresponding word in vr12 and update the corresponding word in vr13. Otherwise, the corresponding word in vr13 remains unchanged.

[0324] The above are the steps for choosing 1 from 128, while step 11 further completes the selection from 256:

[0325] Step 11: Based on the lower 8 bits of each word in VR11, place the selected halfword in VR13 onto the lower halfword of VR13.

[0326] => `gshufb vr13, vr11, vr13`: Selects 4 bytes from the corresponding word in `vr13` using the lower 8 bits of each word in `vr11` (bits 1-0 are indices for byte 0, bits 3-2 for byte 1, bits 5-4 for byte 2, and bits 7-6 for byte 3). The set `{byte3, byte2, byte1, byte0}` is used to update the corresponding word in `vr13`.

[0327] By following the 11 steps above, a 256-to-1 selection can be achieved simultaneously from 16 sets of data. The rules that must be met are as follows:

[0328] 1. The table has a total of 256 entries, each entry is 16 bits, and they are stored in the registers vr0~vr7 of 8 SIMDs.

[0329] The 2.8-bit address is stored in vr8 in word form.

[0330] Among them: 8-bits: the high 4 bits are used to select from 16 words.

[0331] The lower 3 bits are used to select from 8 registers.

[0332] bit3 is used to select the high and low half words from the word.

[0333] This algorithm can simultaneously retrieve data from 16 tables.

[0334] like Figure 4 As shown, when selecting 1 out of 32, the implementation method is as follows:

[0335] The 32-to-1 selection can be accomplished using the `gshufwh` command. (Corresponding to...) Figure 4The table contains `gshufwh vr12, vr9, 0`. `vr0` stores table entry data for 16 words (32 halfwords). Each word in `vr9` stores a label for the table entry data to be retrieved. Each label occupies the lower 10 bits of the corresponding word. The lower 8 bits represent the word number from which the value is selected (1 out of 16 words). The 9th bit represents the position of halfword 0 from the corresponding word (1 represents halfword 1, the higher halfword; 0 represents halfword 0, the lower halfword). The 10th bit represents the position of halfword 1 from the corresponding word. Since each word has 2 halfwords, a 2-to-1 selection is achieved. Combining these 16-to-1 and 2-to-1 selections allows for a 32-to-1 selection.

[0336] by Figure 4 Using VR9 and Word 15 as an example, let's take this as an example. Figure 4 It can be seen that the label of the entry to be retrieved, word15 in VR9, is b11_00001111 (b represents binary representation). The lower 8 bits are b00001111, which is 15, meaning the value of word15 in VR12 is selected from word15 in VR0. The higher two bits are b11, meaning halfword1 of word15 in VR12 is halfword1 of word15 in VR0, and halfword0 of word15 in VR12 is halfword1 of word15 in VR0. This process continues, allowing the selection of words14 through 0, thus simultaneously selecting one halfword from 32 halfwords out of 16 entries.

[0337] The specific implementation steps are as follows:

[0338] Step 1 of the 32-choose-1 method: Load the 16 table entries, each in word units, into vr0.

[0339] Step 2 of the 32-choose-1 method: Store the 16 labels from which data needs to be extracted into VR9 in word units.

[0340] Step 3 of the 32-choose-1 method: Retrieve data from the table based on the label values ​​of the data to be retrieved.

[0341] => gshufwh vr12, vr9, vr0: Select a word from vr0 using the lower 8 bits of each word in vr9 as an index, further select a halfword from the selected word using its 9th bit as halfword0, similarly, use the 10th bit as halfword1, and finally the target halfword set {halfword1, halfword0} is used to update the corresponding word in vrd.

[0342] By following the above three steps, you can select one halfword from 16 words. Since 16 words are equivalent to 32 halfwords, you can select one halfword from 32 halfwords.

[0343] In summary, such as Figure 5 As shown, this application relates to an improved method for a table lookup algorithm based on SimD instructions, the method comprising:

[0344] S1: Design two new classes of SimD instructions: gshuf-type instructions and cmvw instructions; among which, gshuf-type instructions include: gshufw vrd vrs vrp imm, gshufh vrd vrs vrp, gshufb vrd vrs vrp, gshufwh vrd vrsvrp, and gshufwb vrd vrs vrp; cmvw instructions include cmv vrd vrs vrp imm;

[0345] S2: Use the simd instruction in step S1 to implement the N-to-1 algorithm and the combined lookup algorithm, that is, to look up N table entries at the same time, where N=2, 8, 16, 32, 128, 256.

[0346] To address the shortcomings and deficiencies of existing technical solutions, this invention proposes an optimization of the lookup table algorithm and the lookup table re-interpolation algorithm using SimD instructions. The key points are as follows:

[0347] 1. This invention innovatively proposes two types of SimD instructions: gshuf-type instructions and cmvw instructions. The gshuf-type instructions include: gshufw vrd vrs vrp imm, gshufh vrd vrs vrp, gshufb vrd vrs vrp, gshufwhvrd vrs vrp, and gshufwb vrd vrs vrp. The cmvw instructions include cmv vrd vrs vrp imm.

[0348] 2. This algorithm refactors the table lookup algorithm based on the simd gshuf and simd cmvw instructions. Compared to traditional table lookup algorithms, it reduces memory access time, decreases unnecessary instruction counts, increases parallelism, and significantly improves execution speed. This algorithm is not limited to retrieving 16 data items simultaneously from 256 table entries; it can also be used to retrieve more different table entries concurrently. The algorithm's simd gshuf and simd cmvw instruction sequence and other similar functionalities derived from this instruction sequence are also described.

[0349] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, various modifications and variations of the embodiments of the present invention are possible. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. An improved method for a table lookup algorithm based on SimD instructions, characterized in that, The method includes: S1: Design two new classes of SimD instructions: gshuf-type instructions and cmvw instructions; the gshuf-type instructions include: gshufwvrd vrs vrp imm, gshufh vrd vrs vrp, gshufb vrd vrs vrp, gshufwh vrd vrs vrp, and gshufwb vrd vrs vrp; the cmvw instructions include cmvw vrd vrs vrp imm; where, The instruction `gshufw vrd vrs vrp imm` is used to select a word from `vrs` and update the corresponding word in `vrd` using `vrp` and `imm` as conditions. Its specific design is as follows: `imm` is used as an index to select a byte from each word in `vrs`, and then this byte is used as an index to select a word from `vrp` to update the corresponding word in `vrd`. The `gshufb vrd vrs vrp` instruction reorders the four bytes of each word in the `vrs` using `vrp` as a condition and updates the corresponding word in the `vrd`. Its specific design is as follows: It selects four bytes from the corresponding word in the `vrp` using the lower 8 bits of each word in the `vrs`: bits 1-0 are used as indices for byte 0, bits 3-2 for byte 1, bits 5-4 for byte 2, and bits 7-6 for byte 3; the set {byte 3, byte 2, byte 1, byte 0} is used to update the corresponding word in the `vrd`. The instruction cmvw vrd vrs vrp imm: This instruction uses vrp and imm as conditions to determine whether the corresponding word in vrs needs to be updated to vrd. Its specific design is as follows: Use bits 3 to 0 of each word in vrp to compare with imm. If they are equal, take the corresponding word in vrs to update the corresponding word in vrd. Otherwise, the corresponding word in vrd remains unchanged. The gshufh vrd vrs vrp instruction reorders the two halfwords of each word in vrs using vrp as a condition and updates the result to the corresponding word in vrd. The specific design is as follows: Use the lower 2 bits of each word in the vrs to select two halfwords from the corresponding word in the vrp: bit0 is used as the index of halfword0, and bit1 is used as the index of halfword1; the set {halfword1, halfword0} is used to update the corresponding word in the vrd. The instruction `gshufwb vrd vrs vrp` selects a word from `vrs` using `vrp` as the overall condition, reorders the four bytes of the selected word, and finally updates the corresponding word in `vrd` with the result. The specific design is as follows: Use bits 7~0 of each word in the vrs as an index to select a word from the vrp, use bits 9~8 to further select a byte from the selected word as byte0, similarly use bits 11~10 as byte1, bits 13~12 as byte2, and bits 15~14 as byte3. Finally, the target byte set {byte3, byte2, byte1, byte0} is used to update the corresponding word in the vrd. gshufwh vrd vrs vrp: This command selects words from vrs using vrp as the overall condition, reorders the two halfwords of the selected words, and finally updates the corresponding words in vrd with the result. The specific design is as follows: Use bits 7~0 of each word in the vrs as an index to select a word from the vrp, use its bit 8 to further select a halfword from the selected word as halfword0, similarly, use bit 9 as halfword1, and finally the target halfword set {halfword1, halfword0} is used to update the corresponding word in the vrd; in, vrp: Source operand number one in the simd instruction; vrs: The second source operand in the simd instruction; vrd: The destination operand in the simd instruction; imm: The immediate value in the simd instruction; bit: the smallest unit of data storage; word: a character, 32 bits in length; halfword: a word or phrase with a length of 16 bits; byte: A byte, with a length of 8 bits; S2: Use the simd instruction in step S1 to implement the N-to-1 algorithm and the combined lookup algorithm, that is, to look up N table entries at the same time, where N=2, 8, 16, 32, 128, 256.

2. The improved method of the table lookup algorithm based on SimD instructions according to claim 1, characterized in that, The SIMD instruction width used in this method is 512 bits, which contains 32 registers, represented by vr0~vr31; vrx[](W): The x-th register in the 32 512-bit SIMD registers is divided by word, and each unit is operated on, x∈[0,31]; This method is not limited to retrieving 16 data from 256 table entries at the same time, but can also be used to retrieve multiple different table entries at the same time.

3. The improved method of the table lookup algorithm based on SimD instructions according to claim 2, characterized in that, The implementation method for the 16-to-1 selection, i.e., when N=16: The command `gshufw vr12, vr9, vr0, 0` is used. `vr0` contains 16 entries, each a word. Each word in `vr9` contains the index of the data to be retrieved from the entry. The command retrieves the data by its index and places it into the corresponding word in `vr12`. If word 0 in `vr9` contains the value 2, then after executing `gshufw vr12, vr9, vr0, 0`, word 0 in `vr12` will contain word 2 from `vr0`. This process continues, retrieving the values ​​of words 0 through 15 in `vr12`. The values ​​stored in words 15 through 0 in `vr9` are 15, 15, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 0, 1, and 2, respectively. Therefore, when `gshufw vr12, vr9, vr0, 0` is executed... After instruction 0 is executed, the values ​​stored in word15~word0 in vr12 come from vr0 word15, vr0 word15, vr0 word13, vr0 word12, vr0 word11, vr0 word10, vr0 word9, vr0 word8, vr0 word7, vr0 word6, vr0 word5, vr0 word4, vr0 word3, vr0 word0, vr0 word1, and vr0 word2, respectively. The specific implementation steps are as follows: Step 1 for selecting 16 items: Load the 16 table entries, each in word units, into vr0; Step 2 of the 16-to-1 selection: Store the 16 labels from which data needs to be extracted into VR9 in word units; Step 3 of the 16-choose-1 selection: Retrieve data from the table based on the label values ​​of the data to be retrieved; The command `gshufw vr12, vr9, vr0, 0` is executed to select a word from `vr0` using each word in `vr9` as an index to update the corresponding word in `vr12`. The above three steps of selecting one out of 16 can simultaneously achieve the selection of one out of 16 sets of data; the rules that must be met are as follows: 1) vr9 contains 16 index values, each representing a word and requiring a 16-choose-1 selection. 2) vr0 contains 16 table entries, each represented by a word. 3) Each word in VR12 stores the table entry data retrieved from VR9; 4) The improved algorithm can simultaneously retrieve data from 16 tables.

4. An improved method for a table lookup algorithm based on SimD instructions according to claim 3, characterized in that, The method for implementing the 8-out-of-1 selection, i.e., when N=8: The instruction consists of 8 cmvw instructions. Registers vr0-vr7 store 128 word-level entries, so each SIMD register stores 16 word-level entries. Each word in vr10 stores a label indicating the register number containing the data to be retrieved. Each cmvw instruction can only retrieve data from one SIMD register (vr0-vr7) at a time. Since each entry occupies 8 SIMD registers, the cmvw instruction needs to be executed 8 times, retrieving the required data from vr0, vr1, vr2, vr3, vr4, vr5, vr6, and vr7 respectively. The first instruction, cmvw vr13, vr0, vr10, 0, updates the required data from vr0 based on vr10. Since word5 in vr10 currently contains a value of 0, it updates word5 in vr13. The second instruction, cmvw vr13, vr0, vr10, ... Instruction 1 updates the required data from VR1 based on VR10. Since word14, word6, and word4 in VR10 contain the value 1, it updates word14, word6, and word4 in VR13 respectively. This process continues, executing instructions from the first (cmvw vr13, vr0, vr10, 0) to the eighth (cmvw vr13, vr0, vr10, 7) to update all data from VR0 to VR7 to VR13. These eight instructions simultaneously select 16 entries from eight SIMD registers. The specific implementation steps are as follows: Step 1 of the 8-choose-1 method: Load the 128 sets of table entries, each in word units, into VR0~VR7 in ascending order; Step 2 of the 8-choose-1 method: Store the 16 register numbers from which data needs to be retrieved into VR10 in words; Step 3 of the 8-choose-1 method: Update the required data from VR0 based on VR10; The command cmvw vr13, vr0, vr10, 0 is executed as follows: Each word in vr10 is compared with 0. If they are equal, the corresponding word in vr0 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged. Step 4 of the 8-choose-1 selection: Update the required data from VR1 based on VR10; The command cmvw vr13, vr1, vr10, 1 is executed to compare each word in vr10 with 1. If they are equal, the corresponding word in vr1 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged. Step 5 of the 8-choose-1 method: Update the required data from VR2 based on VR10; The command cmvw vr13, vr2, vr10, 2 is executed to compare each word in vr10 with 2. If they are equal, the corresponding word in vr2 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged. Step 6 of the 8-choose-1 method: Update the required data from VR3 based on VR10; The command cmvw vr13, vr3, vr10, 3 is executed to compare each word in vr10 with 3. If they are equal, the corresponding word in vr3 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged. Step 7 of the 8-choose-1 method: Update the required data from VR4 based on VR10; The command cmvw vr13, vr4, vr10, 4 is executed to compare each word in vr10 with 4. If they are equal, the corresponding word in vr4 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged. Step 8 of the 8-choose-1 method: Update the required data from VR5 based on VR10; The command cmvw vr13, vr5, vr10, 5 is executed to compare each word in vr10 with word 5. If they are equal, the corresponding word in vr5 is used to update the corresponding word in vr13; otherwise, the corresponding word in vr13 remains unchanged. Step 9 of the 8-choose-1 method: Update the required data from VR6 based on VR10; The command cmvw vr13, vr6, vr10, 6 is executed to compare each word in vr10 with 6. If they are equal, the corresponding word in vr6 is used to update the corresponding word in vr13; otherwise, the corresponding word in vr13 remains unchanged. Step 10 (choose 1 out of 8): Update the required data from VR7 based on VR10; The command cmvw vr13, vr7, vr10, 7 is executed to compare each word in vr10 with 7. If they are equal, the corresponding word in vr7 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged. The above 10 steps of selecting 1 out of 8 can simultaneously achieve the selection of 1 out of 16 sets of data, and the following rules must be met: 1) Each word in .vr10 stores a label for the register number where the required data is located; 2) vr0~vr7 stores 128 entries of data in words, so each simd register stores 16 entries of data in words. 3) Each word in vr13 stores the results retrieved from vr10; 4) This algorithm can simultaneously retrieve data from 16 tables.

5. An improved method for a table lookup algorithm based on SimD instructions according to claim 4, characterized in that, The method for choosing 1 out of 2, i.e., when N=2: The 2-to-1 selection is implemented by the gshufb vr13, vr13, vr11 command, which updates the selected halfword to the lower halfword of the corresponding word; where each word in vr11 stores the halfword tag to be selected; and vr13 stores 16 original data. The gshufb vr13, vr13, vr11 instructions determine whether to update the lower half word of the corresponding word in vr11 to the lower half word of vr13, or to update the higher half word to the lower half word of the corresponding word in vr13, for example, if the value stored in word0 of vr11 is 4, then the higher half word in word0 of vr13 is updated to the lower half word in word0 of vr13. The specific implementation steps are as follows: Step 1 (choose one of two): Load the 16 table entries, each in word units, into VR13; Step 2 (choose 1 out of 2): Store the 16 tag values ​​from which halfwords need to be extracted into VR11 in units of word; when the lower halfword needs to be extracted, store 4 in the corresponding word in VR11, and store 14 in the corresponding word in VR11. Step 3 (choose 1 out of 2): Select the halfword from the corresponding word based on the label value of the halfword to be obtained; Executing the gshufb vr13, vr13, vr11 instruction: Determine whether to update the lower half of the halfword set {byte1, byte0} to each word in the vr13 register, or update the lower half of the halfword set {byte3, byte2} to each word in the vr13 register. By using the above three 2-to-1 selection steps, a 2-to-1 selection can be achieved simultaneously from 16 sets of data. The following rules must be met: 1) Each word in .vr11 contains the tags for the required 2-choice data; 2) vr13 contains 16 original data entries, each in word units, requiring a choice of one out of two. 3) This 2-choose-1 algorithm can only update the lower half-word of the corresponding word from the upper half-word and the lower half-word of the same word; 4) This algorithm can simultaneously retrieve data from 16 tables.

6. An improved method for a table lookup algorithm based on SimD instructions according to claim 5, characterized in that, When N=256, which is 1 out of 256, this can be broken down into 1 out of 8, 1 out of 16, and 1 out of 2, and then combined. This is achieved by first selecting 1 out of 16, then 1 out of 8, and finally 1 out of 2. The application scenario is set as follows: 1) There are a total of 256 entries; 2) Each entry is 16 bits; 3) Query 16 data items at a time; 4) The algorithm needs to select 1 out of 256.

7. An improved method for a table lookup algorithm based on SimD instructions according to claim 6, characterized in that, The method for implementing the 1-out-of-1 selection when N=128 is as follows: This algorithm combines 16-to-1 and 8-to-1 selections to form a 128-to-1 selection. In VR8, each word stores the index of the data to be retrieved. For example, VR8 word 15 stores the value 32'b1111_x_000. This value means: 1111 represents the number of bits in the word containing the lookup data; x represents whether the lookup data (halfword) is in the higher or lower half of the word; 000 represents the register number where the lookup data is located. VR9 is derived from VR8, and VR9 represents the number of bits in the word containing the lookup data. VR10 is also derived from VR8, and VR8 represents the register number where the lookup data is located. Step 1: Based on the value of each word in VR9, update all selected words from VR0 to VR12; Step 2: Determine whether any word in VR10 was selected from VR0 based on the value of each word. If so, update the corresponding word in VR12 to VR13. Otherwise, leave VR13 unchanged. This completes the process of updating the selected words in VR0 to VR13. ...... Step 15: Update all selected words from VR7 to VR12 using each word in VR9; Step 16: Check each word in VR10 to see if it was selected from VR7. If so, update the corresponding word in VR12 to VR13. Otherwise, VR13 remains unchanged. This completes the process of updating the selected words in VR7 to VR13. The specific implementation steps are as follows: Step 1 of the 128-choose-1 method: Load the table entry data into vr0~vr7; Step 2 of the 128-choose-1 algorithm: Initialize the SIMD registers required by the algorithm; VR9 is used to select from 16 words: vr9[](W) = vr8[](W) >> 4 vr10 is used to select from 8 registers: vr10[](W) = vr8[](W) & 7 VR11 is used to select the desired halfword: vr11[](W) = vr8[](W) & 4 vr12[](W) = vr11[](W) >> 2 vr11[] = vr11[] | vr12[] vr11[](W) = vr11[](W) | 4 Step 3 of the 128-choose-1 selection: Update the selected data in vr0 to vr13; Update all selected words from VR0 to VR12 using each word in VR9; The command `gshufw vr12, vr9, vr0, 0` selects a word from `vr0` using the lower 8 bits of each word in `vr9` as an index to update the corresponding word in `vr12`. For each word in vr10, check if it was selected from vr0. If so, update the corresponding word in vr12 to vr13; otherwise, vr13 remains unchanged. The instruction cmvw vr13, vr12, vr10, 0 is executed by comparing the lower 4 bits of each word in vr10 with 0. If they are equal, the corresponding word in vr12 is taken and the corresponding word in vr13 is updated; otherwise, the corresponding word in vr13 remains unchanged. Step 4 of the 128-choose-1 selection: Update the selected data in VR1 to VR13; Update all selected words from VR1 to VR12 using each word in VR9; The command `gshufw vr12, vr9, vr1, 0` selects a word from `vr1` using the lower 8 bits of each word in `vr9` as an index to update the corresponding word in `vr12`. For each word in VR10, check if it was selected from VR1. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged. The instruction cmvw vr13, vr12, vr10, 1 is executed: the lower 4 bits of each word in vr10 are compared with 1. If they are equal, the corresponding word in vr12 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged. Step 5 of the 128-choose-1 selection: Update the selected data in VR2 to VR13; Update all selected words from VR2 to VR12 using each word in VR9; Executing the gshufw vr12, vr9, vr2, 0 instruction: using the lower 8 bits of each word in vr9 as an index to select a word from vr2 to update the corresponding word in vr12; For each word in VR10, check if it was selected from VR2. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged. The instruction cmvw vr13, vr12, vr10, 2 is executed: the lower 4 bits of each word in vr10 are compared with 2. If they are equal, the corresponding word in vr12 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged. Step 6 of the 128-choose-1 selection: Update the selected data in VR3 to VR13; Update all selected words from VR3 to VR12 using each word in VR9; Executing the gshufw vr12, vr9, vr3, 0 instruction: using the lower 8 bits of each word in vr9 as an index to select a word from vr3 to update the corresponding word in vr12; For each word in VR10, check if it was selected from VR3. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged. The instruction cmvw vr13, vr12, vr10, 3 is executed: the lower 4 bits of each word in vr10 are compared with 3. If they are equal, the corresponding word in vr12 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged. Step 7 of the 128-choose-1 selection: Update the selected data in VR4 to VR13; Update all selected words from VR4 to VR12 using each word in VR9; Executing the gshufw vr12, vr9, vr4, 0 command: using the lower 8 bits of each word in vr9 as an index to select a word from vr4 to update the corresponding word in vr12; For each word in VR10, check if it was selected from VR4. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged. The command cmvw vr13, vr12, vr10, 4 is executed: the lower 4 bits of each word in vr10 are compared with 4. If they are equal, the corresponding word in vr12 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged. Step 8 of the 128-choose-1 selection: Update the selected data in VR5 to VR13; Update all selected words from VR5 to VR12 using each word in VR9; Executing the gshufw vr12, vr9, vr5, 0 command: Uses the lower 8 bits of each word in vr9 as an index to select a word from vr5 to update the corresponding word in vr12; For each word in VR10, check if it was selected from VR5. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged. The command cmvw vr13, vr12, vr10, 5 is executed: the lower 4 bits of each word in vr10 are compared with 5. If they are equal, the corresponding word in vr12 is taken and the corresponding word in vr13 is updated. Otherwise, the corresponding word in vr13 remains unchanged. Step 9 of the 128-choose-1 selection: Update the selected data in VR6 to VR13; Update all selected words from VR6 to VR12 using each word in VR9; Executing the gshufw vr12, vr9, vr6, 0 instruction: using the lower 8 bits of each word in vr9 as an index to select a word from vr6 to update the corresponding word in vr12; For each word in VR10, check if it was selected from VR6. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged. The command cmvw vr13, vr12, vr10, 6 is executed to compare the lower 4 bits of each word in vr10 with 6. If they are equal, the corresponding word in vr12 is taken and the corresponding word in vr13 is updated; otherwise, the corresponding word in vr13 remains unchanged. Step 10 of the 128-choose-1 selection: Update the selected data in VR7 to VR13; Update all selected words from VR7 to VR12 using each word in VR9; Executing the gshufw vr12, vr9, vr7, 0 command: Uses the lower 8 bits of each word in vr9 as an index to select a word from vr7 to update the corresponding word in vr12; For each word in VR10, check if it was selected from VR7. If so, update the corresponding word in VR12 to VR13; otherwise, leave VR13 unchanged. The command `cmvw vr13, vr12, vr10, 7` is executed to compare the lower 4 bits of each word in `vr10` with 7. If they are equal, the corresponding word in `vr12` is used to update the corresponding word in `vr13`; otherwise, the corresponding word in `vr13` remains unchanged.

8. An improved method for a table lookup algorithm based on SimD instructions according to claim 7, characterized in that, The selection of one data item from 256 table entries is achieved by combining the 16-to-1, 8-to-1, and 2-to-1 options. After completing the algorithm to select one item from 128 entries, the gshufb vr13, vr11, vr13 instruction is used to place the selected halfword from vr13 into the lower halfword of vr13 based on the lower 8 bits of each word in vr11. Through the above algorithm combination, the 256-to-1 selection is finally completed. The specific implementation steps are as follows: 256-to-1 selection step: After completing the 128-to-1 selection step 10, based on the lower 8 bits of each word in VR11, place the selected halfword in VR13 on the lower halfword of VR13. Executing the `gshufb vr13, vr11, vr13` instruction: using the lower 8 bits of each word in `vr11`, select 4 bytes from the corresponding word in `vr13`: bits 1-0 are used as indices for byte 0, bits 3-2 as indices for byte 1, bits 5-4 as indices for byte 2, and bits 7-6 as indices for byte 3; the set {byte 3, byte 2, byte 1, byte 0} is used to update the corresponding word in `vr13`. The above steps allow for a 256-to-1 selection from 16 sets of data, subject to the following rules: 1) The table has a total of 256 entries, each entry is 16 bits, and they are stored in the registers vr0~vr7 of 8 SIMDs; 2) The 8-bit address is stored in VR8 in word format; Of which: 8-bits: the high 4 bits are used to select from 16 words; The lower 3 bits are used to select from 8 registers; bit3 is used to select the high and low half words from the word; 3) This algorithm can simultaneously retrieve data from 16 tables.

9. An improved method for a table lookup algorithm based on SimD instructions according to claim 1, characterized in that, The method for implementing the 32-to-1 selection, i.e., when N=32: The 32-to-1 selection can be accomplished using the gshufwh command: that is, using the gshufwh vr12, vr9, vr0 command; where vr0 stores 16 words, or 32 half-words, of table entry data; and each word in vr9 stores the table entry data label for which the value needs to be retrieved. Each tag occupies the lower 10 bits of the corresponding word: The lower 8 bits represent which word to select from, with a total of 16 words, thus achieving a 1-to-1 selection; The 9th bit indicates which halfword of the corresponding word is selected from for halfword 0. Here, 1 represents selecting halfword 1 (the higher halfword), and 0 represents halfword 0 (the lower halfword). The 10th position represents which halfword of the corresponding word the halfword1 of this word is selected from; since each word has 2 halfwords, it achieves a 2-to-1 selection; By combining the above 16-choose-1 and 2-choose-1 options, a 32-choose-1 option can be achieved; The specific implementation steps are as follows: Step 1 of the 32-choose-1 method: Load the 16 table entries, each in word units, into VR0; Step 2 of the 32-choose-1 method: Store the 16 labels from which data needs to be extracted into VR9 in word units; Step 3 of the 32-choose-1 selection: Retrieve data from the table based on the label values ​​of the data to be retrieved; Executing the gshufwh vr12, vr9, vr0 instruction: Use the lower 8 bits of each word in vr9 as an index to select a word from vr0, use its 9th bit to further select a halfword from the selected word as halfword0, similarly, use the 10th bit as halfword1, and finally the target halfword set {halfword1, halfword0} is used to update the corresponding words in vrd; By following the three steps above to select one halfword from 16 words, we can achieve the goal of selecting one halfword from 32 words. Since 16 words are equivalent to 32 halfwords, we can achieve the goal of selecting one halfword from 32 halfwords.

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