Transceiver bit error rate verification device

Abstract

The present application relates to a transceiver bit error rate verification device. The device includes a host computer, an ARM processing module, a transmitter module, and a receiver module; the host computer sends a first data sample to be verified to the ARM processing module; the ARM processing module sequentially generates and sends different data sending instructions to the transmitter module; the ARM processing module sequentially generates and sends data receiving instructions corresponding to different data sending instructions to the receiver module; the transmitter module sequentially outputs the first data sample to be verified to the receiver module based on the different data sending instructions; the receiver module sequentially receives the second data sample to be verified based on the data receiving instructions, and sends the second data sample to be verified to the ARM processing module; the ARM processing module compares the first data sample to be verified with the corresponding second data sample to be verified, sequentially generates a bit error rate comparison result, and outputs the target bit error rate comparison result to the host computer.

Description

Technical Field

[0001] The present application relates to the technical field of integrated circuits, and in particular to a transceiver bit error rate verification device. Background Art

[0002] The primary function of a transceiver is to send or receive data. When the amount of data being sent or received is high enough, it's possible that various external interference factors could cause errors in the data being sent or received. While the probability of this happening is very low, it can often cause system communication to be interrupted or delayed, impacting the normal operation of the entire system. Therefore, a scientific and accurate method for verifying the transceiver's bit error rate is crucial.

[0003] The traditional method for verifying bit error rates (BERs) is electrical parameter testing. By inputting an electrical parameter signal into an input device, users can perform electrical parameter testing on the transceiver to verify the correctness of the transceiver's transmitted and received signals. However, this verification method is not accurate enough, and a more accurate transceiver BER verification method or device is needed. Summary of the Invention

[0004] Based on this, it is necessary to provide a transceiver bit error rate verification device that can accurately address the above technical issues.

[0005] A transceiver bit error rate verification device, comprising a host computer, an ARM (Advanced RISC Machine) processing module, a transmitter module, and a receiver module;

[0006] The host computer sends a first data sample to be verified to the ARM processing module;

[0007] The ARM processing module generates a baud rate configuration information table according to the first data sample to be verified, and sequentially generates and sends different data sending instructions to the transmitter module according to different baud rate configuration information in the baud rate configuration information table, wherein the data sending instructions carry the first baud rate configuration information and the first data sample to be verified; the ARM processing module sequentially generates and sends data receiving instructions corresponding to the different data sending instructions to the receiver module according to the different baud rate configuration information in the baud rate configuration information table and the data sending instructions, wherein the data receiving instructions carry the second baud rate configuration information;

[0008] The transmitter module sequentially configures the baud rate of the transmitter module based on the first baud rate configuration information carried by the different data sending instructions, and sequentially outputs the first to-be-verified data samples to the receiver module according to the configured sending baud rate;

[0009] The receiver module sequentially configures the baud rate of the receiver module based on the second baud rate configuration information carried in the data receiving instruction, sequentially receives the second data samples to be verified according to the different receiving baud rates after configuration, and sends the second data samples to be verified to the ARM processing module;

[0010] The ARM processing module compares the first data sample to be verified and the corresponding second data sample to be verified, generates bit error rate comparison results in sequence, and outputs a target bit error rate comparison result to the host computer based on multiple bit error rate comparison results.

[0011] In one embodiment, the device further comprises a programmable power supply module;

[0012] The programmable power supply module acquires a reference power supply voltage signal, generates a power supply voltage signal, and outputs the power supply voltage signal to the transmitter module and the receiver module.

[0013] In one embodiment, the device further includes a signal conversion module;

[0014] The host computer sends power supply voltage configuration information to the ARM processing module; the ARM processing module generates a power supply instruction according to the power supply voltage configuration information, and sends the power supply instruction to the signal conversion module; the signal conversion module generates a reference power supply voltage signal according to the power supply instruction, and sends the reference power supply voltage signal to the programmable power supply module; the programmable power supply module generates a power supply voltage signal based on the reference power supply voltage signal, and outputs the power supply voltage signal to the transmitter module and the receiver module.

[0015] In one embodiment, the programmable power supply module includes an overcurrent protection component, a power operational amplifier component, a transistor component, and a current sampling component;

[0016] The host computer sends the protection current configuration information to the ARM processing module; the ARM processing module generates a protection instruction according to the protection current configuration information, and sends the protection instruction to the signal conversion module; the signal conversion module generates a protection voltage signal according to the protection instruction, and sends the protection voltage signal to the overcurrent protection component; the signal conversion module sends the reference power supply voltage signal to the power amplifier component; the power amplifier component outputs the power supply voltage signal and the first current signal to the transistor component according to the reference power supply voltage signal; the transistor component outputs the first current signal to the current sampling group component; the current sampling component samples the first current signal and outputs a first voltage signal to the overcurrent protection component; the overcurrent protection component compares the first voltage signal and the protection voltage signal, and when the first voltage signal is greater than the protection voltage signal, outputs the protection voltage signal to the triode component, and the triode component outputs the protection voltage signal to the transmitter module and the receiver module through the current sampling component; when the first voltage signal is less than the protection voltage signal, the triode component outputs the supply voltage signal to the transmitter module and the receiver module through the current sampling component.

[0017] In one embodiment, the current sampling component includes a sampling resistor and a sampling voltage output chip;

[0018] The sampling resistor is connected to the sampling voltage output chip, the transmitter module, and the receiver module, respectively; the sampling resistor samples the first current signal and sends the sampled value of the first current signal to the sampling voltage output chip; the sampling voltage output chip obtains a first voltage signal according to the sampled value of the first current signal, and outputs the first voltage signal to the overcurrent protection component.

[0019] In one embodiment, the overcurrent protection component includes a first resistor, a first capacitor, an overcurrent protection comparator, a second resistor, and a driving current limiting resistor;

[0020] The signal conversion module is connected to the first capacitor and the first input port of the overcurrent protection comparator respectively through the first resistor; the current sampling component is connected to the second input port of the overcurrent protection comparator through the second resistor; the output port of the overcurrent protection comparator is connected to the first capacitor and the driving current limiting resistor respectively, and the driving current limiting resistor is connected to the triode component.

[0021] In one embodiment, the device further includes a serial communication module;

[0022] The signal conversion module is connected to one end of the serial communication module through the ARM processing module; the other end of the serial communication module is connected to the host computer.

[0023] In one embodiment, the serial communication module includes an electrical isolation component and a voltage conversion component;

[0024] The ARM processing module outputs the second voltage signal and the target bit error rate comparison result to the voltage conversion component; the voltage conversion component obtains the third voltage signal based on the second voltage signal, and outputs the third voltage signal and the target bit error rate comparison result to the electrical isolation component, wherein the third voltage signal is a voltage signal that the electrical isolation component can stably receive the target bit error rate comparison result; the electrical isolation component outputs the target bit error rate comparison result to the host computer based on the third voltage signal.

[0025] In one embodiment, the device further includes a voltage stabilization module;

[0026] The voltage stabilization module outputs a regulated voltage signal to the ARM processing module, the serial communication module, and the signal conversion module.

[0027] In one embodiment, the voltage stabilizing module includes a connecting port component, a first voltage-reducing component, a second voltage-reducing component, a third voltage-reducing component, and a diode component;

[0028] The connection port component obtains the external power supply voltage signal and outputs the external power supply voltage signal to the first step-down component through the diode component; the first step-down component obtains the external power supply voltage signal, generates a fourth voltage signal according to the external power supply voltage signal, and outputs the fourth voltage signal to the ARM processing module, the serial communication module, the signal conversion module, and the second step-down component respectively; the second step-down component obtains the fourth voltage signal, generates a fifth voltage signal according to the fourth voltage signal, and outputs the fifth voltage signal to the ARM processing module, the serial communication module, the signal conversion module, and the third step-down component respectively; the third step-down component obtains the fifth voltage signal, generates a sixth voltage signal according to the fifth voltage signal, and outputs the sixth voltage signal to the signal conversion module.

[0029] The transceiver bit error rate verification device includes a host computer, an ARM processing module, a transmitter module and a receiver module. During the entire process, the host computer sends the first data sample to be verified to the ARM processing module. The ARM processing module generates a baud rate configuration information table based on the first data sample to be verified. The baud rate configuration information table contains different baud rate configuration information. The ARM processing module can generate multiple data sending instructions and data receiving instructions based on the different baud rate configuration information, and configure the baud rates of the transmitter and the receiver in sequence. That is, the transmitter can send the first data sample to be verified in sequence according to the first baud rate configuration information in the data sending instruction according to different data sending instructions. However, due to the error between the transmitter and the receiver, the receiver receives a second data sample to be verified that is different from the first data sample to be verified according to the second baud rate configuration information in the data receiving instruction corresponding to the data sending instruction. The receiver sends the obtained multiple second data samples to be verified to the ARM processing module. The ARM processing module compares the previously obtained first data sample to be verified and the corresponding second data sample to be verified one by one, and generates bit error rate comparison results in sequence. Based on the multiple bit error rate comparison results generated in sequence, an accurate target bit error rate comparison result can be further obtained, and the accurate target bit error rate comparison result is output and fed back to the host computer. Therefore, through the four modules of the device, namely the host computer, ARM processing module, transmitter module and receiver module, accurate loopback verification of the transceiver bit error rate can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the conventional technology, the following briefly introduces the drawings required for use in the embodiments or the conventional technology descriptions. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0031] Figure 1 1 is a schematic diagram of the specific structure of a transceiver bit error rate verification device in one embodiment;

[0032] Figure 2 is a schematic diagram of the specific structure of a transceiver bit error rate verification device in another embodiment;

[0033] Figure 3 A schematic diagram of the specific structure of a programmable power supply module in one embodiment;

[0034] Figure 4 Schematic diagram of the specific structure of the serial communication module in one embodiment;

[0035] Figure 5 FIG. 1 is a schematic diagram of the specific structure of a voltage stabilizing module in an embodiment. DETAILED DESCRIPTION

[0036] To facilitate understanding of the present application, the present application will be described more fully below with reference to the accompanying drawings. The accompanying drawings provide embodiments of the present application. However, the present application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.

[0037] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application pertains. The terms used herein in the specification of this application are for the purpose of describing specific embodiments only and are not intended to limit this application.

[0038] It will be understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor without departing from the scope of this application. The first resistor and the second resistor are both resistors, but they are not the same resistor.

[0039] It can be understood that the “connection” in the following embodiments should be understood as “electrical connection”, “communication connection”, etc. if there is transmission of electrical signals or data between the connected circuits, modules, units, etc.

[0040] It is understood that “at least one” refers to one or more, “a plurality” refers to two or more, and “at least a portion of an element” refers to a portion or all of an element.

[0041] As used herein, the singular forms "a," "an," and "the" may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include," "comprising," "having," and the like specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. Furthermore, the term "and / or" as used in this specification includes any and all combinations of the relevant listed items.

[0042] In one embodiment, Figure 1 As shown, the transceiver bit error rate verification device includes a host computer 100, an ARM processing module 200, a transmitter module 300 and a receiver module 400;

[0043] The host computer 100 sends the first data sample to be verified to the ARM processing module 200;

[0044] The ARM processing module 200 generates a baud rate configuration information table based on the first data sample to be verified, and sequentially generates and sends different data sending instructions to the transmitter module 300 based on different baud rate configuration information in the baud rate configuration information table, where the data sending instructions carry the first baud rate configuration information and the first data sample to be verified; the ARM processing module 200 sequentially generates and sends data receiving instructions corresponding to the different data sending instructions to the receiver module 400 based on the different baud rate configuration information and the data sending instructions in the baud rate configuration information table, where the data receiving instructions carry the second baud rate configuration information;

[0045] The transmitter module 300 sequentially configures the baud rate of the transmitter module 300 based on the first baud rate configuration information carried by different data transmission instructions, and sequentially outputs the first to-be-verified data samples to the receiver module 400 according to the configured transmission baud rate;

[0046] The receiver module 400 sequentially configures the baud rate of the receiver module 400 based on the second baud rate configuration information carried in the data receiving instruction, sequentially receives the second data samples to be verified according to the configured different receiving baud rates, and sends the second data samples to be verified to the ARM processing module 200;

[0047] The ARM processing module 200 compares the first data sample to be verified and the corresponding second data sample to be verified, generates bit error rate comparison results in sequence, and outputs a target bit error rate comparison result to the host computer 100 based on the multiple bit error rate comparison results.

[0048] Among them, the host computer refers to a computer that can directly issue control commands. The ARM processing module is composed of an ARM processor. The ARM processor is a 32-bit reduced instruction set processor architecture with low power consumption. It can control the sending baud rate and receiving baud rate of the transceiver through control instructions, and control whether the transmitter sends and the receiver receives data. The transmitter refers to a device that uses an antenna to send information such as radio waves. The receiver refers to a device that can receive information sent by the transmitter. The transmitter module and the receiver module in this application are formed by a combination of an FPGA (Field Programmable Gate Array) processor and a monolithic integrated circuit transceiver. The FPGA processor can interact with the ARM processor for data. Compared with a separate monolithic integrated circuit transceiver, the use of an FPGA processor can more efficiently assist the receiver module and the transmitter module in performing the transmitting and receiving functions.

[0049] Specifically, the transceiver bit error rate verification device includes a host computer 100, an ARM processing module 200, a transmitter module 300, and a receiver module 400. The transceiver bit error rate verification device can implement a transceiver bit error rate loopback verification of 100→200→300→400→200→100 based on these four modules. The specific process is as follows:

[0050] 1. The host computer 100 sends a first data sample to be verified to the ARM processing module 200.

[0051] 2. After receiving the first data sample to be verified, the ARM processing module 200 may generate a baud rate configuration information table related to the first data sample to be verified, wherein the baud rate configuration information table may contain different optional baud rate configuration information. The ARM processing module 200 may sequentially generate different data transmission instructions based on the different baud rate configuration information and the first data sample to be verified, and sequentially transmit the different data transmission instructions to the transmitter module 300. The baud rate configuration information in the data transmission instructions may be referred to as first baud rate configuration information. Different data transmission instructions may contain different first baud rate configuration information.

[0052] Similarly, the ARM processing module 200 will also send a data receiving instruction to the data receiver, and the data receiving instruction will carry the second baud rate configuration information. Since different data sending instructions correspond to different data receiving instructions, the ARM processing module 200 can generate data receiving instructions corresponding to the data sending instruction in sequence according to the first baud rate configuration information in the data sending instruction and the different baud rate configuration information in the baud rate configuration information table. The ARM processing module 200 sends data receiving instructions corresponding to different data sending instructions to the receiver module 400.

[0053] 3. The ARM processing module 200 controls the transmission process of the transmitter module 300 according to the data transmission instruction sent to the transmitter module 300, and controls the reception process of the receiver module 400 according to the data reception instruction sent to the receiver module 400. The transmitter module 300 obtains different data transmission instructions, and sequentially configures the transmission baud rate of the information transmitted by the transmitter itself based on the first baud rate configuration information carried by the different data transmission instructions, and sequentially outputs the first data samples to be verified to the receiver module 400 according to the configured transmission baud rate; the receiver module 400 obtains different data reception instructions corresponding to the data transmission instructions, and sequentially configures the reception baud rate of the information received by the transmitter itself based on the second baud rate configuration information carried by the different data reception instructions, and sequentially receives the first data samples to be verified sent to the receiver module 400 by the transmitter module 300 according to the corresponding data transmission instructions according to the configured reception baud rate. Furthermore, when the amount of data sent and received by the transceiver is large enough, during the sending and receiving process, various external interference factors may cause errors in the data sent or received by the transceiver. Therefore, when the receiver receives the first data sample to be verified, errors may occur. At this time, the receiver obtains the second data sample to be verified corresponding to the first data sample to be verified, where the second data sample to be verified may be consistent with the corresponding first data sample to be verified, or may not be consistent.

[0054] 4. The receiver will send the second data sample to be verified corresponding to the first data sample to be verified to the ARM processing module 200, and the ARM processing module 200 itself has the first data sample to be verified sent by the host computer 100. The ARM processing module 200 compares the bit error rates of the first data sample to be verified and the corresponding second data sample to be verified, and generates different bit error rate comparison results in turn, and outputs the target bit error rate comparison result to the host computer 100 based on multiple different bit error rate comparison results.

[0055] 5. The host computer 100 displays the target bit error rate comparison result.

[0056] The transceiver bit error rate verification device includes a host computer, an ARM processing module, a transmitter module and a receiver module. During the entire process, the host computer sends the first data sample to be verified to the ARM processing module. The ARM processing module generates a baud rate configuration information table based on the first data sample to be verified. The baud rate configuration information table contains different baud rate configuration information. The ARM processing module can generate multiple data sending instructions and data receiving instructions based on the different baud rate configuration information, and configure the baud rates of the transmitter and the receiver in sequence. That is, the transmitter can send the first data sample to be verified in sequence according to the first baud rate configuration information in the data sending instruction according to different data sending instructions. However, due to the error between the transmitter and the receiver, the receiver receives a second data sample to be verified that is different from the first data sample to be verified according to the second baud rate configuration information in the data receiving instruction corresponding to the data sending instruction. The receiver sends the obtained multiple second data samples to be verified to the ARM processing module. The ARM processing module compares the previously obtained first data sample to be verified and the corresponding second data sample to be verified one by one, and generates bit error rate comparison results in sequence. Based on the multiple bit error rate comparison results generated in sequence, an accurate target bit error rate comparison result can be further obtained, and the accurate target bit error rate comparison result is output and fed back to the host computer. Therefore, through the four modules of the device, namely the host computer, ARM processing module, transmitter module and receiver module, accurate loopback verification of the transceiver bit error rate can be achieved.

[0057] In one embodiment, the transceiver bit error rate verification device further includes a programmable power supply module;

[0058] The programmable power supply module obtains a reference power supply voltage signal, generates a power supply voltage signal, and outputs the power supply voltage signal to the transmitter module 300 and the receiver module 400 .

[0059] Among them, the programmable power supply refers to a power supply that sets the output voltage and output current through external control to stabilize the voltage, current, or both. In this application, the programmable power supply module is mainly used to provide power supply voltage to the transmitter module and the receiver module.

[0060] Specifically, the programmable power supply module is connected to the transmitter module 300 and the receiver module 400, respectively. The programmable power supply can obtain a reference voltage signal transmitted from the outside to the programmable power supply, and further process the reference voltage signal to generate a supply voltage signal. The generated supply voltage signal is used to output power to the transmitter module 300 and the receiver module 400. The programmable supply voltage of the programmable power supply can be 0 to 7.5V.

[0061] In this application, by setting a programmable power supply module in the transceiver bit error rate verification device, a stable power supply voltage can be provided to the transmitter module and the receiver module, so that the transmitter module and the receiver module can be more stable when sending and receiving data samples.

[0062] In one embodiment, Figure 2 As shown, the transceiver bit error rate verification device further includes a signal conversion module 500;

[0063] The host computer 100 sends the power supply voltage configuration information to the ARM processing module 200; the ARM processing module 200 generates a power supply instruction according to the power supply voltage configuration information, and sends the power supply instruction to the signal conversion module 500; the signal conversion module 500 generates a reference power supply voltage signal according to the power supply instruction, and sends the reference power supply voltage signal to the programmable power supply module 600; the programmable power supply module 600 generates a power supply voltage signal based on the reference power supply voltage signal, and outputs the power supply voltage signal to the transmitter module 300 and the receiver module 400.

[0064] The signal conversion module includes a DAC (Digital-to-Analog Converter) and an ADC (Analog-to-Digital Converter). The DAC converts digital signals into analog output signals. The DAC's input reference voltage is 2.5V, it has four analog output channels, and the converter has 12-bit accuracy. It communicates with the ARM using the SPI (Serial Peripheral Interface) serial synchronous communication bus. The ADC converts analog signals into 24-bit digital signals. Its maximum analog input voltage is 5V, it has eight analog input channels, and its accuracy is up to 24 bits.

[0065] Specifically, the ARM processing module 200 is connected to the programmable power supply module 600 through the signal conversion module 500. The host computer 100 not only sends the first data sample to be verified to the ARM processing module 200, but also sends the power supply voltage configuration information to the ARM processing module 200; the ARM processing module 200 generates a power supply instruction based on the received power supply voltage configuration information, and sends the power supply instruction to the digital-to-analog converter DAC in the signal conversion module 500; the DAC converts the power supply voltage configuration information in the power supply instruction to generate a reference power supply voltage signal, wherein the reference power supply voltage signal is usually 0~2.5V. When the power supply voltage signal of the programmable power supply is 0~7.5V, the relationship between the reference power supply voltage signal and the power supply voltage configuration information sent by the host computer 100 is: reference power supply voltage signal = power supply voltage configuration information*2.5 / 7.5V. The reference supply voltage signal is output to the programmable power supply module 600; the programmable power supply module 600 obtains the reference supply voltage signal, further processes the reference voltage signal, generates a supply voltage signal, and outputs the supply voltage signal to the transmitter module 300 and the receiver module 400.

[0066] Furthermore, the programmable power supply has the ability to sink and source current, such as Figure 2 As shown, the connection between the programmable power supply module 600 and the transmitter module 300 and the receiver module 400 is bidirectional. The programmable power supply module 600 can also detect the power supply current of the transmitter module 300 and the receiver module 400, and convert the power supply current signal into a voltage signal of 0 to 5V. The ARM processing module 200 reads the voltage signal through the analog-to-digital converter ADC. When the voltage signal passes through the ADC, it will be processed to obtain a digital signal output to the ARM processing module 200. The ARM processor program uploads the digital signal to the host computer 100, and the host computer 100 monitors the power supply current of the transmitter module 300 and the receiver module 400 in real time. If the power supply current is abnormal, the abnormal data is automatically recorded.

[0067] In this embodiment, by setting a signal conversion module in the transceiver bit error rate verification device, a reference supply voltage signal can be obtained from the power supply voltage configuration information of the host computer through the digital-to-analog conversion function, so that the programmable power supply can efficiently obtain the reference supply voltage signal and efficiently generate the supply voltage signal.

[0068] In one embodiment, Figure 3 As shown, the programmable power supply module 600 includes an overcurrent protection component 510, a power amplifier component 520, a transistor component 530 and a current sampling component 540;

[0069] The host computer 100 sends the protection current configuration information to the ARM processing module 200; the ARM processing module 200 generates a protection instruction according to the protection current configuration information, and sends the protection instruction to the signal conversion module 500; the signal conversion module 500 generates a protection voltage signal according to the protection instruction, and sends the protection voltage signal to the overcurrent protection component 510; the signal conversion module 500 sends the reference power supply voltage signal to the power amplifier component 520; the power amplifier component 520 outputs the power supply voltage signal and the first current signal to the transistor component 530 according to the reference power supply voltage signal; the transistor component 530 outputs the first current signal to the current sampling component 5 40; the current sampling component 540 samples the first current signal and outputs a first voltage signal to the overcurrent protection component 510; the overcurrent protection component 510 compares the first voltage signal and the protection voltage signal, and when the first voltage signal is greater than the protection voltage signal, outputs the protection voltage signal to the transistor component 530, and the transistor component 530 outputs the protection voltage signal to the transmitter module 300 and the receiver module 400 through the current sampling component 540; when the first voltage signal is less than the protection voltage signal, the transistor component 530 outputs the power supply voltage signal to the transmitter module 300 and the receiver module 400 through the current sampling component 540.

[0070] Specifically, the programmable power supply module 600 includes an overcurrent protection component 510, a power amplifier component 520, a transistor component 530 and a current sampling component 540. The signal conversion module 500 is connected to the overcurrent protection component 510 and the power amplifier component 520 respectively. The overcurrent protection component 510, the power amplifier component 520, and the current sampling component 540 are connected through the transistor component 530. The current sampling component 540 is also connected to the transmitter module 300 and the receiver module 400 respectively. The connecting lines are at Figure 3 The power amplifier component 520 can output or absorb a large current, or it can output a voltage signal after power amplification. The output voltage of the power amplifier component 520 is generally three times the reference supply voltage signal. The sampling interval of the current sampling component 540 is set by the user through the host computer 100.

[0071] In order to better avoid damage to the transceiver caused by excessive power supply current sent to the transmitter module 300 and the receiver module 400, the upper computer 100 will send protection current configuration information to the ARM processing module 200. The ARM processing module 200 obtains the protection current configuration information and generates a protection instruction based on the protection current configuration information. The ARM processing module 200 sends the protection instruction to the signal conversion module 500. The DAC in the signal conversion module 500 converts the protection instruction into a protection voltage signal and sends the protection voltage signal to the overcurrent protection component 510. Since the signal conversion module 500 sends the reference supply voltage signal to the power amplifier component 520 in the programmable power supply module 600 to amplify the driving power, the power amplifier component 520 can output the supply voltage signal and the first current signal to the transistor component 530 based on the reference supply voltage signal. The supply voltage signal and the first current signal are the voltage and current signals to be output to the transmitter module 300 and the receiver module 400 when overcurrent protection is not performed. Furthermore, the transistor component 530 receives the first current signal and transmits the first current signal to the current sampling component 540, so that the current sampling component 540 can sample the first current signal, and thereby output the first voltage signal to the overcurrent protection component 510 based on the sampling value of the first current signal to perform overcurrent protection.

[0072] The overcurrent protection component 510 is mainly used to control the overcurrent protection of the first current signal output to the transmitter module 300 and the receiver module 400. The overcurrent protection component 510 compares the first voltage signal output by the current sampling component 540 and the protection voltage signal output by the signal conversion module 500. When the first voltage signal generated according to the first current signal is greater than the protection voltage signal, it is considered that the first current signal output to the transmitter module 300 and the receiver module 400 is greater than the protection current configuration information. At this time, it is necessary to protect the current signal that exceeds the range, that is, the overcurrent protection component outputs the protection voltage signal to the transistor component 530, so that the transistor component 530 outputs it to the transmitter module 300 and the receiver module 4 through the current sampling component 540. The current signal of 00 is the current signal under the protection voltage signal. At this time, the power supply voltage signal and current signal output to the transmitter module 300 and the receiver module 400 are lower than the voltage and current signals before overcurrent protection is performed, achieving the effect of reducing the voltage and thus reducing the current flowing into the transceiver. Since the protection voltage is constant, the comparator output current corresponding to the protection voltage is also output in the form of a constant current; when the first voltage signal is less than the overcurrent protection signal, the first voltage signal is within the acceptable range of the transmitter module 300 and the receiver module 400, and overcurrent protection is not required. At this time, the transistor component 530 outputs the power supply voltage signal and the first current signal to the transmitter module 300 and the receiver module 400 through the current sampling component 540.

[0073] In this embodiment, by setting an overcurrent protection component, a power operational amplifier component, a transistor component and a current sampling component in the programmable power supply module, the power supply voltage signal output by the programmable power supply to the transmitter module and the receiver module can be protected, so that the voltage received by the transmitter module and the receiver module is within the normal range, thereby improving the reliability of the programmable power supply.

[0074] In one embodiment, Figure 3 As shown, the current sampling component 540 includes a sampling resistor R0 and a sampling voltage output chip U1;

[0075] The sampling resistor R0 is connected to the sampling voltage output chip U1, the transmitter module 300, and the receiver module 400, respectively. The sampling resistor R0 samples the first current signal and sends the sampled value of the first current signal to the sampling voltage output chip U1. The sampling voltage output chip U1 obtains a first voltage signal based on the sampled value of the first current signal and outputs the first voltage signal to the overcurrent protection component 510.

[0076] Specifically, the current sampling component 540 is connected to the overcurrent protection component 510 and the power amplifier component 520 via the transistor component 530. The current sampling component 540 is also connected to the transmitter module 300 and the receiver module 400. The current sampling component 540 consists of a sampling resistor R0 capable of sampling a first current signal and a sampling voltage output chip U1. U1 can be a MAX4080TASA detection chip, which can amplify R0 by a factor of 20. When the sampling resistor R0 is 1Ω and the reference supply voltage signal is between 0 and 2.5V, the maximum sampling current range of the current sampling component 540 is Imax = 2.5 / (1*20)A = 125mA. The current sampling resistor R0 is connected to the sampling voltage output chip U1, and is also connected to the transmitter module 300 and the receiver module 400. The sampling voltage output chip U1 is also connected to the current sampling resistor R0, the transmitter module 300, and the receiver module 400. The first current signal output by transistor assembly 530 passes through sampling resistor R0 in current sampling assembly 540. Sampling resistor R0 samples the first current signal and sends the sampled voltage signal to sampling voltage output chip U1. Sampling voltage output chip U1 converts the sampled value of the first current signal into a first voltage signal according to Ohm's law. U1 then outputs the first voltage signal obtained after sampling the first current signal to the non-inverting input terminal of overcurrent protection assembly 510 via pin 5 to determine whether overcurrent protection is required. In specific applications, the value of R0 can be customized, generally 1Ω. Pin 2 of sampling voltage output chip U1 is connected to one end of a capacitor and a 12V external power supply. The other end of the capacitor is connected to pin 4 of U1 and to ground.

[0077] In this embodiment, by providing a current sampling component including a sampling resistor and a sampling voltage output chip, the first current signal output by the power operational amplifier component to the transistor component can be sampled, and the sampled first current signal can be processed to obtain a voltage signal of the first current signal, that is, a first voltage signal.

[0078] In one embodiment, the overcurrent protection component 510 includes a first resistor R1, a first capacitor C1, an overcurrent protection comparator U2, a second resistor R2, and a driving current limiting resistor R';

[0079] The signal conversion module 500 is connected to the first capacitor C1 and the first input port of the overcurrent protection comparator U2 through the first resistor R1; the current sampling component 540 is connected to the second input port of the overcurrent protection comparator U2 through the second resistor R2; the output port of the overcurrent protection comparator U2 is connected to the first capacitor C1 and the driving current limiting resistor R', and the driving current limiting resistor R' is connected to the triode component.

[0080] Wherein, the comparator is an electronic component that outputs different voltage results at the output end by comparing the current or voltage of two input ends. The signal conversion module 500 is connected to the overcurrent protection component 510, and the overcurrent protection component 510 is respectively connected to the power operational amplifier component 520 and the current sampling component 540 through the triode component 530. Specifically, the signal conversion module 500 is respectively connected to the first capacitor C1 and the first input port (i.e., the non-inverting input port) of the overcurrent protection comparator U2 through the first resistor R1, and the output end of the sampling voltage amplification component in the current sampling component 540 is connected to the second input port (i.e., the inverting input port) of the overcurrent protection comparator U2 through the second resistor R2, and the output port of the overcurrent protection comparator U2 is respectively connected to the first capacitor C1 and the driving current limiting resistor R', and the driving current limiting resistor R' is connected to the triode component.

[0081] The overcurrent protection comparator U2 receives the protection voltage signal transmitted by the signal conversion module 500 through the first resistor R1, and the first voltage signal transmitted by the current sampling component 540 through the second resistor R2, and compares the first voltage signal and the protection voltage signal. When the first voltage signal is greater than the protection voltage signal, the output end of the overcurrent protection comparator U2 maintains a constant current output, and outputs the protection voltage signal to the transistor component 530 by driving the current limiting resistor R'; when the first voltage signal is greater than the protection voltage signal, current protection is not required. At this time, the overcurrent protection comparator U2 maintains a constant voltage output, and the output to the transmitter module 300 and the receiver module 400 will still be a power supply voltage signal. The combination of driving the current limiting resistor R' and the transistor component 530 can achieve the current limiting effect on the protection voltage signal, so that the current is maintained at the current signal corresponding to the protection voltage signal. In addition, the first capacitor C1 is an integrating capacitor, which starts the feedback stabilization control circuit. In specific applications, usually, R1 = 5.1kΩ, R2 = 5.1kΩ, R' = 30kΩ, Figure 3 There are also capacitors C2 and C3 around the overcurrent protection comparator U2, which filter the signal flowing through U2. One end of C2 is grounded and the other end is -12V; one end of C3 is grounded and the other end is +12V. Among them, the capacitors are of any model.

[0082] In this embodiment, by providing an overcurrent protection component 510 including a first resistor R1, a first capacitor C1, an overcurrent protection comparator U2, a second resistor R2, and a driving current limiting resistor R' in the programmable power module, the reliability of the programmable power module can be enhanced.

[0083] In addition, if Figure 3 As shown, in some embodiments, the power operational amplifier component 520 in the programmable power supply module 600 includes a third resistor R3, a fourth resistor R4, a power amplifier U3, a fifth resistor R5, and a second capacitor C4. The signal conversion module 500 is connected to the first input terminal (i.e., the non-inverting input terminal) of the power amplifier U3 through the third resistor R3. One end of the fourth resistor R4 is grounded, and the other end is respectively connected to the second input terminal (i.e., the inverting input terminal) of the power amplifier U3, the fifth resistor R5, and the second capacitor C4. The fifth resistor R5 is connected in parallel with the second capacitor C4. The output terminal of the power amplifier U3 is connected to the transistor component 530. The reference supply voltage signal generated by the signal conversion module 500 is input to the power amplifier U3, and the power amplifier U3 outputs the supply voltage signal to the transistor component 530. The third resistor R3, the fourth resistor R4, the fifth resistor R5, and the second capacitor C4 are all configured resistor and capacitor components of the power amplifier, which can enable the power amplifier U3 to be in a stable amplification state with a feedback signal. In specific applications, usually, R3 = 10kΩ, R4 = 10kΩ, R5 = 20kΩ, Figure 3There are also capacitors C6 and C7 around the medium power amplifier U3, which filter the signal flowing through U3. One end of C6 is grounded and the other end is +12V; one end of C7 is grounded and the other end is -12V. Among them, the capacitors are of unrestricted models.

[0084] In one embodiment, the device further comprises a serial communication module;

[0085] The signal conversion module 600 is connected to one end of the serial communication module through the ARM processing module 200 ; the other end of the serial communication module is connected to the host computer 100 .

[0086] Specifically, one end of the serial communication module is connected to the ARM processing module 200, and the other end of the serial communication module is connected to the host computer 100. It can be seen that the serial communication module is used for the ARM processing module 200 to output the target bit error rate comparison result to the host computer 100.

[0087] In this embodiment, by providing a serial communication module, the communication efficiency between the ARM processing module and the host computer can be improved.

[0088] In one embodiment, Figure 4 As shown, the serial communication module includes an electrical isolation component U4 and a voltage conversion component U5;

[0089] The ARM processing module 200 outputs a second voltage signal and a target bit error rate comparison result to the voltage conversion component U5; the voltage conversion component U5 obtains a third voltage signal based on the second voltage signal, and outputs the third voltage signal and the target bit error rate comparison result to the electrical isolation component U4, wherein the third voltage signal is a voltage signal that the electrical isolation component U4 can stably receive the target bit error rate comparison result; the electrical isolation component U4 outputs the target bit error rate comparison result to the host computer 100 based on the third voltage signal.

[0090] Specifically, the communication between the ARM processing module 200 and the host computer 100 adopts the communication mode of the RS232 serial communication module, wherein the serial communication module adopts an electrical isolation component U4, which is a component with an internal integrated DC-DC (Direct Current-Direct Current) isolated power supply, which can electrically isolate the connection between the ARM processing module 200 and the host computer 100, so as to improve the stability of the serial communication and prevent the electrical noise between the host computer 100 and the ARM processing module 200 from interfering with each other. In addition, in a specific application, since the digital level of the input and output ports of the ARM processing module 200 is a second voltage signal, and the digital level of the electrical isolation component U4 is a third voltage signal, the third voltage signal can enable the electrical isolation component U4 to stably receive the target bit error rate comparison result. Taking the second voltage signal as 3.3V and the third voltage signal as 5V as an example, a voltage conversion component U5 will be set for conversion between 3.3V and 5V to ensure the stability of communication.

[0091] like Figure 4 As shown, the rightmost end is the port part for connecting the serial communication module to the host computer 100, and the ports are not limited to the nine in the figure. The leftmost end is the part for connecting the serial communication module to the ARM processing module 200. Since the digital level of the input and output ports of the ARM processing module 200 is a second voltage signal, the ARM processing module 200 outputs the second voltage signal and the target bit error rate comparison result to pins 2 and 3 of the voltage conversion component U5 through the serial port. The second voltage signal is converted into a third voltage signal in the voltage conversion component U5, and the third voltage signal and the target bit error rate comparison result are output to the electrical isolation component U4. The electrical isolation component U4 performs noise isolation between the ARM processing module 200 and the host computer 100, and outputs the target bit error rate comparison result to the host computer 100. Furthermore, Figure 4 Various resistors and capacitors are also present for filtering. In specific applications, U4's pin 8 is typically connected to U5's pin 7 via a 100Ω resistor, and U5's pin 9 is connected to U5's pin 6 via a 100Ω resistor. U4 also connects a 22uf capacitor in series with a 10Ω resistor, and an unspecified capacitor is connected in parallel with the 22uf capacitor. This unspecified capacitor is also connected to U4's pins 2 and 3, which are then connected to a regulated 5V voltage. U5's pin 1 is connected to a regulated 3.3V voltage and a grounded capacitor.

[0092] In this embodiment, by providing a serial communication module including an electrical isolation component and a voltage conversion component, the stability of communication in the transceiver bit error rate verification device can be guaranteed, and mutual interference of electrical noise between the host computer and the ARM processing module can be avoided.

[0093] In one embodiment, the device further comprises a voltage stabilization module;

[0094] The voltage stabilization module outputs a regulated voltage signal to the ARM processing module 200 , the serial communication module, and the signal conversion module 500 .

[0095] Specifically, in the transceiver bit error rate verification device, the transmitter module 300 and the receiver module 400 are powered by the power supply voltage configuration information sent by the host computer 100 to the programmable power supply. The power supply voltage and current of the remaining auxiliary modules, such as the ARM processing module 200, the serial communication module, and the signal conversion module 500, do not need to be monitored by the host computer 100. Therefore, these modules are powered by the voltage regulator module. The voltage regulator module can output a regulated voltage signal to the ARM processing module 200, the serial communication module, and the signal conversion module 500.

[0096] In this embodiment, by providing a voltage stabilizing module, efficient power supply to the ARM processing module 200 , the serial port communication module, and the signal conversion module 500 can be achieved.

[0097] In one embodiment, Figure 5 As shown, the voltage stabilizing module includes a connection port component CON3, a first step-down component U6, a second step-down component U7, a third step-down component U8, and a diode component D1;

[0098] The connection port component CON3 obtains the external power supply voltage signal, and outputs the external power supply voltage signal to the first step-down component U6 through the diode component D1; the first step-down component U6 obtains the external power supply voltage signal, generates a fourth voltage signal according to the external power supply voltage signal, and outputs the fourth voltage signal to the ARM processing module 200, the serial communication module, the signal conversion module 500, and the second step-down component U7 respectively; the second step-down component U7 obtains the fourth voltage signal, generates a fifth voltage signal according to the fourth voltage signal, and outputs the fifth voltage signal to the ARM processing module 200, the serial communication module, the signal conversion module 500, and the third step-down component U8 respectively; the third step-down component U8 obtains the fifth voltage signal, generates a sixth voltage signal according to the fifth voltage signal, and outputs the sixth voltage signal to the signal conversion module 500.

[0099] Among them, the connection port component CON3 has three connection ports. The current in the transmitter and receiver flows into the first port, the second port is grounded, and the third port is connected to the external power supply. The connection port component CON3 is connected to the diode component D1 and the reverse diode component D2 respectively. The diode component D1 in this application is different from the reverse diode component and refers to the positive diode component D1. The positive diode component D1 is connected in parallel with the first step-down component U6 through multiple capacitors, the first step-down component U6 is connected in parallel with the second step-down component U7 through multiple capacitors, and the second step-down component U7 is connected in parallel with the third step-down component U8 through multiple capacitors. The reverse diode component is connected in series with a resistor and in parallel with multiple capacitors. The capacitors in the voltage stabilization module all play a filtering role. The positive diode component D1 and the reverse diode component D2 play an anti-reverse role. Figure 5 The output V5 of the upper middle part is connected to the input V5 of the lower middle part, and V3 is grounded.

[0100] Taking the external power supply voltage signal of +12V as an example, the connection port component CON3 obtains the external power supply voltage signal +12V from the third port. Since the external power supply voltage signal +12V cannot pass through the reverse diode, the +12V is passed through the positive diode component D1 and filtered by the capacitor and then output to the first step-down component U6; the first step-down component U6 obtains the external power supply voltage signal V4, steps down the external power supply voltage signal V4=+12V, generates a fourth voltage signal V5=+5V, and outputs V5 to the ARM processing module 200, the serial communication module, and the signal conversion module 500 respectively to power part of the circuits of these modules. The first step-down component U6 also steps V5 It is sent to the second step-down component U7 for further step-down; the second step-down component U7 obtains the fourth voltage signal V5 = +5V, generates a fifth voltage signal V6 = +3.3V according to the fourth voltage signal V5, and outputs V6 to the ARM processing module 200, the serial communication module, and the signal conversion module 500 respectively to power part of the circuits of these modules. The second step-down component U7 also sends V6 to the third step-down component U8 for further step-down; the third step-down component U8 obtains V6 = +3.3V, steps down V6, generates a sixth voltage signal V7 = +2.5V, and outputs V7 to the signal conversion module 500, where the +2.5V voltage is the reference voltage of the signal conversion module 500. Furthermore, if the external power supply is connected in reverse, that is, the external power supply voltage signal is -12V, the -12V voltage output by the connection port component CON3 cannot pass through the positive diode component D1, but passes through the negative diode component D2. At this time, V1=V2=-12V, and the negative diode component D2 is grounded after being filtered by multiple capacitors, which can prevent the reverse connection from causing damage to the voltage regulator module.

[0101] Furthermore, when V5=+5V and V6=+3.3V are output to the serial communication module, voltage signal conversion can be performed between the ARM processing module and the electrical isolation component of the serial communication module.

[0102] Optionally, the first step-down component U6 can use the non-isolated DC-DC component K7805-2000L, which can withstand an input voltage of 7 to 36V, provide a stable 5V output voltage, and a maximum supply current of 2A. The second step-down component U7 can use the LDO linear voltage regulator chip AMS1117-3.3, which can withstand a maximum input voltage of 18V, a maximum output current of 800mA, and can provide a stable 3.3V output.

[0103] In one embodiment, some parameter indicators of the transceiver bit error rate verification device are shown in Table 1 below:

[0104] Table 1 Some parameters of the transceiver bit error rate verification device

[0105]

[0106]

[0107] In one embodiment, since the device is a data exchange between a host computer and a transceiver, the device can operate under high and low temperature conditions. Specifically, when working, the board with each module except the host computer welded thereon can be placed in a high and low temperature box.

[0108] In one embodiment, a transceiver bit error rate verification device comprises a host computer, an ARM processing module, a transmitter module, a receiver module, and auxiliary circuitry. The auxiliary circuitry includes a programmable power supply module, a signal conversion module, a serial communication module, and a voltage regulator module. The programmable power supply module includes an overcurrent protection component, a power amplifier component, a transistor component, and a current sampling component. The current sampling component includes a sampling resistor and a sampling voltage output chip. The serial communication module includes an electrical isolation component and a voltage conversion component.

[0109] Specifically, the loopback verification of the transceiver bit error rate between the four modules of the host computer, ARM processing module, transmitter module and receiver module is as described above. The host computer and the ARM processing module communicate bidirectionally through the serial communication module. The host computer can send power supply voltage configuration information and protection current configuration information to the ARM processing module, and the ARM processing module generates power supply instructions and protection instructions and outputs them to the signal conversion module; the signal conversion module can convert the digital signal of the instruction into an analog signal, that is, generate a reference power supply voltage signal and a protection voltage signal; the signal conversion module sends the reference power supply voltage signal to the power operational amplifier component and sends the protection voltage signal to the overcurrent protection At the inverting input terminal of the component, the power op amp component outputs the supply voltage signal and the first current signal to the current sampling component via the transistor component based on the reference supply voltage signal. The sampling resistor in the current sampling component samples the first current signal, and the sampling voltage output chip outputs the first voltage signal to the non-inverting input terminal of the overcurrent protection component based on the sampled value of the first current signal. The overcurrent protection component compares the first voltage signal and the protection voltage signal. Since the first voltage signal corresponds to the first current signal, the overcurrent protection component can determine whether to output the supply voltage signal or the protection voltage signal to the transmitter module and the receiver module based on the comparison result. In addition, the voltage stabilization module can also power the ARM processing module, the serial communication module, and the signal conversion module.

[0110] In the description of this specification, reference to the terms "some embodiments" or "other embodiments" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0111] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0112] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present application shall be determined by the appended claims.

Claims

1. A transceiver bit error rate verification device, characterized in that: The device includes a host computer, an ARM processing module, a transmitter module and a receiver module; The host computer sends a first data sample to be verified to the ARM processing module; The ARM processing module generates a baud rate configuration information table according to the first data sample to be verified, and sequentially generates and sends different data sending instructions to the transmitter module according to different baud rate configuration information in the baud rate configuration information table, wherein the data sending instructions carry the first baud rate configuration information and the first data sample to be verified; the ARM processing module sequentially generates and sends data receiving instructions corresponding to the different data sending instructions to the receiver module according to the different baud rate configuration information in the baud rate configuration information table and the data sending instructions, wherein the data receiving instructions carry the second baud rate configuration information; The transmitter module sequentially configures the baud rate of the transmitter module based on the first baud rate configuration information carried by the different data sending instructions, and sequentially outputs the first to-be-verified data samples to the receiver module according to the configured sending baud rate; The receiver module sequentially configures the baud rate of the receiver module based on the second baud rate configuration information carried in the data receiving instruction, sequentially receives the second data sample to be verified according to the different receiving baud rates after configuration, and sends the second data sample to be verified to the ARM processing module; The ARM processing module compares the first data sample to be verified and the corresponding second data sample to be verified, generates bit error rate comparison results in sequence, and outputs a target bit error rate comparison result to the host computer based on multiple bit error rate comparison results.

2. The device according to claim 1, characterized in that The device also includes a programmable power supply module; The programmable power supply module acquires a reference power supply voltage signal, generates a power supply voltage signal, and outputs the power supply voltage signal to the transmitter module and the receiver module.

3. The device according to claim 2, characterized in that The device also includes a signal conversion module; The host computer sends the power supply voltage configuration information to the ARM processing module; the ARM processing module generates a power supply instruction according to the power supply voltage configuration information, and sends the power supply instruction to the signal conversion module; the signal conversion module generates a reference power supply voltage signal according to the power supply instruction, and sends the reference power supply voltage signal to the programmable power supply module; The programmable power supply module generates a power supply voltage signal based on the reference power supply voltage signal, and outputs the power supply voltage signal to the transmitter module and the receiver module.

4. The device according to claim 3, characterized in that The programmable power supply module includes an overcurrent protection component, a power operational amplifier component, a triode component and a current sampling component; The host computer sends the protection current configuration information to the ARM processing module; the ARM processing module generates a protection instruction according to the protection current configuration information, and sends the protection instruction to the signal conversion module; the signal conversion module generates a protection voltage signal according to the protection instruction, and sends the protection voltage signal to the overcurrent protection component; The signal conversion module sends the reference supply voltage signal to the power operational amplifier component; the power operational amplifier component outputs a supply voltage signal and a first current signal to the transistor component according to the reference supply voltage signal; the transistor component outputs the first current signal to the current sampling component; the current sampling component samples the first current signal and outputs a first voltage signal to the overcurrent protection component; The overcurrent protection component compares the first voltage signal and the protection voltage signal. When the first voltage signal is greater than the protection voltage signal, the protection voltage signal is output to the transistor component. The transistor component outputs the protection voltage signal to the transmitter module and the receiver module through the current sampling component. When the first voltage signal is less than the protection voltage signal, the transistor component outputs the supply voltage signal to the transmitter module and the receiver module through the current sampling component.

5. The device according to claim 4, characterized in that The current sampling component includes a sampling resistor and a sampling voltage output chip; The sampling resistor is connected to the sampling voltage output chip, the transmitter module, and the receiver module, respectively; the sampling resistor samples the first current signal and sends the sampled value of the first current signal to the sampling voltage output chip; the sampling voltage output chip obtains a first voltage signal according to the sampled value of the first current signal, and outputs the first voltage signal to the overcurrent protection component.

6. The device according to claim 4, characterized in that The overcurrent protection component includes a first resistor, a first capacitor, an overcurrent protection comparator, a second resistor, and a driving current limiting resistor; The signal conversion module is connected to the first capacitor and the first input port of the overcurrent protection comparator through the first resistor; the current sampling component is connected to the second input port of the overcurrent protection comparator through the second resistor; the output port of the overcurrent protection comparator is connected to the first capacitor and the driving current limiting resistor, and the driving current limiting resistor is connected to the transistor component.

7. The device according to claim 3, further comprising a serial communication module; The signal conversion module is connected to one end of the serial communication module through the ARM processing module; the other end of the serial communication module is connected to the host computer.

8. The device according to claim 7, wherein the serial communication module comprises an electrical isolation component and a voltage conversion component; The ARM processing module outputs the second voltage signal and the target bit error rate comparison result to the voltage conversion component; the voltage conversion component obtains a third voltage signal based on the second voltage signal, and outputs the third voltage signal and the target bit error rate comparison result to the electrical isolation component, wherein, The third voltage signal is a voltage signal that enables the electrical isolation component to stably receive the target bit error rate comparison result; the electrical isolation component outputs the target bit error rate comparison result to the host computer based on the third voltage signal.

9. The device according to claim 7, further comprising a voltage stabilization module; The voltage stabilization module outputs a regulated voltage signal to the ARM processing module, the serial communication module, and the signal conversion module.

10. The device according to claim 9, wherein the voltage stabilizing module comprises a connection port component, a first voltage-reducing component, a second voltage-reducing component, a third voltage-reducing component, and a diode component; The connection port component obtains an external power supply voltage signal and outputs the external power supply voltage signal to the first step-down component through the diode component; the first step-down component obtains the external power supply voltage signal, generates a fourth voltage signal according to the external power supply voltage signal, and outputs the fourth voltage signal to the ARM processing module, the serial communication module, the signal conversion module, and the second step-down component respectively; the second step-down component obtains the fourth voltage signal, generates a fifth voltage signal according to the fourth voltage signal, and outputs the fifth voltage signal to the ARM processing module, the serial communication module, the signal conversion module, and the third step-down component respectively; the third step-down component obtains the fifth voltage signal, generates a sixth voltage signal according to the fifth voltage signal, and outputs the sixth voltage signal to the signal conversion module.

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