High-voltage circuit state detection circuit and electric vehicle

Abstract

This invention provides a high-pressure loop state detection circuit and an electric vehicle. The high-pressure loop state detection circuit includes a voltage divider module, a low-voltage acquisition module, a high-voltage acquisition module, a signal isolation module, and a processing module. In this invention, the processing module prioritizes determining the state of the high-voltage loop based on the state of the low-voltage acquisition signal and the state of the high-voltage acquisition signal. For short high-voltage or short-ground states, the specific state of the high-voltage loop can be directly determined based on the state of the low-voltage acquisition signal and the state of the high-voltage acquisition signal. This reduces the reliance on the time-consuming analog voltage divider acquisition signal acquired by the ADC for state detection. The state of the high-voltage loop can be quickly and effectively determined solely by the state of the low-voltage acquisition signal and the state of the high-voltage acquisition signal obtained by fast interrupt detection, shortening the fault detection response time of the high-pressure loop state detection circuit and improving the real-time performance of high-pressure loop state detection.

Description

Technical Field

[0001] This invention relates to the field of automotive safety technology, specifically to a high-pressure loop state detection circuit and an electric vehicle. Background Technology

[0002] Electric vehicles are powered by batteries with voltages reaching several hundred volts or higher. The power system of an electric vehicle consists of multiple subsystems connected by high-voltage connectors to achieve communication, detection, and other functions. At the same time, the operating environment of each controller is extremely harsh, with most operating conditions involving vibration and shock. Short circuits, open circuits, and other abnormalities may occur in the connections between modules. In such cases, it is necessary to test the connectivity of the circuit system. Therefore, high-voltage circuit fault detection circuits are essential to ensure the safe operation of vehicle equipment and the safety of passengers.

[0003] However, existing high-voltage circuit fault detection circuits for electric vehicles have many shortcomings. For example, CN218272585U provides a high-voltage interlock detection device and system that detects the signal under test through the high-voltage interlock circuit. All signals are acquired through analog acquisition (AD acquisition). The acquired analog signals must first undergo analog-to-digital conversion to obtain the corresponding digital signals, which is time-consuming and has poor real-time performance. Furthermore, the acquired signals are directly connected to the power supply and the acquisition terminal, which poses a risk of the system being damaged by high-voltage signals. The problem of safe operation of the controller and related equipment has not been solved.

[0004] Therefore, there is an urgent need for a simple and efficient high-pressure loop state detection technology. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the present invention provides a high-pressure loop state detection circuit and an electric vehicle. The high-pressure loop state detection circuit is designed by combining a voltage divider module, a low-voltage acquisition module, a high-voltage acquisition module, a signal isolation module, and a processing module. The state of the high-voltage loop is determined by the low-voltage acquisition signal, the high-voltage acquisition signal, and the digital voltage divider. When a short-voltage fault or a short-ground fault occurs in the high-voltage loop, the specific fault can be directly determined based on the mutually exclusive low-voltage and high-voltage acquisition signals, eliminating the need for analog-to-digital conversion of the analog voltage divider acquisition signal and subsequent judgment, thus shortening the fault detection response time of the high-pressure loop state detection circuit. The signal isolation module isolates the acquisition of the analog voltage divider. When a short-voltage fault occurs in the high-voltage loop, the signal isolation module shuts down, and the processing module stops receiving the analog voltage divider acquisition signal. This prevents the processing module from being damaged by the received high-voltage signal, improving the safety of the high-pressure loop state detection circuit and ensuring the safe operation of related equipment such as electric vehicles.

[0006] To achieve the above and other related objectives, the technical solution provided by this invention is as follows.

[0007] A high-pressure loop state detection circuit includes:

[0008] The voltage divider module is connected to the power supply voltage and the high-voltage circuit. It performs voltage division on the circuit voltage connected to the voltage divider module in the high-voltage circuit to obtain a simulated voltage divider.

[0009] A low-voltage acquisition module is connected to the voltage divider module and compares the analog voltage divider voltage with the first reference voltage to obtain a low-voltage acquisition signal.

[0010] A high-voltage acquisition module, connected to the voltage divider module, compares the analog voltage divider voltage with a second reference voltage to obtain a high-voltage acquisition signal;

[0011] A signal isolation module is connected to the voltage divider module and the high voltage acquisition module respectively. Under the control of the high voltage acquisition signal, the analog voltage divider is isolated and acquired to obtain the analog voltage divider acquisition signal.

[0012] The processing module is connected to the low-voltage acquisition module, the high-voltage acquisition module, and the signal isolation module respectively. It receives the low-voltage acquisition signal, the high-voltage acquisition signal, and the analog voltage divider acquisition signal. It performs analog-to-digital conversion on the analog voltage divider acquisition signal to obtain a digital voltage divider. It determines the state of the high-voltage circuit based on the low-voltage acquisition signal, the high-voltage acquisition signal, and the digital voltage divider, and prioritizes determining the state of the high-voltage circuit based on the state of the low-voltage acquisition signal and the state of the high-voltage acquisition signal.

[0013] Optionally, if the processing module cannot determine the state of the high-voltage circuit based on the state of the low-voltage acquisition signal and the state of the high-voltage acquisition signal, it further determines the state of the high-voltage circuit by combining the value of the digital voltage divider; when the state of the high-voltage circuit is a short high-voltage state, the signal isolation module is turned off, and the processing module stops receiving the analog voltage divider acquisition signal.

[0014] The processing module first determines the state of the high-voltage circuit based on the state of the low-voltage acquisition signal and the state of the high-voltage acquisition signal. If the state of the high-voltage circuit cannot be determined based on the state of the low-voltage acquisition signal and the state of the high-voltage acquisition signal, the processing module further determines the state of the high-voltage circuit by combining the value of the digital voltage divider. When the state of the high-voltage circuit is a short high-voltage state, the signal isolation module is turned off, and the processing module stops receiving the analog voltage divider acquisition signal.

[0015] Optionally, the high-pressure loop state detection circuit further includes a power protection module, which provides backflow protection for the power supply voltage.

[0016] Optionally, the power protection module includes a diode, and the power supply voltage is connected to the anode of the diode.

[0017] Optionally, the voltage divider module includes a first resistor, a second resistor, a third resistor, and a fourth resistor. One end of the first resistor is connected to the input terminal of the high-voltage circuit, and the other end of the first resistor is grounded. The cathode of the diode is grounded after passing through the second resistor, the third resistor, and the fourth resistor connected in series. The common terminal of the second resistor and the third resistor is connected to the output terminal of the high-voltage circuit, and the common terminal of the third resistor and the fourth resistor outputs the analog voltage divider.

[0018] Optionally, the low-voltage acquisition module includes a first comparator and a fifth resistor. The non-inverting input of the first comparator is connected to the analog voltage divider, the inverting input of the first comparator is connected to the first reference voltage, the output of the first comparator is connected to the operating voltage via the fifth resistor connected in series, and the output of the first comparator outputs the low-voltage acquisition signal.

[0019] Optionally, the high-voltage acquisition module includes a second comparator and a sixth resistor. The non-inverting input of the second comparator is connected to the second reference voltage, the inverting input of the second comparator is connected to the analog voltage divider, the output of the second comparator is connected to the operating voltage via the sixth resistor connected in series, and the output of the second comparator outputs the high-voltage acquisition signal.

[0020] Optionally, the signal isolation module includes an NPN transistor, a PNP transistor, and an operational amplifier. The emitter of the NPN transistor is grounded, the base of the NPN transistor is connected to the high-voltage acquisition signal, the collector of the NPN transistor is connected to the base of the PNP transistor, the emitter of the PNP transistor is connected to the analog voltage divider, the collector of the PNP transistor is connected to the non-inverting input of the operational amplifier, the inverting input of the operational amplifier is connected to the output of the operational amplifier, and the output of the operational amplifier outputs the analog voltage divider acquisition signal.

[0021] Optionally, the processing module performs interruption detection and level monitoring on the low-voltage acquisition signal, and the processing module performs interruption detection and level monitoring on the high-voltage acquisition signal.

[0022] Optionally, the second reference voltage is greater than the first reference voltage, and the state of the high-voltage circuit includes the short high-voltage state and the short ground state. The processing module is configured to: determine the state of the high-voltage circuit as the short high-voltage state when the low-voltage acquisition signal is high and the high-voltage acquisition signal is low; and determine the state of the high-voltage circuit as the short ground state when the low-voltage acquisition signal is low and the high-voltage acquisition signal is high.

[0023] Optionally, the state of the high-voltage circuit also includes a normal state and an open-circuit state. The processing module is configured to: when both the low-voltage acquisition signal and the high-voltage acquisition signal are at a high level, further determine whether the state of the high-voltage circuit is the normal state or the open-circuit state based on the value of the digital voltage divider.

[0024] An electric vehicle includes a high-pressure circuit state detection circuit as described in any one of the above claims and the high-voltage circuit, wherein the high-pressure circuit state detection circuit is connected to the high-voltage circuit and the state of the high-voltage circuit is detected by the high-pressure circuit state detection circuit.

[0025] The beneficial effects of this invention are as follows: A high-pressure loop status detection circuit is designed based on a voltage divider module, a low-voltage acquisition module, a high-voltage acquisition module, a signal isolation module, and a processing module. The processing module prioritizes judging the status of the high-voltage loop based on the status of the low-voltage acquisition signal and the high-voltage acquisition signal. In this way, in many cases, the status of the high-voltage loop can be quickly and effectively judged simply by relying on the status of the low-voltage acquisition signal obtained by the fast interrupt detection of the level. The status detection judgment no longer relies on the analog voltage divider acquisition signal acquired by the time-consuming ADC, which shortens the fault detection response time of the high-pressure loop status detection circuit and improves the real-time performance of the high-pressure loop status detection.

[0026] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not limit the invention. Attached Figure Description

[0027] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention. It is obvious that the drawings described below are merely some embodiments of the invention, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort. In the drawings:

[0028] Figure 1 A circuit diagram of a high-pressure loop state detection circuit shown as an exemplary embodiment of the present invention;

[0029] Figure 2 This is a schematic diagram of a high-voltage circuit as shown in an exemplary embodiment of the present invention;

[0030] Figure 3 This is a schematic diagram illustrating the connection between the high-pressure loop state detection circuit and the high-voltage loop, as shown in an exemplary embodiment of the present invention.

[0031] Figure 4The equivalent circuit diagram of the voltage divider module 1 in the normal state of the high-pressure circuit is shown in an exemplary embodiment of the present invention;

[0032] Figure 5 An equivalent circuit diagram of voltage divider module 1 in a short high voltage state, as shown in an exemplary embodiment of the present invention;

[0033] Figure 6 An equivalent circuit diagram of voltage divider module 1 with the high-pressure circuit in a short-ground state, as shown in an exemplary embodiment of the present invention;

[0034] Figure 7 The equivalent circuit diagram of voltage divider module 1 with the high-pressure circuit in an open-circuit state is shown as an exemplary embodiment of the present invention. Detailed Implementation

[0035] The embodiments of the present invention will be described below with reference to the accompanying drawings and preferred embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be understood that the preferred embodiments are only for illustrating the present invention and are not intended to limit the scope of protection of the present invention.

[0036] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0037] In the following description, numerous details are explored to provide a more thorough explanation of embodiments of the invention. However, it will be apparent to those skilled in the art that embodiments of the invention may be practiced without these specific details. In other embodiments, well-known structures and devices are shown in block diagram form rather than in detail to avoid obscuring embodiments of the invention.

[0038] As mentioned in the background section, the inventors discovered that the operating environment of various controllers in electric vehicles is extremely harsh, with most operating conditions involving vibration and shock. Short circuits, open circuits, and other abnormalities may occur in the connections between modules. In such cases, it is necessary to detect the connectivity of the circuit system. High-voltage circuit fault detection circuits are essential to ensure the safe operation of vehicle equipment and the safety of passengers. However, existing high-voltage circuit fault detection circuits for electric vehicles have many shortcomings. For example, one existing technology provides a high-voltage interlock detection device and system that detects the signal under test through the high-voltage interlock circuit. All signals are acquired through analog acquisition (AD acquisition). The acquired analog signals must first undergo analog-to-digital conversion to obtain the corresponding digital signals, which is time-consuming and has poor real-time performance. Furthermore, the acquired signals are directly connected to the power supply and the acquisition terminal, posing a risk of system breakdown by high-voltage signals. This does not solve the problem of safe operation of the controller and related equipment.

[0039] Based on this, the present invention proposes a simple and efficient high-pressure loop state detection technology: A high-pressure loop state detection circuit is designed by combining a voltage divider module, a low-voltage acquisition module, a high-voltage acquisition module, a signal isolation module, and a processing module. The voltage divider module divides the circuit voltage connected to the high-pressure loop to obtain an analog voltage divider. The low-voltage acquisition module acquires and compares the analog voltage divider to obtain a low-voltage acquisition signal. The high-voltage acquisition module acquires and compares the analog voltage divider to obtain a high-voltage acquisition signal. The signal isolation module isolates and acquires the analog voltage divider to obtain an analog voltage divider acquisition signal. The processing module receives the low-voltage acquisition signal, the high-voltage acquisition signal, and the digital voltage divider, and determines the state of the high-pressure loop based on these signals. The processing module prioritizes determining the state of the high-pressure loop based on the state of the low-voltage acquisition signal and the state of the high-voltage acquisition signal. If the state cannot be determined based on the low-voltage acquisition signal, the processing module will proceed with further determination. The status of the high-voltage circuit is determined by combining the status of the collected signals and the status of the high-voltage acquisition signals. Furthermore, the status is determined by combining the values ​​of the digital voltage divider, reducing the reliance on the time-consuming analog voltage divider acquisition signals from the ADC. The status of the high-voltage circuit can be quickly and effectively determined solely by the status of the low-voltage acquisition signals obtained from the fast interrupt detection, shortening the fault detection response time of the high-voltage circuit status detection circuit and improving its real-time performance. When a short-voltage fault occurs in the high-voltage circuit, the signal isolation module shuts down, and the processing module stops receiving analog voltage divider acquisition signals. This prevents the processing module from being damaged by the received high-voltage signals, improving the safety of the high-voltage circuit status detection circuit and ensuring the safe operation of related equipment such as electric vehicles. An additional power protection module is designed to protect the power supply voltage from backflow, ensuring that the power supply voltage is not affected by the high voltage during a short-voltage fault.

[0040] Specifically, embodiments of the present invention provide a high-pressure loop state detection circuit and an electric vehicle, which will be described in detail below.

[0041] like Figure 1 As shown, in an exemplary embodiment of the present invention, a high-pressure loop state detection circuit is provided, comprising:

[0042] Voltage divider module 1 is connected to the power supply voltage VBAT and the high voltage circuit. It performs voltage division on the circuit voltage connected to the voltage divider module in the high voltage circuit to obtain the simulated voltage divider voltage V0.

[0043] Low-voltage acquisition module 2 is connected to voltage divider module 1 and compares the analog voltage divider voltage V0 with the first reference voltage VREF1 to obtain low-voltage acquisition signal V1.

[0044] High voltage acquisition module 3 is connected to voltage divider module 1. It compares the analog voltage divider voltage V0 with the second reference voltage VREF2 to obtain the high voltage acquisition signal V2.

[0045] Signal isolation module 4 is connected to voltage divider module 1 and high voltage acquisition module 3 respectively. Under the control of high voltage acquisition signal V2, it isolates and acquires the analog voltage divider voltage V0 to obtain analog voltage divider acquisition signal V3.

[0046] Processing module 5 is connected to low-voltage acquisition module 2, high-voltage acquisition module 3 and signal isolation module 4 respectively. It receives low-voltage acquisition signal V1, high-voltage acquisition signal V2 and analog voltage divider acquisition signal V3. It performs analog-to-digital conversion on analog voltage divider acquisition signal V3 to obtain digital voltage divider voltage. It judges the state of high-voltage circuit by low-voltage acquisition signal V1, high-voltage acquisition signal V2 and digital voltage divider voltage, and prioritizes judging the state of high-voltage circuit based on the state of low-voltage acquisition signal V1 and high-voltage acquisition signal V2.

[0047] The processing module 5 prioritizes determining the state of the high-voltage circuit based on the states of the low-voltage acquisition signal V1 and the high-voltage acquisition signal V2. If the state of the high-voltage circuit can be determined based on these two signals, the state can be quickly and effectively determined using only the low-voltage acquisition signal V1 and the high-voltage acquisition signal V2 obtained from the fast interrupt detection. The state detection no longer relies on the time-consuming analog voltage divider acquisition signal V3 acquired by the ADC, thus shortening the fault detection response time of the high-voltage circuit state detection circuit and improving the real-time performance of the high-voltage circuit state detection. If the state of the high-voltage circuit cannot be determined based on the states of the low-voltage acquisition signal V1 and the high-voltage acquisition signal V2, the state of the high-voltage circuit is further determined by combining the value of the digital voltage divider. When the state of the high-voltage circuit is a short high-voltage state, the signal isolation module 4 is turned off, and the processing module 5 stops receiving the analog voltage divider acquisition signal V3.

[0048] In detail, such as Figure 1 As shown, the high-pressure loop state detection circuit also includes a power protection module 6, which provides backflow protection for the power supply voltage VBAT.

[0049] More in detail, such as Figure 1 As shown, the power protection module 6 includes a diode D1, and the power supply voltage VBAT is connected to the anode of the diode D1.

[0050] In detail, such as Figure 1 As shown, the voltage divider module 1 includes a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. One end of the first resistor R1 is connected to the input terminal in of the high-voltage circuit, and the other end of the first resistor R1 is grounded to GND. The cathode of the diode D1 is grounded to GND after passing through the second resistor R2, the third resistor R3, and the fourth resistor R4 connected in series. The common terminal of the second resistor R2 and the third resistor R3 is connected to the output terminal out of the high-voltage circuit. The common terminal of the third resistor R3 and the fourth resistor R4 outputs an analog voltage divider voltage V0.

[0051] In detail, such as Figure 1 As shown, the low-voltage acquisition module 2 includes a first comparator U1 and a fifth resistor R5. The non-inverting input of the first comparator U1 is connected to the analog voltage divider V0, and the inverting input of the first comparator U1 is connected to the first reference voltage VREF1. The output of the first comparator U1 is connected to the working voltage VCC after passing through the fifth resistor R5 in series. The output of the first comparator U1 outputs the low-voltage acquisition signal V1.

[0052] In detail, such as Figure 1 As shown, the high voltage acquisition module 3 includes a second comparator U2 and a sixth resistor R6. The non-inverting input of the second comparator U2 is connected to the second reference voltage VREF2, and the inverting input of the second comparator U2 is connected to the analog voltage divider V0. The output of the second comparator U2 is connected to the working voltage VCC after passing through the sixth resistor R6 in series. The output of the second comparator U2 outputs the high voltage acquisition signal V2.

[0053] The second reference voltage VREF2 is greater than the first reference voltage VREF1.

[0054] In detail, such as Figure 1As shown, the signal isolation module 4 includes an NPN transistor Q1, a PNP transistor Q2, and an operational amplifier U3. The emitter of the NPN transistor Q1 is grounded to GND, the base of the NPN transistor Q1 is connected to the high-voltage acquisition signal V2, the collector of the NPN transistor Q1 is connected to the base of the PNP transistor Q2, the emitter of the PNP transistor Q2 is connected to the analog voltage divider V0, the collector of the PNP transistor Q2 is connected to the non-inverting input of the operational amplifier U3, the inverting input of the operational amplifier U3 is connected to the output of the operational amplifier U3, and the output of the operational amplifier U3 outputs the analog voltage divider acquisition signal V3.

[0055] In detail, the processing module 5 is an integrated chip that includes multiple functions such as interrupt detection (rising edge detection and falling edge detection), level detection, ADC acquisition (converting the acquired analog signal into a digital signal), flash storage, clock (OSC) function, digital calculation function, logic judgment function, and alarm output function. It can be a microcontroller unit (MCU) or a single-chip microcomputer (SCM), which is not limited here.

[0056] More specifically, processing module 5 performs interruption detection and level monitoring on the low-voltage acquisition signal V1, processing module 5 performs interruption detection and level monitoring on the high-voltage acquisition signal V2, and processing module 5 performs analog-to-digital conversion on the analog voltage divider acquisition signal V3 to obtain the digital voltage divider. Processing module 5 combines the low-voltage acquisition signal V1, the high-voltage acquisition signal V2, and the digital voltage divider, and determines the state of the high-voltage circuit based on the free combination of the low-voltage acquisition signal V1, the high-voltage acquisition signal V2, and the digital voltage divider.

[0057] It should be noted that the state of the high-voltage circuit includes at least the normal state, open circuit state, short high-voltage state, and short ground state. The processing module 5 is configured to: first determine the state of the high-voltage circuit based on the state of the low-voltage acquisition signal V1 and the state of the high-voltage acquisition signal V2. If the state of the high-voltage circuit can be determined based on the state of the low-voltage acquisition signal V1 and the high-voltage acquisition signal V2, then it is not necessary to acquire and receive the analog voltage divider acquisition signal V3, and the state of the high-voltage circuit can be determined quickly and efficiently, shortening the fault detection response time of the high-voltage circuit state detection circuit. If the state of the high-voltage circuit cannot be determined based on the state of the low-voltage acquisition signal V1 and the high-voltage acquisition signal V2, then it is necessary to acquire and receive the analog voltage divider acquisition signal V3 and perform analog-to-digital conversion to obtain the digital voltage divider voltage, and further determine the state of the high-voltage circuit based on the value of the digital voltage divider voltage.

[0058] In detail, such as Figure 1As shown, when the state of the low-voltage acquisition signal V1 and the state of the high-voltage acquisition signal V2 are mutually exclusive (one is high level and the other is low level), the processing module 5 determines whether the state of the high-voltage circuit is a short high-voltage state or a short ground state based on the state of the low-voltage acquisition signal V1 and the state of the high-voltage acquisition signal V2; when both the low-voltage acquisition signal V1 and the high-voltage acquisition signal V2 are high level, the processing module 5 further determines whether the state of the high-voltage circuit is a normal state or an open circuit state based on the magnitude of the digital voltage divider.

[0059] More in detail, such as Figure 1 As shown, the processing module 5 is configured to: determine the state of the high voltage circuit as short high voltage state when the low voltage acquisition signal V1 is high level and the high voltage acquisition signal V2 is low level; and determine the state of the high voltage circuit as short ground state when the low voltage acquisition signal V1 is low level and the high voltage acquisition signal V2 is high level.

[0060] More in detail, such as Figure 1 As shown, the processing module 5 is configured to: when both the low-voltage acquisition signal V1 and the high-voltage acquisition signal V2 are at a high level, further determine whether the value of the digital voltage divider is in the first range or the second range. If the value of the digital voltage divider is in the first range, determine that the state of the high-voltage circuit is normal. If the value of the digital voltage divider is in the second range, determine that the state of the high-voltage circuit is open.

[0061] More in detail, such as Figures 2-7 As shown, Figure 1 The working principle of the high-pressure loop state detection circuit shown is analyzed below.

[0062] 1) A schematic diagram of the high-voltage circuit under test is shown below. Figure 2 As shown, the high-voltage circuit includes N high-voltage components connected in series (i.e., high-voltage component 1, high-voltage component 2, ..., high-voltage component N-1 and high-voltage component N, where N is an integer greater than or equal to 2). The high-voltage circuit status detection circuit is connected to the high-voltage circuit under test, as shown below. Figure 1 and Figure 3 As shown, the input terminal in and the output terminal out of the high-voltage circuit are connected to the voltage divider module 1, respectively, and the resistance of the high-voltage circuit can be ignored.

[0063] 2) When the high-voltage circuit is in normal condition, the first reference voltage VREF1 < the analog voltage divider V0 < the second reference voltage VREF2; the analog voltage divider V0 > the first reference voltage VREF1. The low-voltage acquisition signal V1 output by the first comparator U1 in the low-voltage acquisition module 2 is high. The analog voltage divider V0 < the second reference voltage VREF2. The high-voltage acquisition signal V2 output by the second comparator U2 in the high-voltage acquisition module 3 is also high. At this time, diode D1 is turned on, NPN transistor Q1 is turned on, PNP transistor Q2 is also turned on, signal isolation module 4 is turned on, the voltage drop of PNP transistor Q2 can be approximated as 0, and the voltage drop of diode D1 is denoted as VD1 (generally 0.7V). The equivalent circuit diagram of voltage divider module 1 is as follows: Figure 4 As shown, the analog voltage divider V0 is connected to a voltage follower consisting of a PNP transistor Q2 and an operational amplifier U3. The digital voltage divider corresponding to the analog voltage divider acquisition signal V3 is obtained through the ADC (analog-to-digital converter) of processing module 5. The theoretical value of this digital voltage divider is calculated using the following formula:

[0064]

[0065] At this point, the actual value U of the digital voltage divider is further compared by the processing module 5. ADC The state of the high-voltage circuit can be determined by comparing the voltage with the theoretical value of the digital voltage divider. Considering the voltage divider resistor and the analog-to-digital sampling accuracy, let the error be ± When (corresponding to the first range), the high-voltage circuit is in normal condition.

[0066] 3) When an abnormality occurs in the high-voltage circuit and the high-voltage signal VBB (short high voltage) is shorted, the high-voltage signal VBB is greater than the power supply voltage VBAT. Diode D1 is cut off to prevent the high-voltage signal VBB from having a reverse flow effect on the power supply voltage VBAT. The simulated voltage divider V0 is too large, making the first reference voltage VREF1 < the second reference voltage VREF2 < the simulated voltage divider V0. The simulated voltage divider V0 > the first reference voltage VREF1, so the low-voltage acquisition signal V1 output by the first comparator U1 in the low-voltage acquisition module 2 is at a high level. The simulated voltage divider V0 > the second reference voltage VREF2, so the high-voltage acquisition signal V2 output by the second comparator U2 in the high-voltage acquisition module 3 is at a low level. At this time, NPN transistor Q1 is cut off, PNP transistor Q2 is also cut off, signal isolation module 4 is turned off, and processing module 5 does not perform simulated sampling. The equivalent circuit diagram of voltage divider module 1 is as follows. Figure 5 As shown, the formula for calculating the simulated voltage divider voltage V0 is as follows:

[0067]

[0068] At this time, the processing module 5 detects that the high voltage acquisition signal V2 output by the second comparator U2 in the high voltage acquisition module 3 changes from high to low and generates a falling edge, generating an IO interrupt. The processing module 5 immediately processes the circuit abnormal information and continuously detects the level information of the low voltage acquisition signal V1 and the high voltage acquisition signal V2, and issues an alarm to indicate that the high voltage circuit is in a short high voltage state. Until the processing module 5 detects that the high voltage acquisition signal V2 output by the second comparator U2 changes from low to high and generates a rising edge, and remains at a high level, the short-circuit high voltage abnormal state is released.

[0069] 4) When an abnormality occurs in the high-voltage circuit and it is shorted to ground, diode D1 conducts. The equivalent circuit diagram of voltage divider module 1 is as follows: Figure 6 As shown, the simulated voltage divider V0 is 0, making the simulated voltage divider V0 < the first reference voltage VREF1 < the second reference voltage VREF2. When the simulated voltage divider V0 < the first reference voltage VREF1, the low-voltage acquisition signal V1 output by the first comparator U1 in the low-voltage acquisition module 2 is at a low level. When the simulated voltage divider V0 < the second reference voltage VREF2, the high-voltage acquisition signal V2 output by the second comparator U2 in the high-voltage acquisition module 3 is at a high level. At this time, NPN transistor Q1 is turned on, PNP transistor Q2 is also turned on, signal isolation module 4 is turned on, and the simulated voltage divider acquisition signal V3 obtained by the processing module 5 is also 0.

[0070] At this time, the processing module 5 detects that the low-voltage acquisition signal V1 output by the first comparator U1 in the low-voltage acquisition module 2 changes from high to low and generates a falling edge, generating an IO interrupt. The processing module 5 immediately processes the circuit abnormality information and continuously detects the level information of the low-voltage acquisition signal V1 and the high-voltage acquisition signal V2, and issues an alarm to indicate that the high-voltage circuit is in a short-ground state. The short-ground abnormal state is lifted when the processing module 5 detects that the low-voltage acquisition signal V1 output by the first comparator U1 changes from low to high and generates a rising edge, and remains at a high level.

[0071] 5) When the high-voltage circuit malfunctions and becomes open, the first reference voltage VREF1 < the analog voltage divider V0 < the second reference voltage VREF2; the analog voltage divider V0 > the first reference voltage VREF1. The low-voltage acquisition signal V1 output by the first comparator U1 in the low-voltage acquisition module 2 is high. The analog voltage divider V0 < the second reference voltage VREF2. The high-voltage acquisition signal V2 output by the second comparator U2 in the high-voltage acquisition module 3 is also high. At this time, diode D1 is turned on, NPN transistor Q1 is turned on, and PNP transistor Q2 is also turned on. The signal isolation module 4 is activated. The voltage drop of PNP transistor Q2 can be approximated as 0. The voltage drop of diode D1 is denoted as VD1 (typically 0.7V). The equivalent circuit diagram of voltage divider module 1 is shown below. Figure 7As shown, the analog voltage divider V0 is connected to a voltage follower consisting of a PNP transistor Q2 and an operational amplifier U3. The digital voltage divider corresponding to the analog voltage divider acquisition signal V3 is obtained through the ADC (analog-to-digital converter) of processing module 5. The theoretical value of this digital voltage divider is calculated using the following formula:

[0072]

[0073] At this point, the actual value U of the digital voltage divider is further compared by the processing module 5. ADC By comparing the theoretical value of the digital voltage divider, the state of the high-voltage circuit can be determined. Considering the voltage divider resistor and the analog-to-digital sampling accuracy, let the error be ±5%. When (corresponding to the second range), the high-voltage circuit is in an open circuit state.

[0074] Based on this, the high-voltage circuit status test table is shown below.

[0075]

[0076]

[0077] As shown in the table above, when processing module 5 determines the state of the high-voltage circuit based on the states of the low-voltage acquisition signal V1 and the high-voltage acquisition signal V2: if the low-voltage acquisition signal V1 is high and the high-voltage acquisition signal V2 is low, the high-voltage circuit is determined to be in a short-high voltage state; if the low-voltage acquisition signal V1 is low and the high-voltage acquisition signal V2 is high, the high-voltage circuit is determined to be in a short-ground state; if both the low-voltage acquisition signal V1 and the high-voltage acquisition signal V2 are high, the system further combines the value of the digital voltage divider acquired by the ADC for judgment. If the value of the digital voltage divider is within the first range... The internal system determines that the high-voltage circuit is in a normal state; if the value of the digital voltage divider is in the second range... The internal system determines that the high-voltage circuit is in an open-circuit state.

[0078] Understandably, in situations where the timeliness of state detection is not critical, processing module 5 can directly use the actual value U of the digital voltage divider obtained from the ADC with a longer sampling time. ADC The determination of partial states (such as normal state, open circuit state, and short ground state) is not limited here.

[0079] Furthermore, when the analog voltage divider acquisition signal V3 is greater than or equal to the second reference voltage VREF2, NPN transistor Q1 is cut off, and PNP transistor Q2 is also cut off, thus turning off signal isolation module 4. When the analog voltage divider acquisition signal V3 is less than the second reference voltage VREF2, NPN transistor Q1 is turned on, and PNP transistor Q2 is also turned on, thus turning on signal isolation module 4. This ensures that the ADC acquisition input of processing module 5 is less than the second reference voltage VREF2, effectively protecting the analog input port (i.e., the ADC acquisition port) of processing module 5. The power protection module 6, composed of diode D1, cuts off when the high-voltage circuit is mistakenly connected to the high-voltage signal VBB, ensuring that the high-voltage signal VBB has no effect on the power supply voltage VBAT.

[0080] In the aforementioned high-voltage circuit status detection circuit, the processing module prioritizes determining the high-voltage circuit status based on the status of the low-voltage and high-voltage acquisition signals. For short-voltage or short-ground states, the specific status of the high-voltage circuit can be directly determined based on the status of the low-voltage and high-voltage acquisition signals, reducing the reliance on the time-consuming analog voltage divider acquisition signals acquired by the ADC for status detection. The status of the high-voltage circuit can be quickly and effectively determined solely by the status of the low-voltage and high-voltage acquisition signals obtained through rapid level interrupt detection, shortening the fault detection response time of the high-voltage circuit status detection circuit and improving the real-time performance of high-voltage circuit status detection. For states where the status of the high-voltage circuit cannot be determined based on the status of the low-voltage and high-voltage acquisition signals (i.e., normal state and open circuit state), it is necessary to further combine the values ​​of the digital voltage divider to determine the specific status of the high-voltage circuit. When a short-voltage fault occurs in the high-voltage circuit, the signal isolation module shuts down, and the processing module stops receiving analog voltage divider acquisition signals. This prevents the processing module from being damaged by the high-voltage signal it receives, improving the safety of the high-voltage circuit status detection circuit and ensuring the safe operation of related equipment such as electric vehicles. An additional power protection module is designed to protect the power supply voltage from backflow, so that the power supply voltage is not affected by the high voltage during a short-voltage fault.

[0081] Based on the design concept of the power module controller described above, in another exemplary embodiment of the present invention, an electric vehicle is proposed, including the high-pressure loop state detection circuit and the high-voltage loop. The high-pressure loop state detection circuit is connected to the high-voltage loop and detects the state of the high-voltage loop through the high-pressure loop state detection circuit.

[0082] In the aforementioned electric vehicle, the design logic of the processing module prioritizing the status of the low-voltage and high-voltage acquisition signals to determine the status of the high-voltage circuit allows for direct determination of the specific status of the high-voltage circuit based on these signals, especially in cases of short high-voltage or short-to-ground conditions. This reduces the reliance on time-consuming analog voltage divider acquisition signals from the ADC for status detection. The status of the high-voltage circuit can be quickly and effectively determined solely by the status of the low-voltage and high-voltage acquisition signals obtained through rapid level interrupt detection, shortening the fault detection response time of the high-voltage circuit status detection circuit and improving its real-time performance. When a short high-voltage fault occurs in the high-voltage circuit, the signal isolation module shuts down, and the processing module stops receiving analog voltage divider acquisition signals. This prevents the processing module from being damaged by the received high-voltage signal, improving the safety of the high-voltage circuit status detection circuit and ensuring the safe operation of the electric vehicle. An additional power protection module is designed to provide backflow protection for the power supply voltage, ensuring that the power supply voltage is not affected by the high voltage during a short high-voltage fault, further guaranteeing the safe operation of the electric vehicle.

[0083] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A high-pressure loop state detection circuit, characterized in that, include: The voltage divider module is connected to the power supply voltage and the high-voltage circuit. It performs voltage division on the circuit voltage connected to the voltage divider module in the high-voltage circuit to obtain a simulated voltage divider. A low-voltage acquisition module is connected to the voltage divider module and compares the analog voltage divider voltage with the first reference voltage to obtain a low-voltage acquisition signal. A high-voltage acquisition module, connected to the voltage divider module, compares the analog voltage divider voltage with a second reference voltage to obtain a high-voltage acquisition signal; A signal isolation module is connected to the voltage divider module and the high voltage acquisition module respectively. Under the control of the high voltage acquisition signal, the analog voltage divider is isolated and acquired to obtain the analog voltage divider acquisition signal. The processing module is connected to the low-voltage acquisition module, the high-voltage acquisition module, and the signal isolation module respectively. It receives the low-voltage acquisition signal, the high-voltage acquisition signal, and the analog voltage divider acquisition signal. It performs analog-to-digital conversion on the analog voltage divider acquisition signal to obtain a digital voltage divider. It determines the state of the high-voltage circuit based on the low-voltage acquisition signal, the high-voltage acquisition signal, and the digital voltage divider, and prioritizes determining the state of the high-voltage circuit based on the state of the low-voltage acquisition signal and the state of the high-voltage acquisition signal. If the processing module cannot determine the state of the high-voltage circuit based on the state of the low-voltage acquisition signal and the state of the high-voltage acquisition signal, it further determines the state of the high-voltage circuit by combining the value of the digital voltage divider. When the state of the high-voltage circuit is a short high-voltage state, the signal isolation module is turned off, and the processing module stops receiving the analog voltage divider acquisition signal. The processing module performs interruption detection and level monitoring on the low-voltage acquisition signal, and the processing module performs interruption detection and level monitoring on the high-voltage acquisition signal; The high-pressure loop state detection circuit also includes a power protection module, which includes a diode, and the power supply voltage is connected to the anode of the diode.

2. The high-pressure loop state detection circuit according to claim 1, characterized in that, The power protection module provides backflow protection for the power supply voltage.

3. The high-pressure loop state detection circuit according to claim 1, characterized in that, The voltage divider module includes a first resistor, a second resistor, a third resistor, and a fourth resistor. One end of the first resistor is connected to the input terminal of the high-voltage circuit, and the other end of the first resistor is grounded. The cathode of the diode is grounded after passing through the second resistor, the third resistor, and the fourth resistor connected in series. The common terminal of the second resistor and the third resistor is connected to the output terminal of the high-voltage circuit. The common terminal of the third resistor and the fourth resistor outputs the analog voltage divider.

4. The high-pressure loop state detection circuit according to claim 1, characterized in that, The low-voltage acquisition module includes a first comparator and a fifth resistor. The non-inverting input of the first comparator is connected to the analog voltage divider, the inverting input of the first comparator is connected to the first reference voltage, the output of the first comparator is connected to the operating voltage via the fifth resistor connected in series, and the output of the first comparator outputs the low-voltage acquisition signal.

5. The high-pressure loop state detection circuit according to claim 4, characterized in that, The high-voltage acquisition module includes a second comparator and a sixth resistor. The non-inverting input of the second comparator is connected to the second reference voltage, the inverting input of the second comparator is connected to the analog voltage divider, the output of the second comparator is connected to the operating voltage via the sixth resistor connected in series, and the output of the second comparator outputs the high-voltage acquisition signal.

6. The high-pressure loop state detection circuit according to claim 5, characterized in that, The signal isolation module includes an NPN transistor, a PNP transistor, and an operational amplifier. The emitter of the NPN transistor is grounded, the base of the NPN transistor is connected to the high-voltage acquisition signal, the collector of the NPN transistor is connected to the base of the PNP transistor, the emitter of the PNP transistor is connected to the analog voltage divider, the collector of the PNP transistor is connected to the non-inverting input of the operational amplifier, the inverting input of the operational amplifier is connected to the output of the operational amplifier, and the output of the operational amplifier outputs the analog voltage divider acquisition signal.

7. The high-pressure loop state detection circuit according to claim 4, characterized in that, The second reference voltage is greater than the first reference voltage. The state of the high-voltage circuit includes the short high-voltage state and the short ground state. The processing module is configured to: determine the state of the high-voltage circuit as the short high-voltage state when the low-voltage acquisition signal is high and the high-voltage acquisition signal is low; and determine the state of the high-voltage circuit as the short ground state when the low-voltage acquisition signal is low and the high-voltage acquisition signal is high.

8. The high-pressure loop state detection circuit according to claim 7, characterized in that, The state of the high-voltage circuit also includes a normal state and an open circuit state. The processing module is configured to: when both the low-voltage acquisition signal and the high-voltage acquisition signal are at a high level, further determine whether the state of the high-voltage circuit is the normal state or the open circuit state based on the value of the digital voltage divider.

9. An electric vehicle, characterized in that, It includes a high-pressure loop status detection circuit as described in any one of claims 1-8 and the high-voltage loop, wherein the high-pressure loop status detection circuit is connected to the high-voltage loop and the status of the high-voltage loop is detected by the high-pressure loop status detection circuit.

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