FPGA-based telephone online detection device, method, controller and storage medium

Abstract

The present invention discloses an FPGA-based telephone online detection device, method, controller and computer storage medium. The device includes a user interface circuit unit and an FPGA processing unit. The FPGA processing unit is used to obtain an SHK signal through the user interface circuit unit and send a test digital signal to the user interface circuit unit; the user interface circuit unit is used to convert the test digital signal into an analog signal, and convert the analog signal into a feedback digital signal through an inverting operational amplifier circuit, a telephone line interface and an addition and subtraction operational amplifier circuit; the FPGA processing unit is used to determine whether a telephone is connected to the telephone line corresponding to the telephone line interface. This allows the application to realize the online detection function without the need for additional circuits and equipment, thereby reducing equipment costs and being used on small-volume telephone exchanges or transmission equipment, thereby effectively performing telephone online detection.

Description

Technical Field

[0001] The present application relates to the technical field of data push, and in particular to an FPGA-based telephone online detection device, an FPGA-based telephone online detection method, a controller, and a computer storage medium. Background Art

[0002] In the existing technology, telephone online detection technology is used to detect whether a telephone is connected to a telephone line. The traditional solution is to use a "112 measurement station" for detection. The "112 measurement station" is a dedicated measurement device. Usually, during the device design, a relay switching circuit is added to the device circuit. By controlling the relay to conduct, the telephone line to be tested is switched to the interface on the measurement station. The measurement station interface is connected to the test port of the measurement station. The "112 measurement station" tests each telephone line separately. During the test, the telephone line is in an offline state.

[0003] However, due to the complex circuitry of traditional testing solutions and the need for a "112 measurement station" to perform online phone testing, these solutions are only available on critical large switches or transmission equipment, but cannot provide real-time online testing. Furthermore, large switches are bulky and expensive, making them difficult to effectively perform online phone testing. Summary of the Invention

[0004] The embodiments of the present application provide an FPGA-based telephone online detection device, an FPGA-based telephone online detection method, a controller, and a computer storage medium, which can at least ensure that the present application solution obtains an SHK signal through a user interface circuit unit and an FPGA processing unit, sends a test digital signal to the user interface circuit unit, obtains a feedback digital signal, and determines whether a telephone is connected to the telephone line corresponding to the telephone line interface based on the feedback digital signal and the test digital signal. Without using additional circuits (relay switching circuits) and equipment (112 measuring stations), the telephone online detection function can be implemented by software only, thereby reducing equipment costs and being able to be used on small-volume telephone exchanges or transmission equipment, thereby effectively performing telephone online detection.

[0005] In a first aspect, an embodiment of the present application provides an FPGA-based telephone online detection device, the device comprising a user interface circuit unit and an FPGA processing unit, the FPGA processing unit being connected to a telephone line via the user interface circuit unit, the user interface circuit unit comprising an inverting operational amplifier circuit, an addition and subtraction operational amplifier circuit, and a telephone line interface;

[0006] The FPGA processing unit is used to obtain the SHK signal through the user interface circuit unit and send a test digital signal to the user interface circuit unit;

[0007] The user interface circuit unit is used to convert the test digital signal into an analog signal, and convert the analog signal into a feedback digital signal through the inverting operational amplifier circuit, the telephone line interface and the addition and subtraction operational amplifier circuit, so as to send the feedback digital signal to the FPGA processing unit;

[0008] The FPGA processing unit is used to determine that a telephone is connected to the telephone line corresponding to the telephone line interface when the signal peak value of the feedback digital signal is lower than the signal peak value of the test digital signal.

[0009] In some embodiments, the user interface circuit unit further includes an isolation signal driving circuit and the PCM codec chip, the PCM codec chip is respectively connected to the inverting operational amplifier circuit and the addition and subtraction operational amplifier circuit, the inverting operational amplifier circuit is connected to the isolation signal driving circuit, the isolation signal driving circuit is connected to one end of the telephone line interface, and the other end of the telephone line interface is connected to the addition and subtraction operational amplifier circuit;

[0010] The PCM codec chip is used to convert the test digital signal into a first analog signal, and the inverting operational amplifier circuit is used to amplify the analog signal to send a second analog signal to the isolation signal driving circuit;

[0011] The isolated signal driving circuit is used to allow the second analog signal to pass through the telephone line interface to send a third analog signal to the addition and subtraction operational amplifier circuit;

[0012] The addition and subtraction operational amplifier circuit receives the third analog signal and outputs a fourth analog signal, so that the PCM codec chip obtains the feedback digital signal according to the fourth analog signal and sends the feedback digital signal to the FPGA processing unit.

[0013] In some embodiments, the FPGA processing unit includes a storage unit, a verification unit, and a sequence generation unit, the storage unit is connected to the verification unit and the sequence generation unit respectively, and the verification unit is connected to the sequence generation unit;

[0014] The sequence generating unit is used to obtain the test digital signal according to the preset signal data in the storage unit, and send the test digital signal to the PCM codec chip;

[0015] The verification unit is used to receive the feedback digital signal, compare the feedback digital signal with the test digital signal, and determine that a telephone is connected to the telephone line corresponding to the telephone line interface when the signal peak value of the feedback digital signal is lower than the signal peak value of the test digital signal.

[0016] In some embodiments, the user interface circuit unit further includes an on-hook detection module, one end of the on-hook detection module is connected to the telephone line interface, and the other end is grounded;

[0017] The on / off detection module is used to send the SHK signal to the verification unit in the FPGA processing unit, so that the FPGA processing unit obtains the SHK signal through the user interface circuit unit and sends a test digital signal to the user interface circuit unit.

[0018] In some embodiments, the test digital signal is a PCM digital signal with a frequency of 1KHz and a peak value of 2V; the peak value of the second analog signal is 4V; when a telephone is connected to the telephone line corresponding to the telephone line interface, the first peak value of the fourth analog signal is less than 2V; when no telephone is connected to the telephone line corresponding to the telephone line interface, the second peak value of the fourth analog signal is greater than the first peak value.

[0019] In some embodiments, the FPGA processing unit is used to receive feedback digital signals of multiple signal cycles, and obtain an average digital signal based on the feedback digital signals of multiple signal cycles. When the signal peak value of the average digital signal is lower than the signal peak value of the test digital signal, and the difference is greater than or equal to 10% of the signal peak value of the test digital signal, it is determined that a telephone is connected to the telephone line corresponding to the telephone line interface.

[0020] In some embodiments, the isolation signal driving circuit includes a transistor Q1, a diode D1, a diode D2, a resistor R10 and a capacitor C5;

[0021] The emitter of the transistor Q1 is connected to R10 and the addition and subtraction operational amplifier circuit, the collector of the transistor Q1 is connected to the feed voltage, the base of the transistor Q1 is connected to the inverting operational amplifier circuit through the capacitor C5, D1 and D2 are used to provide a base drive current for the transistor Q1 to turn on the transistor Q1, so that the second analog signal is grounded through the resistor R10, the telephone line interface and the resistor R9 in sequence.

[0022] In a second aspect, an embodiment of the present application provides an FPGA-based telephone online detection method, which is applied to an FPGA-based telephone online detection device, the device including a user interface circuit unit and an FPGA processing unit, the FPGA processing unit being connected to a telephone line via the user interface circuit unit, the user interface circuit unit including an inverting operational amplifier circuit, an addition and subtraction operational amplifier circuit, and a telephone line interface, the method comprising:

[0023] The FPGA processing unit obtains the SHK signal through the user interface circuit unit and sends a test digital signal to the user interface circuit unit;

[0024] The user interface circuit unit converts the test digital signal into an analog signal, and converts the analog signal into a feedback digital signal through the inverting operational amplifier circuit, the telephone line interface, and the addition and subtraction operational amplifier circuit, so as to send the feedback digital signal to the FPGA processing unit;

[0025] The FPGA processing unit determines that a telephone is connected to the telephone line corresponding to the telephone line interface when the signal peak value of the feedback digital signal is lower than the signal peak value of the test digital signal.

[0026] In a third aspect, an embodiment of the present application provides a controller comprising a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, the FPGA-based telephone online detection method as described in any one of the embodiments in the second aspect is implemented.

[0027] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are used to execute the FPGA-based telephone online detection method as described in any one of the embodiments in the second aspect.

[0028] The present application has at least the following beneficial effects: an embodiment of the present application provides an FPGA-based telephone online detection device, the device comprising a user interface circuit unit and an FPGA processing unit, the FPGA processing unit being connected to a telephone line through the user interface circuit unit, the user interface circuit unit comprising an inverting operational amplifier circuit, an addition-subtraction operational amplifier circuit, and a telephone line interface; the FPGA processing unit being configured to obtain an SHK signal through the user interface circuit unit and to send a test digital signal to the user interface circuit unit; the user interface circuit unit being configured to convert the test digital signal into an analog signal, and to convert the analog signal into a feedback digital signal through the inverting operational amplifier circuit, the telephone line interface, and the addition-subtraction operational amplifier circuit, so as to send the feedback digital signal to the FPGA processing unit; the FPGA processing unit being configured to determine, when a peak value of the feedback digital signal is lower than a peak value of the test digital signal, that a telephone is connected to the telephone line corresponding to the telephone line interface, so that the present application can realize the telephone online detection function only by software without requiring additional circuits (relay switching circuits) and equipment (112 measuring stations), thereby reducing equipment costs and being able to be used on small-volume telephone exchanges or transmission equipment, thereby effectively performing telephone online detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 This is a schematic diagram of a telephone online detection device based on FPGA proposed in one embodiment of the present application;

[0030] Figure 2 Another schematic diagram of an FPGA-based telephone online detection device proposed in another embodiment of the present application;

[0031] Figure 3 This is a circuit diagram of a telephone online detection device based on FPGA proposed in another embodiment of the present application;

[0032] Figure 4 This is a flowchart of a telephone online detection method based on FPGA proposed in another embodiment of the present application;

[0033] Figure 5 This is a structural diagram of a controller proposed in another embodiment of the present application. DETAILED DESCRIPTION

[0034] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0035] In some embodiments, although the device schematics illustrate functional module divisions and the flowcharts illustrate logical sequences, in some cases, the steps shown or described may be performed in a sequence that differs from the module divisions in the device or the sequence in the flowcharts. The terms "first," "second," and so on in the specification, claims, and drawings are used to distinguish similar items and are not necessarily used to describe a specific sequence or precedence.

[0036] Currently, existing technology for online phone detection is used to detect whether a phone is connected to a phone line. Traditionally, this approach uses a "112 test station." This is a specialized measuring device. Typically, a relay switching circuit is added to the device during device design. By controlling the relay, the telephone line to be tested is switched to an interface on the test station. The interface is then connected to a test port on the test station. The "112 test station" then tests each telephone line individually, while the line remains offline during testing. However, due to the complex circuitry of this traditional detection solution and the requirement for a "112 test station," online phone detection functionality is only available in some large, critical switches or transmission equipment, but it cannot provide real-time online testing. Furthermore, large switches are bulky and expensive, hindering effective online phone detection.

[0037] To at least solve the above-mentioned problems, the present application discloses an FPGA-based telephone online detection device, comprising a user interface circuit unit and an FPGA processing unit. The FPGA processing unit is connected to a telephone line via the user interface circuit unit, and the user interface circuit unit comprises an inverting operational amplifier circuit, an addition-subtraction operational amplifier circuit, and a telephone line interface. The FPGA processing unit is configured to obtain an SHK signal via the user interface circuit unit and send a test digital signal to the user interface circuit unit. The user interface circuit unit is configured to convert the test digital signal into an analog signal, and then convert the analog signal into a feedback digital signal via the inverting operational amplifier circuit, the telephone line interface, and the addition-subtraction operational amplifier circuit, so as to send the feedback digital signal to the FPGA processing unit. The FPGA processing unit is configured to determine that a telephone is connected to the telephone line corresponding to the telephone line interface when a peak value of the feedback digital signal is lower than a peak value of the test digital signal. This allows the present application to implement the telephone online detection function using only software without requiring additional circuits (relay switching circuits) or equipment (112 measurement stations), thereby reducing equipment costs and being usable on small-volume telephone switching or transmission equipment, thereby effectively performing telephone online detection.

[0038] The embodiments of the present application are further described below in conjunction with the accompanying drawings.

[0039] refer to Figure 1 , Figure 1 This is a schematic diagram of an FPGA-based telephone online detection device proposed in one embodiment of the present application. In some embodiments, the present application provides an FPGA-based telephone online detection device, the device including a user interface circuit unit and an FPGA processing unit. The FPGA processing unit is connected to the telephone line through the user interface circuit unit. The user interface circuit unit includes an inverting operational amplifier circuit, an addition and subtraction operational amplifier circuit, and a telephone line interface.

[0040] The FPGA processing unit is used to obtain the SHK signal through the user interface circuit unit and send a test digital signal to the user interface circuit unit;

[0041] The user interface circuit unit is used to convert the test digital signal into an analog signal, and convert the analog signal into a feedback digital signal through an inverting operational amplifier circuit, a telephone line interface and an addition and subtraction operational amplifier circuit, so as to send the feedback digital signal to the FPGA processing unit;

[0042] The FPGA processing unit is used to determine that a telephone is connected to the telephone line corresponding to the telephone line interface when the signal peak value of the feedback digital signal is lower than the signal peak value of the test digital signal.

[0043] In some embodiments, SHK is the name of the signal pin definition. This pin is used to identify the call status. The signal is 0, indicating that the phone is in the on-hook state or is not connected to the phone, and 1 indicates the off-hook or ringing state. The present application detects the line status and the on-hook state (the phone is in the on-hook state, that is, the phone is not picked up or the hands-free button is pressed) by detecting the output of the SHK signal from the user interface circuit.

[0044] In some embodiments, the present application solution obtains the SHK signal through the user interface circuit unit and the FPGA processing unit, and sends a test digital signal to the user interface circuit unit to obtain a feedback digital signal, and determines whether a telephone is connected to the telephone line corresponding to the telephone line interface based on the feedback digital signal and the test digital signal. The present application is composed of an FPGA processing unit and a user interface unit. Compared with the traditional detection solution, it reduces the relay switching circuit, avoids the use of the expensive and bulky "112 measuring station", and can detect all lines at the same time, supports online detection, and improves detection efficiency. Without the use of additional relay switching circuits and other circuits and 112 measuring stations and other equipment, only software is needed to realize the telephone online detection function, reducing equipment costs, and can be used on small-volume telephone exchanges or transmission equipment, thereby effectively performing telephone online detection.

[0045] refer to Figure 2 , Figure 2Another schematic diagram of an FPGA-based telephone online detection device proposed in another embodiment of the present application includes a user interface circuit unit and an FPGA processing unit, wherein the user interface circuit is used to provide operating voltage and ringing voltage to the telephone, detect the on-hook and off-hook status of the telephone, and provide two-to-four-wire conversion, PCM encoding and decoding, overcurrent and overvoltage protection and other functions. The relevant general functions are implemented in a similar way to traditional telephones; the FPGA processing unit is used to detect and control the relevant functions and status of the user interface circuit, and is composed of a sequence generation unit, a storage unit and a verification unit. It mainly realizes user interface circuit status monitoring and telephone online detection, and provides clock and frame synchronization signals for the PCM encoding and decoding chip of the user interface circuit. The FPGA of the present invention patent transmits a detection digital signal to the telephone line through the user interface circuit, and judges the status of the telephone line by detecting the feedback digital signal returned by the user interface circuit to determine whether the telephone line is connected to a telephone.

[0046] In some embodiments, the user interface circuit unit also includes an isolation signal driving circuit and a PCM codec chip, the PCM codec chip is respectively connected to the reverse operational amplifier circuit and the addition and subtraction operational amplifier circuit, the reverse operational amplifier circuit is connected to the isolation signal driving circuit, the isolation signal driving circuit is connected to one end of the telephone line interface, and the other end of the telephone line interface is connected to the addition and subtraction operational amplifier circuit; the PCM codec chip is used to convert the test digital signal into a first analog signal, and the reverse operational amplifier circuit is used to amplify the analog signal to send a second analog signal to the isolation signal driving circuit; the isolation signal driving circuit is used to allow the second analog signal to pass through the telephone line interface to send a third analog signal to the addition and subtraction operational amplifier circuit; the addition and subtraction operational amplifier circuit receives the third analog signal and outputs a fourth analog signal, so that the PCM codec chip obtains a feedback digital signal based on the fourth analog signal and sends the feedback digital signal to the FPGA processing unit.

[0047] In some embodiments, the FPGA processing unit includes a storage unit, a verification unit and a sequence generation unit, the storage unit is respectively connected to the verification unit and the sequence generation unit, and the verification unit and the sequence generation unit are connected; the sequence generation unit is used to obtain a test digital signal based on the preset signal data in the storage unit, and send the test digital signal to the PCM codec chip; the verification unit is used to receive a feedback digital signal, compare the feedback digital signal with the test digital signal, and when the signal peak value of the feedback digital signal is lower than the signal peak value of the test digital signal, determine that a telephone is connected to the telephone line corresponding to the telephone line interface, wherein the FPGA processing unit is connected to the PCM codec chip through a PCM bus.

[0048] In some embodiments, the user interface circuit unit also includes an on-hook or off-hook detection module, one end of the on-hook or off-hook detection module is connected to the telephone line interface, and the other end is grounded; the on-hook or off-hook detection module is used to send an SHK signal to the verification unit in the FPGA processing unit, so that the FPGA processing unit obtains the SHK signal through the user interface circuit unit and sends a test digital signal to the user interface circuit unit.

[0049] refer to Figure 3 , Figure 3This is a circuit diagram of an FPGA-based telephone online detection device proposed in another embodiment of the present application. The user interface circuit unit includes an inverting operational amplifier circuit, an addition and subtraction operational amplifier circuit, a telephone line interface, an isolation signal driving circuit, and a PCM codec chip. The inverting operational amplifier circuit includes an op amp U1B, a 10K resistor R8, and a 20K resistor R7. The inverting input terminal of the op amp U1B is connected to the PCM codec chip through R8, the positive input terminal of the op amp U1B is grounded, and the two ends of R7 are respectively connected to the inverting input terminal and output terminal of the op amp U1B; the isolation signal driving circuit includes a transistor Q1, a diode D 1. Diode D2, resistor R10 and capacitor C5; the emitter of transistor Q1 is connected to R10 and the addition and subtraction operational amplifier circuit, the collector of transistor Q1 is connected to the feed voltage, the base of transistor Q1 is connected to the inverting operational amplifier circuit through capacitor C5, D1 and D2 are used to provide base drive current for transistor Q1 to turn on transistor Q1, so that the second analog signal passes through resistor R10, telephone line interface and resistor R9 in sequence to be grounded. Transistor Q1 is formed by two transistors nested together, the cathode of D1 is connected to the collector of transistor Q1 through 2M resistor R11, the cathode of D2 is connected to the positive electrode of D1, D The positive electrode of 2 is connected to the circuit between the capacitor C5 and the base of the transistor Q1, the other end of the capacitor C5 is connected to the output end of the operational amplifier U1B, the resistor R10 is connected to the telephone line interface R (the voltage there is V3), the voltage between the resistor R10 and the emitter of the transistor Q1 is V4, the telephone line interface T (the voltage there is V2) is grounded through the resistor R9 and the off-hook detection module, and the voltage between the resistor R9 and the off-hook detection module is V1; the addition and subtraction operational amplifier circuit includes capacitors C1, C2, C3, C4, 200K resistors R1, R2, R3, R4, 100K resistors R5, R6 and operational amplifier U1A, operational amplifier U1 The reverse input end of A is connected between the resistor R10 and the emitter of the transistor Q1 through the resistor R1 and the capacitor C1, and is connected to the telephone line interface T through the resistor R2 and the capacitor C2. The positive input end of the operational amplifier U1A is connected to the telephone line interface R through the resistor R3 and the capacitor C3, and is connected between the resistor R9 and the on-hook detection module through the resistor R2 and the capacitor C2. One end of the resistor R5 is connected to R4, R3 and the positive input end of the operational amplifier U1A, and the other end is grounded. One end of the resistor R6 is connected to R1, R2 and the reverse input end of the operational amplifier U1A, and the other end is connected to the output end of the operational amplifier U1A. At the same time, the output end of U1A is connected to the PCM codec chip.

[0050] In some embodiments, the FPGA sends a PCM digital signal with a frequency of 1 kHz and a peak-to-peak value of 2 V to the PCM codec chip, which converts the signal into an analog signal and outputs it to an inverting operational amplifier circuit composed of U1B, R7, and R8. The inverting amplifier amplifies the signal with a frequency of 1 kHz and a peak-to-peak value of 2 V to a peak-to-peak value of 4 V, and then outputs it to the base of Q1 after being isolated by capacitor C5. Q1, D1, D2, R10, and C5 form an isolated signal driving circuit. R10 is a very high-resistance resistor, which together with D1 and D2 provides a very small base driving current to Q1 and maintains a stable conduction voltage drop for Q1, ensuring that Q1 can output the 1 kHz frequency and peak-to-peak value of 4 V signal to R10, the telephone line, R9, and ground. The feeding voltage also passes through Q1, R10, telephone line, and R9 to the ground, and is used to power the phone when the phone is picked up. The device of the present application is placed on the user side of the programmable switching system or PCM equipment, and the remote end of the user interface of the device is connected to the phone. The ringing circuit refers to the ringing circuit of the phone. The phone is equivalent to a combination of resistors and capacitors, and there is an AC impedance. The signal will attenuate and change after passing through, so it can be identified by the change whether the phone is connected.

[0051] In some embodiments, when no phone is connected to the telephone line, the line is in an open circuit state. The 1 kHz frequency signal output by Q1 can only be output to both ends of R10, and the signal across R9 is very small. At this time, the peak-to-peak amplitude of the 1 kHz frequency signal received by the addition and subtraction operational amplifier circuit composed of C1, C2, C3, C4, R1, R2, R3, R4, R5, R6, and U1A is also approximately 2V. The output voltage of U1A is calculated as follows: Vo = Vi * {(R6 / R3) - (R3 / R1)}.

[0052] In some embodiments, when a telephone is connected to the telephone line, the ringing circuit is connected to the phone when the phone is on hook. This circuit presents an AC impedance loop of several kilohertz (K). This AC impedance, combined with the voltage divider R10 and R9, causes the peak-to-peak amplitude of the 1 kHz frequency signal received by the addition-subtraction operational amplifier circuit composed of C1, C2, C3, C4, R1, R2, R3, R4, R5, R6, and U1A to be less than 2V. In actual applications, when the AC impedance of the ringing circuit is less than 10K, the signal amplitude output by operational amplifier U1A decreases by approximately 10%, reaching a peak-to-peak value of approximately 1.8V. The output voltage of U1A is calculated as follows: Vo = {V4*(R6 / R3)-V3*(R3 / R1)}-{V2*(R6 / R2)-V1*(R6 / R4)}.

[0053] In some embodiments, the test digital signal is a PCM digital signal with a frequency of 1KHz and a peak value of 2V; the peak value of the second analog signal is 4V; when a telephone is connected to the telephone line corresponding to the telephone line interface, the first peak value of the fourth analog signal is less than 2V; when no telephone is connected to the telephone line corresponding to the telephone line interface, the second peak value of the fourth analog signal is greater than the first peak value.

[0054] In some embodiments, the FPGA processing unit is used to receive feedback digital signals of multiple signal cycles, and obtain an average digital signal based on the feedback digital signals of multiple signal cycles. When the signal peak value of the average digital signal is lower than the signal peak value of the test digital signal, and the difference is greater than or equal to 10% of the signal peak value of the test digital signal, it is determined that a telephone is connected to the telephone line corresponding to the telephone line interface.

[0055] Specifically, the signal output by U1A is sent to the PCM codec chip, which is converted into a digital signal by the PCM codec chip and then transmitted to the FPGA for detection. The FPGA detection unit determines whether a telephone is connected to the telephone line by comparing the output and input 1KHz frequency signal amplitudes. The FPGA generates a test signal process: the FPGA sequence generation unit generates a test signal through a table lookup method (writing the set signal data directly into the FPGA's storage unit), or through other methods, such as collecting several cycles of PCM digital signals on other devices or circuits and storing them in the FPGA's ROM. When the test signal needs to be output, the PCM digital test signal stored in the ROM is output to the PCM codec chip of the user interface circuit through the PCM bus through the sequence generation unit, and restored to a 1KHz / 2Vp-p sinusoidal wave test signal output.

[0056] Specifically, the FPGA verifies the test signal process: the 1KHz sine wave signal received by the user interface circuit is converted into a digital signal through the PCM codec chip. The FPGA directly collects the data of 10 signal cycles, averages it, and compares it with the data of the transmitted signal. When it is identified that the signal amplitude data is lower than 10% of the original, it is considered that a telephone is connected.

[0057] refer to Figure 4 In a second aspect, an embodiment of the present application provides an FPGA-based telephone online detection method, which is applied to an FPGA-based telephone online detection device, the device including a user interface circuit unit and an FPGA processing unit, the FPGA processing unit being connected to a telephone line via the user interface circuit unit, the user interface circuit unit including an inverting operational amplifier circuit, an addition and subtraction operational amplifier circuit, and a telephone line interface, the method including but not limited to the following steps S410, S420, and S430;

[0058] Step S410: The FPGA processing unit obtains the SHK signal through the user interface circuit unit and sends a test digital signal to the user interface circuit unit;

[0059] Step S420: The user interface circuit unit converts the test digital signal into an analog signal, passes the analog signal through an inverting operational amplifier circuit, a telephone line interface, and an addition / subtraction operational amplifier circuit, and converts the analog signal into a feedback digital signal, thereby sending the feedback digital signal to the FPGA processing unit.

[0060] In step S430 , the FPGA processing unit determines that a telephone is connected to the telephone line corresponding to the telephone line interface when the signal peak value of the feedback digital signal is lower than the signal peak value of the test digital signal.

[0061] In some embodiments, based on the above steps S410 to S430, it can be seen that since the present application does not require additional circuits (relay switching circuits) and equipment (112 measuring stations), only software is needed to realize the online detection function of the telephone. This not only greatly reduces the cost of the equipment, but also can be used on small-volume telephone exchanges or transmission equipment, that is, it has the advantages of realizing online real-time detection and being small in size and low in cost.

[0062] refer to Figure 5 , Figure 5 It is a schematic structural diagram of a controller provided by an embodiment of the present invention.

[0063] Some embodiments of the present invention provide a controller, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the FPGA-based telephone online detection method of any one of the above embodiments is implemented, for example, the above-described Figure 4 Method steps S410 to S430.

[0064] The controller 500 of the embodiment of the present invention includes one or more processors 510 and a memory 520. Figure 5 In the figure, a processor 510 and a memory 520 are taken as an example.

[0065] The processor 510 and the memory 520 may be connected via a bus or other means. Figure 5 The bus connection is taken as an example.

[0066] The memory 520 is a non-transitory computer-readable storage medium that can be used to store non-transitory software programs and non-transitory computer executable programs. In addition, the memory 520 may include a high-speed random access memory and may also include a non-transitory memory, such as at least one disk storage device, a flash memory device, or other non-transitory solid-state storage device. In some embodiments, the memory 520 may optionally include a memory 520 remotely located relative to the processor 510. These remote memories may be connected to the controller 500 via a network. Examples of the aforementioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0067] In some embodiments, when the processor executes the computer program, the FPGA-based telephone online detection method of any one of the above embodiments is executed at a preset interval.

[0068] Those skilled in the art will understand that Figure 5 The device structure shown in the figure does not constitute a limitation on the controller 500, and the controller 500 may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently.

[0069] exist Figure 5 In the controller 500 shown, the processor 510 can be used to call the FPGA-based telephone online detection method stored in the memory 520, thereby implementing the FPGA-based telephone online detection method.

[0070] Based on the hardware structure of the above-mentioned controller 500, various embodiments of the FPGA-based telephone online detection device of the present invention are proposed. At the same time, the non-transient software programs and instructions required to implement the FPGA-based telephone online detection method of the above-mentioned embodiments are stored in the memory. When executed by the processor, the FPGA-based telephone online detection method of the above-mentioned embodiment is executed.

[0071] In addition, an embodiment of the present invention further provides an FPGA-based telephone online detection device, and the FPGA-based telephone online detection device includes the above-mentioned controller.

[0072] In some embodiments, since the FPGA-based telephone online detection device of an embodiment of the present invention has the controller of the above-mentioned embodiment, and the controller of the above-mentioned embodiment can execute the FPGA-based telephone online detection method of the above-mentioned embodiment, the specific implementation methods and technical effects of the FPGA-based telephone online detection device of an embodiment of the present invention can refer to the specific implementation methods and technical effects of the FPGA-based telephone online detection method of any of the above-mentioned embodiments.

[0073] The embodiment of the present invention further provides a computer-readable storage medium, which stores computer-executable instructions. The computer-executable instructions are used to execute the above-mentioned FPGA-based telephone online detection method, for example, to enable the above-mentioned one or more processors to execute the FPGA-based telephone online detection method in the above-mentioned method embodiment, for example, to execute the above-mentioned Figure 4 Method steps S410 to S430.

[0074] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, i.e., they may be located in one place or distributed across multiple network nodes. Some or all of the modules may be selected based on actual needs to achieve the objectives of this embodiment.

[0075] Those skilled in the art will appreciate that all or some of the steps and devices in the method disclosed above can be implemented as software, firmware, hardware, and appropriate combinations thereof. Some physical components or all physical components can be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, and the computer-readable medium can include a computer-readable storage medium (or non-transitory medium) and a communication medium (or temporary medium). As known to those skilled in the art, the term computer-readable storage medium is included in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data) and is volatile and non-volatile, removable, and non-removable. Computer-readable storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory, or other memory technology, CD-ROM, digital versatile disks (DVD), or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage, or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, as is well known to those skilled in the art, communication media typically embodies computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0076] The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the above implementation mode. Technical personnel familiar with the field can also make various equivalent modifications or substitutions without violating the spirit of the present application. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present application.

Claims

1. A telephone online detection device based on FPGA, characterized in that: The device includes a user interface circuit unit and an FPGA processing unit, wherein the FPGA processing unit is connected to a telephone line via the user interface circuit unit, and the user interface circuit unit includes an inverting operational amplifier circuit, an addition and subtraction operational amplifier circuit, and a telephone line interface; The FPGA processing unit is used to obtain the SHK signal through the user interface circuit unit and send a test digital signal to the user interface circuit unit; The user interface circuit unit is used to convert the test digital signal into an analog signal, and convert the analog signal into a feedback digital signal through the inverting operational amplifier circuit, the telephone line interface and the addition and subtraction operational amplifier circuit, so as to send the feedback digital signal to the FPGA processing unit; The FPGA processing unit is used to determine that a telephone is connected to the telephone line corresponding to the telephone line interface when the signal peak value of the feedback digital signal is lower than the signal peak value of the test digital signal.

2. The FPGA-based telephone online detection device according to claim 1, characterized in that: The user interface circuit unit further includes an isolation signal driving circuit and a PCM codec chip, wherein the PCM codec chip is respectively connected to the inverting operational amplifier circuit and the addition and subtraction operational amplifier circuit, the inverting operational amplifier circuit is connected to the isolation signal driving circuit, the isolation signal driving circuit is connected to one end of the telephone line interface, and the other end of the telephone line interface is connected to the addition and subtraction operational amplifier circuit; The PCM codec chip is used to convert the test digital signal into a first analog signal, and the inverting operational amplifier circuit is used to amplify the analog signal to send a second analog signal to the isolation signal driving circuit; The isolated signal driving circuit is used to allow the second analog signal to pass through the telephone line interface to send a third analog signal to the addition and subtraction operational amplifier circuit; The addition and subtraction operational amplifier circuit receives the third analog signal and outputs a fourth analog signal, so that the PCM codec chip obtains the feedback digital signal according to the fourth analog signal and sends the feedback digital signal to the FPGA processing unit.

3. The FPGA-based telephone online detection device according to claim 2, characterized in that: The FPGA processing unit includes a storage unit, a verification unit and a sequence generation unit, the storage unit is connected to the verification unit and the sequence generation unit respectively, and the verification unit is connected to the sequence generation unit; The sequence generating unit is used to obtain the test digital signal according to the preset signal data in the storage unit, and send the test digital signal to the PCM codec chip; The verification unit is used to receive the feedback digital signal, compare the feedback digital signal with the test digital signal, and determine that a telephone is connected to the telephone line corresponding to the telephone line interface when the signal peak value of the feedback digital signal is lower than the signal peak value of the test digital signal.

4. The FPGA-based telephone online detection device according to claim 3, characterized in that: The user interface circuit unit further includes an on-hook detection module, one end of which is connected to the telephone line interface and the other end is grounded; The on / off detection module is used to send the SHK signal to the verification unit in the FPGA processing unit, so that the FPGA processing unit obtains the SHK signal through the user interface circuit unit and sends a test digital signal to the user interface circuit unit.

5. The FPGA-based telephone online detection device according to claim 2, characterized in that: The test digital signal is a PCM digital signal with a frequency of 1KHz and a peak value of 2V; the peak value of the second analog signal is 4V; when a telephone is connected to the telephone line corresponding to the telephone line interface, the first peak value of the fourth analog signal is less than 2V; when no telephone is connected to the telephone line corresponding to the telephone line interface, the second peak value of the fourth analog signal is greater than the first peak value.

6. The FPGA-based telephone online detection device according to claim 1, characterized in that: The FPGA processing unit is used to receive feedback digital signals of multiple signal cycles, and obtain an average digital signal based on the feedback digital signals of multiple signal cycles. When the signal peak value of the average digital signal is lower than the signal peak value of the test digital signal, and the difference is greater than or equal to 10% of the signal peak value of the test digital signal, it is determined that a telephone is connected to the telephone line corresponding to the telephone line interface.

7. The FPGA-based telephone online detection device according to claim 2, characterized in that: The isolated signal driving circuit includes a transistor Q1, a diode D1, a diode D2, a resistor R10 and a capacitor C5; the emitter of the transistor Q1 is connected to R10 and the addition and subtraction operational amplifier circuit, the collector of the transistor Q1 is connected to the feed voltage, the base of the transistor Q1 is connected to the inverting operational amplifier circuit through the capacitor C5, D1 and D2 are used to provide a base drive current for the transistor Q1 to turn on the transistor Q1, so that the second analog signal is grounded through the resistor R10, the telephone line interface and the resistor R9 in sequence.

8. A telephone online detection method based on FPGA, applied to a telephone online detection device based on FPGA, characterized in that: The device includes a user interface circuit unit and an FPGA processing unit, the FPGA processing unit is connected to a telephone line via the user interface circuit unit, the user interface circuit unit includes an inverting operational amplifier circuit, an addition and subtraction operational amplifier circuit, and a telephone line interface, and the method includes: The FPGA processing unit obtains the SHK signal through the user interface circuit unit and sends a test digital signal to the user interface circuit unit; The user interface circuit unit converts the test digital signal into an analog signal, and converts the analog signal into a feedback digital signal through the inverting operational amplifier circuit, the telephone line interface, and the addition and subtraction operational amplifier circuit, so as to send the feedback digital signal to the FPGA processing unit; The FPGA processing unit determines that a telephone is connected to the telephone line corresponding to the telephone line interface when the signal peak value of the feedback digital signal is lower than the signal peak value of the test digital signal.

9. A controller, characterized in that: The invention comprises a memory, a processor and a computer program stored in the memory and capable of running on the processor. When the processor executes the computer program, the FPGA-based telephone online detection method as claimed in claim 8 is implemented.

10. A computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are used to execute the FPGA-based telephone online detection method as claimed in claim 8.

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