Synaptic weight updating method in event-driven type chip, chip and electronic device

By using the BP/DFA-STDP learning algorithm and event-driven pulse computation, the problems of low energy efficiency and poor real-time performance of traditional AI chips in device applications are solved, achieving high-performance, low-power on-chip learning and parallel computing, which is suitable for intelligent device scenarios.

CN116629331BActive Publication Date: 2026-06-12CHONGQING UNIV
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
CHONGQING UNIV
Filing Date
2023-05-29
Publication Date
2026-06-12

AI Technical Summary

⚠Technical Problem

Existing traditional AI chips suffer from low energy efficiency, slow speed, high cost, large size, and difficulty in on-chip learning when used in IoT applications, making it difficult to meet the needs of intelligent IoT applications.

⚗Method used

By employing the BP/DFA-STDP learning algorithm and deep convolution mechanism, combined with event-driven pulse computation, the synaptic weights of the convolutional layer are updated through the BP-STDP learning rule, and the synaptic weights of the fully connected layer are updated through the DFA-STDP learning rule, thus realizing parallel computing and on-chip learning of the neuromorphic chip.

🎯Benefits of technology

It improves the classification performance of the network, reduces chip power consumption, increases processing speed, supports on-chip learning, and is suitable for intelligent IoT scenarios.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application relates to the field of artificial intelligence and the field of brain-like intelligent chip, in particular to a synapse weight updating method in event-driven type chip, a chip and an electronic device, the method comprises the following steps: in the training of a deep convolutional neural network of an event-driven type chip, adopting a BP-STDP learning rule to update the weight of each synapse of the convolutional layer of the deep convolutional neural network, and adopting a DFA-STDP learning rule to update the weight of each synapse of the fully connected layer of the deep convolutional neural network. The method can make the neuromorphic chip realize maximum parallel computing, greatly improve the processing speed and enhance the performance of the chip.
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