Synthesis via segmented frequency-shifted fast chirps

Abstract

In an illustrative integrated circuit, a chirp generator (403) provides a chirp signal having linearly ramped chirp intervals, and a frequency shift generator provides a signal having a different frequency shift during each of a plurality of segments in each chirp interval. A modulator (510) combines the signals to derive a segmented chirp signal having a plurality of linearly ramped chirp segments in each chirp interval. The modulator can be a single sideband modulator to provide chirp segments that are frequency upshifted and frequency downshifted. The segmented chirp signal can be suppressed during a restabilization interval of the original chirp signal.

Description

Background Technology

[0001] In search of safer and more convenient transportation options, many automakers are developing autonomous vehicles that require a staggering number and variety of sensors. Envisioned sensing technologies include multiple-input multiple-output radar systems for monitoring the distance between the car and any vehicles or obstacles along its path. Such systems can benefit from technologies that enable faster measurement repetition. An example of this can be found in co-pending U.S. Application 16 / 196,623, filed November 26, 2019, by inventors Tom Heller et al., entitled “Chirp Sequence Synthesis in a Dynamic Distribution Network.” Summary of the Invention

[0002] Therefore, this document discloses an exemplary integrated circuit comprising: a chirp generator for providing a chirp signal having a linear ramp chirp interval; a frequency shifter for providing a signal with a different frequency shift during each of a plurality of segments in each chirp interval; and a modulator for deriving a segmented chirp signal from the product of the chirp signal and the frequency shifted signal, the segmented chirp signal having a plurality of linear ramp chirp segments in each chirp interval.

[0003] An illustrative method includes: generating a chirped signal with linear ramp chirped intervals; generating a signal with a different frequency shift during each of a plurality of segments in each chirped interval; deriving a segmented chirped signal from the product of the chirped signal and the frequency-shifted signal, the segmented chirped signal having a plurality of linear ramp chirped segments in each chirped interval.

[0004] An exemplary radar device includes: a chirp generator for providing a chirp signal having linear ramp chirp intervals; a frequency shift signal generation component; and a modulation component for deriving segmented chirp signals from the product of the chirp signal and the frequency shift signal, the segmented chirp signals having multiple linear ramp chirp segments in each chirp interval.

[0005] Each of the foregoing can be used individually or in combination, and can include one or more of the following features in any suitable combination: 1. The plurality of linear ramp chirped segments in each chirped interval have equal durations, equal frequency slopes, and equal starting frequencies. 2. The frequency shifter includes: a plurality of quadrature dividers, each providing orthogonal frequency shift signals, each providing a different frequency shift; and a multiplexer arrangement for selecting from the frequency shift signals for each of the plurality of chirped segments. 3. The frequency shifter includes at least one quadrature divider to provide orthogonal frequency shift signals. 4. The modulator is a single-sideband modulator to produce an up-shift signal output and a down-shift signal output for each frequency shift of the frequency shift signal. 5. A switching arrangement for selecting from the up-shift and down-shift signal outputs for each of the plurality of chirped segments. 6. Outside the chirped interval, the switching arrangement is configured to isolate the up-shift and down-shift signal outputs from the switching outputs. 7. The chirped segments have equal durations, and the different frequency shifts are integer multiples of the fundamental frequency. 8. A transmitter for generating a transmit signal based on the segmented chirped signal. 9. A receiver for down-converting the received signal using the segmented chirped signal. 10. A signal processing circuitry for deriving target range-velocity information based on the received signal. 11. The segmented chirped signal omits chirped segments during the stable intervals of the chirped signal, but the signal processing circuitry is configured to interpolate range-velocity information for the omitted chirped segments. Attached Figure Description

[0006] Figure 1 It is a top view of an illustrative vehicle equipped with sensors.

[0007] Figure 2 This is a block diagram illustrating a driver assistance system.

[0008] Figure 3 This is a block diagram illustrating the radar front-end equipment.

[0009] Figure 4A This is a block diagram illustrating a frequency modulated continuous wave (FMCW) radar transceiver.

[0010] Figure 4B This is a graph illustrating the chirping signal.

[0011] Figure 5A It is a graph illustrating segmented chirped signals formed by a set of frequency-shifted chirped signals.

[0012] Figure 5B It is an illustrative segmented chirped radar transceiver.

[0013] Figure 5C This is a schematic diagram illustrating a mixer.

[0014] Figure 6A It is the first descriptive data cube representing the set of radar measurement results.

[0015] Figure 6B It is a second descriptive data cube representing a transformed set of radar measurement results.

[0016] Figure 7 This is a data flow diagram used to illustrate radar systems.

[0017] Figure 8 This is a flowchart illustrating the radar detection method. Detailed Implementation

[0018] It should be understood that the following description and figures are provided for illustrative purposes and not for limiting this disclosure. That is, they provide a basis for those skilled in the art to understand all modifications, equivalents, and alternatives falling within the scope of the claims. More specifically, while the following description uses a vehicle as an illustrative context, the disclosed principles and techniques are applicable to other contexts, such as traffic monitoring, parking space occupancy detection, and distance measurement.

[0019] Figure 1 An illustrative vehicle 102 is shown equipped with an array of radar antennas, including antenna 104 for short-range sensing (e.g., for parking assistance), antenna 106 for medium-range sensing (e.g., for monitoring stop & go traffic and cut-in events), and antenna 108 for long-range sensing (e.g., for adaptive cruise control and collision warning), each of which can be positioned behind the front bumper cover. Antenna 110 for short-range sensing (e.g., for reversing assistance) and antenna 112 for medium-range sensing (e.g., for rear collision warning) can be positioned behind the rear bumper cover. Antenna 114 for short-range sensing (e.g., for blind spot monitoring and side obstacle detection) can be positioned behind the vehicle's fenders. Each set of antennas can perform multiple-input multiple-output (MIMO) radar sensing. The type, number, and configuration of sensors in sensor arrangements for vehicles with driver assistance and autonomous driving features vary. Vehicles can employ sensor arrangements to detect and measure the distance / direction of objects in various detection zones to enable the vehicle to navigate while avoiding other vehicles and obstacles.

[0020] Figure 2An electronic control unit (ECU) 202 is shown, which acts as the central hub in a star topology and is coupled to various radar front-end devices 204-206. Each radar front-end includes a millimeter-wave frequency transceiver, each coupled to some of the transmitting and receiving antennas 104-114 to transmit electromagnetic waves, receive reflected waves, and optionally perform processing for determining the spatial relationship between the vehicle and its surrounding environment. (This processing can alternatively be performed by the ECU 202.) To provide driver assistance, the ECU 202 may also be connected to a set of actuators, such as a turn signal actuator 208, a steering actuator 210, a brake actuator 212, and a throttle actuator 214. The ECU 202 may also be coupled to a user interface 216 to accept user input and provide displays of various measurements and system status.

[0021] Using interfaces, sensors, and actuators, ECU 202 can provide automatic parking, assisted parking, lane change assist, obstacle and blind spot detection, autonomous driving, and other desired features. In a vehicle, various sensor measurements are acquired by one or more electronic control units (ECUs), which can then use these measurements to determine the vehicle's state. The ECU can also operate based on the state and incoming information to actuate various signals and control sensors to adjust and maintain vehicle operation. The operations that the ECU can provide include various driver assistance features, including automatic parking, lane following, automatic braking, and autonomous driving.

[0022] To collect necessary measurement results, the ECU can employ a MIMO radar system. A radar system operates by emitting electromagnetic waves that travel outward from a transmitting antenna and are then reflected back to a receiving antenna. The reflector can be any moderately reflective object in the path of the emitted electromagnetic waves. By measuring the travel time of the electromagnetic waves from the transmitting antenna to the reflector and back to the receiving antenna, the radar system can determine the distance to the reflector. If multiple transmitting or receiving antennas are used, or if multiple measurements are taken at different locations, the radar system can determine the direction to the reflector, thereby tracking the reflector's position relative to the vehicle. With more sophisticated processing, multiple reflectors can be tracked. At least some radar systems employ array processing to "scan" a directed beam of electromagnetic waves and construct an image of the environment surrounding the vehicle. Both pulse and continuous wave implementations of radar systems can be implemented, but for accuracy, frequency-modulated continuous wave radar systems are generally preferred.

[0023] Figure 3 An illustrative front-end device 300 for a radar system is shown (e.g., Figure 2The block diagram of device 300 (204-206) is shown. Device 300 can be implemented as an integrated circuit on a semiconductor substrate, diced into individual pieces to form "chips" and packaged in a standard manner for mounting on a printed circuit board having traces for connecting the device to antenna elements. Device 300 has antenna feeds or terminals for coupling to an array of transmitting antenna 301 and receiving antenna 302. Adjustable gain amplifiers 303A-303D drive transmitting antenna 301 with an amplified signal from transmitter circuitry 304. Using a programmable chirp rate and range, circuitry 304 generates a carrier signal within a programmable frequency band. The signal generator can employ a phase-locked loop with a voltage-controlled oscillator and a suitable frequency divider. A splitter and phase shifter derive the transmit signal to enable multiple transmitters TX-1 to TX-4 to operate concurrently and further provide a reference "local oscillator" signal to the receiver for down-conversion processing. In the example shown, the front-end device 300 includes four transmitters (TX-1 to TX-4), each transmitter being fixedly coupled to a corresponding transmit antenna 301. In an alternative embodiment, multiple transmit antennas may be selectively coupled to each transmitter.

[0024] The front-end device 300 also includes four receivers (RX-1 to RX-4), each coupled to a receiving antenna 302. Four analog-to-digital converters (ADCs) 306A-306D sample and digitize the down-converted received signals from receivers RX-1 to RX-4, supplying the digitized signals to interface 310 for routing to processing logic 308 (such as an embedded digital signal processor (DSP)) for filtering and processing, to embedded memory 309 for buffering, or to off-chip for external processing of the digitized baseband signals. Interface logic 310 may take the form of a routing switch bridging external buses, internal data buses, and processor / memory buses, or other standard implementations.

[0025] The microcontroller unit 311 coordinates the operation of various components of the front-end device 300 based on parameter values ​​set in internal registers. The control interface 312 enables the ECU or other host processor to adjust parameter values, thereby configuring the operation of each front-end device 300 (including the transmit signal generation circuitry 304, processing logic 308, and interface logic 310). The embedded memory 309 enables the processing logic 308 and / or interface logic 310 to buffer digitized signals and any derived target measurement data according to configuration parameters set via the control interface 312.

[0026] As discussed further below, processing logic 308 can operate on the digitized received signal to derive target range data, target velocity data, target approach angle data, and / or filter out interference and clutter. The filtering operation can alternatively be viewed as probing target detection or separation of target energy from noise energy. While some radar systems perform this processing at a central location (e.g., ECU), the intended system could distribute at least some of the processing across front-end devices 204-206.

[0027] Figure 3 The front-end device architecture can support various operating modes, including the operating modes of frequency modulated continuous wave (FMCW) radar transceivers, such as... Figure 4A As shown in the diagram, in the transceiver, oscillator 402 generates a reference frequency signal, which is converted into a chirped signal by phase-locked loop (PLL) 403. While various techniques exist suitable for chirped signal generation, a potential advantage of PLL-based generation is reduced phase noise, which improves the signal-to-noise ratio of the measurement. By using frequency multiplier 404, PLL 403 can operate at a lower frequency to further reduce phase noise. Frequency multiplier 404 shifts the chirped signal into the desired frequency range of the automotive radar (e.g., 24 GHz or 77 GHz). Power splitter 405 transmits the chirped signal to transmitter 406 and receiver 407. Although not shown here, additional splitting, switching, and / or modulation can be used for chirped signal distribution in MIMO radar systems.

[0028] Transmitter 406 drives one or more transmitting antennas with a chirped signal. Receiver 407 filters, amplifies, and down-converts the signals from one or more receiving antennas, providing the down-converted signals to analog-to-digital converter (ADC) 408 for digitization.

[0029] PLL 403 includes a phase frequency detector (PFD) 410, which derives a phase error signal by comparing the phase of a reference frequency signal with the phase of a feedback signal from a frequency divider 412. A charge pump and loop filter 414 converts the phase error signal into a control signal for a voltage-controlled oscillator (VCO) 416, increasing the VCO output signal frequency when the feedback signal phase lags behind the reference frequency signal phase and decreasing it when the feedback signal phase leads. The frequency divider 412 derives the feedback signal from the VCO output signal by dividing the output signal frequency by an adjustable divisor N. PLL 403 can use a sigma-delta modulator to alternately change the value of N at a rate much higher than the PLL bandwidth, thus providing an average value of N, which can take a decimal (non-integer) value.

[0030] To generate the chirp, the PLL 403 slowly changes the average value of N from a low frequency f0 to a high frequency f1 (e.g., Figure 4B (As shown in the diagram) the output signal frequency is swept linearly, and vice versa. Figure 4B The chirped waveform shown is in each measurement period T P To reiterate: Sudden control signal transients cause an unstable interval during PLL restabilization; this interval is referred to here as the restabilization interval T. R Re-stabilization interval T R Then comes the chirping interval T. c During this interval, the frequency increases linearly with a programmable slope m.

[0031] Figure 4B A potential problem with the chirped waveform is the restabilization interval T. R Limitations imposed on the measurement rate. Measurement period T. P Reducing the interval T will not be accompanied by a restabilization interval. R The corresponding reduction in resolution limits improvements in measurement resolution, which could otherwise be achieved through faster measurements.

[0032] To address this potential problem, Figure 5A It shows Figure 4B The chirped signal waveform and the frequency shifted by -2f B -1f B +1f B and +2f B The four versions, of which f B This is the basic frequency shift. By appropriately switching between the chirped waveform and its frequency-shifted version, the radar transceiver equipment can generate segmented chirped signals 500, where the chirped signal 500 is in chirped segment T. s There is essentially no delay between them. (The time required to switch between frequency shifts can be less than one sampling period of the ADC.) By appropriately adjusting the chirped waveform slope and / or the segment spacing size, the chirped interval is divided into many identical chirped segments. During the restabilization interval T... R During this period, segmented chirping signals can be suppressed.

[0033] The original chirp spans the frequency range f0 to f1, while each chirp segment spans the frequency range f2 to f3. Note the fundamental frequency shift f. B The frequency range of each chirp segment was limited.

[0034] Figure 5B The illustrative transceiver includes Figure 4A The components also include a PLL 502 to multiply a frequency reference signal (such as the signal provided by oscillator 402) by a basic frequency shift f. B The expected multiple. For this example, the clock signal 504 generated by PLL 502 is 4f. BThe first set of flip-flops 506 forms a first quadrature divider, which converts the clock signal 504 into two frequency-shifted signals (an in-phase signal for multiplexer 509A and a quadrature signal for multiplexer 509B), each signal having a frequency shift of 2f. B The frequency of the flip-flops. The second set of flip-flops 508 forms a second quadrature divider, which divides 2f... B One of the frequency-shifted signals is converted into two other frequency-shifted signals (another in-phase signal for multiplexer 509A and another quadrature-phase signal for multiplexer 509B), each signal having a frequency f. B Multiplexers 509A and 509B use the frequency selection signal F.SEL to select f B Frequency shift signal or 2f B The frequency-shifted signal is passed to a single sideband modulator (SSM) 510. A low-pass filter 511 is provided to prevent square wave harmonics of the frequency-shifted signal from entering the SSM 510.

[0035] Note that when PLL 502 is disabled, the frequency shift signal is a constant value (zero frequency). If it is desired to maintain PLL 502 operation, the frequency shift signal can also be suppressed, for example, by disabling the flip-flops in the first or second quadrature divider, or, as another example, by adding an enable bit to multiplexers 509A and 509B to drive their outputs low when disabled.

[0036] SSM 510 includes a 90-degree mixing circuit 512 that splits the chirped signal from PLL 403 into two chirped signals that are 90 degrees out of phase (i.e., "quadrature"). Mixer 514 combines the in-phase chirped signal with a selected in-phase frequency shift signal to produce a first product signal, and combines the quadrature-phase chirped signal with a selected quadrature-phase frequency shift signal to produce a second product signal. A 180-degree mixing circuit 516 combines the product signals to produce a product sum signal, wherein the frequency of the chirped signal is shifted up by the frequency of the frequency shift signal, and produces a product difference signal, wherein the chirped signal is shifted down by the same amount. Switch arrangement 518 selects the up-shift signal, the down-shift signal, or isolates both signals from the output. Using different combinations of shift control signals (i.e., shift enable signal, frequency selection signal, and up / down / off switch control signal), the illustrative transceiver can select a shift of -2f. B -f B , 0, f B 2f B The microcontroller unit 311 can be configured to time the shift control signal relative to the original chirp signal to provide a desired number of chirp segments in each chirp interval.

[0037] Figure 5CThis is a circuit diagram of an illustrative mixer 514, which includes a pair of transconductance transistors 532, each of which biases a differential pair 534 of switching transistors. (The transistors shown are NPN bipolar junction transistors, but other transistor implementations will also be suitable.) The differential pairs are coupled in parallel to differential output traces OUT+ and OUT-, which are coupled to the supply voltage VCC via bias impedance Z, respectively. In the illustrated "upconversion" configuration, the frequency-shift signal is supplied as differential signals IF+ and IF- to the bases of the transconductance transistor pair 532, while the chirp signal is supplied as differential signals RF+ and RF- to the bases of each differential pair 534 of the switching transistors. Another suitable configuration, referred to herein as a "modulator" configuration, supplies the chirp signal differentially to the bases of the transconductance transistor pair 532 and the frequency-shift signal to the bases of each differential pair 534 of the switching transistors. In each case, the mixer output is the product of the chirp signal and the frequency-shift signal.

[0038] Figure 6A An illustrative data cube is shown, representing a portion of digital signal measurements that can be collected by a given front-end device using segmented chirped signal transmissions. Each chirped segment (a one-way traversal of a frequency range) can be considered a measurement period. During a measurement period, the front end digitizes the down-converted received signal from a selected receiving antenna, thus providing a time series of digitized received signal samples. Due to chirped modulation, the signal energy reflected from the target reaches the receiving antenna with a frequency offset depending on the round-trip time (and therefore the distance to the target). The Fast Fourier Transform (FFT) of the time series collected in a given period isolates the energy associated with each frequency offset, thus producing a function of the reflected energy relative to the target range. This operation can be performed for each antenna in each measurement period, and this operation may be referred to herein as the "range FFT". The range FFT produces peaks for each target with a given range.

[0039] The motion of the target relative to the antenna array adds a Doppler shift to the reflected signal energy, which is essentially proportional to the relative velocity. While usually small compared to the frequency shift caused by the range, it can still be observed as a phase change in the associated frequency coefficients in subsequent measurement periods. (Recall that FFT coefficients are complex values ​​with both amplitude and phase.) Applying the FFT to the corresponding frequency coefficients in a series of measurement periods isolates the energy associated with each relative velocity, resulting in a function of the reflected energy relative to the target velocity. This operation can be performed for each range and each antenna; this operation can be referred to herein as the “velocity FFT.” The resulting two-dimensional data array has a “peak” for each target with a given range and relative velocity.

[0040] Reflected energy from a given target reaches the individual receiving antennas in an antenna array, and its phase depends on the direction of arrival of the reflected energy (also known as the "approach angle"). Applying an FFT to the corresponding frequency coefficients associated with a series of uniformly spaced antennas isolates the energy associated with each angle of incidence, thus producing a function of the reflected energy relative to the approach angle ("AoA"). This operation can be performed for each range and velocity, and this operation may be referred to herein as the "AoA FFT".

[0041] Therefore, the measurement result data cube (such as) is arranged in its three dimensions as functions of time, measurement period, and antenna position. Figure 6A The digitized signal measurement results shown can be transformed into a target data cube (as illustrated) whose three dimensions represent range, velocity, and AoA as functions of that target data cube. Figure 6B (As shown in the diagram). Since FFT is linear, range FFT, velocity FFT, and AoA FFT can be performed in any order. Furthermore, FFT operations are independent (meaning, for example, a range FFT for a given antenna and period is independent of a range FFT for other antennas and other periods, and a velocity FFT for a given range and antenna is independent of a velocity FFT for other ranges and antennas), and parallelized FFT processing can be implemented if desired.

[0042] Another desired processing operation is the separation of signal energy from noise energy. Any suitable noise suppression or target detection technique can be used. A popular technique (which includes many variations) is constant false alarm rate (CFAR) detection. CFAR detection employs a detection threshold that is adaptive based on the measured energy values ​​within a sliding window (also known as the “measured cell”) close to or surrounding the measurement being evaluated. The original technique and its variations offer various trade-offs between performance and computational complexity by deriving the detection threshold from the measurements within the sliding window using different statistical methods. CFAR detection is a non-linear technique because measurement values ​​below the threshold are zeroed out or ignored, but their position in the processing sequence can be modified, as zeroing out the frequency coefficient generally does not prevent subsequent FFTs from utilizing the correlated phase / frequency information representing the energy peaks of the target.

[0043] Figure 7 An illustrative data stream is shown, which can be implemented by each front-end device 300 or split between the front-end device and the ECU. Processing logic 308 can process the essentially digitized received signal x from each antenna during signal acquisition. kA range FFT 702 is performed, and the resulting frequency coefficients are stored as range data in a frame buffer 704 in memory 309. The frame buffer 704 accumulates range data from multiple measurement cycles, enabling processing logic 308 to perform a velocity FFT 706 to generate target range and velocity data for each antenna, as discussed earlier. However, note that the segmented chirp signal is suppressed during the restabilization interval. In the case where the segmented chirp signal has K chirp segments in each chirp interval of the original chirp signal, this suppression means… Figure 6A The data cube is missing measurement results for every (K+1)th cycle. Prior to the execution speed of FFT 706, interpolation 705 could be used to replace the missing measurement cycles with interpolated measurement results.

[0044] The CFAR detector 708 operates on the target range and velocity data to remove noise energy below an adaptive threshold. The CFAR detector 708 can zero out values ​​below the threshold, leaving only values ​​above the threshold to represent the range and velocity of the potential target (radar energy reflector). In some anticipated variations, the CFAR detection process compresses the data volume by omitting at least some of the values ​​below the threshold and possibly by employing more sophisticated data compression techniques to reduce buffer size requirements and / or bus bandwidth requirements. The processing circuitry 308 or ECU 202 can also perform an AoA FFT 710 to determine the relative orientation associated with the potential target and analyze any peaks in the data volume to detect and track 712 the target's relative position and velocity relative to the vehicle.

[0045] Figure 8 This is a flowchart illustrating a radar detection method that can be implemented by a front-end device. It begins in block 802 with the generation of a chirp signal using a chirp generator (e.g., PLL 403) having intervals in which the signal frequency linearly ramps from a start frequency to an end frequency. The chirp signal can be an upward chirp, a downward chirp, or even a triangular rising-falling chirp signal. In block 804, the device generates a frequency-shifted signal with multiple segments for each chirp interval, where each segment has a different frequency shift. In block 806, the device combines the chirp signal with the frequency-shifted signal to obtain a segmented chirp signal with a linear frequency ramp in each segment.

[0046] In block 808, the device derives the transmitted signal from the segmented chirped signal and combines one or more received signals with the segmented chirped signal to obtain multiple measurement cycles in each chirped interval of the original chirped signal. In block 810, the device digitizes and transforms the down-converted received signal to obtain range-velocity information for any reflective object. In block 812, the device uses interpolation to replace any lost measurement cycles associated with the restabilization interval of the original chirped signal. In block 814, the device (or ECU) detects and tracks a potential target. In block 816, the device (or ECU) evaluates the target information and alerts the user as needed, optionally performing automatic actions to avoid a collision.

[0047] Although it has been described in sequence for explanatory purposes Figure 8 The operations described above can be implemented concurrently or in a pipelined manner. Furthermore, in some implementations, operations can be reordered or executed asynchronously. Once the foregoing disclosure is fully understood, many other modifications, equivalents, and alternatives will become apparent to those skilled in the art. The following claims are intended to be construed as including all applicable modifications, equivalents, and alternatives.

Claims

1. An integrated circuit, comprising: A chirp generator for providing a chirp signal with a linear ramp chirp interval; A frequency shift generator is used to provide a frequency shift signal with a different frequency shift during each of the multiple segments in each chirped interval; as well as A modulator is used to derive a segmented chirped signal from the product of a chirped signal and a frequency-shifted signal. The segmented chirped signal has multiple linear ramp chirped segments in each chirped interval, wherein the delay between adjacent linear ramp chirped segments is non-zero and less than the sampling period in the digital domain of the integrated circuit.

2. The integrated circuit of claim 1, wherein the plurality of linear ramp chirped segments in each chirped interval have equal durations, equal frequency slopes, and equal starting frequencies.

3. The integrated circuit of claim 1, wherein the frequency shifter comprises: Multiple quadrature frequency dividers, each providing orthogonal frequency shift signals, and each providing a different frequency shift; as well as A multiplexer arrangement is provided for selecting from the frequency-shifted signal for each of the plurality of linear ramp chirp segments.

4. The integrated circuit of claim 1, wherein the frequency shift generator includes at least one quadrature frequency divider to provide orthogonal frequency shift signals.

5. The integrated circuit of claim 4, wherein the modulator is a single sideband modulator to generate an up-shift signal output and a down-shift signal output for each frequency shift of the frequency-shifted signal.

6. The integrated circuit of claim 5, further comprising a switch arrangement for selecting from the up and down signal outputs for each of the plurality of linear ramp chirped segments.

7. The integrated circuit of claim 6, wherein, in addition to the chirped interval, the switch arrangement is configured to isolate the up and down signal outputs from the switch outputs.

8. The integrated circuit of claim 1, wherein the chirped segments have equal durations and wherein the different frequency shifts are integer multiples of the base frequency.

9. The integrated circuit of claim 1, further comprising: A transmitter for generating a transmit signal based on segmented chirped signals; A receiver used to downconvert received signals using segmented chirped signals; as well as A signal processing circuit system for deriving target range-velocity information based on the received signal.

10. The integrated circuit of claim 9, wherein the segmented chirped signal omits chirped segments during a stable interval of the chirped signal, and wherein the processing circuitry is configured to interpolate range-velocity information for the omitted chirped segments.

11. A method for generating segmented chirped signals, comprising: Generate a chirped signal with a linear ramp chirping interval; Generate frequency-shifted signals with different frequency shifts during each of the multiple segments in each chirped interval; as well as The segmented chirp signal is derived from the product of the chirp signal and the frequency-shifted signal. The segmented chirp signal has multiple linear ramp chirp segments in each chirp interval, wherein the delay between adjacent linear ramp chirp segments is non-zero and less than the sampling period in the digital domain of the integrated circuit.

12. The method of claim 11, wherein generating the frequency-shifted signal comprises: Multiple quadrature frequency dividers are used, each of which provides orthogonal frequency shift signals, and each of which provides a different frequency shift. as well as Each of the plurality of linear ramp chirp segments is selected from the frequency shift signal.

13. The method of claim 11, wherein the derived segmented chirped signal uses a single sideband modulator to generate an up-shift signal output and a down-shift signal output for each frequency shift of the frequency-shifted signal.

14. The method of claim 13, wherein deriving the segmented chirped signal comprises selecting from the up and down signal outputs for each of the plurality of linear ramp chirped segments.

15. The method of claim 11, wherein the chirped segments have equal durations, and wherein the different frequency shifts are integer multiples of the fundamental frequency.

16. The method of claim 11, further comprising: The transmitted signal is generated based on segmented chirped signals; The received signal is down-converted using segmented chirped signals; as well as Target range-velocity information is derived from the received signal.

17. The method of claim 16, wherein the segmented chirped signal omits chirped segments during stable intervals of the chirped signal, and wherein the derived target range-velocity information includes interpolated range-velocity information for the omitted chirped segments.

18. A radar device, comprising: A chirp generator for providing a chirp signal with a linear ramp chirp interval; A frequency-shift signal generation component is used to provide a frequency-shift signal with a different frequency shift during each of the multiple segments in each chirped interval; as well as A modulation unit is used to derive a segmented chirped signal from the product of a chirped signal and a frequency-shifted signal. The segmented chirped signal has multiple linear ramp chirped segments in each chirped interval, wherein the delay between adjacent linear ramp chirped segments is non-zero and less than the sampling period in the digital domain of the integrated circuit.

19. The radar device of claim 18, wherein the plurality of linear ramp chirped segments in each chirped interval have equal durations, equal frequency slopes, and equal starting frequencies.

20. The radar device of claim 18, further comprising: A transmitter for generating a transmit signal based on segmented chirped signals; A receiver used to downconvert received signals using segmented chirped signals; as well as A signal processing circuit system for deriving target range-velocity information based on the received signal.

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