A PLC delay testing system, method, equipment, and storage medium
By introducing speed measurement protocol messages to record time information in the PLC network and combining this with analysis by the host computer, the problem of rapid and accurate detection and resolution of PLC network latency was solved, and the time consumption and topology of each node were clearly defined.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-05-18
- Publication Date
- 2026-04-03
AI Technical Summary
Existing PLC network speed measurement methods cannot analyze each level of the PLC network, nor can they identify which nodes are experiencing severe time consumption, thus failing to quickly and accurately resolve PLC network latency issues.
By introducing speed measurement protocol messages into the PLC network, the time information of the messages during the uplink and downlink processes is recorded. The host computer is used to analyze the time consumption of each PLC node, and the cause of the delay is determined in combination with the network clock synchronization.
It can quickly and accurately detect the time consumption of each node in the PLC network and the network topology, helping maintenance personnel to quickly solve latency problems.
Smart Images

Figure CN116647254B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of power line communication speed measurement technology, specifically to a PLC delay testing system, method, equipment, and storage medium. Background Technology
[0002] PLC (Power Line Communication) is a communication technology that uses power lines to transmit data and media signals. A PLC network consists of connections between PLC nodes, which typically include a central control node (CCO) and station nodes (STA). Because PLC networks require relatively little cost to install and use, and the number of installed PLC nodes is relatively small, they have a promising future.
[0003] However, as a communication network, PLC networks also face the latency problem that all networks face. When testing network latency, existing PLC network speed measurement methods are limited to sending messages through the host computer, waiting for message replies, and calculating the overall latency of the PLC network from the time difference. This method cannot analyze each level of the PLC network. Especially in the case of complex PLC networks, it is impossible to clearly identify which nodes are experiencing severe latency issues, thus making it impossible to quickly and accurately repair the latency problem of the PLC network.
[0004] Therefore, there is an urgent need for a PLC delay testing system, method, equipment, and storage medium that can test PLC networks and detect the latency of each node, so as to assist maintenance personnel in quickly and accurately solving PLC network latency problems. Summary of the Invention
[0005] One of the objectives of this invention is to provide a PLC delay testing system that can test PLC networks and detect the time consumption of each node, so as to assist maintenance personnel in quickly and accurately solving PLC network delay problems.
[0006] The basic solution provided by this invention is: a PLC delay testing system, comprising: a host computer and several PLC nodes, wherein the PLC nodes form a PLC network;
[0007] The host computer is used to send speed measurement protocol messages to the target PLC node, and also to receive speed measurement protocol messages returned from the target PLC node.
[0008] The PLC node is used to forward speed measurement protocol messages to the target PLC node or the host computer. When the PLC node is a target PLC node, it is also used to send back speed measurement protocol messages to the host computer.
[0009] The speed measurement protocol message has a preset time field, which is used to record the time information of the speed measurement protocol message passing through the host computer and each PLC node during the uplink and downlink processes;
[0010] The host computer is also used to analyze the time consumption of the PLC network and the time consumption of each PLC node based on the time information in the returned speed measurement protocol message.
[0011] The operating principle and beneficial effects of the technical solution of this application are as follows: When a PLC node joins the PLC network, it will synchronize its own system clock with the clock of the PLC network. The clocks in the entire PLC network are synchronized. Therefore, the time information in the speed measurement protocol message can be used as the basis for the PLC network time consumption. Therefore, in this solution, the host computer sends the speed measurement protocol message to the target PLC node. The test protocol message is routed in the PLC network. The PLC node in the PLC network acts as the routing node, forwards and receives the message, and finally transmits the speed measurement protocol message to the target PLC node. The target PLC node then sends the speed measurement protocol message back to the routing node, and finally sends it back to the host computer.
[0012] The speed test protocol message has a preset time field, which is used to record the time information of the host computer and each PLC node sending and receiving the speed test protocol message during the uplink and downlink process of the speed test protocol message, such as a timestamp. That is, during the uplink and downlink process of the test protocol message, the time information of passing through each PLC node and the host computer will be recorded in the preset time field of the speed test protocol message.
[0013] Based on the time information in the returned speed measurement protocol message, the host computer can analyze the time consumption of the PLC network and the time consumption of each PLC node. The transmission time between each node during the entire transmission process can be calculated by the time difference between the time information of the upper-level node and the time information of the lower-level node. This allows the host computer to identify which transmission segment is too long and thus help maintenance personnel quickly and accurately solve the latency problem of the PLC network.
[0014] In summary, this solution can test PLC networks and detect the latency of each node, thereby assisting maintenance personnel in quickly and accurately resolving PLC network latency issues.
[0015] Furthermore, the PLC node includes: CCO and STA;
[0016] The CCO is used to connect to the host computer, send the received speed measurement protocol messages to the host computer or the next-level STA, and fill in the time information in the corresponding time field of the speed measurement protocol message;
[0017] The STA is used to receive speed measurement protocol messages and fill in the time information in the corresponding time field of the speed measurement protocol message. If the STA is not the target PLC node, it will send the received speed measurement protocol message to the next level STA, the previous level STA, or the CCO. If the STA is the target PLC node, it will send the received speed measurement protocol message back to the previous level STA or CCO.
[0018] The CCO, acting as the central control node, communicates with the host computer. STAs connect to the CCO or other STAs to form a PLC network. When an STA joins the PLC network, it synchronizes its system clock with the CCO's system clock to ensure time synchronization across the entire PLC network. When the host computer sends speed measurement protocol messages to any STA in the PLC network, the messages pass through the CCO. Whether it's the CCO or the STA, when receiving and forwarding a speed measurement protocol message, only one time information is entered. This allows the time difference between the time information of each PLC node to pinpoint where the delay is severe in the PLC network, thus reducing the length of the speed measurement protocol messages, saving testing time, and improving testing efficiency.
[0019] Furthermore, the host computer is also used to analyze the routing hierarchy of each PLC node that receives and forwards the speed measurement protocol messages based on the returned speed measurement protocol messages.
[0020] Based on the time information in the returned speed measurement protocol message, the host computer can analyze the routing level of the target PLC node, thereby assisting maintenance personnel in determining the routing distribution in the current PLC network.
[0021] Furthermore, the host computer is also used to analyze the topology of the PLC network based on the speed measurement protocol messages and the routing hierarchy of each PLC node.
[0022] PLC networks are tree-structured networks and are prone to topology changes. Speed measurement protocol messages sent from the host computer to the target PLC node are transmitted to the target PLC node through each level of the tree network. By analyzing the time information in the speed measurement protocol messages, the network level of each PLC node in the receiving and forwarding protocol messages can be determined, thereby identifying the current network topology of the PLC network. This helps maintenance personnel understand the network structure and improves maintenance efficiency.
[0023] Furthermore, the host computer is also used to select the MAC address of the target PLC node to be tested, and to set the length, interval, and number of packets to be sent in the speed test protocol message.
[0024] It is also used to acquire the start test signal and generate and send the speed test protocol message based on the start test signal.
[0025] The target PLC node to be tested is selected through the host computer, enabling the system to specify the target PLC node to be tested according to the testing requirements.
[0026] Furthermore, this application also provides a PLC delay testing method for performing delay testing on a PLC network composed of several PLC nodes, including:
[0027] Test steps: Send a speed test protocol message to the target PLC node and receive the speed test protocol message returned by the target PLC node; the speed test protocol message has a preset time field, which is used to record the time information of the speed test protocol message passing through the host computer and each PLC node during the uplink and downlink process;
[0028] Analysis steps: Based on the time information in the returned speed measurement protocol messages, analyze the time consumption of the PLC network and the time consumption of each PLC node.
[0029] When a PLC node joins a PLC network, it synchronizes its system clock with the PLC network clock. Since the clocks in the entire PLC network are synchronized, the time information in the speed test protocol message can be used as the basis for the PLC network's time consumption. Therefore, in this solution, a speed test protocol message is sent to the target PLC node. The test protocol message is routed in the PLC network, and the PLC node in the PLC network acts as a routing node to forward and receive the message. Finally, the speed test protocol message is transmitted to the target PLC node, and then the target PLC node sends back the speed test protocol message to the routing node, which finally feeds back to the sending end.
[0030] The speed test protocol message has a preset time field, which is used to record the time information of each PLC node sending and receiving the speed test protocol message during the uplink and downlink process of the speed test protocol message. That is, during the uplink and downlink process of the test protocol message, the host computer and the PLC node acting as the routing node in the transmission process will fill in the time of sending and receiving the speed test protocol message into the corresponding preset time field in the speed test protocol message.
[0031] Based on the time information in the returned speed measurement protocol message, the time consumption of the PLC network and each PLC node can be analyzed. The transmission time between each node during the entire transmission process can be calculated by the time difference between the time information of the upper-level node and the time information of the lower-level node. This allows us to identify which segment of the transmission is taking too long due to the current delay in the PLC network, thus assisting maintenance personnel in quickly and accurately resolving the delay problem in the PLC network.
[0032] Furthermore, the analysis step also includes: analyzing the routing level of the target PLC node based on the returned speed measurement protocol message;
[0033] Analyze the PLC network topology based on the speed measurement protocol messages and the routing hierarchy of each PLC node.
[0034] Furthermore, it also includes setup steps;
[0035] The setup steps are as follows: Select the MAC address of the target PLC node to be tested, and set the length, interval, and number of packets to be sent for the speed test protocol message;
[0036] Obtain the start test signal, and generate and send the speed test protocol message based on the start test signal.
[0037] Furthermore, this application also discloses a PLC delay testing device, including a storage medium and a processor. The storage medium stores a computer program, and when the processor executes the computer program, it implements the steps of the aforementioned PLC delay testing method. This device can test PLC networks and detect the latency of each node, thereby assisting maintenance personnel in quickly and accurately resolving PLC network latency issues.
[0038] Furthermore, this application also discloses a PLC delay test storage medium storing a computer program, which, when executed by a processor, implements the steps of the above-described PLC delay test storage method. Attached Figure Description
[0039] Figure 1 This is a logic block diagram of an embodiment of a PLC delay testing system according to the present invention;
[0040] Figure 2 This is a schematic diagram of the upper computer display in an embodiment of a PLC delay testing system according to the present invention. Figure 1 ;
[0041] Figure 3 This is a schematic diagram of the upper computer display in an embodiment of a PLC delay testing system according to the present invention. Figure 2 . Detailed Implementation
[0042] The following detailed description illustrates the specific implementation method:
[0043] In the description of this application, unless otherwise expressly specified and limited, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance; unless otherwise specified or explained, the term "multiple" refers to two or more; the terms "connected," "fixed," etc., should be interpreted broadly. For example, "connected" can be a fixed connection, a detachable connection, an integral connection, or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.
[0044] Example 1
[0045] This embodiment is basically as shown in the appendix. Figure 1 As shown: A PLC delay testing system includes: a host computer and a PLC network consisting of several PLC nodes;
[0046] The PLC nodes include: CCO and STA; CCO is the central control node, which connects to the host computer for communication. In this embodiment, CCO and host computer use UART serial communication. STA connects to CCO or other STAs to form a PLC network. When an STA joins the PLC network, it will synchronize its system clock with the system clock of CCO to ensure time synchronization of the entire PLC network.
[0047] The host computer is used to send speed measurement protocol messages to the PLC nodes that are the target PLC nodes. The speed measurement protocol messages have a preset time field, which is used to record the time information of the host computer and each PLC node sending and receiving speed measurement protocol messages during the uplink and downlink processes, that is, the network NTB time (network reference time). In this embodiment, the time information is a timestamp.
[0048] Specifically, the host computer selects the MAC address of the target PLC node to be tested, and sets the length, interval, and number of packets to be sent for the speed test protocol message;
[0049] Obtain the start test signal, generate and send the speed test protocol message based on the start test signal, and fill in the host computer's sending time information in the preset time field;
[0050] The host computer first sends the speed measurement protocol message to the CCO for downlink transmission. The CCO then sends the received speed measurement protocol message to the next-level STA. The speed measurement protocol message has a preset time field to be filled with the time information of sending or receiving the speed measurement protocol message. In a single transmission and reception process, the data forwarding operation of the CCO and STA takes a very short time. It can be assumed that the time information of sending and receiving the speed measurement protocol message is the same. Therefore, either time information can be filled in. This time represents the time information of the speed measurement protocol message passing through the CCO or STA. Specifically, in this embodiment, during downlink transmission, the time information of sending the speed measurement protocol message is filled in.
[0051] The STA receives the speed measurement protocol message. If the STA is not the target PLC node, it will send the received speed measurement protocol message to the next level STA. The speed measurement protocol message has a preset time field to fill in the time information of receiving the speed measurement protocol message.
[0052] If the STA is the target PLC node, it receives the speed measurement protocol message sent by the STA at the previous level. The speed measurement protocol message has a preset time field to fill in the time information of receiving the speed measurement protocol message. The received speed measurement protocol message is sent back to the STA at the previous level as a reply message for uplink transmission. The speed measurement protocol message also has a preset time field to fill in the time information of sending the speed measurement protocol message. The two time information filled in by the STA at the target PLC node are the same.
[0053] The STA receives the speed test protocol message, i.e., the reply message, and feeds the speed test protocol message back to the STA of the next level. The speed test protocol message has a preset time field to fill in the time information of sending the speed test protocol message. After uplink transmission, the STA that receives the speed test protocol message sent by the CCO will send the speed test protocol message fed back by the next level to the CCO. Each STA will fill in the time information of sending the speed test protocol message in the preset time field when performing uplink transmission.
[0054] The CCO receives the speed measurement protocol message, i.e., the reply message, and sends the speed measurement protocol message back to the host computer. The speed measurement protocol message has a preset time field to fill in the time information of receiving the speed measurement protocol message.
[0055] The host computer receives the speed measurement protocol message, i.e., the reply message, and records the time information of receiving the speed measurement protocol message, thus completing the transmission of one speed measurement protocol message;
[0056] The specific format of the speed test protocol message is shown in Table 1, including: a time field, a data packet length field, and a data packet length padding field. The data packet length field is used by the host computer to set the length of the speed test protocol message, so that the data packet length can be set according to the requirements. At the same time, the data packet length padding field is used to pad the data packet length according to the set length of the speed test protocol message and the actual length of the measured speed test protocol message, so as to ensure the consistency of the test protocol message length. Each CCO and STA device corresponds to two time fields, which are respectively represented by the timestamp of the speed test protocol message passing through the CCO or STA during the downlink process and the timestamp of the speed test protocol message passing through the CCO or STA during the uplink process.
[0057] Table 1: Speed Measurement Protocol Message Format
[0058]
[0059]
[0060] Note: The data packets in Table 1 are speed test protocol messages.
[0061] The host computer is also used to analyze the time consumption of the PLC network and the time consumption of each PLC node, based on the time information in the returned speed measurement protocol messages and the recorded time information of receiving the speed measurement protocol messages. Specifically, after the test, the host computer displays the maximum and minimum delays of each link in the above test loop, such as... Figure 2 As shown;
[0062] The host computer is also used to analyze the routing hierarchy of the target PLC node based on the returned speed measurement protocol message; specifically, the routing hierarchy of each node can be obtained based on the order and number of the time information of the nodes (STA) recorded in the time field.
[0063] The PLC network is a tree network. The host computer is also used to analyze the network level of each PLC node that receives and forwards the speed measurement protocol messages based on the returned speed measurement protocol messages. Specifically, based on the time information of the nodes (STAs) recorded in the time field, the network level of each node can be obtained, thereby determining which layer of the tree network structure the PLC node is in. Based on the speed measurement protocol messages and the levels of each PLC node, the topology of the PLC network can be analyzed.
[0064] In addition, the host computer is also used to visualize the speed measurement protocol messages, time consumption, and hierarchy. Specifically, in this embodiment, the host computer is a computer with a program that generates a report on the speed measurement protocol messages, time consumption, and hierarchy, such as... Figure 3 The data is displayed on the computer for easy viewing and analysis by maintenance personnel.
[0065] Compared to existing testing methods that can only obtain the overall latency of the PLC network, this solution can test the PLC network and detect the latency of each node and its hierarchy, so as to help maintenance personnel quickly and accurately solve the latency problem of the PLC network.
[0066] Example 2
[0067] This embodiment is basically as shown in the attached figure: a PLC delay test method is used to perform delay tests on a PLC network composed of several PLC nodes, wherein the PLC nodes include: CCO and STA; CCO is the central control node, which is connected to the host computer for communication. In this embodiment, CCO and host computer use UART serial communication. STA is connected to CCO or other STAs to form a PLC network. When STA joins the PLC network, it will synchronize its own system clock with the system clock of CCO to ensure the time synchronization of the entire PLC network.
[0068] This method includes:
[0069] Setup steps: Select the MAC address of the target PLC node to be tested, set the length, interval and number of packets of the speed test protocol message; obtain the start test signal, and generate and send the speed test protocol message according to the start test signal; in this embodiment, the setup steps are executed by the host computer. When the host computer generates and sends the speed test protocol message, the host computer sends the time information in the preset time field.
[0070] Test steps: Send a speed test protocol message to the PLC node that is the target PLC node; the speed test protocol message has a preset time field, which is used to record the time information of each PLC node receiving and / or sending the speed test protocol message during the uplink and downlink of the speed test protocol message;
[0071] Specifically, the host computer first sends the speed measurement protocol message to the CCO for downlink transmission. The CCO then sends the received speed measurement protocol message to the next-level STA. The speed measurement protocol message has a preset time field where the time information of sending or receiving the speed measurement protocol message is filled in. The time information of sending and receiving the speed measurement protocol message is the same for both the CCO and the STA in a single transmission process. Therefore, either time information can be filled in. In this embodiment, the time information of sending the speed measurement protocol message is filled in during downlink transmission.
[0072] The STA receives the speed measurement protocol message. If the STA is not the target PLC node, it will send the received speed measurement protocol message to the next level STA. The speed measurement protocol message has a preset time field to fill in the time information of receiving the speed measurement protocol message.
[0073] If the STA is the target PLC node, it receives the speed measurement protocol message sent by the STA at the previous level. The speed measurement protocol message has a preset time field to fill in the time information of receiving the speed measurement protocol message. The received speed measurement protocol message is sent back to the STA at the previous level as a reply message for uplink transmission. The speed measurement protocol message also has a preset time field to fill in the time information of sending the speed measurement protocol message. The two time information filled in by the STA at the target PLC node are the same.
[0074] The STA receives the speed test protocol message, i.e., the reply message, and feeds the speed test protocol message back to the STA of the next level. The speed test protocol message has a preset time field to fill in the time information of sending the speed test protocol message. After uplink transmission, the STA that receives the speed test protocol message sent by the CCO will send the speed test protocol message fed back by the next level to the CCO. Each STA will fill in the time information of sending the speed test protocol message in the preset time field when performing uplink transmission.
[0075] The CCO receives the speed measurement protocol message, i.e., the reply message, and sends the speed measurement protocol message back to the host computer. The speed measurement protocol message has a preset time field to fill in the time information of receiving the speed measurement protocol message.
[0076] The host computer receives the speed measurement protocol message, i.e., the reply message, and records the time information of receiving the speed measurement protocol message, thus completing the transmission of one speed measurement protocol message;
[0077] The specific format of the speed test protocol message is shown in Table 1 below, including: time field, data packet length field, and data packet length padding field; the data packet length field is used by the host computer to set the length of the speed test protocol message, so that the data packet length can be set according to the requirements; at the same time, the data packet length padding field is used to pad the data packet length according to the set length of the speed test protocol message and the actual measured length of the speed test protocol message, so as to ensure the consistency of the test protocol message length.
[0078] Analysis steps: Based on the time information in the returned speed measurement protocol messages, analyze the time consumption of the PLC network and the time consumption of each PLC node as a node;
[0079] Analyze the routing hierarchy of the target PLC node based on the returned speed measurement protocol message;
[0080] Furthermore, based on the returned speed measurement protocol messages, the network hierarchy of each PLC node that receives and forwards the protocol messages is analyzed. Based on the speed measurement protocol messages and the hierarchy of each PLC node, the topology of the PLC network is analyzed.
[0081] Specifically, the host computer analyzes the time consumption of the PLC network and the time consumption of each PLC node as a node based on the time information in the returned speed measurement protocol message and the recorded time information of receiving the speed measurement protocol message; specifically, after the test, the host computer displays the maximum and minimum delay of each link in the above test loop.
[0082] The host computer analyzes the routing hierarchy of the target PLC node based on the returned speed measurement protocol message; specifically, it can obtain the routing hierarchy of each node based on the order and number of the time information of the nodes (STA) recorded in the time field.
[0083] The PLC network is a tree network. The host computer analyzes the network level of each PLC node that receives and forwards the speed measurement protocol messages based on the returned speed measurement protocol messages. Specifically, based on the time information of the nodes (STA) recorded in the time field, the network level of each node can be obtained, thereby determining which layer of the tree network structure the PLC node is located in.
[0084] In addition, the host computer also visualizes the speed measurement protocol messages, time consumption, and hierarchy. Specifically, in this embodiment, the host computer is a computer with the program running on it. It generates a report on the speed measurement protocol messages, time consumption, and hierarchy and displays it on the computer for easy viewing and analysis by maintenance personnel.
[0085] Compared to existing testing methods that can only obtain the overall latency of the PLC network, this solution can test the PLC network and detect the latency and hierarchy of each node, so as to help maintenance personnel quickly and accurately solve the latency problem of the PLC network.
[0086] This embodiment also provides a PLC delay testing device, including a storage medium, a processor, and a computer program stored in the storage medium. The processor is used to execute the computer program to implement the steps of the above-described PLC delay testing method.
[0087] If the above-mentioned PLC delay testing method is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, all or part of the processes in the above-described embodiments of the present invention can also be implemented by a program instructing related hardware. The program can be stored in a readable storage medium, and when executed by a processor, it can implement the steps of the above-described method embodiments. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The readable medium can include: any entity or device capable of carrying the computer program code, a recording medium, a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium, etc.
[0088] The above descriptions are merely embodiments of the present invention. Commonly known structures and characteristics of the solutions are not described in detail here. Those skilled in the art are aware of all common technical knowledge in the field prior to the application date or priority date, are aware of all existing technologies in that field, and have the ability to apply conventional experimental methods prior to that date. Those skilled in the art can, under the guidance of this application, improve and implement this solution in combination with their own capabilities. Some typical known structures or methods should not be obstacles for those skilled in the art to implement this application. It should be noted that those skilled in the art can make several modifications and improvements without departing from the structure of the present invention. These should also be considered within the scope of protection of the present invention, and will not affect the effectiveness of the implementation of the present invention or the practicality of the patent. The scope of protection claimed in this application should be determined by the content of its claims, and the specific embodiments described in the specification can be used to interpret the content of the claims.
Claims
1. A PLC delay testing system, characterized in that, include: A host computer and several PLC nodes, wherein the PLC nodes form a PLC network; The host computer is used to send speed measurement protocol messages to the target PLC node, and also to receive speed measurement protocol messages returned from the target PLC node. The host computer is also used to analyze the routing hierarchy of each PLC node that receives and forwards the speed measurement protocol messages based on the returned speed measurement protocol messages, and to analyze the topology of the PLC network based on the speed measurement protocol messages and the routing hierarchy of each PLC node. When the PLC node is used as a non-target PLC node, it forwards speed measurement protocol messages to the target PLC node or the host computer; when the PLC node is used as a target PLC node, it sends back speed measurement protocol messages to the host computer. The speed measurement protocol message has a preset time field, which is used to record the time information of the speed measurement protocol message passing through the host computer and each PLC node during the uplink and downlink processes; The host computer is also used to set the MAC address of the target PLC node to be tested, and to set the length, interval and number of packets of the speed test protocol message; It is also used to acquire the start test signal and generate and send the speed test protocol message based on the start test signal; The host computer is also used to analyze the time consumption of the PLC network and the time consumption of each PLC node based on the time information in the returned speed measurement protocol message.
2. The PLC delay testing system according to claim 1, characterized in that, The PLC node includes: CCO and STA; The CCO is used to connect to the host computer, send the received speed measurement protocol messages to the host computer or the next-level STA, and fill in the time information in the corresponding time field of the speed measurement protocol message. The STA is used to receive speed measurement protocol messages and fill in the time information in the corresponding time field of the speed measurement protocol message. If the STA is not the target PLC node, it will send the received speed measurement protocol message to the next level STA, the previous level STA, or the CCO. If the STA is the target PLC node, it will send the received speed measurement protocol message back to the previous level STA or CCO.
3. A PLC delay testing method, applied in a PLC delay testing system as described in claim 1 or 2, for performing delay testing on a PLC network composed of several PLC nodes, characterized in that, include: Test steps: Send a speed test protocol message to the target PLC node and receive the speed test protocol message returned by the target PLC node; The speed measurement protocol message has a preset time field, which is used to record the time information of the speed measurement protocol message passing through the host computer and each PLC node during the uplink and downlink process; Analysis steps: Based on the time information in the returned speed measurement protocol messages, analyze the time consumption of the PLC network and the time consumption of each PLC node.
4. The PLC delay test method according to claim 3, characterized in that: The analysis steps also include: analyzing the routing level of the target PLC node based on the returned speed measurement protocol message; Analyze the PLC network topology based on the speed measurement protocol messages and the routing hierarchy of each PLC node.
5. The PLC delay test method according to claim 3, characterized in that: Also includes: Setup steps: Set the MAC address of the target PLC node to be tested, and set the length, interval, and number of packets to be sent for the speed test protocol message; Obtain the start test signal, and generate and send the speed test protocol message based on the start test signal.
6. A PLC delay testing device, comprising a storage medium and a processor, wherein the storage medium stores a computer program, characterized in that: When the processor executes the computer program, it implements the steps of the PLC delay test method as described in any one of claims 3-5.
7. A storage medium storing a computer program, characterized in that: When the computer program is executed, it implements the steps of the PLC delay test method as described in any one of claims 3-5.
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