Method for manufacturing a silicon carbide detector chip with transparent electrodes and use thereof

Abstract

The present application relates to the technical field of detector, and provides a preparation method of a radiation-resistant silicon carbide detector chip containing a transparent electrode and application thereof, the chip is a vertically incident detector chip from the top surface, and from top to bottom includes a first electrode, a transparent electrode, an ohmic contact layer, an intrinsic layer, a silicon carbide substrate and a second electrode; the first electrode is in a whole annular structure, the annular part of the first electrode is located at the edge of the transparent electrode and is in ohmic contact with the first electrode; an electric dipole layer is formed between the transparent electrode and the ohmic contact layer, for receiving photons or high-energy particles and performing carrier transport. The silicon carbide detector chip prepared in the present application can not only meet the application requirements of heavy ion detection, nuclear reactor detection and performance test of silicon carbide detector based on transient current technology (TCT) of ultraviolet laser, but also significantly improve the time resolution performance and position resolution performance of the silicon carbide detector to the passing particles.

Description

Technical Field

[0001] This invention relates to the field of detector technology, and in particular to a method for fabricating a radiation-resistant silicon carbide detector chip with transparent electrodes and its application. Background Technology

[0002] The high atomic shift threshold, critical breakdown field strength, high electron saturation drift velocity, and high thermal conductivity of silicon carbide determine its inherent advantages such as radiation resistance, high temperature resistance, low noise, high operating voltage, high energy resolution, high charge collection efficiency, and fast response time. Therefore, it has wide applications in extreme environments such as ultraviolet and extreme ultraviolet detection, space exploration, nuclear power plants, particle colliders, and nuclear reactors. CN116154020A describes a two-dimensional material-optimized low-gain avalanche multiplication radiation-resistant silicon carbide detector chip, but it uses metal electrodes in the detector's sensitive area, which does not meet the requirements for heavy ion detection and nuclear reactor detection. Furthermore, the metal electrodes' obstruction of laser light makes it difficult to meet the performance testing requirements of silicon carbide detectors based on ultraviolet laser transient current technology (TCT).

[0003] Therefore, this invention is proposed. Summary of the Invention

[0004] This invention provides a method for fabricating a silicon carbide detector chip with transparent electrodes and its application, addressing the aforementioned problems in the prior art. Specifically, it designs a novel silicon carbide structure with high radiation resistance and improved signal-to-noise ratio. By optimizing the structure, particularly the specific location of the transparent electrodes, extreme ultraviolet and ultraviolet lasers can be absorbed and detected by the detector. This allows transient current testing (TCT) based on ultraviolet lasers to test the charge collection, electric field distribution, and time resolution performance of the silicon carbide detector in this invention. Therefore, the silicon carbide detector chip designed in this invention offers advantages such as repeatability, reproducibility, comparability, and cost savings for particle detector testing based on transient current testing (TCT) based on ultraviolet lasers. Furthermore, this silicon carbide detector chip can improve the time resolution and position resolution performance of silicon carbide detectors for passing particles, making it particularly suitable for applications in nuclear reactor detection and heavy ion detection.

[0005] Specifically, the present invention provides a silicon carbide detector chip, wherein the chip is a detector chip that is incident vertically from the top surface, and from top to bottom includes: a first electrode, a transparent electrode, an ohmic contact layer, an intrinsic layer, a silicon carbide substrate, and a second electrode;

[0006] The first electrode has an overall ring structure, and its ring portion is located at the edge of the transparent electrode and is in ohmic contact with the first electrode.

[0007] An electric dipole layer is formed between the transparent electrode and the ohmic contact layer for receiving photons or high-energy particles and transporting charge carriers.

[0008] According to the silicon carbide detector chip provided by the present invention, the transparent electrode is a graphene transparent electrode, a black phosphorus transparent electrode, or a molybdenum disulfide transparent electrode. Due to the presence of the ring electrode, the electric field of a large-sized silicon carbide detector (detector side length greater than 500 μm) exhibits a ring-shaped non-uniform state, which leads to non-uniformity of charge collection signal. That is, the distortion of the signal current will cause timing error, which to a certain extent limits the improvement of the position resolution and time resolution performance of the particle detector. However, by using a graphene transparent electrode, a black phosphorus transparent electrode, or a molybdenum disulfide transparent electrode, the carrier mobility is high, and the uniformity of the electric field is significantly improved, thereby overcoming the limitations caused by the aforementioned structure.

[0009] According to the silicon carbide detector chip provided by the present invention, the thickness of the transparent electrode is 0.2 nm to 5 nm; preferably, the transparency to ultraviolet and extreme ultraviolet light is 80% or more.

[0010] According to the silicon carbide detector chip provided by the present invention, the top of the transparent electrode, except for the first electrode, is a passivation layer, which is a silicon dioxide passivation layer or a silicon nitride passivation layer.

[0011] According to the silicon carbide detector chip provided by the present invention, an insertion layer is provided between the silicon carbide substrate and the second electrode, and the insertion layer has an ohmic contact with the second electrode, and an electric dipole layer is formed between the insertion layer and the ohmic contact layer. Preferably, the insertion layer is a graphene insertion layer, a black phosphorus insertion layer, or a molybdenum disulfide insertion layer.

[0012] According to the silicon carbide detector chip provided by the present invention, the first electrode is a Ni / Ti / Al alloy electrode, an Al / Ti / Au alloy electrode, or a Ti / Al / Au alloy electrode, and / or the second electrode is a Ni / Ti / Al alloy electrode, an Al / Ti / Au alloy electrode, or a Ti / Al / Au alloy electrode.

[0013] According to the silicon carbide detector chip provided by the present invention, the ohmic contact layer is a p-type heavily doped silicon carbide layer with a thickness of 0.2 μm to 5 μm, preferably with an average doping concentration of 1 × 10⁻⁶. 18 cm -3 ~1×10 20 cm -3 .

[0014] According to the silicon carbide detector chip provided by the present invention, the intrinsic layer is N-type lightly doped silicon carbide with a thickness of 10 μm to 400 μm, preferably with an average doping concentration controlled at 1 × 10⁻⁶. 15 cm -3The silicon carbide substrate is an N-type conductive silicon carbide substrate.

[0015] The present invention also provides a method for fabricating a silicon carbide detector chip as described above.

[0016] The present invention also provides the application of the silicon carbide detector chip as described above in ultraviolet detection, extreme ultraviolet detection, nuclear reactor detection or heavy ion detection, and is particularly suitable for nuclear reactor detection or heavy ion detection.

[0017] This invention provides a method for fabricating a silicon carbide detector chip with a transparent electrode and its application. By designing the first electrode as a ring structure and achieving ohmic contact between the first electrode, the transparent electrode, and the ohmic contact layer, it can not only meet the performance testing application requirements of silicon carbide detectors for heavy ion detection, nuclear reactor detection, and transient current technology (TCT) based on ultraviolet lasers, but also significantly improve the time resolution and position resolution performance of the silicon carbide detector for passing particles. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the structure of the first electrode and the transparent electrode provided by the present invention;

[0020] Figure 2 This is a schematic diagram of the silicon carbide detector chip in Embodiment 1 provided by the present invention;

[0021] Figure 3 This is the second schematic diagram of the silicon carbide detector chip in Embodiment 2 of the present invention.

[0022] Figure label:

[0023] 1. Pad electrode; 2. First electrode; 3. Passivation layer; 4. Transparent electrode; 5. Ohmic contact layer; 6. Intrinsic layer; 7. Silicon carbide substrate; 8. Second electrode; 9. Insertion layer. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0025] Where specific techniques or conditions are not specified in the examples, they shall be performed in accordance with the techniques or conditions described in the literature in this field, or in accordance with the product instructions. Reagents or instruments whose manufacturers are not specified are all conventional products that can be purchased through legitimate channels.

[0026] The following is combined Figures 1-3 This invention describes a method for fabricating a silicon carbide detector chip containing transparent electrodes and its applications.

[0027] The silicon carbide detector chip provided by the present invention is a detector chip that is incident vertically from the top surface, and from top to bottom includes: a first electrode, a transparent electrode, an ohmic contact layer, an intrinsic layer, a silicon carbide substrate, and a second electrode.

[0028] like Figure 1 As shown, the first electrode has an overall ring structure, with its ring portion located at the edge of the transparent electrode and in ohmic contact with the first electrode for use as a lead wire; the size of the ring structure can be determined according to the structure of the silicon carbide detector used in the silicon carbide detector chip. Generally, in order to increase the reception of photons or high-energy particles by the transparent electrode, the inner diameter of the ring structure can be appropriately increased.

[0029] An electric dipole layer is formed between the transparent electrode and the ohmic contact layer for receiving photons or high-energy particles and transporting charge carriers.

[0030] The silicon carbide detector chip designed in this invention, except for the first electrode mentioned above, has other parts such as the first electrode, transparent electrode, ohmic contact layer, intrinsic layer, silicon carbide substrate and second electrode, all of which are solid layer structures arranged layer by layer from top to bottom.

[0031] Preferably, the transparent electrode is a graphene transparent electrode, a black phosphorus transparent electrode, or a molybdenum disulfide transparent electrode.

[0032] Preferably, the thickness of the transparent electrode is 0.2 nm to 5 nm, and more preferably, the transparency to ultraviolet and / or extreme ultraviolet light is 80% or more.

[0033] Preferably, the top of the transparent electrode, except for the first electrode, is a passivation layer. More preferably, the passivation layer is a silicon dioxide passivation layer or a silicon nitride passivation layer. Preferably, its thickness is generally 100–500 nm. In addition to protecting the transparent electrode, the passivation layer in this invention also acts as a light-reflecting anti-reflection film by optimizing its thickness and selecting the transmittance based on the ultraviolet light used in the TCT test.

[0034] Preferably, an insertion layer is provided between the silicon carbide substrate and the second electrode, and the insertion layer is in ohmic contact with the second electrode, and an electric dipole layer is formed between the insertion layer and the ohmic contact layer. The insertion layer is a graphene insertion layer, a black phosphorus insertion layer, or a molybdenum disulfide insertion layer. Preferably, the thickness of the insertion layer is generally 0.2 nm to 5 nm.

[0035] Preferably, the first electrode is a Ni / Ti / Al alloy electrode, an Al / Ti / Au alloy electrode, or a Ti / Al / Au alloy electrode, and preferably, its thickness is generally Ni / Ti / Al = 30nm / 60nm / 500nm; Al / Ti / Au = 30nm / 70nm / 100nm; Ti / Al / Au = 120nm / 60nm / 80nm, and / or the second electrode is a Ni / Ti / Al alloy electrode, an Al / Ti / Au alloy electrode, or a Ti / Al / Au alloy electrode, and preferably, its thickness is generally Ni / Ti / Al = 40nm / 70nm / 500nm; Al / Ti / Au = 30nm / 60nm / 300nm; Ti / Al / Au = 120nm / 60nm / 100nm.

[0036] Preferably, the ohmic contact layer is a p-type heavily doped silicon carbide layer with a thickness of 0.2 μm to 5 μm, and preferably has an average doping concentration of 1 × 10⁻⁶. 18 cm -3 ~1×10 20 cm -3 .

[0037] Preferably, the intrinsic layer is N-type lightly doped silicon carbide with a thickness of 10 μm to 400 μm, and preferably its average doping concentration is controlled at 1 × 10⁻⁶. 15 cm -3 The silicon carbide substrate is an N-type conductive silicon carbide substrate, typically with a thickness of 350 μm.

[0038] The present invention also provides a method for fabricating a silicon carbide detector chip as described above.

[0039] Preferably, the transparent electrode is fabricated on a silicon carbide epitaxial wafer by silicon carbide thermal decomposition, wet transfer chemical vapor deposition, chemical vapor deposition, or a coating solution method.

[0040] The first electrode is fabricated on the transparent electrode, and the annealing temperature used in fabricating the first electrode is 300℃~800℃;

[0041] Remove excess material used in the fabrication of the transparent electrode;

[0042] Create a passivation layer;

[0043] The insertion layer is fabricated on the back side of the silicon carbide epitaxial wafer;

[0044] The second electrode is fabricated on the insertion layer, and the annealing temperature used when fabricating the second electrode is 300℃~800℃;

[0045] Fabrication of Pad electrodes;

[0046] Dicing and packaging.

[0047] Due to limitations imposed by the electron affinity and surface state density of silicon carbide, ohmic contacts formed by high-temperature annealing (>1000℃) exhibit high resistivity, poor stability, and low process repeatability. Furthermore, high-temperature annealing activates impurities in silicon carbide, leading to signal scattering and hindering improvements in the signal-to-noise ratio, charge collection, time resolution, and operational stability of silicon carbide detectors. The transparent electrode material used in this invention can form ohmic contacts with the first and second electrodes at low temperatures, contributing to improved performance of the silicon carbide detector.

[0048] like Figure 2 As shown, taking a silicon carbide detector chip with an insertion layer as an example, the specific fabrication steps are as follows:

[0049] Step 1: Cleaning and drying the silicon carbide epitaxial wafer:

[0050] The silicon carbide epitaxial wafer to be cleaned is cleaned according to the RCA standard. After cleaning, the chip is dried under protection with high-purity nitrogen gas to ensure cleanliness. Then, the silicon carbide epitaxial wafer to be processed is heated and dried for later use. The silicon carbide epitaxial wafer to be cleaned can be obtained using conventional epitaxial fabrication methods, such as epitaxially growing intrinsic layers and ohmic contact layers on a silicon carbide substrate.

[0051] Step 2: Fabrication of transparent electrodes

[0052] First, a transparent electrode needs to be prepared on the ohmic contact layer by means of silicon carbide thermal decomposition, wet transfer chemical vapor deposition, vapor deposition or coating solution method. Among them, the coating solution method can be spin coating solution method, drop coating solution method or spray coating solution method.

[0053] Step 3: Fabrication of the first electrode

[0054] A negative stripping photoresist such as SU-8 is coated onto the epitaxial wafer to be processed, and the first electrode pattern is fabricated by photolithography and development. Then, metal processing techniques such as magnetron sputtering are used to grow the electrode metal material. Finally, a metal lift-off process is performed to fabricate the first metal electrode.

[0055] Step 4: Remove excess 2D material

[0056] A photoresist such as AZ5214 is coated onto the epitaxial wafer to be processed, serving as a soft mask for etching or etching. The first electrode structure pattern is obtained through photolithography and development. Then, excess two-dimensional material on the epitaxial wafer is removed using methods such as wet etching or dry etching, and the chip is cleaned according to the RCA standard. After cleaning, the epitaxial wafer is dried under high-purity nitrogen protection to ensure cleanliness. Finally, the wafer is heated and dried for later use.

[0057] Step 5: Create a passivation layer

[0058] First, a certain thickness of insulating material such as SiO2 or Si3N4 is deposited or sputtered on the epitaxial wafer to be processed as a passivation layer; second, the epitaxial wafer to be processed is coated with photoresist such as AZ5214, the hole of the first electrode is photolithographically developed, and the passivation layer is etched or etched to create the hole of the first electrode.

[0059] Step 6: Create the insertion layer

[0060] An insertion layer is prepared on the back side of the silicon carbide epitaxial wafer according to the method in step two.

[0061] Step 7: Fabrication of the second electrode

[0062] A metal second electrode is sputtered onto the insertion layer using magnetron sputtering technology. The metal alloy is then annealed using a rapid annealing process, wherein the annealing temperature is 300℃~800℃ and the annealing time is 30s~3min.

[0063] Step 8: Fabricating Pad Electrodes

[0064] A negative release photoresist such as SU-8 is coated onto the epitaxial wafer to be processed, and the Pad electrode pattern is fabricated by photolithography and development. A second metal electrode is sputtered onto the insertion layer using magnetron sputtering technology, and the Pad electrode is formed by metal lift-off.

[0065] Step Nine, Dicing and Packaging:

[0066] The fabricated chips are diced using a dicing machine, and the electrodes of the external power supply system are soldered to the solder joints using wire bonding and thermoforming methods, and the chips are then packaged.

[0067] If there is no insertion layer, step six is ​​omitted in the preparation process, and in step seven, the second electrode is formed by sputtering on the back of the silicon carbide epitaxial wafer.

[0068] Example 1

[0069] like Figure 2 As shown, a silicon carbide detector chip with transparent electrodes is a detector chip that is incident vertically from the top surface. From top to bottom, it consists of a Pad electrode 1, a Ni / Ti / Al alloy electrode (thickness of 60nm / 30nm / 500nm) 2, a silicon dioxide passivation layer (thickness of 400nm) 3, a graphene transparent electrode (thickness of 0.334nm, transparency of 90%) 4, an ohmic contact layer 5, an intrinsic layer 6, an N-type conductive silicon carbide substrate (thickness of 350μm) 7, a monolayer graphene insertion layer (thickness of approximately 0.334nm) 9, and a Ni / Ti / Al alloy electrode (thickness of 60nm / 30nm / 500nm) 8.

[0070] The first electrode has a ring structure, with its ring portion located at the edge of the transparent electrode and in ohmic contact with the first electrode for use as a lead wire. An electric dipole layer is formed between the transparent electrode and the ohmic contact layer for receiving photons or high-energy particles and for carrier transport. The top of the transparent electrode, except for the first electrode, is a silicon dioxide passivation layer.

[0071] Ohmic contact layer 5 is p-type heavily doped silicon carbide, with Al ions as the dopant. 3+ The average doping concentration is 5×10 19 cm -3 The thickness is 0.4μm.

[0072] Intrinsic layer 6 is N-type lightly doped silicon carbide, with an average doping concentration controlled at 5 × 10⁶. 13 cm -3 The thickness is 100μm.

[0073] Example 2

[0074] like Figure 3 As shown, a silicon carbide detector chip with transparent electrodes differs from Example 1 only in that it does not contain the insertion layer 9, and the passivation layer 3 has a thickness of 300 nm.

[0075] The silicon carbide detector chip fabricated by designing the first electrode as a ring structure and achieving ohmic contact between the first electrode, the transparent electrode, and the ohmic contact layer can not only meet the performance testing requirements of silicon carbide detectors based on ultraviolet laser transient current technology (TCT), but also significantly improves the time resolution and position resolution performance of the silicon carbide detector for passing particles, making it particularly suitable for nuclear reactor detection and heavy ion detection.

[0076] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A silicon carbide detector chip, wherein the chip is a detector chip incident perpendicularly from its top surface, characterized in that, From top to bottom, it includes: a first electrode, a transparent electrode, an ohmic contact layer, an intrinsic layer, a silicon carbide substrate, and a second electrode; The first electrode has an overall ring structure, and its ring portion is located at the edge of the transparent electrode and is in ohmic contact with the first electrode. An electric dipole layer is formed between the transparent electrode and the ohmic contact layer for receiving photons or high-energy particles and transporting charge carriers; the ohmic contact layer is a p-type heavily doped silicon carbide layer with a thickness of 0.2 μm to 5 μm and an average doping concentration of 1 × 10⁻⁶. 18 cm -3 ~1×10 20 cm -3 ; The transparent electrode is a graphene transparent electrode, a black phosphorus transparent electrode, or a molybdenum disulfide transparent electrode; the thickness of the transparent electrode is 0.2 nm to 5 nm. The method for fabricating the silicon carbide detector chip includes: fabricating the first electrode on the transparent electrode, wherein the annealing temperature used when fabricating the first electrode is 300℃~800℃.

2. The silicon carbide detector chip according to claim 1, characterized in that, The top of the transparent electrode, except for the first electrode, is covered by a passivation layer, which is either a silicon dioxide passivation layer or a silicon nitride passivation layer.

3. The silicon carbide detector chip according to claim 1, characterized in that, A graphene insertion layer, a black phosphorus insertion layer, or a molybdenum disulfide insertion layer is provided between the silicon carbide substrate and the second electrode, and an ohmic contact is formed between the graphene insertion layer and the second electrode, and an electric dipole layer is formed between the graphene insertion layer and the ohmic contact layer.

4. The silicon carbide detector chip according to claim 1, characterized in that, The first electrode is a Ni / Ti / Al alloy electrode, an Al / Ti / Au alloy electrode, or a Ti / Al / Au alloy electrode, and / or the second electrode is a Ni / Ti / Al alloy electrode, an Al / Ti / Au alloy electrode, or a Ti / Al / Au alloy electrode.

5. The silicon carbide detector chip according to claim 1, characterized in that, The intrinsic layer is N-type lightly doped silicon carbide with a thickness of 10 μm to 400 μm; and / or, the silicon carbide substrate is an N-type conductive silicon carbide substrate.

6. A method for fabricating the silicon carbide detector chip according to any one of claims 1 to 5.

7. The application of the silicon carbide detector chip according to any one of claims 1 to 5 in nuclear reactor detection or heavy ion detection.

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