Mini-led chip and manufacturing method thereof

Abstract

The application provides a Mini-LED chip and a manufacturing method thereof, wherein the Mini-LED chip comprises: a transparent substrate, the transparent substrate comprises a first surface and a second surface arranged oppositely, and the second surface is a light-out surface; a reflective layer arranged on a side surface of the second type semiconductor layer away from the active region and spaced apart from the peripheral side wall of the epitaxial structure and the side wall of the groove; and a combined insulating layer covering the epitaxial structure, the transparent substrate and part of the exposed surface of the reflective layer, wherein the insulating layer comprises a DBR reflective structure layer, which can not only protect the chip from water vapor intrusion to prevent short circuit of the chip, but also has a reflective effect to make the chip emit light from a single surface, and the chip emits light only from the second surface, thereby solving the problem of light leakage from the side wall of the chip and improving the light-out efficiency of the Mini-LED chip, and avoiding the light leakage phenomenon of the Mini-LED chip when used in a display backlight source.

Description

Technical Field

[0001] This invention relates to the field of light-emitting diode technology, and more specifically, to a Mini-LED chip and its manufacturing method. Background Technology

[0002] With the rapid development of light-emitting diodes (LEDs), their applications are changing rapidly, especially in display technology. As the resolution of LED displays increases, the size and spacing of LED chips are becoming smaller and smaller.

[0003] Compared to current LCD and OLED displays, Mini-LED devices offer advantages such as faster response time, wider color gamut, higher PPI, and lower power consumption. Currently, most Mini-LEDs utilize a transparent substrate combined with a flip-chip bonding structure as a backlight source in displays. To prevent light leakage, conventional designs use a wrapping material around the encapsulation layer. While using a non-transparent material to wrap the encapsulation layer largely prevents light leakage, a small amount still exists, resulting in suboptimal display performance. Summary of the Invention

[0004] In view of this, the present invention provides a Mini-LED chip and a method for manufacturing the same, in order to solve problems such as light leakage from the sidewalls of the chip in the prior art.

[0005] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0006] A Mini-LED chip, characterized in that it comprises:

[0007] A transparent substrate, the transparent substrate including a first surface and a second surface disposed opposite to each other, the second surface being a light-emitting surface;

[0008] An epitaxial structure is stacked on the first surface. The epitaxial structure includes a first type semiconductor layer, an active region, and a second type semiconductor layer stacked sequentially along a first direction. The upper surface of the second type semiconductor layer is provided with a groove extending toward the first type semiconductor layer and exposing a portion of the first type semiconductor layer. The first direction is perpendicular to the transparent substrate and points from the transparent substrate toward the epitaxial structure.

[0009] A reflective layer is disposed on the side surface of the second type semiconductor layer away from the active region, and is spaced apart from the peripheral sidewall of the epitaxial structure and the sidewall of the groove.

[0010] An insulating layer covers the exposed surfaces of the epitaxial structure, the transparent substrate, and a portion of the reflective layer, and exposes the bottom of the groove; the insulating layer includes a DBR reflective structure layer.

[0011] A first electrode is disposed on the side surface of the insulating layer opposite to the reflective layer and extends to the exposed portion of the groove, and is connected to the first type of semiconductor layer;

[0012] The second electrode is disposed on the side surface of the insulating layer opposite to the reflective layer, and is connected to the second type semiconductor layer through a second electrode conductive via, and the first electrode and the second electrode are disposed at intervals.

[0013] Preferably, the reflective layer is an insulating reflective layer or a metal reflective layer. The insulating reflective layer includes any one or more of the following stacked structures: titanium dioxide layer, silicon nitride layer, silicon dioxide layer, magnesium fluoride layer, and magnesium oxide layer. The metal reflective layer includes any one or more of the following stacked structures: Ag, Al, and Au.

[0014] Preferably, the second electrode conductive via penetrates the insulating layer and the insulating reflective layer, exposing a portion of the second type semiconductor layer, and the second electrode extends to the second type semiconductor layer through the second electrode conductive via to form an electrical connection.

[0015] Preferably, the metal reflective layer covers the second type semiconductor layer, the second electrode conductive via penetrates the insulating layer, exposing a portion of the metal reflective layer, and the second electrode extends through the second electrode conductive via to the metal reflective layer to form an electrical connection with the second type semiconductor layer.

[0016] Preferably, the metal reflective layer is spaced apart from the peripheral sidewall of the epitaxial structure by an isolation layer, the isolation layer covers the peripheral sidewall of the epitaxial structure and the peripheral sidewall of the transparent substrate, and the metal reflective layer extends to the side surface of the isolation layer opposite to the epitaxial structure;

[0017] Alternatively, the metal reflective layer is spaced apart from the peripheral sidewall of the epitaxial structure and the sidewall of the groove by an isolation layer, the isolation layer covering the peripheral sidewall of the epitaxial structure, the peripheral sidewall of the transparent substrate and the sidewall of the groove, and the metal reflective layer extending to the side surface of the isolation layer opposite to the epitaxial structure.

[0018] Preferably, a barrier layer is provided between the metal reflective layer and the insulating layer, and the barrier layer covers the metal reflective layer. The second electrode conductive via penetrates the insulating layer, exposing a portion of the barrier layer. The second electrode extends through the second electrode conductive via to the barrier layer and forms an electrical connection with the second type semiconductor layer. The barrier layer is made of a metal material that is not easily oxidized.

[0019] Preferably, both the peripheral sidewalls of the epitaxial structure and the peripheral sidewalls of the transparent substrate are inclined sidewalls.

[0020] Preferably, the angle between the outer sidewall of the epitaxial structure and the first surface is a first angle, and the angle between the outer sidewall of the transparent substrate and the second surface is a second angle, wherein both the first angle and the second angle are less than 80 degrees.

[0021] Preferably, the distance between the first electrode and the second electrode is greater than 20 μm.

[0022] Preferably, the active region is located within the reflection range of the insulating layer and the reflective layer.

[0023] This invention also provides a method for manufacturing a Mini-LED chip, characterized in that the method includes the following steps:

[0024] Step S1: Provide a transparent substrate and a temporary carrier plate, wherein the transparent substrate includes a first surface;

[0025] Step S2: An epitaxial stacked structure is formed on the first surface;

[0026] Step S3: ICP etching is used to etch along the upper surface of the stacked structure to expose a portion of the transparent substrate to form a first dicing channel. The stacked structure is divided into multiple independent epitaxial structures through the first dicing channel. Each epitaxial structure includes a first type semiconductor layer, an active region, and a second type semiconductor layer stacked sequentially along the growth direction.

[0027] Simultaneously, etching is performed along the upper surface of the second type semiconductor layer to expose a portion of the first type semiconductor layer, forming a groove;

[0028] Step S4: Thin the transparent substrate using a grinding process to expose the second surface;

[0029] Step S5: Transfer the epitaxial structure to the temporary carrier through the transparent substrate. The second surface B is connected to the temporary carrier and laser cutting is used to penetrate the second surface along the first cutting path to expose the outer sidewall of the temporary carrier and the transparent substrate. The second surface is arranged opposite to the first surface and is the light-emitting surface.

[0030] Step S6: Grow a reflective layer, which is disposed on the side surface of the second type semiconductor layer away from the active region and spaced apart from the peripheral sidewall of the epitaxial structure and the sidewall of the groove.

[0031] Step S7: Grow an insulating layer that covers the exposed surfaces of the epitaxial structure, the transparent substrate, and part of the reflective layer, and exposes the bottom of the groove. The insulating layer includes a DBR reflective structure layer.

[0032] Step S8: Fabricate the first electrode and the second electrode;

[0033] The first electrode is disposed on the side surface of the insulating layer opposite to the reflective layer and extends to the exposed portion of the groove, and is connected to the first type of semiconductor layer;

[0034] The second electrode is disposed on the side surface of the insulating layer opposite to the reflective layer, and is connected to the second type semiconductor layer through a second electrode conductive via, wherein the first electrode and the second electrode are disposed at an interval;

[0035] Step S9: Peel off the temporary carrier board to form multiple independent Mini-LED chips.

[0036] This invention also provides another method for manufacturing a Mini-LED chip, characterized in that the method includes the following steps:

[0037] Step A1: Provide a transparent substrate, the transparent substrate including a first surface;

[0038] Step A2: An epitaxial stacked structure is formed on the first surface;

[0039] Step A3: Using a dicing blade, cut along the upper surface of the stacked structure to expose a portion of the transparent substrate to form a second dicing channel. The second dicing channel exposes the outer sidewall of the transparent substrate. The stacked structure is divided into multiple independent epitaxial structures through the second dicing channel. Each epitaxial structure includes a first type semiconductor layer, an active region, and a second type semiconductor layer stacked sequentially along the growth direction.

[0040] Step A4: Etch along the upper surface of the second type semiconductor layer to expose a portion of the first type semiconductor layer and form a groove;

[0041] Step A5: Grow a reflective layer, which is disposed on the side surface of the second type semiconductor layer away from the active region and spaced apart from the peripheral sidewall of the epitaxial structure and the sidewall of the groove.

[0042] Step A6: Grow an insulating layer that covers the exposed surfaces of the epitaxial structure, the transparent substrate, and part of the reflective layer, and exposes the bottom of the groove. The insulating layer includes a DBR reflective structure layer.

[0043] Step A7: Fabricate the first and second electrodes;

[0044] The first electrode is disposed on the side surface of the insulating layer opposite to the reflective layer and extends to the exposed portion of the groove, and is connected to the first type of semiconductor layer;

[0045] The second electrode is disposed on the side surface of the insulating layer opposite to the reflective layer, and is connected to the second type semiconductor layer through a second electrode conductive via, wherein the first electrode and the second electrode are disposed at an interval;

[0046] Step A8: Thin the transparent substrate using a grinding process to expose the second surface, and simultaneously separate and form multiple independent Mini-LED chips. The second surface is positioned opposite to the first surface and is the light-emitting surface.

[0047] Preferably, the reflective layer is an insulating reflective layer or a metal reflective layer. The insulating reflective layer includes any one or more of the following stacked structures: titanium dioxide layer, silicon nitride layer, silicon dioxide layer, magnesium fluoride layer, and magnesium oxide layer. The metal reflective layer includes any one or more of the following stacked structures: Ag, Al, and Au.

[0048] Preferably, the metal reflective layer covers the second type semiconductor layer, the second electrode conductive via penetrates the insulating layer, exposing a portion of the metal reflective layer, and the second electrode extends through the second electrode conductive via to the metal reflective layer to form an electrical connection with the second type semiconductor layer.

[0049] Preferably, the metal reflective layer is spaced apart from the peripheral sidewall of the epitaxial structure by an isolation layer, the isolation layer covers the peripheral sidewall of the epitaxial structure and the peripheral sidewall of the transparent substrate, and the metal reflective layer extends to the side surface of the isolation layer opposite to the epitaxial structure;

[0050] Alternatively, the metal reflective layer is spaced apart from the peripheral sidewall of the epitaxial structure and the sidewall of the groove by an isolation layer, the isolation layer covering the peripheral sidewall of the epitaxial structure, the peripheral sidewall of the transparent substrate and the sidewall of the groove, and the metal reflective layer extending to the side surface of the isolation layer opposite to the epitaxial structure.

[0051] Preferably, a barrier layer is provided between the metal reflective layer and the insulating layer, and the barrier layer covers the metal reflective layer. The second electrode conductive via penetrates the insulating layer, exposing a portion of the barrier layer. The second electrode extends through the second electrode conductive via to the barrier layer and forms an electrical connection with the second type semiconductor layer. The barrier layer is made of a metal material that is not easily oxidized.

[0052] Preferably, both the peripheral sidewalls of the epitaxial structure and the peripheral sidewalls of the transparent substrate are inclined sidewalls.

[0053] Preferably, the angle between the outer sidewall of the epitaxial structure and the first surface is a first angle, and the angle between the outer sidewall of the transparent substrate and the second surface is a second angle, wherein both the first angle and the second angle are less than 80 degrees.

[0054] The above technical solution achieves the following results:

[0055] 1. The present invention provides a Mini-LED chip, which includes a transparent substrate comprising a first surface and a second surface disposed opposite to each other, the second surface being the light-emitting surface; and a reflective layer disposed on the side surface of the second type semiconductor layer away from the active region, and spaced apart from the peripheral sidewall of the epitaxial structure and the sidewall of the groove; combined with an insulating layer covering the exposed surfaces of the epitaxial structure, the transparent substrate, and part of the reflective layer, particularly the peripheral sidewall of the epitaxial structure and the peripheral sidewall of the transparent substrate, the insulating layer including a DBR reflective structure layer, which can protect the chip from moisture intrusion and prevent short circuits, and also has a reflective effect so that the chip emits light from one side only, and only from the second surface, solving the problem of light leakage from the chip sidewall, thereby improving the light emission efficiency of the Mini-LED chip and avoiding light leakage when the Mini-LED chip is used as a display backlight.

[0056] 2. Further, a metal reflective layer is provided at intervals between the metal reflective layer and the peripheral sidewall of the epitaxial structure through an isolation layer. The isolation layer covers the peripheral sidewall of the epitaxial structure and the peripheral sidewall of the transparent substrate, and the metal reflective layer extends to the side surface of the isolation layer opposite to the epitaxial structure; or, the metal reflective layer is provided at intervals between the metal reflective layer and the peripheral sidewall of the epitaxial structure and the sidewall of the groove through an isolation layer. The isolation layer covers the peripheral sidewall of the epitaxial structure, the peripheral sidewall of the transparent substrate, and the sidewall of the groove, and the metal reflective layer extends to the side surface of the isolation layer opposite to the epitaxial structure, which can further improve the reflective effect of the sidewall of the epitaxial structure and the sidewall of the transparent substrate.

[0057] 3. Furthermore, by setting a barrier layer between the metal reflective layer and the insulating layer, and the barrier layer covering the metal reflective layer, the barrier layer is made of a metal material that is not easily oxidized, which can prevent the metal materials of the first electrode and the second electrode from diffusing to the metal reflective layer and the active area, affecting the reflection effect and device stability, thereby improving the light extraction efficiency and reliability of the Mini-LED chip.

[0058] 4. Furthermore, by setting the distance between the first electrode and the second electrode to be greater than 20um, the problem of electrode short circuit caused by reflow soldering when Mini-LED chips are bonded to the PCB board can be avoided.

[0059] 5. Furthermore, by setting the active region within the reflection range of the insulating layer and the reflective layer, the emission angle and external quantum efficiency can be effectively improved.

[0060] 6. Furthermore, by setting the angle between the outer sidewall of the epitaxial structure and the first surface as the first angle, and the angle between the outer sidewall of the transparent substrate and the second surface as the second angle, the angles of the first angle and the second angle are both less than 80 degrees, which can further improve the light emission angle.

[0061] 7. The present invention provides a method for fabricating a Mini-LED chip, which is used to prepare a Mini-LED chip by providing a transparent substrate, the transparent substrate including a first surface; forming a stacked structure epitaxially on the first surface; firstly using ICP etching, forming a first dicing channel and groove on the stacked structure in the same etching process, dividing the stacked structure into multiple independent epitaxial structures through the first dicing channel; then using a grinding process to thin the transparent substrate to expose the second surface; then transferring the epitaxial structure to a temporary carrier, and using a laser cutting process to penetrate the second surface along the dicing channel to expose the outer sidewalls of the temporary carrier and the transparent substrate, so that the subsequently grown insulating layer can cover the exposed surfaces of the epitaxial structure, the transparent substrate, and part of the reflective layer, especially the sidewalls of the epitaxial structure and the sidewalls of the transparent substrate. The insulating layer includes a DBR reflective structure layer, which can protect the chip from moisture intrusion and prevent short circuits, and also has a reflective effect so that the chip emits light from one side only, and only from the second surface, solving the problem of light leakage from the chip sidewalls, thereby improving the light emission efficiency of the Mini-LED chip and avoiding light leakage when the Mini-LED chip is used as a display backlight.

[0062] 8. Another method for fabricating a Mini-LED chip provided by the present invention is used to prepare a Mini-LED chip. This involves providing a transparent substrate, the transparent substrate including a first surface; forming a stacked structure epitaxially on the first surface; using a dicing tool to form a second dicing channel on the stacked structure, dividing the stacked structure into multiple independent epitaxial structures through the second dicing channel, and the second dicing channel can directly expose the outer sidewalls of the transparent substrate so that the subsequently grown insulating layer can cover the exposed surfaces of the epitaxial structure, the transparent substrate, and part of the reflective layer, particularly the sidewalls of the epitaxial structure and the sidewalls of the transparent substrate. The insulating layer includes a DBR reflective structure layer, which can protect the chip from moisture intrusion and prevent short circuits, while also having a reflective effect so that the chip emits light from one side only, and only from the second surface, solving the problem of light leakage from the chip's sidewalls, thereby improving the light extraction efficiency of the Mini-LED chip and avoiding light leakage when the Mini-LED chip is used as a display backlight. Attached Figure Description

[0063] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0064] Figures 1.1 to 1.2 This is a schematic diagram of the structure of a Mini-LED chip provided in an embodiment of the present invention;

[0065] Figures 2.1 to 2.2 This is a schematic diagram of another Mini-LED chip provided in an embodiment of the present invention;

[0066] Figures 3.1 to 3.2 This is a schematic diagram of the structure of another Mini-LED chip provided in an embodiment of the present invention;

[0067] Figures 4.1 to 4.2 This is a schematic diagram of the structure of another Mini-LED chip provided in an embodiment of the present invention;

[0068] Figure 5 This is a schematic diagram of the structure of another Mini-LED chip provided in an embodiment of the present invention;

[0069] Figure 6 This is a schematic diagram of the structure of another Mini-LED chip provided in an embodiment of the present invention;

[0070] Figure 7 This is a schematic diagram of the structure of another Mini-LED chip provided in an embodiment of the present invention;

[0071] Figure 8 This is a schematic diagram of the structure of another Mini-LED chip provided in an embodiment of the present invention;

[0072] Figures 9.1 to 9.9 This is a schematic diagram showing the structure of each step in a method for manufacturing a Mini-LED chip according to an embodiment of the present invention.

[0073] Figures 10.1 to 10.8 This is a schematic diagram showing the structural steps of another method for manufacturing a Mini-LED chip according to an embodiment of the present invention.

[0074] Explanation of symbols in the diagram:

[0075] 01. Temporary carrier plate; 02. Stacked structure; 03a. First cutting track; 03b. Second cutting track;

[0076] 1. Transparent substrate; 2. Epitaxial structure; 21. Type I semiconductor layer; 22. Active region; 23. Type II semiconductor layer; 3. Groove; 4. Reflective layer; 41. Insulating reflective layer; 42. Metal reflective layer; 5. Insulating layer; 6. First electrode; 61. First electrode contact layer; 7. Second electrode; 71. Second electrode conductive via; 8. Isolation layer; 9. Barrier layer; A. First surface; B. Second surface. Detailed Implementation

[0077] To make the content of this invention clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0078] Many specific details are set forth in the following description in order to provide a full understanding of this application. However, this application may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0079] Secondly, this application provides a detailed description in conjunction with schematic diagrams. When detailing the embodiments of this application, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged, not adhering to the usual scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of this application. In addition, actual fabrication should include three-dimensional spatial dimensions of length, width, and depth.

[0080] An embodiment of the present invention provides a Mini-LED chip, such as... Figures 1.1 to 1.2 As shown, it includes:

[0081] Transparent substrate 1, the transparent substrate 1 includes a first surface A and a second surface B disposed opposite to each other, the second surface B being a light-emitting surface;

[0082] An epitaxial structure 2 is stacked on the first surface A. The epitaxial structure 2 includes a first type semiconductor layer 21, an active region 22 and a second type semiconductor layer 23 stacked sequentially along a first direction. The upper surface of the second type semiconductor layer 23 is provided with a groove 3 extending toward the first type semiconductor layer 21 and exposing part of the first type semiconductor layer 21. The first direction is perpendicular to the transparent substrate 1 and points from the transparent substrate 1 toward the epitaxial structure 2.

[0083] The reflective layer 4 is disposed on the side surface of the second type semiconductor layer 23 away from the active region 22, and is spaced apart from the peripheral sidewall of the epitaxial structure 2 and the sidewall of the groove 3.

[0084] An insulating layer 5 covers the exposed surfaces of the epitaxial structure 2, the transparent substrate 1, and part of the reflective layer 4, and exposes the bottom of the groove 3. The insulating layer 5 includes a DBR reflective structure layer.

[0085] The first electrode 6 is disposed on the side surface of the insulating layer 5 away from the reflective layer 4 and extends to the exposed portion of the groove 3, and is connected to the first type semiconductor layer 21.

[0086] The second electrode 7 is disposed on the side surface of the insulating layer 5 away from the reflective layer 4, and is connected to the second type semiconductor layer 23 through the second electrode conductive through hole 71, and the first electrode 6 and the second electrode 7 are disposed at intervals.

[0087] It should be noted that in this embodiment, the DBR reflective structure layer is formed by repeatedly stacking two layers of dielectric materials with different refractive indices to form a multi-layer structure. The dielectric material can be a combination of silicon oxide and titanium oxide.

[0088] It should also be noted that the specific doping type of the first type semiconductor layer 21 and the second type semiconductor layer 23 is not limited in this embodiment. The doping types of the first type semiconductor layer 21 and the second type semiconductor layer 23 are opposite. The first type semiconductor layer 21 can be a P-type semiconductor layer or an N-type semiconductor layer. Optionally, in this embodiment, the first type semiconductor layer 21 is an N-type semiconductor layer, the first electrode 6 is an N-electrode, the second type semiconductor layer 23 is a P-type semiconductor layer, and the second electrode 7 is a P-electrode. The specific materials of the N-type semiconductor layer and the P-type semiconductor layer can be selected according to the actual situation.

[0089] Optionally, in this embodiment, the thickness of the transparent substrate 1 is 30um-250um, including the endpoint values.

[0090] Optionally, in this embodiment, the transparent substrate 1 can be a sapphire substrate. This application does not limit the material of the transparent substrate 1, but it depends on the specific circumstances.

[0091] Optionally, in this embodiment, the active region 22 is located within the reflection range of the insulating layer 5 and the reflective layer 4.

[0092] Optionally, in this embodiment, the reflective layer 4 is an insulating reflective layer 41 or a metal reflective layer 42. The insulating reflective layer 41 includes any one or more of the following stacked structures: titanium dioxide layer, silicon nitride layer, silicon dioxide layer, magnesium fluoride layer, and magnesium oxide layer. The metal reflective layer 42 includes any one or more of the following stacked structures: Ag, Al, and Au.

[0093] Optionally, in this embodiment, the distance between the first electrode 6 and the second electrode 7 is greater than 20 μm.

[0094] In this embodiment, the specific materials of the first electrode 6 and the second electrode 7 are not limited. Optionally, the first electrode 6 and the second electrode 7 are materials with high electrical conductivity, including one or more alloys of metal materials such as Ag, Al, Au, Cr, Ni, Pd, Pt, Ti, Ni, and W.

[0095] Optionally, in another embodiment of this application, such as Figures 2.1 to 2.2As shown, the second electrode conductive via 71 penetrates the insulating layer 5 and the insulating reflective layer 41, exposing a portion of the second type semiconductor layer 23. The second electrode 7 extends to the second type semiconductor layer 23 through the second electrode conductive via 71 to form an electrical connection.

[0096] Optionally, in another embodiment of this application, such as Figures 3.1 to 3.2 As shown, the metal reflective layer 42 covers the second type semiconductor layer 23, the second electrode conductive via 71 penetrates the insulating layer 5, exposing part of the metal reflective layer 42, and the second electrode 7 extends through the second electrode conductive via 71 to the metal reflective layer 42 to form an electrical connection with the second type semiconductor layer 23.

[0097] It should be noted that in this embodiment, the metal reflective layer 42 can reduce the light absorption of the second electrode 7 and increase the reflection effect, thereby improving the light output rate.

[0098] Optionally, in this embodiment, the areas of the first electrode 6 and the second electrode 7 are both smaller than the metal reflector. Since the electrodes absorb light, the areas of the first electrode 6 and the second electrode 7 cannot be too large in order to ensure the light output area.

[0099] To increase current spread and improve the light extraction efficiency of the Mini-LED chip, optionally, in another embodiment of this application, such as Figures 4.1 to 4.2 As shown, the second electrode conductive via 71 consists of multiple vias, and the second electrode 7 is electrically connected to the second type semiconductor layer 23 through each second electrode conductive via 71.

[0100] Optionally, in this embodiment, the Mini-LED chip further includes: a first electrode contact layer 61 located at the bottom of the groove 3. The first electrode contact layer 61 is spaced apart from the active region 22 and the second type semiconductor layer 23 through the insulating layer 5. The first electrode 6 is electrically connected to the first type semiconductor layer 21 through the first electrode contact layer 61, which can further increase the current spread and improve the light output efficiency of the Mini-LED chip.

[0101] Optionally, in this embodiment, the first electrode contact layer 61 is a metal reflective structure, used to reduce light absorption by the first electrode 6 and improve light extraction efficiency.

[0102] Optionally, in another embodiment of this application, such as Figure 5 As shown, the metal reflective layer 42 is disposed at intervals with the peripheral sidewall of the epitaxial structure 2 through the isolation layer 8. The isolation layer 8 covers the peripheral sidewall of the epitaxial structure 2 and the peripheral sidewall of the transparent substrate 1. The metal reflective layer 42 extends to the side surface of the isolation layer 8 opposite to the epitaxial structure 2.

[0103] Or, such as Figure 6As shown, the metal reflective layer 42 is spaced apart from the outer sidewall of the epitaxial structure 2 and the sidewall of the groove 3 by the isolation layer 8. The isolation layer 8 covers the outer sidewall of the epitaxial structure 2, the outer sidewall of the transparent substrate 1 and the sidewall of the groove 3. The metal reflective layer 42 extends to the side surface of the isolation layer 8 opposite to the epitaxial structure 2.

[0104] Optionally, in this embodiment, the material of the isolation layer includes silicon dioxide or silicon nitride.

[0105] Optionally, in this embodiment, both the peripheral sidewalls of the epitaxial structure 2 and the peripheral sidewalls of the transparent substrate 1 are inclined sidewalls.

[0106] Optionally, in this embodiment, the angle between the outer sidewall of the epitaxial structure 2 and the first surface A is the first angle, and the angle between the outer sidewall of the transparent substrate 1 and the second surface B is the second angle, and the angles of the first angle and the second angle are both less than 80 degrees.

[0107] It should be noted that in this embodiment, the angles of the first included angle and the second included angle can be the same or different, depending on the actual needs.

[0108] Optionally, in another embodiment of this application, such as Figure 7 or Figure 8 As shown, a barrier layer 9 is provided between the metal reflective layer 42 and the insulating layer 5, and the barrier layer 9 covers the metal reflective layer 42. The second electrode conductive via 71 penetrates the insulating layer 5, exposing part of the barrier layer 9. The second electrode 7 extends through the second electrode conductive via 71 to the barrier layer 9 and forms an electrical connection with the second type semiconductor layer 23. The barrier layer 9 is a metal material that is not easily oxidized, such as titanium, tungsten, etc.

[0109] This invention also provides a method for manufacturing a Mini-LED chip, the method comprising the following steps:

[0110] Step S1, as follows Figure 9.1 As shown, a transparent substrate 1 and a temporary carrier plate 01 are provided. The transparent substrate 1 includes a first surface A.

[0111] Step S2, as follows Figure 9.2 As shown, a stacked structure 02 is epitaxially formed on the first surface A;

[0112] Step S3, as follows Figure 9.3 As shown, ICP etching is used to etch along the upper surface of the stacked structure 02, exposing a portion of the transparent substrate 1 to form a first dicing channel 03a. The stacked structure 02 is divided into multiple independent epitaxial structures 2 through the first dicing channel 03a. Each epitaxial structure 2 includes a first type semiconductor layer 21, an active region 22 and a second type semiconductor layer 23 stacked sequentially along the growth direction.

[0113] Simultaneously, etching is performed along the upper surface of the second type semiconductor layer 23 to expose a portion of the first type semiconductor layer 21, forming a groove 3;

[0114] Step S4, as follows Figure 9.4 As shown, the transparent substrate 1 is thinned using a grinding process to expose the second surface B;

[0115] Step S5, as follows Figure 9.5 As shown, the epitaxial structure 2 is transferred to the temporary carrier plate 01 through the transparent substrate 1. The second surface B is connected to the temporary carrier plate 01, and the laser cutting process is used to penetrate the second surface B along the first cutting path 03a to expose the outer sidewall of the temporary carrier plate 01 and the transparent substrate 1. The second surface B is set opposite to the first surface A, and the second surface B is the light-emitting surface.

[0116] Step S6, as follows Figure 9.6 As shown, a reflective layer 4 is grown, which is disposed on the side surface of the second type semiconductor layer 23 away from the active region 22, and is spaced apart from the outer sidewall of the epitaxial structure 2 and the sidewall of the groove 3.

[0117] Step S7, as follows Figure 9.7 As shown, an insulating layer 5 is grown, which covers the exposed surfaces of the epitaxial structure 2, the transparent substrate 1 and part of the reflective layer 4, and exposes the bottom of the groove 3. The insulating layer 5 includes a DBR reflective structure layer.

[0118] Step S8, as follows Figure 9.8 As shown, the first electrode 6 and the second electrode 7 are fabricated.

[0119] The first electrode 6 is disposed on the side surface of the insulating layer 5 away from the reflective layer 4 and extends to the exposed portion of the groove 3, and is connected to the first type semiconductor layer 21.

[0120] The second electrode 7 is disposed on the side surface of the insulating layer 5 away from the reflective layer 4, and is connected to the second type semiconductor layer 23 through the second electrode conductive through hole 71, and the first electrode 6 and the second electrode 7 are disposed at intervals.

[0121] Step S9, as follows Figure 9.9 As shown, the temporary carrier board 01 is peeled off to form multiple independent Mini-LED chips.

[0122] This invention also provides another method for manufacturing a Mini-LED chip, the method comprising the following steps:

[0123] Step A1, as follows Figure 10.1 As shown, a transparent substrate 1 is provided, the transparent substrate 1 including a first surface A;

[0124] Step A2, as follows Figure 10.2 As shown, a stacked structure 02 is epitaxially formed on the first surface A;

[0125] Step A3, as follows Figure 10.3 As shown, a cutting tool is used to cut along the upper surface of the stacked structure 02, exposing a portion of the transparent substrate 1 to form a second cutting channel 03b. The second cutting channel 03b exposes the outer sidewall of the transparent substrate 1. The stacked structure 02 is divided into multiple independent epitaxial structures 2 through the second cutting channel 03b. Each epitaxial structure 2 includes a first type semiconductor layer 21, an active region 22 and a second type semiconductor layer 23 stacked sequentially along the growth direction.

[0126] Step A4, as follows Figure 10.4 As shown, etching is performed along the upper surface of the second type semiconductor layer 23 to expose a portion of the first type semiconductor layer 21, forming a groove 3;

[0127] Step A5, as follows Figure 10.5 As shown, a reflective layer 4 is grown, which is disposed on the side surface of the second type semiconductor layer 23 away from the active region 22, and is spaced apart from the outer sidewall of the epitaxial structure 2 and the sidewall of the groove 3.

[0128] Step A6, as follows Figure 10.6 As shown, an insulating layer 5 is grown, which covers the exposed surfaces of the epitaxial structure 2, the transparent substrate 1 and part of the reflective layer 4, and exposes the bottom of the groove 3. The insulating layer 5 includes a DBR reflective structure layer.

[0129] Step A7, as follows Figure 10.7 As shown, the first electrode 6 and the second electrode 7 are fabricated.

[0130] The first electrode 6 is disposed on the side surface of the insulating layer 5 away from the reflective layer 4 and extends to the exposed portion of the groove 3, and is connected to the first type semiconductor layer 21.

[0131] The second electrode 7 is disposed on the side surface of the insulating layer 5 away from the reflective layer 4, and is connected to the second type semiconductor layer 23 through the second electrode conductive through hole 71, and the first electrode 6 and the second electrode 7 are disposed at intervals.

[0132] Step A8, as follows Figure 10.8 As shown, a transparent substrate 1 is thinned using a grinding process to expose the second surface B, while multiple independent Mini-LED chips are separated and formed. The second surface B is positioned opposite to the first surface A, and the second surface B is the light-emitting surface.

[0133] It should be noted that in the above embodiments, the DBR reflective structure layer is formed by repeatedly stacking two layers of dielectric materials with different refractive indices to form a multilayer structure. The dielectric material can be a combination of silicon oxide and titanium oxide.

[0134] It should also be noted that in the above embodiments, the specific doping types of the first type semiconductor layer 21 and the second type semiconductor layer 23 are not limited. The doping types of the first type semiconductor layer 21 and the second type semiconductor layer 23 are opposite. The first type semiconductor layer 21 can be a P-type semiconductor layer or an N-type semiconductor layer. Optionally, in this embodiment, the first type semiconductor layer 21 is an N-type semiconductor layer, the first electrode 6 is an N-electrode, the second type semiconductor layer 23 is a P-type semiconductor layer, and the second electrode 7 is a P-electrode. The specific materials of the N-type semiconductor layer and the P-type semiconductor layer can be selected according to the actual situation.

[0135] Based on the above embodiments, optionally, in another embodiment of this application, the thickness of the thinned transparent substrate 1 is 30um-250um, including the endpoint values.

[0136] Optionally, in this embodiment, the transparent substrate 1 can be a sapphire substrate. This application does not limit the material of the transparent substrate 1, but it depends on the specific circumstances.

[0137] Optionally, in this embodiment, the active region 22 is located within the reflection range of the insulating layer 5 and the reflective layer 4.

[0138] Optionally, in this embodiment, the reflective layer 4 is an insulating reflective layer 41 or a metal reflective layer 42. The insulating reflective layer 41 includes any one or more of the following stacked structures: titanium dioxide layer, silicon nitride layer, silicon dioxide layer, magnesium fluoride layer, and magnesium oxide layer. The metal reflective layer 42 includes any one or more of the following stacked structures: Ag, Al, and Au.

[0139] Optionally, in this embodiment, the distance between the first electrode 6 and the second electrode 7 is greater than 20 μm.

[0140] In this embodiment, the specific materials of the first electrode 6 and the second electrode 7 are not limited. Optionally, in this embodiment, the first electrode 6 and the second electrode 7 are materials with high electrical conductivity, including one or more alloys of metal materials such as Ag, Al, Au, Cr, Ni, Pd, Pt, Ti, Ni, and W.

[0141] Based on the above embodiments, optionally, in another embodiment of this application, reference is made to... Figures 2.1 to 2.2 As shown, the second electrode conductive via 71 penetrates the insulating layer 5 and the insulating reflective layer 41, exposing a portion of the second type semiconductor layer 23. The second electrode 7 extends to the second type semiconductor layer 23 through the second electrode conductive via 71 to form an electrical connection.

[0142] Optionally, in another embodiment of this application, reference is made to... Figures 3.1 to 3.2As shown, the metal reflective layer 42 covers the second type semiconductor layer 23, the second electrode conductive via 71 penetrates the insulating layer 5, exposing part of the metal reflective layer 42, and the second electrode 7 extends through the second electrode conductive via 71 to the metal reflective layer 42 to form an electrical connection with the second type semiconductor layer 23.

[0143] It should be noted that in this embodiment, the metal reflective layer 42 can reduce the light absorption of the second electrode 7 and increase the reflection effect, thereby improving the light output rate.

[0144] Optionally, in this embodiment, the areas of the first electrode 6 and the second electrode 7 are both smaller than the metal reflector. Since the electrodes absorb light, the areas of the first electrode 6 and the second electrode 7 cannot be too large in order to ensure the light output area.

[0145] Based on the above embodiments, in order to increase current spread and improve the light extraction efficiency of the Mini-LED chip, optionally, in another embodiment of this application, refer to Figures 4.1 to 4.2 As shown, the second electrode conductive via 71 consists of multiple vias, and the second electrode 7 is electrically connected to the second type semiconductor layer 23 through each second electrode conductive via 71.

[0146] Optionally, in this embodiment, the Mini-LED chip further includes: a first electrode contact layer 61 located at the bottom of the groove 3. The first electrode contact layer 61 is spaced apart from the active region 22 and the second type semiconductor layer 23 through the insulating layer 5. The first electrode 6 is electrically connected to the first type semiconductor layer 21 through the first electrode contact layer 61, which can further increase the current spread and improve the light output efficiency of the Mini-LED chip.

[0147] Optionally, in this embodiment, the first electrode contact layer 61 is a metal reflective structure, used to reduce light absorption by the first electrode 6 and improve light extraction efficiency.

[0148] Based on the above embodiments, optionally, in another embodiment of this application, reference is made to... Figure 5 As shown, the metal reflective layer 42 is disposed at intervals with the peripheral sidewall of the epitaxial structure 2 through the isolation layer 8. The isolation layer 8 covers the peripheral sidewall of the epitaxial structure 2 and the peripheral sidewall of the transparent substrate 1. The metal reflective layer 42 extends to the side surface of the isolation layer 8 opposite to the epitaxial structure 2.

[0149] Or, refer to Figure 6 As shown, the metal reflective layer 42 is spaced apart from the outer sidewall of the epitaxial structure 2 and the sidewall of the groove 3 by the isolation layer 8. The isolation layer 8 covers the outer sidewall of the epitaxial structure 2, the outer sidewall of the transparent substrate 1 and the sidewall of the groove 3. The metal reflective layer 42 extends to the side surface of the isolation layer 8 opposite to the epitaxial structure 2.

[0150] Optionally, in this embodiment, the material of the isolation layer includes silicon dioxide or silicon nitride.

[0151] Optionally, in this embodiment, both the peripheral sidewalls of the epitaxial structure 2 and the peripheral sidewalls of the transparent substrate 1 are inclined sidewalls.

[0152] Optionally, in this embodiment, the angle between the outer sidewall of the epitaxial structure 2 and the first surface A is the first angle, and the angle between the outer sidewall of the transparent substrate 1 and the second surface B is the second angle, and the angles of the first angle and the second angle are both less than 80 degrees.

[0153] It should be noted that in this embodiment, the angles of the first included angle and the second included angle can be the same or different, depending on the actual needs.

[0154] Based on the above embodiments, optionally, in another embodiment of this application, reference is made to... Figure 7 or Figure 8 As shown, a barrier layer 9 is provided between the metal reflective layer 42 and the insulating layer 5, and the barrier layer 9 covers the metal reflective layer 42. The second electrode conductive via 71 penetrates the insulating layer 5, exposing part of the barrier layer 9. The second electrode 7 extends through the second electrode conductive via 71 to the barrier layer 9 and forms an electrical connection with the second type semiconductor layer 23. The barrier layer 9 is a metal material that is not easily oxidized, such as titanium, tungsten, etc.

[0155] Specifically, after the metal reflective layer 42 has grown inside the reaction chamber, a barrier layer 9 is grown to cover the metal reflective layer 42 and prevent the metal reflective layer 42 from oxidizing.

[0156] Optionally, in this embodiment, the metal reflective layer 42 and the barrier layer 9 are grown using a PECVD device or a vapor deposition device.

[0157] In summary, the above technical solution achieves the following results:

[0158] 1. The Mini-LED chip provided in this embodiment includes a transparent substrate comprising a first surface and a second surface disposed opposite to each other, the second surface being the light-emitting surface; and a reflective layer disposed on the side surface of the second type semiconductor layer away from the active region, and spaced apart from the peripheral sidewall of the epitaxial structure and the sidewall of the groove; combined with an insulating layer covering the exposed surfaces of the epitaxial structure, the transparent substrate, and part of the reflective layer, particularly the peripheral sidewall of the epitaxial structure and the peripheral sidewall of the transparent substrate. The insulating layer includes a DBR reflective structure layer, which can protect the chip from moisture intrusion and prevent short circuits, and also has a reflective effect so that the chip emits light from one side only, and only from the second surface, solving the problem of light leakage from the chip sidewall, thereby improving the light emission efficiency of the Mini-LED chip and avoiding light leakage when the Mini-LED chip is used as a display backlight.

[0159] 2. Further, a metal reflective layer is provided at intervals between the metal reflective layer and the peripheral sidewall of the epitaxial structure through an isolation layer. The isolation layer covers the peripheral sidewall of the epitaxial structure and the peripheral sidewall of the transparent substrate, and the metal reflective layer extends to the side surface of the isolation layer opposite to the epitaxial structure; or, the metal reflective layer is provided at intervals between the metal reflective layer and the peripheral sidewall of the epitaxial structure and the sidewall of the groove through an isolation layer. The isolation layer covers the peripheral sidewall of the epitaxial structure, the peripheral sidewall of the transparent substrate, and the sidewall of the groove, and the metal reflective layer extends to the side surface of the isolation layer opposite to the epitaxial structure, which can further improve the reflective effect of the sidewall of the epitaxial structure and the sidewall of the transparent substrate.

[0160] 3. Furthermore, by setting a barrier layer between the metal reflective layer and the insulating layer, and the barrier layer covering the metal reflective layer, the barrier layer is made of a metal material that is not easily oxidized, which can prevent the metal materials of the first electrode and the second electrode from diffusing to the metal reflective layer and the active area, affecting the reflection effect and device stability, thereby improving the light extraction efficiency and reliability of the Mini-LED chip.

[0161] 4. Furthermore, by setting the distance between the first electrode and the second electrode to be greater than 20um, the problem of electrode short circuit caused by reflow soldering when Mini-LED chips are bonded to the PCB board can be avoided.

[0162] 5. Furthermore, by setting the active region within the reflection range of the insulating layer and the reflective layer, the emission angle and external quantum efficiency can be effectively improved.

[0163] 6. Furthermore, by setting the angle between the outer sidewall of the epitaxial structure and the first surface as the first angle, and the angle between the outer sidewall of the transparent substrate and the second surface as the second angle, the angles of the first angle and the second angle are both less than 80 degrees, which can further improve the light emission angle.

[0164] 7. This embodiment provides a method for fabricating a Mini-LED chip. The method involves providing a transparent substrate, which includes a first surface. A stacked structure is epitaxially formed on the first surface. First, ICP etching is used to form a first dicing channel and groove on the stacked structure in the same etching process, dividing the stacked structure into multiple independent epitaxial structures through the first dicing channel. Then, a grinding process is used to thin the transparent substrate, exposing the second surface. The epitaxial structure is then transferred to a temporary carrier, and a laser cutting process is used to penetrate the second surface along the dicing channel, exposing the temporary carrier and the outer sidewalls of the transparent substrate. This allows the subsequently grown insulating layer to cover the exposed surfaces of the epitaxial structure, the transparent substrate, and part of the reflective layer, particularly the sidewalls of the epitaxial structure and the transparent substrate. The insulating layer includes a DBR reflective structure layer, which protects the chip from moisture intrusion and short circuits, while also providing a reflective effect so that the chip emits light from only one side, specifically from the second surface. This solves the problem of light leakage from the chip's sidewalls, thereby improving the light extraction efficiency of the Mini-LED chip and preventing light leakage when the Mini-LED chip is used as a display backlight.

[0165] 8. Another method for fabricating a Mini-LED chip provided in this embodiment is used to prepare a Mini-LED chip. By providing a transparent substrate, the transparent substrate includes a first surface; a stacked structure is epitaxially formed on the first surface; a dicing tool is used to form a second dicing channel on the stacked structure, which divides the stacked structure into multiple independent epitaxial structures. The second dicing channel can directly expose the outer sidewall of the transparent substrate so that the subsequently grown insulating layer can cover the exposed surfaces of the epitaxial structure, the transparent substrate, and part of the reflective layer, especially the sidewalls of the epitaxial structure and the sidewalls of the transparent substrate. The insulating layer includes a DBR reflective structure layer, which can protect the chip from moisture intrusion and prevent short circuits, and also has a reflective effect so that the chip emits light from one side only, and only from the second surface, solving the problem of light leakage from the chip sidewall, thereby improving the light emission efficiency of the Mini-LED chip and avoiding light leakage when the Mini-LED chip is used as a display backlight.

[0166] Those skilled in the art should understand that, in the disclosure of this invention, the terms "lateral", "longitudinal", "upper", "lower", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the above terms should not be construed as limiting this invention.

[0167] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0168] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A Mini-LED chip, characterized in that, include: A transparent substrate, the transparent substrate including a first surface and a second surface disposed opposite to each other, the second surface being a light-emitting surface; An epitaxial structure is stacked on the first surface. The epitaxial structure includes a first type semiconductor layer, an active region, and a second type semiconductor layer stacked sequentially along a first direction. The upper surface of the second type semiconductor layer is provided with a groove extending toward the first type semiconductor layer and exposing a portion of the first type semiconductor layer. The first direction is perpendicular to the transparent substrate and points from the transparent substrate toward the epitaxial structure. A reflective layer is disposed on the side surface of the second type semiconductor layer away from the active region, and is spaced apart from the peripheral sidewall of the epitaxial structure and the sidewall of the groove. An insulating layer covers the exposed surfaces of the epitaxial structure, the transparent substrate, and a portion of the reflective layer, and exposes the bottom of the groove; the insulating layer includes a DBR reflective structure layer. A first electrode is disposed on the side surface of the insulating layer opposite to the reflective layer and extends to the exposed portion of the groove, and is connected to the first type of semiconductor layer; The second electrode is disposed on the side surface of the insulating layer opposite to the reflective layer, and is connected to the second type semiconductor layer through a second electrode conductive via, and the first electrode and the second electrode are disposed at intervals.

2. The Mini-LED chip according to claim 1, characterized in that: The reflective layer is an insulating reflective layer or a metal reflective layer. The insulating reflective layer includes any one or more of the following stacked structures: titanium dioxide layer, silicon nitride layer, silicon dioxide layer, magnesium fluoride layer, and magnesium oxide layer. The metal reflective layer includes any one or more of the following stacked structures: Ag, Al, and Au.

3. The Mini-LED chip according to claim 2, characterized in that: The second electrode conductive via penetrates the insulating layer and the insulating reflective layer, exposing a portion of the second type semiconductor layer. The second electrode extends to the second type semiconductor layer through the second electrode conductive via to form an electrical connection.

4. The Mini-LED chip according to claim 2, characterized in that: The metal reflective layer covers the second type semiconductor layer, the second electrode conductive via penetrates the insulating layer and exposes a portion of the metal reflective layer, and the second electrode extends through the second electrode conductive via to the metal reflective layer to form an electrical connection with the second type semiconductor layer.

5. The Mini-LED chip according to claim 2, characterized in that: The metal reflective layer is disposed at a distance from the peripheral sidewall of the epitaxial structure through an isolation layer. The isolation layer covers the peripheral sidewall of the epitaxial structure and the peripheral sidewall of the transparent substrate. The metal reflective layer extends to the side surface of the isolation layer opposite to the epitaxial structure. Alternatively, the metal reflective layer is spaced apart from the peripheral sidewall of the epitaxial structure and the sidewall of the groove by an isolation layer, the isolation layer covering the peripheral sidewall of the epitaxial structure, the peripheral sidewall of the transparent substrate and the sidewall of the groove, and the metal reflective layer extending to the side surface of the isolation layer opposite to the epitaxial structure.

6. The Mini-LED chip according to claim 2, characterized in that: A barrier layer is provided between the metal reflective layer and the insulating layer, and the barrier layer covers the metal reflective layer. The second electrode conductive via penetrates the insulating layer and exposes part of the barrier layer. The second electrode extends through the second electrode conductive via to the barrier layer and forms an electrical connection with the second type semiconductor layer. The barrier layer is made of a metal material that is not easily oxidized.

7. The Mini-LED chip according to claim 1, characterized in that: Both the outer sidewalls of the epitaxial structure and the outer sidewalls of the transparent substrate are inclined sidewalls.

8. The Mini-LED chip according to claim 1, characterized in that: The angle between the outer sidewall of the epitaxial structure and the first surface is the first angle, and the angle between the outer sidewall of the transparent substrate and the second surface is the second angle. Both the first angle and the second angle are less than 80 degrees.

9. The Mini-LED chip according to claim 1, characterized in that: The distance between the first electrode and the second electrode is greater than 20 μm.

10. The Mini-LED chip according to claim 1, characterized in that: The active region is located within the reflection range of the insulating layer and the reflective layer.

11. A method for manufacturing a Mini-LED chip, characterized in that, The manufacturing method includes the following steps: Step S1: Provide a transparent substrate and a temporary carrier plate, wherein the transparent substrate includes a first surface; Step S2: An epitaxial stacked structure is formed on the first surface; Step S3: ICP etching is used to etch along the upper surface of the stacked structure to expose a portion of the transparent substrate to form a first dicing channel. The stacked structure is divided into multiple independent epitaxial structures through the first dicing channel. Each epitaxial structure includes a first type semiconductor layer, an active region, and a second type semiconductor layer stacked sequentially along the growth direction. Simultaneously, etching is performed along the upper surface of the second type semiconductor layer to expose a portion of the first type semiconductor layer, forming a groove; Step S4: Thin the transparent substrate using a grinding process to expose the second surface; Step S5: Transfer the epitaxial structure to the temporary carrier through the transparent substrate. The second surface B is connected to the temporary carrier and laser cutting is used to penetrate the second surface along the first cutting path to expose the outer sidewall of the temporary carrier and the transparent substrate. The second surface is arranged opposite to the first surface and is the light-emitting surface. Step S6: Grow a reflective layer, which is disposed on the side surface of the second type semiconductor layer away from the active region and spaced apart from the peripheral sidewall of the epitaxial structure and the sidewall of the groove. Step S7: Grow an insulating layer that covers the exposed surfaces of the epitaxial structure, the transparent substrate, and part of the reflective layer, and exposes the bottom of the groove. The insulating layer includes a DBR reflective structure layer. Step S8: Fabricate the first electrode and the second electrode; The first electrode is disposed on the side surface of the insulating layer opposite to the reflective layer and extends to the exposed portion of the groove, and is connected to the first type of semiconductor layer; The second electrode is disposed on the side surface of the insulating layer opposite to the reflective layer, and is connected to the second type semiconductor layer through a second electrode conductive via, wherein the first electrode and the second electrode are disposed at an interval; Step S9: Peel off the temporary carrier board to form multiple independent Mini-LED chips.

12. A method for manufacturing a Mini-LED chip, characterized in that, The manufacturing method includes the following steps: Step A1: Provide a transparent substrate, the transparent substrate including a first surface; Step A2: An epitaxial stacked structure is formed on the first surface; Step A3: Using a dicing blade, cut along the upper surface of the stacked structure to expose a portion of the transparent substrate to form a second dicing channel. The second dicing channel exposes the outer sidewall of the transparent substrate. The stacked structure is divided into multiple independent epitaxial structures through the second dicing channel. Each epitaxial structure includes a first type semiconductor layer, an active region, and a second type semiconductor layer stacked sequentially along the growth direction. Step A4: Etch along the upper surface of the second type semiconductor layer to expose a portion of the first type semiconductor layer and form a groove; Step A5: Grow a reflective layer, which is disposed on the side surface of the second type semiconductor layer away from the active region and spaced apart from the peripheral sidewall of the epitaxial structure and the sidewall of the groove. Step A6: Grow an insulating layer that covers the exposed surfaces of the epitaxial structure, the transparent substrate, and part of the reflective layer, and exposes the bottom of the groove. The insulating layer includes a DBR reflective structure layer. Step A7: Fabricate the first and second electrodes; The first electrode is disposed on the side surface of the insulating layer opposite to the reflective layer and extends to the exposed portion of the groove, and is connected to the first type of semiconductor layer; The second electrode is disposed on the side surface of the insulating layer opposite to the reflective layer, and is connected to the second type semiconductor layer through a second electrode conductive via, wherein the first electrode and the second electrode are disposed at an interval; Step A8: Thin the transparent substrate using a grinding process to expose the second surface, and simultaneously separate and form multiple independent Mini-LED chips. The second surface is positioned opposite to the first surface and is the light-emitting surface.

13. The method for manufacturing a Mini-LED chip according to claim 11 or 12, characterized in that: The reflective layer is an insulating reflective layer or a metal reflective layer. The insulating reflective layer includes any one or more of the following stacked structures: titanium dioxide layer, silicon nitride layer, silicon dioxide layer, magnesium fluoride layer, and magnesium oxide layer. The metal reflective layer includes any one or more of the following stacked structures: Ag, Al, and Au.

14. The method for manufacturing a Mini-LED chip according to claim 13, characterized in that: The metal reflective layer covers the second type semiconductor layer, the second electrode conductive via penetrates the insulating layer and exposes a portion of the metal reflective layer, and the second electrode extends through the second electrode conductive via to the metal reflective layer to form an electrical connection with the second type semiconductor layer.

15. The method for manufacturing a Mini-LED chip according to claim 13, characterized in that: The metal reflective layer is disposed at a distance from the peripheral sidewall of the epitaxial structure through an isolation layer. The isolation layer covers the peripheral sidewall of the epitaxial structure and the peripheral sidewall of the transparent substrate. The metal reflective layer extends to the side surface of the isolation layer opposite to the epitaxial structure. Alternatively, the metal reflective layer is spaced apart from the peripheral sidewall of the epitaxial structure and the sidewall of the groove by an isolation layer, the isolation layer covering the peripheral sidewall of the epitaxial structure, the peripheral sidewall of the transparent substrate and the sidewall of the groove, and the metal reflective layer extending to the side surface of the isolation layer opposite to the epitaxial structure.

16. The method for manufacturing a Mini-LED chip according to claim 13, characterized in that: A barrier layer is provided between the metal reflective layer and the insulating layer, and the barrier layer covers the metal reflective layer. The second electrode conductive via penetrates the insulating layer and exposes part of the barrier layer. The second electrode extends through the second electrode conductive via to the barrier layer and forms an electrical connection with the second type semiconductor layer. The barrier layer is made of a metal material that is not easily oxidized.

17. The method for manufacturing a Mini-LED chip according to claim 11 or 12, characterized in that: Both the outer sidewalls of the epitaxial structure and the outer sidewalls of the transparent substrate are inclined sidewalls.

18. The method for manufacturing a Mini-LED chip according to claim 11 or 12, characterized in that: The angle between the outer sidewall of the epitaxial structure and the first surface is the first angle, and the angle between the outer sidewall of the transparent substrate and the second surface is the second angle. Both the first angle and the second angle are less than 80 degrees.

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