Semiconductor test structures and their manufacturing methods
By forming hollow sections in semiconductor structures and filling them with non-metallic material layers, the problem of characterizing metals such as tungsten under extremely high electric fields has been solved, enabling the effective application of atomic probe tomography and accurate detection of doped ions.
CN116773854BActive Publication Date: 2026-05-26CHANGXIN MEMORY TECH INC
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Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHANGXIN MEMORY TECH INC
- Filing Date
- 2022-03-08
- Publication Date
- 2026-05-26
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Figure CN116773854B_ABST
Abstract
This disclosure provides a semiconductor test structure and its manufacturing method. The manufacturing method includes: providing a semiconductor structure, the semiconductor structure including a doped layer and a metal layer located within the doped layer; forming at least one opening in the semiconductor structure, the opening exposing the metal layer; reacting the metal layer with a wet etching solution to remove the metal layer, thereby forming a cutout, wherein the wet etching solution enters the semiconductor structure through the opening; filling the cutout with a non-metallic material layer through the opening to form the semiconductor test structure; wherein the evaporation pressure of the metal layer is greater than the evaporation pressure of the non-metallic material layer. This technical solution avoids the limitation of metals requiring extremely high electric fields to evaporate, which hinders the application of atomic probe tomography (APT) in semiconductor test structures.
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