Circuit gate level feature hardware Trojan detection method based on pre-trained NLP model

By converting gate-level netlists into natural language format and utilizing the self-attention mechanism of the Transformer structure, the problem of low efficiency in pre-silicon hardware Trojan detection is solved, achieving efficient and accurate hardware Trojan detection.

CN116821906BActive Publication Date: 2026-05-19HUNAN UNIV
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
HUNAN UNIV
Filing Date
2023-06-15
Publication Date
2026-05-19

AI Technical Summary

Technical Problem

Existing silicon-based hardware trojan detection methods are inefficient and limited to specific trojan types, making it difficult to efficiently detect hidden hardware trojans in complex circuit structures.

Method used

A pre-trained NLP model is used to convert gate-level netlist information into natural language format. The self-attention mechanism of the Transformer structure is used to capture the relationships between circuit components, thereby realizing hardware Trojan detection.

Benefits of technology

It improves the efficiency and accuracy of hardware Trojan detection, can identify multiple types of hardware Trojans, has good flexibility and generalization, and demonstrates superior performance indicators.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application provides a circuit gate-level feature hardware Trojan detection method based on a pre-trained NLP model. The Verilog file of the gate-level netlist is preprocessed, only the gate and its connection relationship are retained, and the description form of the netlist is naturalized, so that it is suitable for NLP model processing. Then the extracted text information is represented in a vector form, so that it is compatible with the Transformer structure. Finally, the self-attention mechanism in the Transformer structure is used to capture the complex relationship of the circuit components and their connections, and the detection of the hardware Trojan is realized. This method can make full use of the knowledge learned in the natural language processing task, effectively migrate to the hardware Trojan detection task, and realize efficient and accurate hardware Trojan detection.
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Description

Technical Field

[0001] This application belongs to the field of integrated circuit security detection technology, specifically involving a method for detecting hardware Trojans based on pre-trained NLP models and their gate-level features. Background Technology

[0002] Hardware Trojan detection techniques can be divided into two types: pre-silicon detection and post-silicon detection. In the pre-silicon stage, circuit designs exist in the form of gate-level netlists, register-transfer levels, or higher levels of abstraction. Due to the high flexibility and abstraction of these representations, attackers can more easily design and implement Trojan insertions. Therefore, the pre-silicon stage is the most vulnerable to Trojan insertion, and pre-silicon detection is typically chosen as the commonly used hardware Trojan detection method.

[0003] In related technologies, the main method used in pre-silicon inspection is based on circuit structure characteristics. This method identifies areas potentially affected by hardware trojans by analyzing sensitive paths and nodes in the circuit. However, this method is highly dependent on circuit structure analysis, requiring a deep understanding of the circuit structure during detection. In complex circuit structures, the detection efficiency is low. Furthermore, this method can only be used to detect specific types of trojan attacks, facing certain limitations when dealing with highly stealthy hardware trojans.

[0004] Therefore, it is necessary to provide a hardware Trojan detection method based on pre-trained NLP models with circuit gate-level features to solve the problems mentioned in the background. Summary of the Invention

[0005] This application provides a hardware Trojan detection method based on pre-trained NLP models using gate-level features. The method converts the Verilog file of the gate-level netlist into a CSV file, extracts text information to make it suitable for NLP model processing, and then vectorizes the extracted text information to make it compatible with the Transformer structure. Finally, the self-attention mechanism in the Transformer structure is used to capture the complex relationships between circuit components and their connections, thereby achieving hardware Trojan detection. This method can fully utilize knowledge learned in natural language processing tasks and effectively transfer it to hardware Trojan detection tasks, achieving efficient and accurate hardware Trojan detection.

[0006] To solve the above-mentioned technical problems, the technical solution of this application is as follows:

[0007] A method for detecting hardware Trojans based on circuit gate-level features using a pre-trained NLP model includes the following steps:

[0008] S10: Obtain the gate-level netlist information of each node in the circuit structure, retain only the gates and their connections after preprocessing, and represent the preprocessed gate-level netlist information in natural language.

[0009] S20: Convert the gate-level netlist information represented in natural language into a word sequence, label each word in the word sequence as an integer code, use an embedding function to map the integer code to a continuous vector space, and add position codes to the integer code to capture the relative relationships between each position, thereby obtaining a vector sequence suitable for NLP model input;

[0010] S30: Provide a pre-trained NLP model, take the vector sequence as input, extract the gate-level features and position features of each node in the circuit structure, fuse the extracted gate-level features with the corresponding position features and send them to the Transformer classifier for classification, and output the detection result of whether the node contains a Trojan horse.

[0011] Preferably, step S10 specifically includes the following process:

[0012] S11: Obtain the Verilog file of the gate-level netlist for each node in the circuit structure;

[0013] S12: Preprocess the Verilog file to remove parts that are not relevant to the Trojan detection task, and only retain the doors and their connections in the Verilog file.

[0014] S13: Natural Language Processing: Add definitions to each attribute in the gate-level netlist information, use colons and spaces to separate each attribute, and add quotation marks to improve the readability of the description. The attributes include gate type, gate name, input port, and output port.

[0015] S14: Remove Gate_name: Remove the definition of "Gate_name" and its corresponding attributes;

[0016] S15: Special character processing: Convert special characters that may be related to Trojans into characters that are not related to Trojans.

[0017] Preferably, the Verilog file processing in step S10 is performed in the following manner:

[0018] Define the parse_netlist function to read the contents of the Verilog file line by line, skipping blank lines and lines that begin with " / / ", "module", or "endmodule";

[0019] For each line, separate it into multiple tokens using spaces. If the number of tokens is less than 2, skip the line; otherwise, take the first element of the tokens as the gate type (gate_type) and the second element as the gate name (gate_name).

[0020] Define the input and output ports according to the gate type, and generate the string "Input_port" or "Output_port" before the corresponding port;

[0021] Remove the part containing gate_name, and delete the characters "troj" and "trig", then use regular expressions to find the signal names from the remaining lines;

[0022] Define the functions generate_random_string and replace_keywords. The generate_random_string function generates a random string of a specified length. The replace_keywords function takes the string and a replacement dictionary as input, and then replaces all the keywords in the string with the corresponding values ​​in the dictionary, converting special characters that may be related to Trojans into characters that are not related to Trojans.

[0023] Define the function `write_gates_info_to_csv`, which receives the attribute information of the gate-level netlist, outputs a filename and a replacement dictionary. The `write_gates_info_to_csv` function first writes "label,text" at the beginning of the .csv file, and then for each node, it writes the gate type (gate_type), input port (Input_port), and output port (Output_port) information to the csv file. The format of the input port and output port information is "port type:port name".

[0024] Preferably, step S20 specifically includes the following steps:

[0025] Encoding: Each token is marked with an integer code, which acts as an index in the vocabulary of the NLP model;

[0026] Embedded vector computation: Using an embedding function, the integer codes are mapped to a continuous vector space, converting the discrete integer codes into continuous embedded vectors. The conversion process is represented as follows:

[0027] TokenEmbedding Gate_type =f embed (TokenID Gate_type );

[0028] TokenEmbedding Input_ports =f embed (TokenID Input_ports );

[0029] TokenEmbedding Output_ports =f embed (TokenID Output_ports );

[0030] In the formula, TokenEmbedding Gate_type An embedding vector representing the gate type; TokenEmbedding Input_ports Represents the embedding vector of the input port; TokenEmbedding Output_ports f represents the embedding vector of the output port; embed (·) indicates an embedded function; TokenID Gate_type Integer encoding representing the gate type; TokenID Input_ports Integer encoding representing the input port; TokenID Output_ports Integer encoding representing the output port;

[0031] Position encoding: Position codes are generated for the integers using sine and cosine functions to capture the relative relationships between positions. The position encoding process is represented as follows:

[0032]

[0033]

[0034] In the formula, i represents the position of the integer code in the sequence; d represents the model dimension; PE(·) represents the position encoding matrix; j represents the dimension index, and 2j and 2j+1 represent the even and odd dimensions corresponding to position i, respectively;

[0035] Input vector computation: Combining the embedding vector with positional encoding, we derive the vector encoded by each integer in the input sequence. The computation process is represented as follows:

[0036] Embedding i =TokenEmbedding(TokenID) i +PositionEmbedding(i);

[0037] In the formula, Embedding i The vector representation of the encoding of the i-th integer, TokenEmbedding(TokenID) i) represents the embedding vector of the i-th integer encoding, and PositionEmbedding(i) represents the position encoding of the i-th integer encoding.

[0038] Preferably, the NLP model is selected from one of the following: BERT-based sequence classification model BertForSequenceClassification, GPT-2-based generative model GPT2LMHeadModel, and T5-based generative model T5ForConditionalGeneration.

[0039] The beneficial effects of this application are as follows:

[0040] (1) Apply large-scale pre-trained models to the field of netlist-level hardware Trojan detection, make full use of the transfer learning capabilities of pre-trained models, and achieve efficient and accurate hardware Trojan detection.

[0041] (2) A unique netlist-to-naturalization method is introduced to convert gate-level netlists into a format similar to natural language, making them easier for pre-trained NLP models to digest, enhancing the readability of netlists and conforming to specific grammatical rules, which helps to understand the structure and semantics of gate-level netlists;

[0042] (3) The self-attention mechanism of the Transformer model is applied to the model relationships within the gate-level netlist. This effectively captures local and global structural information in the circuit, significantly improving the understanding of circuit functions and potential hardware trojans.

[0043] (4) The hardware Trojan detection problem is transformed into a logic gate binary classification problem, eliminating the need for comparison with the IC golden model. Compared with other detection methods, the method provided in this application demonstrates superior performance on evaluation metrics such as TPR, TNR, and F1 scores, achieving state-of-the-art (SOTA) results.

[0044] (5) It has good flexibility and adaptability, can deal with different types of hardware Trojans, and has excellent generalization and robustness. This proves the practicality and effectiveness of our method in the field of hardware Trojan detection. Attached Figure Description

[0045] Figure 1 This represents the original gate-level netlist;

[0046] Figure 2 This represents the processed gate-level netlist information;

[0047] Figure 3 This shows the test results and average results of Example 1 in the three datasets Trust-Hub, TRIT-TC, and TRIT-TS;

[0048] Figure 4 This shows the test results and average results of Example 2 on the three datasets Trust-Hub, TRIT-TC, and TRIT-TS;

[0049] Figure 5 The results and average values ​​of Example 3 are shown in the three datasets Trust-Hub, TRIT-TC, and TRIT-TS. Detailed Implementation

[0050] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0051] Please refer to the following: Figure 1-5 This invention provides a method for detecting hardware Trojans based on pre-trained NLP models and their gate-level features, comprising the following steps:

[0052] S10: Obtain the gate-level netlist information of each node in the circuit structure, retain only the gates and their connections after preprocessing, and represent the preprocessed gate-level netlist information in natural language.

[0053] S20: Convert the gate-level netlist information represented in natural language into a word sequence, label each word in the word sequence as an integer code, use an embedding function to map the integer code to a continuous vector space, and add position codes to the integer code to capture the relative relationships between each position, thereby obtaining a vector sequence suitable for NLP model input;

[0054] S30: Provide a pre-trained NLP model, take the vector sequence as input, extract the gate-level features and position features of each node in the circuit structure, fuse the extracted gate-level features with the corresponding position features and send them to the Transformer classifier for classification, and output the detection result of whether the node contains a Trojan horse.

[0055] A gate-level netlist is a text file that describes the interconnections between gate-level circuit elements and conforms to a simple tag syntax. Although a gate-level netlist describes circuit structure rather than text, it shares the following similarities with natural language:

[0056] (1) Sequential arrangement: The elements in the gate-level netlist have a specific order, similar to the word order in natural language text;

[0057] (2) Syntax rules: Gate-level netlists follow specific syntax rules, such as component types, connection relationships and port naming, which are similar to the syntax rules in natural language text;

[0058] (3) Hierarchical organization: Components and connections in a gate-level netlist can form a hierarchical structure, such as a combination of gates, triggers and complex devices, which is similar to the hierarchical structure of phrases, sentences and paragraphs in natural language text;

[0059] (4) Contextual association: In a gate-level netlist, understanding the connections and interactions between components is crucial for understanding the circuit function. This is similar to natural language, where the context in the text is essential for understanding the meaning of words and phrases.

[0060] Based on the above similarities, this application preprocesses the gate-level netlist data and converts it into natural language that can be recognized by NLP (Natural Language Processing) models.

[0061] Step S10 specifically includes the following process:

[0062] S11: Obtain the Verilog file of the gate-level netlist for each node in the circuit structure;

[0063] S12: Preprocess the Verilog file to remove parts that are not relevant to the Trojan detection task, and only retain the doors and their connections in the Verilog file.

[0064] S13: Natural Language Processing: Add definitions to each attribute in the gate-level netlist information, use colons and spaces to separate each attribute, and add quotation marks to improve the readability of the description. The attributes include gate type, gate name, input port, and output port.

[0065] S14: Remove Gate_name: Remove the definition of "Gate_name" and its corresponding attributes;

[0066] S15: Special character processing: Convert special characters that may be related to Trojans into characters that are not related to Trojans.

[0067] Specifically, the Verilog file processing in step S10 is performed in the following manner:

[0068] Define the parse_netlist function to read the contents of the Verilog file line by line, skipping blank lines and lines that begin with " / / ", "module", or "endmodule";

[0069] For each line, separate it into multiple tokens using spaces. If the number of tokens is less than 2, skip the line; otherwise, take the first element of the tokens as the gate type (gate_type) and the second element as the gate name (gate_name).

[0070] Define the input and output ports according to the gate type, and generate the string "Input_port" or "Output_port" before the corresponding port;

[0071] Remove the part containing gate_name, and delete the characters "troj" and "trig", then use regular expressions to find the signal names from the remaining lines;

[0072] Define the functions generate_random_string and replace_keywords. The generate_random_string function generates a random string of a specified length. The replace_keywords function takes the string and a replacement dictionary as input, and then replaces all the keywords in the string with the corresponding values ​​in the dictionary, converting special characters that may be related to Trojans into characters that are not related to Trojans.

[0073] Define the function `write_gates_info_to_csv`, which receives the attribute information of the gate-level netlist, outputs a filename and a replacement dictionary. The `write_gates_info_to_csv` function first writes "label,text" at the beginning of the .csv file, and then for each node, it writes the gate type (gate_type), input port (Input_port), and output port (Output_port) information to the csv file. The format of the input port and output port information is "port type:port name".

[0074] In step S10, the collected Verilog file is first preprocessed to remove data such as "modul", "input", "output", "wire" or "assign" from the Verilog file. The purpose is to retain only the gates and their connections. Natural language processing is used to add definitions to the gates and their connections to facilitate NLP model recognition.

[0075] Since the typical audience for gate-level netlists is professionals, the definition of attributes is usually omitted from the text information of gate-level netlists, for example... Figure 1In the gate-level netlist shown, MUX21X1 represents the gate type, Trojan_Payload2 represents the gate name, IN1 (WX11155) represents the first input port, IN2 (WX3442) represents the second input port, and S (Trojan_SE) represents the output port. The attributes are separated by delimiters. For professionals, seeing the corresponding attribute immediately reveals its definition. This method of representation in gate-level netlists greatly reduces text length, making it concise and easy to read. However, in NLP models, the lack of attribute definitions prevents the model from correctly understanding the meaning of the attributes. Therefore, from the model's perspective, the information conveyed by a gate-level netlist is merely a jumbled collection of independent words.

[0076] Through the above processing, the text information of the gate-level netlist can be converted into input that the NLP model can recognize and understand. The natural language processing step adds a definition to each attribute, facilitating the NLP model's correct understanding of the meaning expressed by the attributes and thus better combining contextual semantics to process the information of the gate-level netlist. "Gate_name" represents the name of the gate, which does not contribute to the connection relationship of circuit components. Furthermore, the industry commonly uses "Trojan," "Payload," and related terms when defining gate names. "Trojan" is synonymous with malware, which can lead to some misunderstanding in model processing, potentially causing overfitting or causing the model to focus excessively on naming rather than actual structure. Therefore, "Gate_name" and its corresponding attributes are directly deleted, allowing the model to focus more on capturing structural features related to hardware malware. The gate-level netlist information may include some malware-related characters, such as "Trojan," "Payload," "troj," and "trig." A conversion dictionary is used to convert these into random characters of corresponding lengths to reduce the modality's dependence on feature words, thereby improving the model's generalization ability. While keeping the input data concise, it effectively preserves the differences between special characters, which helps the model distinguish and recognize different special characters.

[0077] The preprocessed information retains the original circuit structure information of the gate-level netlist while reducing the model's dependence on specific terms, enabling the model to better focus on the structural and connection features related to hardware Trojans.

[0078] Step S20 specifically includes the following steps:

[0079] Encoding: Each token is marked with an integer code that acts as an index in the vocabulary of the NLP model. For example, if the integer code for “Gate type” in the vocabulary is t1, then the tokenized word sequence will be translated into the integer sequence [t1, t2, t3].

[0080] Embedded vector computation: Using an embedding function, the integer codes are mapped to a continuous vector space, converting the discrete integer codes into continuous embedded vectors. The conversion process is represented as follows:

[0081] TokenEmbedding Gate_type =f embed (TokenID Gate_type );

[0082] TokenEmbedding Input_ports =f embed (TokenID Input_ports );

[0083] TokenEmbedding Output_ports =f embed (TokenID Output_ports );

[0084] In the formula, TokenEmbedding Gate_type An embedding vector representing the gate type; TokenEmbedding Input_ports Represents the embedding vector of the input port; TokenEmbedding Output_ports f represents the embedding vector of the output port; embed (·) indicates an embedded function; TokenID Gate_type Integer encoding representing the gate type; TokenID Input_ports Integer encoding representing the input port; TokenID Output_ports Integer encoding representing the output port;

[0085] Position encoding: Position codes are generated for the integers using sine and cosine functions to capture the relative relationships between positions. The position encoding process is represented as follows:

[0086]

[0087]

[0088] In the formula, i represents the position of the integer code in the sequence; d represents the model dimension; PE(·) represents the position encoding matrix; j represents the dimension index, and 2j and 2j+1 represent the even and odd dimensions corresponding to position i, respectively; the sine and cosine functions generate the position code, capturing the relative relationship between each position, which can adapt to sequences of any length;

[0089] Input vector computation: Combining the embedding vector with positional encoding, we derive the vector encoded by each integer in the input sequence. The computation process is represented as follows:

[0090] Embedding i =TokenEmbedding(TokenID) i +PositionEmbedding(i);

[0091] In the formula, Embedding i The vector representation of the encoding of the i-th integer, TokenEmbedding(TokenID) i ) represents the embedding vector of the i-th integer encoding, and PositionEmbedding(i) represents the position encoding of the i-th integer encoding.

[0092] Finally, the input vectors need to be processed to meet the input requirements of the pre-trained NLP model. The processing includes padding or truncating sequences to match their lengths, or adding special markers at the beginning and end of the sequences, which can be done using conventional techniques in the field.

[0093] The NLP model is selected from one of the following: BERT-based sequence classification model BertForSequenceClassification, GPT-2-based generative model GPT2LMHeadModel, and T5-based generative model T5ForConditionalGeneration.

[0094] For hardware Trojan detection in gate-level netlists, transfer learning is primarily implemented through the Transformer architecture, which leverages a self-attention mechanism to capture the complex relationships between nodes and their connections within the circuit structure. The self-attention mechanism, a core component of the Transformer, calculates the correlation between each element in the input sequence and other elements, thereby assigning different weights to each part. By stacking multiple layers of self-attention and feedforward neural network layers, the Transformer constructs a hierarchical representation to reveal local and global structural information within the gate-level netlist. The connection between the Transformer architecture and the gate-level netlist lies in its self-attention mechanism's ability to capture the interrelationships between circuit components and their connections. For example, a gate may directly or indirectly affect other gates. Capturing these relationships and integrating them into the model output helps to gain a deeper understanding of circuit functionality and potential hardware Trojans. Furthermore, since gate-level netlist data has been transformed into a representation similar to natural language, the Transformer architecture can more easily adapt to this type of data. After fine-tuning, these models can leverage knowledge learned in natural language processing tasks to capture the structural and semantic information of gate-level netlists, enabling very smooth transfer to hardware Trojan detection tasks. By stacking multiple layers of self-attention and feedforward neural network layers, Transformer constructs a hierarchical representation that helps capture different hierarchical relationships in the gate-level netlist, thereby better capturing the local and global structural information of the circuit.

[0095] Example 1

[0096] In this implementation, the NLP model used is the BERT-based sequence classification model, BertForSequenceClassification. It captures contextual information from the training text through a bidirectional encoder and is specifically designed for classification tasks such as sentiment analysis and text classification. To better process the data, a BertTokenizer tokenizer is used in conjunction with it to split the input text into appropriate sub-word units. This tokenizer employs the WordPiece algorithm and adds special start ([CLS]) and end ([SEP]) markers to the input sequence, enabling the model to effectively classify input data in hardware Trojan detection tasks.

[0097] During model training, a function `calculate_class_weights` is defined. It takes a list of training labels as input and calculates the weights for the positive and negative classes. These weights are calculated based on the square root of the inverse of the number of samples in each class, and then the weights are normalized.

[0098] Load the word segmenter and model from the pre-trained BERT model, and then define the optimizer.

[0099] Use the Leave-One-Group-Out method to perform grouped cross-validation on the data.

[0100] For each fold, for each file in the training set, read its text and label, then calculate the class weights and define the loss function.

[0101] The text is encoded using the BERT tokenizer, and then a TensorDataset and a DataLoader are created.

[0102] Training is performed over multiple epochs. In each epoch, the model is first set to training mode. Then, for each batch in the training set, forward propagation is performed to calculate the loss, backpropagation is performed, and the model parameters are updated. The model is then set to evaluation mode. For each batch in the validation set, forward propagation is performed to calculate the loss, and the accuracy and F1 score are calculated.

[0103] After each fold, save the model's parameters to a file.

[0104] This approach allows for text classification using the BERT model, and the use of grouped cross-validation provides a better evaluation of the model's performance. Furthermore, by calculating class weights and incorporating them into the loss function, the problem of class imbalance can be addressed.

[0105] Furthermore, during the model training process, a function called `calculate_tpr_tnr_f1` is defined, which takes the true label and the predicted label, and then calculates the true positive rate (TPR), the true negative rate (TNR), and the F1 score.

[0106] It uses BertTokenizer to load the pre-trained BERT tokenizer and sets up the device based on whether the current system supports CUDA.

[0107] Next, for each model folder, it loads the corresponding BERT model and sets the model to evaluation mode.

[0108] It creates an output file, and then for each CSV file, it reads the data from the file, converts the text into a format that the model can accept, and uses the model to make predictions.

[0109] Finally, it calculates the TPR, TNR, and F1 scores of the prediction results and writes these results to the output file.

[0110] Example 2

[0111] This implementation uses the GPT2LMHeadModel, a generative NLP model based on GPT-2. It relies on a decoder structure to achieve autoregressive generation and performs well in language modeling tasks such as text generation and summarization. It is used in conjunction with the GPT2Tokenizer tokenizer, utilizing the Byte-Pair Encoding (BPE) algorithm to split the input text. The BPE algorithm decomposes the text into sub-words without adding start and end tags. GPT2LMHeadModel was not originally designed for classification; we added the "HT Detection" task prefix to the input text to adapt it for hardware Trojan detection tasks.

[0112] Example 3

[0113] This implementation uses the T5ForConditionalGeneration NLP model, which achieves autoregressive generation through an encoder-decoder structure. It is primarily used for conditional generation tasks, i.e., generating text under given conditions, such as text summarization and translation. The T5Tokenizer tokenizer is used in conjunction with it, and the SentencePiece algorithm is employed to process the text. This unified tokenization method is applicable to multiple languages ​​and text types. We added the "HT Detection" task prefix to the input text so that the model can identify the task type, thereby transferring pre-trained knowledge to a specific task.

[0114] Please see Figure 1-3 , Figure 1-3 The figures show the test results and average performance of Examples 1-3 on the Trust-Hub, TRIT-TC, and TRIT-TS datasets, respectively. Figure 1-3 As can be seen, the method provided in this application demonstrates excellent performance in terms of precision, recall, TNR, TPR, and F1 score, which can significantly improve the accuracy of hardware Trojan detection.

[0115] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A method for detecting hardware Trojans based on pre-trained NLP models and their gate-level features, characterized in that, Includes the following steps: S10: Obtain the gate-level netlist information of each node in the circuit structure, retain only the gates and their connections after preprocessing, and represent the preprocessed gate-level netlist information in natural language. S20: Convert the gate-level netlist information represented in natural language into a word sequence, label each word in the word sequence as an integer code, use an embedding function to map the integer code to a continuous vector space, and add position codes to the integer code to capture the relative relationships between each position, thereby obtaining a vector sequence suitable for NLP model input; S30: Provide a pre-trained NLP model, take the vector sequence as input, extract the gate-level features and position features of each node in the circuit structure, fuse the extracted gate-level features with the corresponding position features and send them to the Transformer classifier for classification, and output the detection result of whether the node contains a Trojan horse. Step S20 specifically includes the following steps: Encoding: Each word is labeled with an integer code, which acts as an index in the vocabulary of the NLP model; Embedded vector computation: Using an embedding function, the integer codes are mapped to a continuous vector space, converting the discrete integer codes into continuous embedded vectors. The conversion process is represented as follows: In the formula, An embedding vector representing the gate type; The embedding vector representing the input port; Represents the embedding vector of the output port; (ꞏ) represents an embedded function; express Integer encoding of gate type; Integer encoding representing the input port; Integer encoding representing the output port; Position encoding: Position codes are generated for the integers using sine and cosine functions to capture the relative relationships between positions. The position encoding process is represented as follows: In the formula, i Indicates the position of the integer code in the sequence; d Represents the model dimension; PE(·) represents the position encoding matrix; j Indicates a dimension index, 2 j and 2 j +1 represents the position. i The corresponding even and odd dimensions; Input vector computation: Combining the embedding vector with positional encoding, we derive the vector encoded by each integer in the input sequence. The computation process is represented as follows: ; In the formula, The vector representation of the encoding of the i-th integer. This represents the embedding vector encoded by the i-th integer. This represents the positional encoding of the i-th integer.

2. The method for detecting hardware Trojans based on pre-trained NLP models using circuit gate-level features according to claim 1, characterized in that, Step S10 specifically includes the following process: S11: Obtain the Verilog file of the gate-level netlist for each node in the circuit structure; S12: Preprocess the Verilog file to remove parts that are not relevant to the Trojan detection task, and only retain the doors and their connections in the Verilog file. S13: Natural Language Processing: Add definitions to each attribute in the gate-level netlist information, use colons and spaces to separate each attribute, and add quotation marks to improve the readability of the description. The attributes include gate type, gate name, input port, and output port. S14: Remove Gate_name: Remove the definition of "Gate_name" and its corresponding attributes; S15: Special character processing: Convert special characters that may be related to Trojans into characters that are not related to Trojans.

3. The method for detecting hardware Trojans based on pre-trained NLP models using circuit gate-level features according to claim 2, characterized in that, The Verilog file processing in step S10 is performed in the following manner: Define the parse_netlist function to read the contents of the Verilog file line by line, skipping blank lines and lines that begin with " / / ", "module", or "endmodule"; For each line, separate it into multiple tokens using spaces. If the number of tokens is less than 2, skip the line; otherwise, take the first element of the tokens as the gate type (gate_type) and the second element as the gate name (gate_name). Define the input and output ports according to the gate type, and generate the string "Input_port" or "Output_port" before the corresponding port; Remove the part containing gate_name, and delete the characters "troj" and "trig", then use regular expressions to find the signal names from the remaining lines; Define the functions generate_random_string and replace_keywords. The generate_random_string function generates a random string of a specified length. The replace_keywords function takes the string and a replacement dictionary as input, and then replaces all the keywords in the string with the corresponding values ​​in the dictionary, converting special characters that may be related to Trojans into characters that are not related to Trojans. Define the function `write_gates_info_to_csv`, which receives attribute information from the gate-level netlist, outputs a filename and a replacement dictionary. The `write_gates_info_to_csv` function first writes "label,text" at the beginning of the .csv file. Then, for each node, it writes the gate type (gate_type), input port (Input_port), and output port (Output_port) information to the csv file. The format of the input and output port information is "port type:port name".

4. The method for detecting hardware Trojans based on pre-trained NLP models using circuit gate-level features according to claim 1, characterized in that, The NLP model is selected from one of the following: BERT-based sequence classification model BertForSequenceClassification, GPT-2-based generative model GPT2LMHeadModel, and T5-based generative model T5ForConditionalGeneration.