Fpga implementation method for time-frequency synchronization of multi-path parallel transmission millimeter wave ofdm communication system

Abstract

The application discloses a kind of FPGA implementation methods for time-frequency synchronization of multi-path parallel transmission millimeter wave OFDM communication system, according to the frame structure of transmission signal physical layer and the number of parallel transmission paths of FPGA implementation time base, training sequence with specific structure is generated in time domain;Correlation operation is carried out on baseband multi-path parallel receiving signal using delay autocorrelation method, and the coarse timing synchronization position is found by the method of flow experience threshold comparison;The angle information carried by autocorrelation result is used to realize the frequency offset estimation calculation of system;The correlation operation is carried out on local cache sequence and receiving signal sequence, and the fine timing synchronization position is obtained;The final system symbol timing synchronization result position index is obtained by adding coarse synchronization and fine synchronization result, and the data sequence after symbol timing synchronization is output;Corresponding complex exponential signal is generated simultaneously, and frequency offset compensation operation is carried out on the sequence after timing synchronization, to complete system synchronization task.The application can improve system synchronization accuracy, reduce hardware implementation time cost and complexity.

Description

Technical Field

[0001] This invention belongs to the field of communication technology, specifically relating to an FPGA implementation method for time-frequency synchronization of a multi-channel parallel transmission millimeter-wave OFDM communication system. Background Technology

[0002] The millimeter-wave band offers abundant and unlicensed spectrum resources, making millimeter-wave communication technology a popular research area in wireless communication. However, the inherent high attenuation propagation characteristics of millimeter-wave signals limit their application primarily to indoor communication scenarios. Furthermore, the significant frequency shift and ultra-high symbol rate resulting from the wide spectrum in the high-frequency band pose substantial challenges to the implementation of millimeter-wave communication systems.

[0003] Synchronization establishes a common time reference between two devices or systems, ensuring coordinated operation even when the transmitting and receiving parties cannot use the same clock source. Especially for receivers in millimeter-wave OFDM communication systems, synchronization is the first step in baseband processing after analog signal conversion to digital signal, and is crucial for correct data transmission. Its performance directly determines communication quality; therefore, stable, reliable, and accurate synchronization in any scenario is essential for the reliable operation of the entire communication system. Synchronization techniques in millimeter-wave OFDM systems include symbol timing synchronization and carrier frequency synchronization. Timing synchronization primarily aims to determine the starting position of OFDM symbol frames and the starting boundary of FFT operations for demodulation. Precise timing synchronization in OFDM systems means precise symbol synchronization. After obtaining the accurate starting position of the OFDM symbol data frame, and using the known cyclic prefix time to make appropriate delays, the accurate data sample positions can be provided for FFT calculations. The implementation of timing synchronization techniques is highly dependent on the transmission mode of the communication system. Generally, communication systems operate in two modes: continuous transmission and burst transmission. Traditional voice mobile communication systems typically use continuous transmission. In this mode, synchronization is achieved using periodically transmitted pilot sequences. Because data transmission follows a strict rhythm, the synchronization result can be continuously adjusted using current and past information, improving the accuracy of the synchronization process to some extent. However, communication systems like Wi-Fi, which use burst transmission, have completely random start times for data frames, making it impossible to utilize past synchronization information. Therefore, real-time, timed synchronization is required. In this mode, synchronization is typically achieved by adding a training sequence to the frame header.

[0004] Carrier frequency synchronization refers to the process of estimating and correcting frequency deviations to ensure that the receiver's RF center frequency matches the transmitter's RF center frequency. Carrier frequency offset primarily disrupts the orthogonality between subcarriers, resulting in crosstalk between subcarriers and causing constellation rotation in OFDM signals. If the frequency offset is small, the resulting crosstalk is not significant, with the main effect being constellation rotation; however, if the frequency offset is large, the crosstalk will lead to demapping failure.

[0005] Currently, common synchronization algorithms are generally divided into three categories: blind synchronization algorithms suitable for scenarios assuming no known data within the transmission frame, cyclic prefix-based synchronization algorithms, and training sequence-based synchronization algorithms. Blind synchronization refers to the synchronization process performed using the energy or statistical information of the transmitted signal without relying on a specific sequence or frame structure. The maximum likelihood algorithm based on the cyclic prefix does not require additional data overhead and has low algorithm complexity, but its synchronization performance is poor under complex channel conditions. Training sequence-based synchronization algorithms also include cross-correlation algorithms and delay autocorrelation algorithms. While traditional data-aided synchronization algorithms have a large operating signal-to-noise ratio range, they cannot simultaneously achieve high levels of precision in symbol timing, algorithm complexity, frequency offset estimation accuracy, and frequency offset estimation range. Furthermore, their sequence correlation characteristics are not well reflected in multi-channel parallel transmission. Therefore, designing synchronization sequences and researching synchronization algorithms suitable for multi-channel parallel transmission in high-bandwidth scenarios is of great significance.

[0006] While domestic and international experts and scholars have conducted relatively complete experiments and published a large number of results on the hardware implementation of OFDM systems using FPGAs, there is still little detailed analysis on the research of OFDM synchronization technology in the high bandwidth multi-channel parallel transmission synchronization of millimeter wave bands. There is still room for improvement in the design of synchronization algorithms, resource optimization in FPGA implementation, and modular implementation of OFDM millimeter wave communication system synchronization technology. Summary of the Invention

[0007] The technical problem to be solved by the present invention is to provide an FPGA implementation method for time and frequency synchronization of a multi-channel parallel transmission millimeter-wave OFDM communication system, which addresses the shortcomings of the prior art. This method solves the technical problems of existing methods that do not consider the large bandwidth characteristics of signals, resulting in high computational latency and high hardware resource consumption, thereby improving the system synchronization accuracy and reducing the time cost and complexity of hardware implementation.

[0008] The present invention adopts the following technical solution:

[0009] An FPGA implementation method for time-frequency synchronization in a multi-channel parallel transmission millimeter-wave OFDM communication system includes the following steps:

[0010] S1. Based on the physical layer frame structure of the transmission signal and the number N of baseband parallel transmission channels in the specific FPGA implementation. path Generate a training sequence signal matrix X with a specific structure in the time domain;

[0011] S2. Using the structural characteristics of the training sequence signal matrix X obtained in step S1, the baseband multi-channel parallel received signal is processed by the time-delay autocorrelation method, and the results are accumulated. The coarse timing synchronization position syn_coarse is found by the streaming empirical threshold comparison method.

[0012] S3. Based on the coarse timing synchronization position syn_coarse obtained in step S2, utilize the angle information carried by the autocorrelation result. To achieve the actual value of frequency offset estimation cfo_est for millimeter-wave OFDM communication systems;

[0013] S4. Based on the coarse timing synchronization position syn_coarse obtained in step S2, the local buffer sequence pre-stored in the receiver is processed with the received signal sequence using the cross-correlation algorithm to obtain the fine timing synchronization position syn_precious.

[0014] S5. Add the coarse timing synchronization position syn_coarse obtained in step S2 to the fine timing synchronization position syn_precious obtained in step S4 to obtain the final system symbol timing synchronization result position index. Output the data sequence after symbol timing synchronization based on the position index. At the same time, generate the corresponding complex exponential signal based on the actual value of frequency offset estimation cfo_est obtained in step S3, and perform frequency offset compensation operation on the sequence after timing synchronization to finally complete the system synchronization task.

[0015] Specifically, in step S1, the training sequence signal matrix X is:

[0016]

[0017] Where T is the transpose calculation, C M×N Let M be an M×N dimensional matrix with complex elements. T_CP For the time-domain CP part, M T_data For the time-domain data portion, N samp N is the number of time-domain sampling points for the training sequence. path This represents the number of parallel paths.

[0018] Furthermore, the specific construction method of the training sequence is as follows:

[0019]

[0020] in, The Kronecker product symbol represents the matrix, A = [1,1], R is a constant amplitude random sequence, and S ZC_1 S ZC_2 N cfft and A ZC pseudo-random sequence of points.

[0021] Specifically, in step S2, the coarse timing synchronization position syn_coarse is:

[0022]

[0023] Among them, P avg [k] represents the coarse synchronization sequence result after smoothing filtering, P adv is the known empirical threshold for the corresponding training sequence, and k is the sequence number of the coarse synchronization sequence result.

[0024] Furthermore, the coarse synchronization sequence result P after smoothing filtering avg [k] is:

[0025]

[0026] Among them, L avg This is the length of the smoothing filter window.

[0027] Specifically, in step S3, the actual value of the frequency offset estimate, cfo_est, is:

[0028]

[0029] in, N represents the angular information carried by the autocorrelation results. sub f is the number of subcarriers. samp This is the system sampling frequency.

[0030] Specifically, in step S4, coarse synchronization timing is used to position the left and right sides. Point and local N cfft Cross-correlation is performed on the point-buffered sequence pattern_c. The cross-correlation result is obtained by first performing N on the two sequences. cfft Point FFT operation, then perform N on the result cfft The point IFFT operation cross-correlation produces a pulse-like spike, and the position corresponding to the spike is the precision timing synchronization position syn_precious.

[0031] Furthermore, the precise timing synchronization position syn_precious is:

[0032]

[0033] Among them, P corThe result of the fine synchronization sequence after cross-correlation operation is given, where k is the sequence number of the fine synchronization sequence result.

[0034] Furthermore, P cor for:

[0035]

[0036] Where, N cfft is the number of Fourier transform samples, fft is the Fast Fourier Transform operation, xn is the time-domain sequence of the received signal, syn_coarse is the coarse synchronization location, and pattern_c is the N pre-buffered value of the receiver. cfft Point cache sequence.

[0037] Secondly, embodiments of the present invention provide an FPGA implementation system for time-frequency synchronization of a multi-channel parallel transmission millimeter-wave OFDM communication system, comprising:

[0038] The matrix module, based on the physical layer frame structure of the transmitted signal and the specific number N of baseband parallel transmission channels in the FPGA implementation, path Generate a training sequence signal matrix X with a specific structure in the time domain;

[0039] The accumulation module utilizes the structural characteristics of the training sequence signal matrix X obtained from the matrix module, employs a time-delay autocorrelation method to perform calculations on the baseband multi-channel parallel received signals, and then performs an accumulation operation on the results. The coarse timing synchronization position syn_coarse is found through a streaming empirical threshold comparison method.

[0040] The estimation module, based on the coarse timing synchronization position syn_coarse obtained from the accumulation module, utilizes the angle information carried by the autocorrelation result. To achieve the actual value of frequency offset estimation cfo_est for millimeter-wave OFDM communication systems;

[0041] The arithmetic module, based on the coarse timing synchronization position syn_coarse obtained by the accumulation module, uses a cross-correlation algorithm to perform operations on the local buffer sequence pre-stored in the receiver and the received signal sequence to obtain the fine timing synchronization position syn_precious.

[0042] The output module adds the coarse timing synchronization position syn_coarse obtained from the step accumulation module to the fine timing synchronization position syn_precious obtained from the calculation module to obtain the final system symbol timing synchronization result position index. Based on the position index, it outputs the data sequence after symbol timing synchronization. At the same time, it generates the corresponding complex exponential signal based on the actual value of frequency offset estimate cfo_est obtained from the estimation module, performs frequency offset compensation operation on the timing synchronized sequence, and finally completes the system synchronization task.

[0043] Compared with the prior art, the present invention has at least the following beneficial effects:

[0044] An FPGA implementation method for time-frequency synchronization in a multi-channel parallel transmission millimeter-wave OFDM communication system is presented. At the transmitting end, a training sequence signal with a specific structure is generated based on the physical layer frame structure of the transmitted signal and the number of parallel baseband transmission channels in the specific FPGA implementation. This fully utilizes the characteristics of the transmission signal in the specific communication scenario, improving the efficiency of the synchronization algorithm. At the receiving end, a delay autocorrelation algorithm with low time cost and computational complexity is first used for coarse timing synchronization, and a threshold comparison method is used to determine the coarse synchronization position. Based on the angle information carried by the coarse synchronization sequence result, a frequency offset estimate is obtained. Then, based on the actual situation, it is determined whether to perform fine synchronization to improve synchronization accuracy. Therefore, this method achieves a good trade-off between higher synchronization accuracy and lower time and hardware consumption costs.

[0045] Furthermore, a training sequence signal matrix X is constructed. The sequence adopts a multi-path parallel design, which fully considers that the clock frequency of FPGA chips is generally around 150-200MHz. According to the Nyquist sampling theorem, multiple FPGAs need to work in parallel to achieve the high bandwidth transmission requirement.

[0046] Furthermore, the proposed training sequence for synchronization has a highly consistent structure, which produces a slowly varying trapezoidal correlation result during coarse synchronization autocorrelation operation. The ZC sequence used has constant amplitude characteristics in both time and frequency domains, which can well match the designed fine synchronization cross-correlation algorithm and produce sharp cross-correlation peaks.

[0047] Furthermore, a delayed autocorrelation method is used to perform correlation operations on the baseband multi-channel parallel received signals. Then, the correlation results are accumulated. Finally, the coarse timing synchronization position syn_coarse is found by comparing streaming empirical thresholds. This fully utilizes the training sequence characteristics of the transmitter design and has low hardware implementation cost and computation time.

[0048] Furthermore, the time-delay autocorrelation results are processed within a window of length L. avg The smoothing filter operation can effectively reduce the impact of uncertainties such as glitches in the received signal.

[0049] Furthermore, the actual value of the frequency offset estimate, cfo_est, can be directly derived from the angle information carried by the autocorrelation result. The FPGA implementation only requires an additional Cordic IP core for angle calculation, which greatly reduces hardware resource consumption.

[0050] Furthermore, coarse synchronization timing position left and right are adopted. Point and local N cfftCross-correlation is performed on the point-buffered sequence pattern_c. The cross-correlation result is obtained by first performing N on the two sequences. cfft Point FFT operation, then perform N on the result cfft The point IFFT operation generates a pulse-like spike through cross-correlation. The position corresponding to the spike is the fine timing synchronization position syn_precious. Since cross-correlation produces a sharp correlation peak, the addition of the fine synchronization step can supplement the coarse synchronization step and improve the accuracy of timing synchronization.

[0051] Furthermore, the precise timing synchronization position syn_precious can serve as an optional supplement to the coarse timing synchronization position. In actual environments with good channel conditions (high signal-to-noise ratio), only coarse synchronization can be performed without precise synchronization to save time and hardware consumption; in environments with poor channel conditions (low signal-to-noise ratio), precise synchronization can be used to improve timing synchronization accuracy.

[0052] Furthermore, for receiving N cfft Point sequence and local point N cfft The cached sequences are first subjected to FFT (Fast Fourier Transform) on each sequence, and then the resulting sequence after conjugate multiplication is subjected to N... cfft The point-wise IFFT (Inverse Fast Fourier Transform) operation is essentially equivalent to performing cross-correlation (sliding correlation) on the two-end sequences. Compared with the traditional sliding correlation, it can significantly reduce the computation time and the amount of FPGA hardware resources (especially complex multipliers).

[0053] It is understandable that the beneficial effects of the second aspect mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here.

[0054] In summary, this invention designs a training sequence suitable for high-bandwidth multi-path parallel transmission, and based on this, proposes a synchronization algorithm with higher synchronization accuracy than classical algorithms under the same signal-to-noise ratio, while reducing the computation time and hardware complexity of hardware implementation.

[0055] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0056] Figure 1 A schematic diagram of the millimeter-wave OFDM communication system used in the method of the present invention;

[0057] Figure 2 Flowchart of the proposed solution's implementation modules;

[0058] Figure 3 Design a structural diagram for the system frame structure under the proposed transmission scenario;

[0059] Figure 4A structure diagram for designing synchronization sequences under the proposed transmission scenario and frame structure design;

[0060] Figure 5 Simulation diagrams showing the results of coarse synchronization and smoothing filtering under experimental conditions;

[0061] Figure 6 To determine the mean square error between the estimated frequency offset and the standard value of 1000 experiments under the experimental conditions;

[0062] Figure 7 To generate simulation graphs of the precise synchronous cross-correlation results under experimental conditions;

[0063] Figure 8 To determine the probability of correct timing synchronization in 1000 experiments under the proposed experimental conditions;

[0064] Figure 9 To determine the simulation results of the proposed time-frequency synchronization algorithm on the hardware platform under experimental conditions. Detailed Implementation

[0065] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0066] In the description of this invention, it should be understood that the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0067] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0068] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes such combinations. For example, A and / or B can represent three cases: A alone, A and B simultaneously, and B alone. Additionally, the character " / " in this invention generally indicates that the preceding and following objects have an "or" relationship.

[0069] It should be understood that although terms such as first, second, third, etc., may be used in the embodiments of the present invention to describe the preset range, these preset ranges should not be limited to these terms. These terms are only used to distinguish the preset ranges from one another. For example, without departing from the scope of the embodiments of the present invention, the first preset range may also be referred to as the second preset range, and similarly, the second preset range may also be referred to as the first preset range.

[0070] Depending on the context, the word "if" as used here can be interpreted as "when," "when," "in response to determination," or "in response to detection." Similarly, depending on the context, the phrase "if determination" or "if detection (of the stated condition or event)" can be interpreted as "when determination," "in response to determination," "when detection (of the stated condition or event)," or "in response to detection (of the stated condition or event)."

[0071] The accompanying drawings illustrate various structural schematic diagrams according to embodiments disclosed in this invention. These drawings are not to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0072] This invention provides an FPGA implementation method for time-frequency synchronization in a multi-channel parallel transmission millimeter-wave OFDM communication system. Firstly, at the transmitting end, based on the physical layer frame structure of the transmission signal (including) and the specific FPGA implementation, the number of baseband parallel transmission channels N... path A training sequence X with a specific structure is generated in the time domain. After the signal is transmitted through the channel, at the receiving end, a delayed autocorrelation method is first used to perform correlation operations on the baseband multi-channel parallel received signals. Then, the correlation results are accumulated. Finally, the coarse timing synchronization position syn_coarse is found by comparing streaming empirical thresholds. When the coarse timing synchronization position is obtained, the angle information carried by the autocorrelation results is used. The system performs frequency offset estimation (cfo_est). Next, based on the obtained coarse timing synchronization position, it performs correlation operations between the local buffer sequence and the received signal sequence to obtain the fine timing synchronization position (syn_precious). Finally, it adds the coarse and fine synchronization results to obtain the final system symbol timing synchronization result position index, and outputs the symbol-synchronized data sequence based on this position index. Simultaneously, based on the frequency offset estimation result, a corresponding complex exponential signal is generated to perform frequency offset compensation on the timing-synchronized sequence, ultimately completing the system synchronization task. This invention can generate an improved synchronization sequence by combining the characteristics of large bandwidth and high sampling rate, using a two-stage coarse and fine synchronization method to improve the accuracy of timing synchronization and frequency offset estimation, while also achieving lower resource utilization, algorithm complexity, and computation time cost in hardware implementation.

[0073] Please see Figure 1 and Figure 2 This invention discloses an FPGA implementation method for time-frequency synchronization in a multi-channel parallel transmission millimeter-wave OFDM communication system, comprising the following steps:

[0074] S1. The transmitting end determines the number of baseband parallel transmission channels N based on the physical layer frame structure (including) of the transmitted signal and the specific FPGA implementation. path Generate a training sequence X with a specific structure in the time domain;

[0075] Due to the large bandwidth and high transmission rate characteristics of millimeter-wave systems, the system sampling rate increases dramatically. Therefore, the baseband signal is multi-pathed and transmitted in parallel, leveraging the advantages of FPGA parallel high-speed processing. The number of parallel paths is N. path The baseband equivalent discrete-time training sequence signal matrix X used by the transmitter to synchronize the time-domain structure of the training sequence is:

[0076]

[0077] Where T represents transpose calculation, C M×N Let M represent an M×N dimensional matrix whose elements are complex numbers. T_CP For the time-domain CP part, M T_data For the time-domain data portion, N samp =N sub +N cp N samp N is the number of time-domain sampling points for the training sequence. sub N is the number of subcarriers (for OFDM modulation, this is equal to the number of data symbol points). cp For the number of points following the prefix.

[0078] Specifically, the i-th path of parallel data transmission X i for:

[0079]

[0080] Please see Figure 3 The design scheme of the frame structure is given under the experimental scenario with a signal bandwidth of 4.5GHz, 64QAM modulation mode, OFDM subcarrier spacing reference 5G NR protocol, 488.28125KHz, and FPGA clock frequency of 250MHz.

[0081] Each radio frame contains 10 subframes, each subframe contains 32 time slots, and each time slot contains 16 OFDM symbols. The first OFDM symbol in each time slot is a training sequence used for synchronization, and the following 15 OFDM symbols are data symbols. The number of subcarriers in the frequency domain is N. sub = 4.5G ÷ 488.28125K = 9216 subcarriers. Considering the FPGA clock frequency requirements, N is used. path =Transmission is performed in a 36-channel parallel manner, with 256 subcarriers per channel; each OFDM symbol in the time domain contains N samp = 9792 sampling points, of which the first N cp =576 points is the cyclic prefix CP part, and the following 9216 points are the valid data part.

[0082] The specific construction method of the transmitter training sequence is as follows:

[0083]

[0084] in, The Kronecker product symbol for a matrix is ​​A = [1,1]. It is a random sequence with constant amplitude, where each sampling point r i satisfy S ZC_1 S ZC_2 N cfft and A ZC pseudo-random sequence of points.

[0085] Please see Figure 4 This paper presents a synchronization sequence scheme designed under the frame structure described above. The training symbol portion of the synchronization sequence consists of a cyclic prefix portion composed of two consistent parts, each including a segment... A constant amplitude random sequence of points and N cfft =256-point ZC sequence. The data part, Training Sequence, also consists of two consistent parts, each including length. The ZC sequence Main Part and the 576-point sequence that is identical to the CP part.

[0086] S2. At the receiving end, firstly, the delayed autocorrelation method is used to perform correlation operation on the baseband multi-channel parallel received signals. Secondly, the correlation results are accumulated. Finally, the coarse timing synchronization position syn_coarse is found by comparing streaming empirical thresholds.

[0087] The time-delay autocorrelation of the i-th parallel received signal is calculated using the following formula:

[0088]

[0089] The goal of accumulating the autocorrelation results of each delay is to improve the signal-to-noise ratio and reduce timing errors.

[0090]

[0091] To prevent the influence of uncertainties such as glitches in the received signal, a smoothing operation is then performed on the time-delay autocorrelation results:

[0092]

[0093] Among them, L avg For the smoothing filter window length, P avg [k] represents the coarse synchronization sequence result after smoothing filtering.

[0094] Theoretical coarse synchronization timing position index syn_coarse t This should be the index position corresponding to the maximum value of the coarse synchronization sequence result after smoothing filtering:

[0095]

[0096] However, considering that the hardware carrier is an FPGA and data is continuously processed in a streaming manner, a streaming threshold comparison method is used to obtain the final coarse timing synchronization position syn_coarse(threshold P). adv (Generated from empirical values ​​obtained through multiple prior experiments).

[0097]

[0098] Please see Figure 5 Using L avg =16 Simulations were performed on coarse synchronization and smoothing filtering. The simulation results show that the delayed autocorrelation produces a trapezoidal correlation result, which is a slowly changing process. The peak position can be found by using the streaming threshold comparison method.

[0099] S3. When obtaining the coarse timing synchronization position, utilize the angle information carried by the autocorrelation result. Implement the frequency offset estimation of the system and calculate the actual value cfo_est;

[0100] Frequency offset estimation is performed using the angle information of precise timing position. The theoretical value of the frequency offset estimation is:

[0101]

[0102] Among them, f samp This is the system sampling frequency.

[0103] Frequency offset estimation is performed using the angle information of the coarse synchronization timing position, and the actual value of the frequency offset estimate, cfo_est, is obtained as follows:

[0104]

[0105] Please see Figure 6 Under design simulation conditions, Under the condition of signal-to-noise ratio ≥ 4dB, the mean square error between the estimated frequency offset and the standard value in multiple experiments is within 10. -5 The following fully meets the system frequency offset estimation requirements.

[0106] S4. Based on the coarse timing synchronization position already obtained, the local buffer sequence and the received signal sequence are correlated using a cross-correlation algorithm to obtain the fine timing synchronization position syn_precious.

[0107] Fine timing synchronization improves the accuracy of system timing synchronization. In situations with good channel conditions or during the initial debugging of the entire communication system, where the goal is simply to ensure the timing synchronization algorithm can be implemented quickly and to provide a guarantee for the direct connection debugging of other system components, the fine timing synchronization module may not be used. In this case, the coarse timing synchronization result (syn_coarse) is the timing synchronization position of the synchronization module. In step S5, the timed synchronized data is output to the frequency offset compensation module based on this position.

[0108] The fine timing synchronization module uses coarse synchronization timing position left and right. Point and local N cfft Cross-correlation is performed on the point-buffered sequence pattern_c. To save hardware resources and computation time, the cross-correlation results are obtained by first performing N-order cross-correlation on the two sequences. cfft Point FFT operation, then perform N on the result cfft The point IFFT operation yields:

[0109]

[0110] Because cross-correlation produces a pulse-like spike, the position corresponding to the spike is the precise timing position syn_precious:

[0111]

[0112] Please see Figure 7Under the above design simulation conditions, N cfft =256. The simulation results show that due to the inherent characteristics of cross-correlation operation, a sharp correlation peak is generated. Therefore, there is no need to preset the decision threshold. Only peak detection is needed to accurately locate the reference point. On the other hand, the decision error introduced by the decision threshold can also be eliminated.

[0113] S5. Add the coarse synchronization and fine synchronization results to obtain the final system symbol timing synchronization result position index. Output the data sequence after symbol timing synchronization based on the position index. At the same time, generate the corresponding complex exponential signal according to the frequency offset estimation result in step S3 to perform frequency offset compensation operation on the timing synchronized sequence, and finally complete the system synchronization task.

[0114] In another embodiment of the present invention, an FPGA implementation system for time-frequency synchronization of a multi-channel parallel transmission millimeter-wave OFDM communication system is provided. This system can be used to implement the above-mentioned FPGA implementation method for time-frequency synchronization of a multi-channel parallel transmission millimeter-wave OFDM communication system. Specifically, the FPGA implementation system for time-frequency synchronization of a multi-channel parallel transmission millimeter-wave OFDM communication system includes a matrix module, an accumulation module, an estimation module, a calculation module, and an output module.

[0115] The matrix module, based on the physical layer frame structure of the transmitted signal and the specific number N of baseband parallel transmission channels in the FPGA implementation, path Generate a training sequence signal matrix X with a specific structure in the time domain;

[0116] The accumulation module utilizes the structural characteristics of the training sequence signal matrix X obtained from the matrix module, employs a time-delay autocorrelation method to perform calculations on the baseband multi-channel parallel received signals, and then performs an accumulation operation on the results. The coarse timing synchronization position syn_coarse is found through a streaming empirical threshold comparison method.

[0117] The estimation module, based on the coarse timing synchronization position syn_coarse obtained from the accumulation module, utilizes the angle information carried by the autocorrelation result. To achieve the actual value of frequency offset estimation cfo_est for millimeter-wave OFDM communication systems;

[0118] The arithmetic module, based on the coarse timing synchronization position syn_coarse obtained by the accumulation module, uses a cross-correlation algorithm to perform operations on the local buffer sequence pre-stored in the receiver and the received signal sequence to obtain the fine timing synchronization position syn_precious.

[0119] The output module adds the coarse timing synchronization position syn_coarse obtained from the step accumulation module to the fine timing synchronization position syn_precious obtained from the calculation module to obtain the final system symbol timing synchronization result position index. Based on the position index, it outputs the data sequence after symbol timing synchronization. At the same time, it generates the corresponding complex exponential signal based on the actual value of frequency offset estimate cfo_est obtained from the estimation module, performs frequency offset compensation operation on the timing synchronized sequence, and finally completes the system synchronization task.

[0120] In another embodiment of the present invention, a terminal device is provided, comprising a processor and a memory. The memory stores a computer program, which includes program instructions. The processor executes the program instructions stored in the computer storage medium. The processor may be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. It is the computing and control core of the terminal, suitable for implementing one or more instructions, specifically suitable for loading and executing one or more instructions to implement a corresponding method flow or corresponding function. The processor described in this embodiment can be used for the operation of an FPGA implementation method for time-frequency synchronization in a multi-channel parallel transmission millimeter-wave OFDM communication system, including:

[0121] Based on the physical layer frame structure of the transmission signal, and the specific number N of baseband parallel transmission channels in the FPGA implementation. path In the time domain, a training sequence signal matrix X with a specific structure is generated. Using the structural characteristics of the training sequence signal matrix X, the baseband multi-channel parallel received signal is processed by the delay autocorrelation method. The results are then accumulated, and the coarse timing synchronization position syn_coarse is found by the streaming empirical threshold comparison method.

[0122] Based on the coarse timing synchronization position syn_coarse, the angle information carried by the autocorrelation result is utilized. The system realizes the actual value of frequency offset estimation (cfo_est) for the millimeter-wave OFDM communication system. Based on the coarse timing synchronization position (syn_coarse), a cross-correlation algorithm is used to calculate the fine timing synchronization position (syn_precious) by combining the local buffer sequence pre-stored in the receiver with the received signal sequence. The coarse timing synchronization position (syn_coarse) and the fine timing synchronization position (syn_precious) are added to obtain the position index of the final system symbol timing synchronization result. The data sequence after symbol timing synchronization is output according to the position index. At the same time, a corresponding complex exponential signal is generated according to the actual value of frequency offset estimation (cfo_est) to perform frequency offset compensation operation on the timing synchronized sequence, and finally completes the system synchronization task.

[0123] In another embodiment of the present invention, a storage medium is also provided, specifically a computer-readable storage medium (memory). This computer-readable storage medium is a memory device in a terminal device used to store programs and data. It is understood that the computer-readable storage medium here can include both the built-in storage medium in the terminal device and extended storage media supported by the terminal device. The computer-readable storage medium provides storage space that stores the terminal's operating system. Furthermore, this storage space also stores one or more instructions suitable for loading and execution by a processor. These instructions can be one or more computer programs (including program code). It should be noted that the computer-readable storage medium here can be high-speed RAM or non-volatile memory, such as at least one disk storage device.

[0124] One or more instructions stored in a computer-readable storage medium can be loaded and executed by a processor to implement the corresponding steps of the FPGA implementation method for time-frequency synchronization of a multi-channel parallel transmission millimeter-wave OFDM communication system in the above embodiments; one or more instructions in the computer-readable storage medium are loaded and executed by the processor in the following steps:

[0125] Based on the coarse timing synchronization position syn_coarse, the angle information carried by the autocorrelation result is utilized. The system realizes the actual value of frequency offset estimation (cfo_est) for the millimeter-wave OFDM communication system. Based on the coarse timing synchronization position (syn_coarse), a cross-correlation algorithm is used to calculate the fine timing synchronization position (syn_precious) by combining the local buffer sequence pre-stored in the receiver with the received signal sequence. The coarse timing synchronization position (syn_coarse) and the fine timing synchronization position (syn_precious) are added to obtain the position index of the final system symbol timing synchronization result. The data sequence after symbol timing synchronization is output according to the position index. At the same time, a corresponding complex exponential signal is generated according to the actual value of frequency offset estimation (cfo_est) to perform frequency offset compensation operation on the timing synchronized sequence, and finally completes the system synchronization task.

[0126] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0127] Please see Figure 8 Under the above design and simulation conditions, the estimation of STO basically satisfies the requirement that the timing position offset does not exceed approximately the correct position. The point is the standard for correct timing. It can be seen that within the signal-to-noise ratio range of 4-25dB, the timing accuracy probability of the method of this invention is higher than that of the typical SC algorithm, which meets the timing synchronization requirements of the system.

[0128] Please see Figure 9 A 36-channel parallel synchronization sequence (each sequence preceded by 20 points of random noise) was generated using Matlab, and a normalized frequency offset of 0.1 was added. The FPGA implementation of the design algorithm was simulated using the Vivado 2019.2 platform. The hardware calculation index offset was found to be 145 using Matlab. The simulation results show that the timing synchronization location address index (coarse_number signal) is 165 = 145 + 20, indicating accurate timing synchronization. The frequency offset estimate (bias signal) is 4'h0333 (fix16_13), with a decimal value of 0.1, indicating accurate frequency offset estimation. The entire calculation process requires 339 clock cycles, which meets the hardware requirements.

[0129] Software and hardware simulation verification of the method of this invention shows that, compared with classical algorithms, the training sequence and synchronization method designed in this invention are more suitable for the transmission scenarios of high-bandwidth millimeter-wave OFDM parallel transmission systems. The timing synchronization and frequency offset estimation accuracies are both above industry standards, and the hardware computation time and resource overhead of the algorithm implementation are also reduced.

[0130] In summary, the FPGA implementation method for time-frequency synchronization of a multi-channel parallel transmission millimeter-wave OFDM communication system, as presented in this invention, compared with the synchronization scheme of cognitive millimeter-wave OFDM communication systems, can generate an improved synchronization sequence by combining the characteristics of large bandwidth and high sampling rate. It uses a two-stage coarse and fine synchronization method to improve the accuracy of timing synchronization and frequency offset estimation. Furthermore, it can select whether to perform fine synchronization operation based on the channel conditions of the actual communication environment to consider the trade-off between synchronization accuracy and computational complexity. At the same time, in terms of hardware implementation, this invention has lower resource utilization, algorithm complexity, and computation time cost.

[0131] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0132] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0133] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed in this invention can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0134] In the embodiments provided by this invention, it should be understood that the disclosed devices / terminals and methods can be implemented in other ways. For example, the device / terminal embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0135] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0136] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0137] If the integrated module / unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content included in the computer-readable medium can be appropriately added or removed according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electrical carrier signals and telecommunication signals.

[0138] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0139] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0140] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0141] The above content is only for illustrating the technical concept of the present invention and should not be construed as limiting the scope of protection of the present invention. Any modifications made to the technical solution based on the technical concept proposed in this invention shall fall within the scope of protection of the claims of this invention.

Claims

1. An FPGA implementation method for time-frequency synchronization in a multi-channel parallel transmission millimeter-wave OFDM communication system, characterized in that, Includes the following steps: S1. Based on the physical layer frame structure of the transmission signal and the number of baseband parallel transmission paths in the specific FPGA implementation. Generate a training sequence signal matrix with a specific structure in the time domain. Training sequence signal matrix for: in, For transpose calculation, for A matrix whose elements are complex numbers. For the time-domain CP part, For the time domain data portion, The number of time-domain sampling points for the training sequence. This represents the number of parallel paths. The specific construction method of the training sequence is as follows: in, The Kronecker product symbol for matrices. , It is a random sequence with constant amplitude. , These are the number of points in the Fourier transform. and ZC pseudo-random sequence of points, The number of subcarriers; S2. Using the training sequence signal matrix obtained in step S1 Based on the structural characteristics, a time-delay autocorrelation method is used to process the baseband multi-channel parallel received signals, and the results are accumulated. The coarse timing synchronization position is then found through a streaming empirical threshold comparison method. ; S3. Coarse timing synchronization position obtained in step S2 Utilizing the angle information carried by the autocorrelation results Achieving actual frequency offset estimation for millimeter-wave OFDM communication systems , This is the sequence number of the coarse synchronization sequence result; S4. Based on the coarse timing synchronization position obtained in step S2 The precise timing synchronization position is obtained by using a cross-correlation algorithm to perform calculations between the locally buffered sequence pre-stored in the receiver and the received signal sequence. ; S5. The coarse timing synchronization position obtained in step S2 Synchronization position with the precise timing obtained in step S4 The positions are summed to obtain the final system symbol timing synchronization result position index. During periods of good channel conditions or initial debugging of the entire communication system, the fine timing synchronization module is not used; the coarse timing synchronization position is used instead. This refers to the location of the timing synchronization result. Based on the location index, the data sequence after symbol timing synchronization is output, and the actual value is estimated based on the frequency offset obtained in step S3. The corresponding complex exponential signal is generated, and frequency offset compensation is performed on the timed synchronized sequence to finally complete the system synchronization task.

2. The FPGA implementation method for time-frequency synchronization of a multi-channel parallel transmission millimeter-wave OFDM communication system according to claim 1, characterized in that, In step S2, the coarse timing synchronization position is determined. for: in, This is the result of the coarse synchronization sequence after smoothing filtering.

3. The FPGA implementation method for time-frequency synchronization of a multi-channel parallel transmission millimeter-wave OFDM communication system according to claim 2, characterized in that, Results of coarse synchronization sequence after smoothing filtering for: in, This is the length of the smoothing filter window.

4. The FPGA implementation method for time-frequency synchronization of a multi-channel parallel transmission millimeter-wave OFDM communication system according to claim 1, characterized in that, In step S3, the frequency offset is estimated to be the actual value. for: in, For the angle information carried by the autocorrelation results, This is the system sampling frequency.

5. The FPGA implementation method for time-frequency synchronization of a multi-channel parallel transmission millimeter-wave OFDM communication system according to claim 1, characterized in that, In step S4, coarse synchronization timing position is used to position left and right. Point and Local Point cache sequence Perform cross-correlation calculations; the cross-correlation results are obtained by first performing cross-correlation on the two sequences. Point FFT operation, then perform the following on the result: The point-wise IFFT operation generates a correlation pulse spike through cross-correlation; the position corresponding to this spike is the precise timing synchronization position. .

6. The FPGA implementation method for time-frequency synchronization of a multi-channel parallel transmission millimeter-wave OFDM communication system according to claim 5, characterized in that, Precise timing synchronization position for: in, The result of the fine synchronization sequence after cross-correlation operation. This is the sequence number of the precision synchronization sequence result.

7. The FPGA implementation method for time-frequency synchronization of a multi-channel parallel transmission millimeter-wave OFDM communication system according to claim 6, characterized in that, for: in, The number of points in the Fourier transform. For Fast Fourier Transform operations, This is the time-domain sequence of the signal received by the receiver. For coarse synchronization positioning, Pre-buffered for the receiver Point cache sequence.

8. An FPGA implementation system for time-frequency synchronization of a multi-channel parallel transmission millimeter-wave OFDM communication system, characterized in that, include: The matrix module, based on the physical layer frame structure of the transmitted signal and the number of baseband parallel transmission channels in the specific FPGA implementation, Generate a training sequence signal matrix with a specific structure in the time domain. Training sequence signal matrix for: in, For transpose calculation, for A matrix whose elements are complex numbers. For the time-domain CP part, For the time domain data portion, The number of time-domain sampling points for the training sequence. This represents the number of parallel paths. The specific construction method of the training sequence is as follows: in, The Kronecker product symbol for matrices. , It is a random sequence with constant amplitude. , These are the number of points in the Fourier transform. and ZC pseudo-random sequence of points, The number of subcarriers; The accumulation module uses the training sequence signal matrix obtained from the matrix module. Based on the structural characteristics, a time-delay autocorrelation method is used to process the baseband multi-channel parallel received signals, and the results are accumulated. The coarse timing synchronization position is then found through a streaming empirical threshold comparison method. ; The estimation module, based on the coarse timing synchronization position obtained by the accumulation module. Utilizing the angle information carried by the autocorrelation results Achieving actual frequency offset estimation for millimeter-wave OFDM communication systems , This is the result of the coarse synchronization sequence after smoothing filtering. This is the sequence number of the coarse synchronization sequence result; The arithmetic module, based on the coarse timing synchronization position obtained by the accumulation module. The precise timing synchronization position is obtained by using a cross-correlation algorithm to perform calculations between the locally buffered sequence pre-stored in the receiver and the received signal sequence. ; The output module will output the coarse timing synchronization position obtained from the step accumulation module. Synchronization position obtained with the arithmetic module The positions are summed to obtain the final system symbol timing synchronization result position index. During periods of good channel conditions or initial debugging of the entire communication system, the fine timing synchronization module is not used; the coarse timing synchronization position is used instead. This refers to the location of the timing synchronization result. Based on the location index, the data sequence after symbol timing synchronization is output, and the actual value is estimated based on the frequency offset obtained from the estimation module. The corresponding complex exponential signal is generated, and frequency offset compensation is performed on the timed synchronized sequence to finally complete the system synchronization task.

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