Display driver circuit and display device

Abstract

The present invention relates to a display driving circuit and a display device. The display driving circuit includes: a substrate, and a power module, a processing module, and a control module disposed on one side of the substrate; the power module is connected to both the processing module and the control module, and supplies power to both modules; the processing module is also connected to the control module, and provides display signals to the control module; the control module controls the display panel to display according to the display signals; wherein the power module and the processing module are located on opposite sides of the control module.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to a display driving circuit and a display device. Background Technology

[0002] With the development of display technology, people have increasingly higher requirements for the resolution and refresh rate of display screens. Resolution refers to the number of pixels contained in a display screen; the higher the resolution, the clearer the displayed image. Refresh rate is the number of times the display screen updates its image per second; the higher the refresh rate, the better the stability of the displayed image. Summary of the Invention

[0003] This disclosure provides a display driving circuit, including: a substrate, and a power module, a processing module and a control module disposed on one side of the substrate;

[0004] The power module is connected to both the processing module and the control module, and is used to supply power to both the processing module and the control module.

[0005] The processing module is also connected to the control module and is used to provide display signals to the control module;

[0006] The control module is used to control the display panel to display according to the display signal;

[0007] The power module and the processing module are located on opposite sides of the control module.

[0008] In some embodiments, the processing module includes a system-on-a-chip, a graphics card assembly, and an adapter board connecting the system-on-a-chip and the graphics card assembly; the control module includes a timing controller and a backlight driver; and the power module includes a high-power power board and a low-power power board.

[0009] The high-power power board includes a first output interface and a second output interface. The first output interface is connected to the backlight driver, and the second output interface is connected to the system-on-a-chip (SoC). The SoC is also connected to the timing controller. The high-power power board is used to supply power to the backlight driver, the SoC, and the timing controller.

[0010] The low-power power supply board includes a third output interface, which is connected to the adapter board. The low-power power supply board is used to supply power to the adapter board and the graphics card assembly.

[0011] The system-on-a-chip is also connected to the backlight driver and is used to provide the display signal to the timing controller and the backlight drive signal to the backlight driver.

[0012] The timing controller is also connected to the backlight driver and is used to control the display panel to display according to the display signal, generate screen brightness information according to the display signal, and send the screen brightness information to the backlight driver.

[0013] The backlight driver is used to drive the backlight module to provide backlight to the display panel according to the backlight driving signal and the screen brightness information.

[0014] In some embodiments, the low-power power board is located on the side of the high-power power board away from the control module, the first output interface, the second output interface and the third output interface are disposed near the first edge of the substrate, the timing controller is located on the side of the backlight driver away from the first edge, the system-on-a-chip is located on the side of the graphics card assembly away from the first edge, and the adapter board is located between the graphics card assembly and the backlight driver, and is disposed near the graphics card assembly.

[0015] In some implementations, the system-on-a-chip (SoC) is connected to the timing controller via multiple display signal lines that are spaced apart from each other. These display signal lines are used to transmit display signals, and the transmission path lengths of the multiple display signal lines are approximately the same.

[0016] In some embodiments, the display signal line includes a first substrate layer, a first conductor layer, a first protective layer and a first shielding layer stacked sequentially along a first direction. The first substrate layer is disposed close to the substrate, the first shielding layer is disposed away from the substrate, and the first direction is perpendicular to the substrate.

[0017] In some embodiments, the plurality of display signal lines includes a first display signal line and a second display signal line, wherein the first display signal line is located on the side of the second display signal line closer to the system-on-a-chip and the timing controller; and

[0018] The first display signal line includes a first extension line, a folded structure, and a second extension line connected in sequence. The first extension line is located on the side of the folded structure closer to the system-on-a-chip and is connected to the system-on-a-chip. The second extension line is located on the side of the folded structure closer to the timing controller and is connected to the timing controller. The folded structure includes multiple layers stacked in sequence along the first direction, and double-sided adhesive conductive foam is disposed between two adjacent layers.

[0019] In some embodiments, the backlight driver is connected to the timing controller via a first signal line, which intersects with the display signal line. The first signal line includes a second substrate layer, a second conductor layer, a second protective layer, and a second shielding layer stacked sequentially, with the second shielding layer disposed close to the display signal line.

[0020] The backlight driver is connected to the system-on-a-chip via a second signal line, which intersects with the display signal line. The second signal line includes multiple transmission lines, a third protective layer, and a third shielding layer. The transmission line includes a conductor and an insulating layer covering the surface of the conductor. The third protective layer is disposed around the multiple transmission lines. The third shielding layer is disposed between the conductor and the insulating layer, or between the multiple transmission lines and the third protective layer.

[0021] In some embodiments, the first signal line is located between the substrate and the display signal line, and the second signal line is located on the side of the display signal line away from the substrate;

[0022] The display driving circuit further includes a third signal line, which intersects with the display signal line and is located on the side of the display signal line away from the substrate.

[0023] In some implementations, the system-on-a-chip and the graphics card component are separate components; and

[0024] The graphics card assembly includes a first housing, a graphics card and a cooling fan disposed within the first housing. The cooling fan is located on the side of the graphics card away from the substrate. The first housing includes a top surface located on the side of the cooling fan away from the graphics card. A first heat dissipation hole is provided on the top surface.

[0025] In some embodiments, the first housing further includes two first housing sides disposed opposite to each other along the second direction. The first housing sides are provided with a recess and a fixing part protruding toward the side away from the graphics card. The surface of the recess away from the substrate is lower than the top surface of the housing. The fixing part has a first fixing hole penetrating the fixing part along a direction perpendicular to the second direction. The recess is located on the side of the fixing part closer to the adapter plate.

[0026] The display driving circuit further includes: a fixing bracket located between the graphics card assembly and the substrate, including a base plate and a plurality of side plates connected to the edge of the base plate, the base plate being fixed on the substrate, the plurality of side plates including two first side plates and two second side plates arranged opposite to each other along a second direction, the first side plates and the second side plates being located on the side of the first shell away from the graphics card, and the first side plate being located on the side of the second side plate closer to the adapter plate;

[0027] The first side plate has a first bent portion at the end away from the base plate that bends toward the graphics card assembly. The first bent portion is used to limit the recess. The second side plate has a second bent portion at the end away from the first side plate that bends toward the side away from the graphics card assembly. The second bent portion has a second fixing hole that passes through the second bent portion in a direction perpendicular to the second direction. The second fixing hole and the first fixing hole are used to connect the fixing bracket and the graphics card assembly through a rigid connector.

[0028] In some embodiments, the display driving circuit further includes:

[0029] A rear housing is disposed on the side of the processing module, the control module, and the power module facing away from the substrate. The rear housing includes:

[0030] A clearance hole is provided, corresponding to the position of the graphics card component, wherein the graphics card component protrudes from the rear shell at the clearance hole.

[0031] The second heat dissipation hole corresponds to the position of the system-on-a-chip;

[0032] The third heat dissipation hole corresponds to the second edge of the high-power power supply board and partially overlaps with it. The first output interface and the second output interface are located on the second edge.

[0033] The fourth heat dissipation hole is located near the third edge of the high-power power board and does not overlap with the high-power power board. The third edge and the second edge are two opposite edges of the high-power power board.

[0034] In some embodiments, the rear shell has two second shell side surfaces arranged opposite each other along a second direction, one of the second shell side surfaces having a first strip-shaped hole and the other second shell side surface having a second strip-shaped hole, the first strip-shaped hole and the second strip-shaped hole being used to form convection heat dissipation.

[0035] In some embodiments, the display driving circuit further includes:

[0036] The power input interface is located on the side of the low-power power board away from the high-power power board, and is located near the fourth edge of the low-power power board, which is the edge of the low-power power board away from the third output interface.

[0037] The high-power power board further includes a first input interface, and the low-power power board further includes a second input interface. The first input interface and the second input interface are connected in parallel to the same power input interface and are located close to the same power input interface.

[0038] This disclosure provides a display device, including:

[0039] The display driving circuit as described in any embodiment; and

[0040] The display panel is connected to the display driving circuit and is used to display information under the control of the display driving circuit.

[0041] In some embodiments, the control module includes a backlight driver, and the display device further includes:

[0042] A backlight module, located on the backlight side of the display panel and connected to the backlight driver, is used to provide backlight to the display panel under the drive of the backlight driver.

[0043] The backlight module includes: multiple light strips arranged parallel to each other and along the row direction; each light strip includes multiple light strings connected in parallel and arranged along the column direction; each light string includes multiple LEDs connected in series and arranged along the column direction; the multiple light strips are divided into multiple light strip groups; each light strip group includes multiple light strips arranged continuously; multiple light strips located in the same light strip group are connected to the same first printed circuit board; the first printed circuit board is connected to the backlight driver.

[0044] In some embodiments, the control module includes a timing controller, and the display device further includes:

[0045] Multiple second printed circuit boards are located on the side of the display driving circuit close to the timing controller. The second printed circuit boards are connected to the display panel. The second printed circuit board connected to the middle area of ​​the display panel is also connected to the timing controller and the second printed circuit board connected to the edge area of ​​the display panel, respectively.

[0046] The above description is merely an overview of the technical solution disclosed herein. In order to better understand the technical means of this disclosure and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this disclosure more apparent and understandable, specific embodiments of this disclosure are described below. Attached Figure Description

[0047] To more clearly illustrate the technical solutions in the embodiments or related technologies of this disclosure, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. It should be noted that the scale in the drawings is for illustration only and does not represent the actual scale.

[0048] Figure 1 An exemplary schematic diagram of a display driver circuit provided in this disclosure is shown;

[0049] Figure 2 An exemplary schematic diagram of another display driving circuit provided in this disclosure is shown;

[0050] Figure 3a An exemplary schematic diagram of the structure of the display signal line provided in this disclosure is shown;

[0051] Figure 3b An exemplary schematic diagram of the folding of the display signal line provided in this disclosure is shown;

[0052] Figure 4 An exemplary schematic diagram of the structure of the second signal line provided in this disclosure is shown;

[0053] Figure 5 An exemplary schematic diagram of the transmission line provided in this disclosure is shown;

[0054] Figure 6 An exemplary schematic diagram of the structure of the graphics card component provided in this disclosure is shown;

[0055] Figure 7 Another structural schematic diagram of the graphics card component provided in this disclosure is shown as an example;

[0056] Figure 8 An exemplary schematic diagram of the rear shell structure of the display device provided in this disclosure is shown;

[0057] Figure 9 Another structural schematic diagram of the rear casing of the display device provided in this disclosure is shown as an example;

[0058] Figure 10a An exemplary schematic diagram of the display panel provided in this disclosure is shown;

[0059] Figure 10b An exemplary schematic diagram of the display device provided in this disclosure is shown;

[0060] Figure 11An exemplary schematic diagram of the backlight module provided in this disclosure is shown;

[0061] Figure 12a An exemplary schematic diagram of the display effect of a display device in the related art is shown;

[0062] Figure 12b An exemplary schematic diagram of the display effect of the display device provided in this disclosure is shown. Detailed Implementation

[0063] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0064] Reference Figure 1 and Figure 2 , Figure 1 and Figure 2 An exemplary schematic diagram of a display driver circuit 11 provided in this disclosure is shown, such as... Figure 1 and Figure 2 As shown, the display driving circuit 11 includes: a substrate 110, and a power module 111, a processing module 112 and a control module 113 disposed on one side of the substrate 110.

[0065] The power module 111 is connected to the processing module 112 and the control module 113 respectively, and is used to supply power to the processing module 112 and the control module 113.

[0066] The processing module 112 is also connected to the control module 113 and is used to provide display signals to the control module 113;

[0067] The control module 113 is used to control the display panel 12 to display according to the display signal.

[0068] The power supply module 111 and the processing module 112 are located on opposite sides of the control module 113.

[0069] This disclosure separates the power module 111, which contains high-voltage circuits, from the processing module 112, which consists of low-voltage signal circuits, by placing the power module 111 and the processing module 112 on opposite sides of the control module 113. This separates the high-voltage lines from the low-voltage lines, avoids crosstalk between high and low voltage signals, ensures the stability of the overall display, and reduces the difficulty of wiring the drive circuit, providing more space for wiring.

[0070] For example, such as Figure 1 and Figure 2 As shown, the control module 113 is located in the middle, and the power module 111 and the processing module 112 are located on opposite sides of the control module 113 along the long side of the substrate 110. For example, the power module 111 is located on the right side of the control module 113, and the processing module 112 is located on the left side of the control module 113. This can further increase the distance between the high-voltage line and the low-voltage line, and further reduce crosstalk between high and low voltage signals.

[0071] In some implementations, such as Figure 1 and Figure 2 As shown, the processing module 112 includes a system-on-a-chip 1121, a graphics card component 1122, and an adapter board 1123 connecting the system-on-a-chip 1121 and the graphics card component 1122; the control module 113 includes a timing controller 1131 and a backlight driver 1132; and the power module 111 includes a high-power power board 1111 and a low-power power board 1112.

[0072] For example, such as Figure 2 As shown, the power module 111 may further include a power bracket 1113, which is used to fix the high-power power board 1111 and the low-power power board 1112. The high-power power board 1111 and the low-power power board 1112 can be fixed by screws or by clips, and there is no limitation on this.

[0073] In some implementations, such as Figure 1 and Figure 2 As shown, the high-power power board 1111 includes a first output interface 101 and a second output interface 102. The first output interface 101 is connected to the backlight driver 1132, and the second output interface 102 is connected to the system-on-a-chip 1121. The system-on-a-chip 1121 is also connected to the timing controller 1131. The high-power power board 1111 is used to supply power to the backlight driver 1132, the system-on-a-chip 1121, and the timing controller 1131.

[0074] For example, such as Figure 1 and Figure 2 As shown, the first output interface 101 and the second output interface 102 are low-voltage output interfaces, such as 5V, 12V, 24V, 19V, etc.

[0075] For example, such as Figure 1 and Figure 2 As shown, the high-power power board 1111 may include two first output interfaces 101, which are connected to the backlight driver 1132 via different backlight driver power lines ①. The second output interface 102 is connected to the system-on-a-chip 1121 via a system-on-a-chip power line ②.

[0076] Thus, the high-power power board 1111 directly powers the backlight driver 1132 and the system-on-a-chip 1121, and indirectly powers the timing controller 1131.

[0077] In some implementations, such as Figure 1 and Figure 2 As shown, the low-power power board 1112 includes a third output interface 103, which is connected to the adapter board 1123. The low-power power board 1112 is used to supply power to the adapter board 1123 and the graphics card assembly 1122.

[0078] For example, such as Figure 1 and Figure 2 As shown, the third output interface 103 is a low-voltage output interface, such as 5V, 12V, 24V, 19V, etc. The third output interface 103 of the low-power power board 1112 is connected to the corresponding interface of the adapter board 1123 through the graphics card power cable ③.

[0079] Thus, the low-power power board 1112 directly supplies power to the adapter board 1123. Since the adapter board 1123 is connected to the graphics card assembly 1122, it also supplies power to the graphics card assembly 1122.

[0080] In some implementations, such as Figure 1 and Figure 2 As shown, the system-on-a-chip 1121 is also connected to the backlight driver 1132 to provide display signals to the timing controller 1131 and backlight drive signals to the backlight driver 1132.

[0081] For example, such as Figure 1 and Figure 2 As shown, the system-on-chip 1121 and the backlight driver 1132 are connected via the second signal line ④. Thus, the system-on-chip 1121 provides backlight driving signals, such as enable signals and power pulse width modulation signals, to the backlight driver 1132 to adjust the switching of the backlight unit (BLU) and the overall brightness. The backlight driver 1132 sends an enable signal indicating that the BLU is on to the system-on-chip 1121, informing the system-on-chip 1121 that the BLU is enabled and can display images and audio / video signals to the display panel. Next, the system-on-chip 1121 sends the display signals to the timing controller 1131.

[0082] In some implementations, such as Figure 1 and Figure 2As shown, the timing controller 1131 is also connected to the backlight driver 1132, and is used to control the display panel 12 to display according to the display signal, generate screen brightness information according to the display signal, and send the screen brightness information to the backlight driver 1132.

[0083] The backlight driver 1132 is used to drive the backlight module 13 to provide backlight to the display panel 12 according to the backlight driving signal and the screen brightness information.

[0084] For example, such as Figure 1 and Figure 2 As shown, the timing controller 1131 and the backlight driver 1132 are connected via the first signal line ⑤.

[0085] Thus, the timing controller 1131 controls the display panel 12 to display based on the display signal provided by the system-on-a-chip 1121, and generates screen brightness information based on the display conditions before sending it to the backlight driver 1132. This screen brightness information may include brightness distribution information in the backlight modules 13 under each display screen.

[0086] In some implementations, such as Figure 1 and Figure 2 As shown, the low-power power board 1112 is located on the side of the high-power power board 1111 away from the control module 113. The first output interface 101, the second output interface 102, and the third output interface 103 are located near the first edge B1 of the substrate 110. The timing controller 1131 is located on the side of the backlight driver 1132 away from the first edge B1. The system-on-a-chip 1121 is located on the side of the graphics card assembly 1122 away from the first edge B1. The adapter board 1123 is located between the graphics card assembly 1122 and the backlight driver 1132, and is located near the graphics card assembly 1122.

[0087] For example, such as Figure 1 and Figure 2 As shown, the first edge B1 of the substrate 110 can be the upper edge of the substrate 110.

[0088] This implementation method can ensure that the lines cross as few times as possible, reduce the interference of high-voltage line magnetic field on low-voltage line signal, high-frequency line magnetic field on low-frequency line signal, high-voltage line magnetic field on high-frequency line signal, and mutual interference of high-frequency line magnetic field signals, which is beneficial to achieving high refresh rate and high brightness display.

[0089] In some implementations, such as Figure 1 and Figure 2 As shown, the system-on-a-chip 1121 and the timing controller 1131 are connected by multiple display signal lines ⑥ that are separated from each other. The display signal lines ⑥ are used to transmit display signals, and the transmission path lengths of the multiple display signal lines ⑥ are approximately the same.

[0090] For example, such as Figure 1 and Figure 2 As shown, the system-on-a-chip 1121 and the timing controller 1131 can be connected via two display signal lines ⑥. The transmission path lengths of the two signal lines ⑥ are approximately the same, and they are parallel to each other and do not cross each other. The display signal line ⑥ can be a V-By-One signal line.

[0091] In this way, 32 channels of display signals are transmitted through two display signal lines ⑥, enabling high-resolution (5K) and high-refresh-rate (144Hz) high-speed signal transmission. This allows for point-to-point playback of images and video signals, achieving better display effects and meeting higher performance requirements. Since the display signal lines ⑥ contain high-frequency signals, an electromagnetic field will be generated on the surface of the wires during transmission. By ensuring that the two display signal lines ⑥ are parallel and do not cross each other, electromagnetic interference between them is avoided.

[0092] In some implementations, such as Figure 3a As shown, the display signal line ⑥ includes a first substrate layer 201, a first conductor layer 202, a first protective layer 203 and a first shielding layer 204 stacked sequentially along the first direction F1. The first substrate layer 201 is disposed close to the substrate 110, and the first shielding layer 204 is disposed away from the substrate 110. The first direction F1 is perpendicular to the substrate 110.

[0093] For example, since the distance between the two display signal lines ⑥ is short, a first shielding layer 204 needs to be provided for the display signal lines ⑥ to prevent electromagnetic interference. The material of the first shielding layer 204 can be a conductive material film such as Al foil, Cu foil, or tin foil. For economic reasons, Al foil and tin foil are usually used.

[0094] For example, such as Figure 3a and Figure 3b As shown, the display signal line ⑥ may further include a first polyester film layer 205 and / or a second polyester film layer 206. The first polyester film layer 205 may be disposed on the side of the first shielding layer 204 away from the substrate 110, and the second polyester film layer 206 may be disposed on the side of the first substrate layer 201 close to the substrate 110. The first polyester film layer 205 and the second polyester film layer 206 are used to protect the display signal line ⑥, prevent surface scratches, and prevent internal conductor layer breakage caused by punctures. The first polyester film layer and the second polyester film layer may be omitted, or both may be omitted.

[0095] For example, such as Figure 3a and Figure 3bAs shown, the thicknesses of the first substrate layer 201, the first conductor layer 202, the first protective layer 203, the first shielding layer 204, the first polyester film layer 205, and the second polyester film layer 206 are all 0.012 mm to 0.2 mm.

[0096] In some implementations, such as Figure 1 and Figure 2 As shown, the multiple display signal lines ⑥ include a first display signal line ⑥-1 and a second display signal line ⑥-2. The first display signal line ⑥-1 is located on the side of the second display signal line ⑥-2 that is close to the system-on-a-chip 1121 and the timing controller 1131.

[0097] In some implementations, such as Figure 3b As shown, the first display signal line ⑥-1 includes a first extension line 301, a folding structure 302, and a second extension line 303 connected in sequence. The first extension line 301 is located on the side of the folding structure 302 close to the system-on-a-chip 1121 and is connected to the system-on-a-chip 1121. The second extension line 303 is located on the side of the folding structure 302 close to the timing controller 1131 and is connected to the timing controller 1131. The folding structure 302 includes a plurality of stacked layers A arranged in sequence along the first direction F1. Double-sided adhesive conductive foam 304 is provided between two adjacent stacked layers.

[0098] For example, such as Figure 3b As shown, the first extension line 301 and the second extension line 303 are parallel to each other. Since the distance between the two display signal lines ⑥ is short, to prevent redundant line lengths from tangling and affecting signal transmission, the redundant line lengths need to be folded, and shielding treatment is applied between the layers. For example, as... Figure 3b As shown, the thickness of the double-sided adhesive conductive foam 304 between two adjacent stacks can be 1mm to 10mm to support the display signal line ⑥ and prevent the first conductor layer 202 from breaking due to the small folding radius caused by the stacks being too close together. Furthermore, since there is no first shielding layer 204 between the first conductor layer 202 of the first stack connecting the first extension line 301 and the second stack, the double-sided adhesive conductive foam 304 located between the first stack and the second stack also provides shielding. Thus, the double-folded structure of the display signal line ⑥ ensures that the signal input direction and output direction are consistent.

[0099] In some implementations, such as Figure 1 and Figure 2 As shown, the backlight driver 1132 and the timing controller 1131 are connected via a first signal line ⑤. The first signal line ⑤ intersects with the display signal line ⑥. The first signal line ⑤ includes a second substrate layer 411, a second conductor layer 412, a second protective layer 413, and a second shielding layer 414 stacked sequentially. The second shielding layer 414 is disposed close to the display signal line ⑥.

[0100] For example, such as Figure 1 and Figure 2 As shown, the first signal line ⑤ can be used for local dimming. Since the first signal line ⑤ inevitably intersects with the display signal line ⑥, a shielding layer, namely the second shielding layer 414, is also needed for the first signal line ⑤ to provide shielding. By placing the second shielding layer 414 close to the display signal line ⑥, the electromagnetic interference between the first signal line ⑤ and the display signal line ⑥ is effectively shielded.

[0101] In some implementations, such as Figure 1 As shown, the backlight driver 1132 is also connected to the display panel 12 via multiple fourth signal lines ⑨ to ensure the transmission path of backlight information. Among them, the fourth signal lines ⑨ can be flexible flat cables (FFC).

[0102] In some implementations, such as Figure 1 , Figure 2 Figure 4 As shown, the backlight driver 1132 is connected to the system-on-a-chip 1121 via a second signal line ④. The second signal line ④ intersects with the display signal line ⑥. The second signal line ④ includes multiple transmission lines 421, a third protective layer 422, and a third shielding layer 423.

[0103] For example, such as Figure 1 , Figure 2 and Figure 4 As shown, the second signal line ④ can be a PWM / BL-EN line. Since the second signal line ④ inevitably intersects with the display signal line ⑥, a shielding layer, namely the third shielding layer 423, is also required for the second signal line ④ to perform shielding treatment and achieve the effect of shielding the electromagnetic interference between the second signal line ④ and the display signal line ⑥.

[0104] In some implementations, such as Figure 5 As shown, the transmission line 421 includes a conductor 424 and an insulating layer 425 covering the surface of the conductor 424. A third protective layer 422 is disposed around the periphery of the multiple transmission lines 421, and a third shielding layer 423 is disposed between the conductor 424 and the insulating layer 425 (e.g., Figure 5 (as shown in the left figure), or placed between multiple transmission lines 421 and the third protective layer 422 (such as... Figure 5 (As shown in the right figure).

[0105] For example, such as Figure 5As shown, a transmission line 421 may include three conductors 424, namely a grounding conductor, a restart conductor, and a backlight current identification conductor. The outer surface of each conductor 424 is covered with an insulating layer 425, and a third protective layer 422 covers the multiple conductors 424.

[0106] The third shielding layer 423 can be configured in two ways: Case 1, such as... Figure 5 As shown in the left figure, the third shielding layer 423 is disposed between the conductor 424 and the insulation layer 425. In this case, a third shielding layer 423 is disposed between each conductor 424 and its corresponding insulation layer 425 to provide individual shielding for each conductor 424. Case 2: As... Figure 5 As shown in the right figure, the third shielding layer 423 is disposed between the multiple transmission lines 421 and the third protective layer 422 to provide overall shielding for the transmission lines 421. The above two configurations can be selected based on actual needs and are not limited here.

[0107] In some implementations, such as Figure 1 and Figure 2 As shown, the first signal line ⑤ is located between the substrate 110 and the display signal line ⑥, and the second signal line ④ is located on the side of the display signal line ⑥ away from the substrate 110.

[0108] In some implementations, such as Figure 1 and Figure 2 As shown, the display driving circuit 11 provided in this disclosure also includes a third signal line ⑦, which intersects with the display signal line ⑥, and the third signal line ⑦ is located on the side of the display signal line ⑥ away from the substrate 110.

[0109] For example, such as Figure 1 and Figure 2 As shown, the third signal line ⑦ can be, for example, a signal line connecting the system-on-a-chip 1121 and the adapter board 1123, or a signal line other than the display signal line ⑥ connecting the system-on-a-chip 1121 and the timing controller 1131.

[0110] In the embodiments of this disclosure, a high-power high-voltage power supply and a high-frequency display signal line are required to ensure a high refresh rate and high brightness. To reduce signal interference, on the one hand, the number of line crossings is minimized, and on the other hand, shielding is applied to the lines that cannot be crossed.

[0111] In some implementations, such as Figure 6 As shown, the system-on-a-chip 1121 and the graphics card component 1122 are separate components.

[0112] In some implementations, such as Figure 6As shown, the graphics card assembly 1122 includes a first housing 501, and a graphics card and a cooling fan disposed within the first housing 501. The cooling fan is located on the side of the graphics card away from the substrate. The first housing 501 includes a top surface 511, which is located on the side of the cooling fan away from the graphics card. A first heat dissipation hole 512 is provided on the top surface 511.

[0113] For example, the thickness of the cooling fan is about 12mm, which increases the thickness of the graphics card assembly 1122 from 30mm for a normal graphics card assembly to 42mm, which is higher than the height of the whole machine support column 803.

[0114] This disclosure utilizes a separate system-on-a-chip (SoC) 1121 and graphics card component 1122, allowing for the replacement of different SoCs 1121 and SoCs 1122 according to different application scenarios. It also allows for secondary development of one component alone to meet various performance requirements, improving flexibility and versatility. Furthermore, the graphics card component 1122 includes a dedicated graphics card, which improves processing power compared to integrated graphics. The chip provided in this disclosure integrates the DSC data compression protocol and supports HDMI 201 48G transmission speeds, thus achieving high brightness and high refresh rate display effects.

[0115] In some implementations, such as Figure 6 and Figure 7 As shown, the first housing 501 also includes two first housing side surfaces 5011 arranged opposite each other along the second direction F2. The first housing side surfaces 5011 are provided with a recess 513 and a fixing part 514 protruding toward the side away from the graphics card 502. The surface of the recess 513 away from the substrate 110 is lower than the top surface 511 of the housing. The fixing part 514 has a first fixing hole 701 that penetrates the fixing part 514 along the second direction F2. The recess 513 is located on the side of the fixing part 514 near the adapter plate 1123.

[0116] For example, such as Figure 6 As shown, the first housing 501 also includes a top surface 511, which is located between the two first housing sides 5011. The first fixing hole 701 is used to fix the first housing 501. The first housing 501 protects the graphics card 502.

[0117] For example, such as Figure 6 As shown, the first housing 501 also includes an interface side 5013, which is perpendicular to the first housing side 5011. An HDMI 2.1 interface and a DP 1.4 interface are provided on it to improve the speed of display signal transmission and thus ensure high-resolution display effect.

[0118] In some implementations, such as Figure 6 and Figure 7As shown, the display driving circuit 11 provided in this disclosure further includes: a fixing bracket 601 located between the graphics card assembly 1122 and the substrate 110, including a base plate 602 and a plurality of side plates 603 connected to the edge of the base plate 602. The base plate 602 is fixed on the substrate 110. The plurality of side plates 603 include two first side plates 611 and two second side plates 612 arranged opposite to each other along the second direction F2. The first side plates 611 and the second side plates 612 are both located on the side of the first shell side 5011 away from the graphics card 502. The first side plate 611 is located on the side of the second side plate 612 close to the adapter plate 1123.

[0119] For example, such as Figure 7 As shown, the graphics card assembly 1122 is fixed in the space enclosed by the base plate 602 and multiple side plates 603, wherein the multiple side plates 603 are parallel to each other, and the base plate 602 and the side plates 603 are perpendicular to each other.

[0120] In some implementations, such as Figure 7 As shown, the end of the first side plate 611 away from the base plate 602 has a first bent portion 621 that bends toward the graphics card assembly 1122. The first bent portion 621 is used to limit the recess 513. The end of the second side plate 612 away from the first side plate 611 has a second bent portion 622 that bends toward the side away from the graphics card assembly 1122. The second bent portion 622 has a second fixing hole 702 that passes through the second bent portion 622 along a direction perpendicular to the second direction F2. The second fixing hole 702 and the first fixing hole 701 are used to connect the fixing bracket 601 and the graphics card assembly 1122 through a rigid connector.

[0121] For example, such as Figure 6 and Figure 7 As shown, the graphics card assembly 1122 is inserted into the fixing bracket 601 from left to right like a drawer. The first bend 621 limits the graphics card assembly 1122 in the Y direction (i.e., the second direction F2) and the Z direction (perpendicular to the substrate 110). After limiting, the end of the graphics card assembly 1122 connects to the adapter plate 1123. It is then fixed to the fixing bracket 601 through the first fixing hole 701, the second fixing hole 702, and a rigid connector, thus limiting the graphics card assembly 1122 in the X direction. The second fixing hole 702 and the first fixing hole 701 can be circular, and the rigid connector can be a screw.

[0122] In some implementations, such as Figure 8 As shown, the display driving circuit 11 provided in this disclosure further includes a rear cover 114, which is disposed on the side of the processing module 112, the control module 113 and the power module 111 away from the substrate 110.

[0123] In some implementations, such as Figure 8As shown, the rear cover 114 includes: a clearance hole 1141, which corresponds to the position of the graphics card component 1122, and the graphics card component 1122 protrudes from the rear cover 114 at the clearance hole 1141.

[0124] In some implementations, such as Figure 8 As shown, the rear cover 114 includes a second heat dissipation hole 1142, which corresponds to the position of the system-on-a-chip 1121.

[0125] In some implementations, such as Figure 8 As shown, the rear shell 114 includes: a third heat dissipation hole 1143, which corresponds to the position of the second edge B2 of the high power power board 1111 and partially overlaps with the high power power board 1111; a first output interface 101 and a second output interface 102 are provided on the second edge B2; and a fourth heat dissipation hole 1144, which is located near the third edge B3 of the high power power board 1111 and does not overlap with the high power power board 1111; the third edge B3 and the second edge B2 are two opposite edges of the high power power board 1111.

[0126] For example, such as Figure 1 and Figure 2 As shown, the first edge B1 of the high-power power board 1111 can be the upper edge of the first edge B1 of the high-power power board 1111 near the substrate 110, and the third edge B3 of the high-power power board 1111 can be the lower edge of the first edge B1 away from the substrate 110. The system-on-a-chip 1121 is cooled through the second heat dissipation hole 1142, and the power module 111 is cooled through the third heat dissipation hole 1143 and the fourth heat dissipation hole 1144.

[0127] For example, due to the addition of a cooling fan to the graphics card assembly 1122, the thickness of the graphics card assembly 1122 increases, forming a protrusion on the outer surface of the rear cover 114. Therefore, the rear cover 114 is provided with a clearance hole 1141 to make room for the graphics card assembly 1122. The surface of the graphics card assembly 1122 facing away from the substrate 110 is higher than the surface of the rear cover 114 facing away from the substrate 110, and even higher than the surface of the rear cover 114 facing away from the substrate 110 at the support post 803. Therefore, the graphics card assembly 1122 forms a protrusion on the outer surface of the rear cover 114.

[0128] In some implementations, such as Figure 9 As shown, the rear shell 114 has two second shell side surfaces 1145 arranged opposite to each other along the second direction F2. One of the second shell side surfaces 1145 is provided with a first strip hole 801, and the other second shell side surface 1145 is provided with a second strip hole 802. The first strip hole 801 and the second strip hole 802 are used to form convection heat dissipation.

[0129] For example, such as Figure 9As shown, the extension directions of the first strip-shaped hole 801 and the second strip-shaped hole 802 are perpendicular to each other. For example, the first strip-shaped hole 801 can be a horizontal strip-shaped hole, and the second strip-shaped hole 802 can be a vertical strip-shaped hole. During the heat dissipation process, cold air enters through the second strip-shaped hole 802, and hot air is discharged through the first strip-shaped hole 801, forming natural convection to dissipate heat from the internal components.

[0130] In some implementations, such as Figure 1 and Figure 2 As shown, the display driving circuit 11 provided in this disclosure further includes:

[0131] The power input interface 115 is located on the side of the low power power board 1112 away from the high power power board 1111, and is located near the fourth edge B4 of the low power power board 1112. The fourth edge B4 is the edge of the low power power board 1112 away from the third output interface 103.

[0132] For example, such as Figure 1 and Figure 2 As shown, for easy power supply connection, the power input interface 115 is located at the lower right corner of the substrate 110.

[0133] In some implementations, such as Figure 1 and Figure 2 As shown, the high-power power board 1111 also includes a first input interface 1151, and the low-power power board 1111 also includes a second input interface 1152. The first input interface 1151 and the second input interface 1152 are connected in parallel to the same power input interface 115 and are located close to the same power input interface 115.

[0134] For example, such as Figure 1 and Figure 2 As shown, the first input interface 1151 is located at the lower right corner of the high-power power supply board 1111, and the second input interface 1152 is located at the lower right corner of the low-power power supply board 1111. The first input interface 1151 and the second input interface 1152 are high-voltage input ports, such as 220V and 110V. The power supply voltage enters the parallel-connected first input interface 1151 and second input interface 1152 through the power input interface 115.

[0135] This disclosure also provides a display device 1000, such as Figure 1 , Figure 2 , Figure 10a and Figure 10b As shown, it includes: a display driving circuit 11 as provided in any embodiment; and a display panel 12 connected to the display driving circuit 11 for displaying under the control of the display driving circuit 11.

[0136] In some embodiments, the display device 1000 provided in this disclosure, such as Figure 2 , Figure 10a and Figure 10b As shown, it also includes: a backlight module 13, located on the backlight side of the display panel 12, connected to the backlight driver 1132, for providing backlight to the display panel 12 under the drive of the backlight driver 1132.

[0137] Among them, such as Figure 11 As shown, the backlight module 13 includes: multiple light strips 131 arranged parallel to each other and along the row direction; each light strip 131 includes multiple light strings 132 connected in parallel and arranged along the column direction; each light string 132 includes multiple LEDs 133 connected in series and arranged along the column direction; the multiple light strips 131 are divided into multiple light strip groups 134; each light strip group 134 includes multiple light strips 131 arranged continuously; the multiple light strips 131 located in the same light strip group 134 are connected to the same first printed circuit board 14; the first printed circuit board 14 is connected to the backlight driver 1132.

[0138] For example, such as Figure 11 As shown, the backlight module 13 and the backlight driver 1132 are connected via a flexible flat cable (FFC). The timing controller 1131 transmits the brightness distribution information of the display screen to the backlight driver 1132. Based on the backlight drive signal sent by the system-on-a-chip 1121 and in conjunction with the 5K2K resolution, the backlight driver 1132 performs local dimming on the BLU in the backlight module 13 to match the BLU brightness with the display screen brightness. This results in a greater contrast between bright and dark areas of the display screen and richer colors. Thus, the display brightness of the device can reach 500 nits, reducing BLU power consumption while improving screen contrast and enhancing image quality.

[0139] For example, such as Figure 11As shown, the backlight module 13 may include four LED strip groups 1134, each LED strip group 1134 may include six LED strips 131, and each LED strip group 1134 is connected to a first printed circuit board 14. Multiple first printed circuit boards 14 are connected to a backlight driver 1132. Each LED strip may include six LED strings 132 connected in parallel and arranged along the column direction, and each LED string 132 includes two LEDs 133 connected in series and arranged along the column direction. The backlight driver 1132 can individually control the brightness of any LED string 132 to match its brightness to the brightness of the corresponding position on the displayed image. For example, in brighter areas of the displayed image, the corresponding LED string has higher brightness; in darker areas of the displayed image, the corresponding LED string has lower brightness. In this way, while reasonably reducing BLU power consumption, the image contrast is improved, and the image quality is enhanced.

[0140] In some embodiments, the display device 1000 provided in this disclosure, such as Figure 1 and Figure 2 As shown, it also includes:

[0141] Multiple second printed circuit boards 15 are located on the side of the display driving circuit 11 near the timing controller 1131. The second printed circuit boards 15 are connected to the display panel 12. The second printed circuit board 15 connected to the middle area of ​​the display panel 12 is also connected to the timing controller 1131 and the second printed circuit board 15 connected to the edge area of ​​the display panel 12, respectively.

[0142] For example, such as Figure 1 and Figure 2 As shown, the display device 1000 provided in this disclosure may include four second printed circuit boards 15, which are divided into two intermediate second printed circuit boards 151 and two edge second printed circuit boards 152. The two intermediate second printed circuit boards 151, which are connected to the middle area of ​​the display panel 12, are respectively connected to the adjacent edge second printed circuit boards 152 via flexible printed circuit boards (FPCs) or FFCs. In addition, the intermediate second printed circuit boards 151 are also connected to the timing controller 1131 via four FPCs 8.

[0143] For example, such as Figure 1 and Figure 2 As shown, multiple second printed circuit boards 15 are also connected to the display panel 12 to ensure the transmission path of display signals.

[0144] In some implementations, such as Figure 12a and Figure 12bAs shown, the display device 1000 provided in this disclosure has a horizontal and vertical display ratio of 21:9, an overall size of 81 inches, a 5K2K resolution, and supports high refresh rates of 144Hz and 120Hz. Compared with traditional display devices, its display effect is significantly improved.

[0145] For example, such as Figure 12a The display screen has a width (A) of 1886.208mm and a height (B) of 795.744mm, with an aspect ratio of approximately 21:9; the bezels (C) around the display screen are 17±2mm. The resolution is 5120*2160, achieving a 5K2K high resolution.

[0146] This disclosure also provides a source driver, including a display driver circuit 11 as provided in any embodiment.

[0147] Those skilled in the art will understand that the source driver provided in this disclosure has the advantages of the display driver circuit 11 described above.

[0148] This disclosure also provides a display device 1000, including: a display panel 12; and a source driver as provided in any embodiment, the source driver being connected to the display panel 12 for driving the display panel 12 to display an image.

[0149] Those skilled in the art will understand that the display device 1000 provided in this disclosure has the advantages of the source driver or display driving circuit 11 described above.

[0150] The display device disclosed herein can be any product or component with display function, such as a display module, mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, in-vehicle display device, smartwatch, fitness wristband, personal digital assistant, etc.

[0151] In this disclosure, "multiple" means two or more, and "at least one" means one or more, unless otherwise expressly and specifically defined.

[0152] In this disclosure, the terms "upper" and "lower" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this disclosure and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this disclosure.

[0153] In this document, the terms "comprising," "including," or any other variations thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0154] The terms "an embodiment," "some embodiments," "exemplary embodiments," "one or more embodiments," "example," "one example," "some examples," etc., used herein are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be included in any suitable manner in any one or more embodiments or examples.

[0155] In this document, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, without necessarily requiring or implying any such actual relationship or order between these entities or operations.

[0156] In describing some embodiments, the terms "coupled" and "connected" may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact with each other. Similarly, the term "coupled" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact. However, the terms "coupled" or "communicatively coupled" may also refer to two or more components that do not have direct contact with each other but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the content of this document.

[0157] "At least one of A, B and C" has the same meaning as "at least one of A, B or C", both including the following combinations of A, B and C: only A, only B, only C, combinations of A and B, combinations of A and C, combinations of B and C, and combinations of A, B and C.

[0158] "A and / or B" includes the following three combinations: A only, B only, and a combination of A and B.

[0159] As used herein, depending on the context, the term “if” may optionally be interpreted as meaning “when”, “in the event of”, “in response to determination”, or “in response to detection”. Similarly, depending on the context, the phrase “if it is determined that…” or “if [the stated condition or event] is detected” may optionally be interpreted as meaning “in the event of determination that…”, “in response to determination that…”, “when [the stated condition or event] is detected”, or “in response to the detection of [the stated condition or event]”.

[0160] The use of “for” or “configured to” in this article implies an open and inclusive language that does not preclude the applicability to or configuration of devices to perform additional tasks or steps.

[0161] The use of "based on" or "according to" in this document implies openness and inclusiveness. A process, step, calculation, or other action based on one or more of the stated conditions or values ​​may, in practice, be based on other conditions or values ​​beyond those stated.

[0162] As used herein, “about,” “approximately,” or “approximately” includes the stated value and the average value within an acceptable range of deviation from the given value, wherein the acceptable range of deviation is determined by a person skilled in the art taking into account the measurement under discussion and the error associated with the measurement of the given quantity (i.e., the limitations of the measurement system).

[0163] As used herein, “parallel,” “perpendicular,” “equal,” and “flush” include the described situation and situations that are similar to the described situation, within an acceptable range of deviation, which is determined by those skilled in the art taking into account the measurement under discussion and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, “parallel” includes absolute parallelism and approximate parallelism, where the acceptable range of deviation for approximate parallelism can be, for example, within 5°; “perpendicular” includes absolute perpendicularity and approximate perpendicularity, where the acceptable range of deviation for approximate perpendicularity can also be, for example, within 5°. “Equal” includes absolute equality and approximate equality, where the acceptable range of deviation for approximate equality can be, for example, the difference between the two equals being less than or equal to 5% of either one. “Flush” includes absolute flush and approximate flush, where the acceptable range of deviation for approximate flush can be, for example, the distance between the flush twos being less than or equal to 5% of either one of the dimensions.

[0164] It should be understood that when a layer or element is referred to as being on another layer or substrate, it can mean that the layer or element is directly on the other layer or substrate, or that there is an intermediate layer between the layer or element and the other layer or substrate.

[0165] This document describes exemplary embodiments with reference to cross-sectional views and / or plan views, which are idealized exemplary drawings. In the drawings, the thickness of layers and regions is enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. For example, etched regions shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the regions of the device, nor are they intended to limit the scope of the exemplary embodiments. Unless otherwise specified, film thickness refers to the dimension of the film layer in its normal direction.

[0166] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this disclosure, and are not intended to limit them. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this disclosure.

Claims

1. A display drive circuit comprising: A substrate, and a power module, a processing module and a control module disposed on one side of the substrate; The power module is connected to both the processing module and the control module, and is used to supply power to both the processing module and the control module. The processing module is also connected to the control module and is used to provide display signals to the control module; The control module is used to control the display panel to display according to the display signal; wherein the power module and the processing module are located on opposite sides of the control module; The processing module includes a system-on-a-chip, a graphics card component, and an adapter board connecting the system-on-a-chip and the graphics card component; the control module includes a timing controller and a backlight driver; and the power module includes a high-power power board and a low-power power board. The high-power power supply board includes a first output interface and a second output interface for supplying power to the backlight driver, the system-on-a-chip, and the timing controller. The low-power power board includes a third output interface for supplying power to the adapter board and the graphics card assembly. The low-power power board is located on the side of the high-power power board away from the control module. The first output interface, the second output interface, and the third output interface are located near the first edge of the substrate. The timing controller is located on the side of the backlight driver away from the first edge. The system-on-a-chip is located on the side of the graphics card assembly away from the first edge. The adapter board is located between the graphics card assembly and the backlight driver, and is located near the graphics card assembly.

2. The display drive circuit of claim 1, wherein, The first output interface is connected to the backlight driver, the second output interface is connected to the system-on-a-chip (SoC), and the SoC is also connected to the timing controller. The third output interface is connected to the adapter board; The system-on-a-chip is also connected to the backlight driver and is used to provide the display signal to the timing controller and the backlight drive signal to the backlight driver. The timing controller is also connected to the backlight driver and is used to control the display panel to display according to the display signal, generate screen brightness information according to the display signal, and send the screen brightness information to the backlight driver. The backlight driver is used to drive the backlight module to provide backlight to the display panel according to the backlight driving signal and the screen brightness information.

3. The display drive circuit of claim 2, wherein, The system-on-a-chip is connected to the timing controller via multiple display signal lines that are separated from each other. The display signal lines are used to transmit display signals, and the transmission path lengths of the multiple display signal lines are the same.

4. The display driving circuit according to claim 3, wherein, The display signal line includes a first substrate layer, a first conductor layer, a first protective layer and a first shielding layer stacked sequentially along a first direction. The first substrate layer is disposed close to the substrate, the first shielding layer is disposed away from the substrate, and the first direction is perpendicular to the substrate.

5. The display driving circuit according to claim 4, wherein, The plurality of display signal lines includes a first display signal line and a second display signal line, wherein the first display signal line is located on the side of the second display signal line closer to the system-on-a-chip and the timing controller; and The first display signal line includes a first extension line, a folded structure, and a second extension line connected in sequence. The first extension line is located on the side of the folded structure closer to the system-on-a-chip and is connected to the system-on-a-chip. The second extension line is located on the side of the folded structure closer to the timing controller and is connected to the timing controller. The folded structure includes multiple layers stacked in sequence along the first direction, and double-sided adhesive conductive foam is disposed between two adjacent layers.

6. The display driving circuit according to claim 3, wherein, The backlight driver is connected to the timing controller via a first signal line. The first signal line intersects with the display signal line. The first signal line includes a second substrate layer, a second conductor layer, a second protective layer, and a second shielding layer stacked sequentially. The second shielding layer is disposed close to the display signal line. The backlight driver is connected to the system-on-a-chip via a second signal line, which intersects with the display signal line. The second signal line includes multiple transmission lines, a third protective layer, and a third shielding layer. The transmission line includes a conductor and an insulating layer covering the surface of the conductor. The third protective layer is disposed around the multiple transmission lines. The third shielding layer is disposed between the conductor and the insulating layer, or between the multiple transmission lines and the third protective layer.

7. The display driving circuit according to claim 6, wherein, The first signal line is located between the substrate and the display signal line, and the second signal line is located on the side of the display signal line away from the substrate; The display driving circuit further includes a third signal line, which intersects with the display signal line and is located on the side of the display signal line away from the substrate.

8. The display driving circuit according to any one of claims 2 to 7, wherein, The system-on-a-chip and the graphics card component are separate components; and The graphics card assembly includes a first housing, a graphics card and a cooling fan disposed within the first housing. The cooling fan is located on the side of the graphics card away from the substrate. The first housing includes a top surface located on the side of the cooling fan away from the graphics card. A first heat dissipation hole is provided on the top surface.

9. The display driving circuit according to claim 8, wherein, The first housing also includes two first housing side surfaces arranged opposite each other along the second direction. The first housing side surfaces are provided with a recess and a fixing part protruding toward the side away from the graphics card. The surface of the recess away from the substrate is lower than the top surface of the housing. The fixing part has a first fixing hole that penetrates the fixing part along a direction perpendicular to the second direction. The recess is located on the side of the fixing part closer to the adapter plate. The display driving circuit further includes: a fixing bracket located between the graphics card assembly and the substrate, including a base plate and a plurality of side plates connected to the edge of the base plate, the base plate being fixed on the substrate, the plurality of side plates including two first side plates and two second side plates arranged opposite to each other along a second direction, the first side plates and the second side plates being located on the side of the first shell away from the graphics card, and the first side plate being located on the side of the second side plate closer to the adapter plate; The first side plate has a first bent portion at the end away from the base plate that bends toward the graphics card assembly. The first bent portion is used to limit the recess. The second side plate has a second bent portion at the end away from the first side plate that bends toward the side away from the graphics card assembly. The second bent portion has a second fixing hole that passes through the second bent portion in a direction perpendicular to the second direction. The second fixing hole and the first fixing hole are used to connect the fixing bracket and the graphics card assembly through a rigid connector.

10. The display driving circuit according to claim 8, wherein, The display driving circuit further includes: A rear housing is disposed on the side of the processing module, the control module, and the power module facing away from the substrate. The rear housing includes: A clearance hole is provided, corresponding to the position of the graphics card component, wherein the graphics card component protrudes from the rear shell at the clearance hole. The second heat dissipation hole corresponds to the position of the system-on-a-chip; The third heat dissipation hole corresponds to the second edge of the high-power power supply board and partially overlaps with it. The first output interface and the second output interface are located on the second edge. The fourth heat dissipation hole is located near the third edge of the high-power power board and does not overlap with the high-power power board. The third edge and the second edge are two opposite edges of the high-power power board.

11. The display driving circuit according to claim 10, wherein, The rear shell has two second shell side surfaces arranged opposite each other along a second direction. One of the second shell side surfaces is provided with a first strip-shaped hole, and the other second shell side surface is provided with a second strip-shaped hole. The first strip-shaped hole and the second strip-shaped hole are used to form convection heat dissipation.

12. The display driving circuit according to any one of claims 2 to 7, wherein, The display driving circuit further includes: The power input interface is located on the side of the low-power power board away from the high-power power board, and is located near the fourth edge of the low-power power board, which is the edge of the low-power power board away from the third output interface. The high-power power board also includes a first input interface, and the low-power power board also includes a second input interface. The first input interface and the second input interface are connected in parallel to the same power input interface and are located close to the same power input interface.

13. A display device, comprising: The display driving circuit as described in any one of claims 1 to 12; as well as The display panel is connected to the display driving circuit and is used to display information under the control of the display driving circuit.

14. The display device according to claim 13, wherein, The control module includes a backlight driver, and the display device further includes: A backlight module, located on the backlight side of the display panel and connected to the backlight driver, is used to provide backlight to the display panel under the drive of the backlight driver. The backlight module includes: multiple light strips arranged parallel to each other and along the row direction; each light strip includes multiple light strings connected in parallel and arranged along the column direction; each light string includes multiple LEDs connected in series and arranged along the column direction; the multiple light strips are divided into multiple light strip groups; each light strip group includes multiple light strips arranged continuously; multiple light strips located in the same light strip group are connected to the same first printed circuit board; the first printed circuit board is connected to the backlight driver.

15. The display device according to claim 13 or 14, wherein, The control module includes a timing controller, and the display device further includes: Multiple second printed circuit boards are located on the side of the display driving circuit close to the timing controller. The second printed circuit boards are connected to the display panel. The second printed circuit board connected to the middle area of ​​the display panel is also connected to the timing controller and the second printed circuit board connected to the edge area of ​​the display panel, respectively.

Images