LED chip and manufacturing method thereof
By setting up an ODR (Optical Deflection Reflection) structure with multiple layers of metal and transparent dielectric in the LED chip, the problems of current congestion and poor reliability under high current conditions are solved, improving luminous efficiency and reliability, and avoiding chip aging and brightness decay.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- XIAMEN CHANGELIGHT CO LTD
- Filing Date
- 2023-08-23
- Publication Date
- 2026-05-15
AI Technical Summary
Existing LED chips suffer from current congestion and poor reliability under high current operating conditions, leading to a decrease in luminous efficiency.
An ODR reflective structure is constructed by stacking a metal reflective structure and a transparent dielectric structure on a conductive substrate. The metal reflective structure is a multi-layer composite reflective structure, and the transparent dielectric layer has a conductive channel. Combined with the light-emitting surface being a roughened surface, uniform light distribution and reflection are achieved.
It effectively solves the problems of current congestion and poor reliability, improves the luminous efficiency and reliability of LED chips, and avoids chip aging and brightness decay.
Smart Images

Figure CN116979005B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of light-emitting diode technology, and more specifically, to an LED chip and its manufacturing method. Background Technology
[0002] With the rapid development of light-emitting diodes (LEDs), their applications are expanding daily. LEDs offer advantages such as energy saving, environmental friendliness, and long lifespan, making them the third generation of electric lighting sources after incandescent and fluorescent lamps. Today, LEDs are widely used in daily life, including in general lighting, indicator lights, toys, traffic lights, mobile phones, large-screen displays, architectural landscaping, and automotive lighting.
[0003] The market demand for higher brightness in LEDs is increasing, and chip structures are constantly being improved and optimized. Current technologies suffer from current congestion and poor reliability under high-current operating conditions. While various electrode optimizations in the mainstream high-brightness chip structures can significantly improve brightness, current congestion and poor reliability still exist, leading to a decrease in the luminous efficiency of the LED chip. Summary of the Invention
[0004] In view of this, the present invention provides an LED chip and a method for manufacturing the same, in order to solve the problems of current congestion and poor reliability under high current operating conditions in the prior art, which lead to a decrease in the luminous efficiency of the LED.
[0005] To achieve the above objectives, the technical solution adopted by the present invention is as follows:
[0006] An LED chip, characterized in that it comprises:
[0007] Conductive substrate;
[0008] A metal bonding layer, a metal reflective structure, a transparent dielectric structure, and a stacked structure are sequentially stacked along a first direction on one side surface of the conductive substrate. The first direction is perpendicular to the conductive substrate and extends from the conductive substrate to the stacked structure.
[0009] The metal reflective structure and the transparent medium structure constitute an ODR reflective structure, which is used to reflect light emitted from the active region and block the metal material from migrating to the active region.
[0010] The metal reflective structure is a multi-layered composite reflective structure; the transparent dielectric structure includes a dielectric layer or an insulating dielectric layer, and the insulating dielectric layer has multiple through holes penetrating the insulating dielectric layer, each of the through holes being filled with a metal material to form multiple conductive channels;
[0011] The stacked structure includes a second type semiconductor layer, a second waveguide layer, an active region, a first waveguide layer, and a first type semiconductor layer stacked sequentially along a first direction;
[0012] The first type of semiconductor layer includes a first type of confinement layer, a first type of current spreading layer, a first type of roughening layer, and a first type of ohmic contact layer stacked sequentially along the first direction; the second type of semiconductor layer includes a second type of ohmic contact layer, a second type of current spreading layer, and a second type of confinement layer stacked sequentially along the first direction.
[0013] Wherein, the first type of ohmic contact layer exposes a portion of the first type of roughened layer, and the exposed portion of the first type of roughened layer is the light-emitting surface, and the light-emitting surface is the roughened surface;
[0014] The first electrode is disposed on the side surface of the first type ohmic contact layer away from the first type roughened layer and forms an electrical connection with the first type semiconductor layer.
[0015] The second electrode is disposed on the side surface of the conductive substrate opposite to the metal bonding layer and forms an electrical connection with the second type of semiconductor layer.
[0016] Preferably, the dielectric layer comprises an ITO layer;
[0017] Alternatively, the dielectric layer may comprise a DBR structure consisting of alternating ITO and ZnO layers.
[0018] Preferably, the insulating dielectric layer comprises a SiO2 layer;
[0019] Alternatively, the insulating dielectric layer may include a DBR structure composed of alternating layers of two transparent insulating materials, such as SiN, SiO2, MgF, and MgO.
[0020] Preferably, each of the conductive channels is uniformly distributed in the insulating dielectric layer, and the horizontal cross-sectional area of each conductive channel gradually increases from the center of the insulating dielectric layer towards the edge of the insulating dielectric layer.
[0021] Preferably, the metal reflective structure includes a first reflective layer and a second reflective layer stacked together, and the first reflective layer and the second reflective layer are formed of different materials.
[0022] Preferably, the first reflective layer comprises one or more stacks of gold, silver, titanium, tungsten, aluminum, and nickel; the second reflective layer comprises one or more stacks of gold, silver, titanium, tungsten, aluminum, and nickel.
[0023] Preferably, the thickness of the first reflective layer is 20nm-800nm, including the endpoint values; the thickness of the second reflective layer is 20nm-800nm, including the endpoint values.
[0024] The present invention also provides a method for manufacturing an LED chip, characterized in that the method includes the following steps:
[0025] Step 01: Provide a growth substrate;
[0026] Step 02: A buffer layer, an etch stop layer, and a stacked structure are sequentially grown on the surface of the growth substrate;
[0027] The stacked structure includes a first type semiconductor layer, a first waveguide layer, an active region, a second waveguide layer, and a second type semiconductor layer stacked sequentially along the growth direction.
[0028] The first type of semiconductor layer includes a first type of ohmic contact layer, a first type of roughening layer, a first type of current spreading layer and a first type of confinement layer stacked sequentially along the growth direction; the second type of semiconductor layer includes a second type of confinement layer, a second type of current spreading layer and a second type of ohmic contact layer stacked sequentially along the growth direction.
[0029] Step 03: Grow a transparent dielectric structure on the surface of the stacked structure opposite to the corrosion stop layer;
[0030] The transparent dielectric structure includes a dielectric layer or an insulating dielectric layer, and the insulating dielectric layer has multiple through holes penetrating the insulating dielectric layer, each of the through holes being filled with a metal material to form multiple conductive channels;
[0031] Forming multiple conductive channels includes the following steps:
[0032] By etching along the upper surface of the insulating dielectric layer, a portion of the first type roughened layer is exposed, forming multiple through holes penetrating the insulating dielectric layer.
[0033] The metal material is filled into each of the through holes to form multiple conductive channels;
[0034] Step 04: Form a metal reflective structure on the surface of the transparent dielectric structure that is away from the second type of ohmic contact layer;
[0035] The metal reflective structure is a multi-layered composite reflective structure.
[0036] The metal reflective structure and the transparent medium structure constitute an ODR reflective structure, which is used to reflect light emitted from the active region and block the migration of metal material to the active region.
[0037] Step 05: Fix the chip structure formed in step 04 to the conductive substrate through a metal bonding layer, wherein the metal bonding layer is formed on the side surface of the metal reflective structure that is away from the transparent dielectric structure.
[0038] Step 06: Peel off the growth substrate, the buffer layer, and the etching stop layer to expose the first type of ohmic contact layer;
[0039] Step 07: Using an etching process, etch along the upper surface of the first type of ohmic contact layer to expose part of the first type of roughened layer to form a light-emitting surface;
[0040] Step 08: Fabricate the first and second electrodes;
[0041] The first electrode is disposed on the side surface of the first type ohmic contact layer away from the first type roughened layer and forms an electrical connection with the first type semiconductor layer.
[0042] The second electrode is disposed on the side surface of the conductive substrate away from the metal bonding layer and forms an electrical connection with the second type of semiconductor layer.
[0043] Step 09: Roughen the light-emitting surface to form a roughened surface.
[0044] Preferably, the dielectric layer comprises an ITO layer;
[0045] Alternatively, the dielectric layer may comprise a DBR structure consisting of alternating ITO and ZnO layers.
[0046] Preferably, the insulating dielectric layer comprises a SiO2 layer;
[0047] Alternatively, the insulating dielectric layer may include a DBR structure composed of alternating layers of two transparent insulating materials, such as SiN, SiO2, MgF, and MgO.
[0048] Preferably, each of the conductive channels is uniformly distributed in the insulating dielectric layer, and the horizontal cross-sectional area of each conductive channel gradually increases from the center of the insulating dielectric layer towards the edge of the insulating dielectric layer.
[0049] Preferably, the metal reflective structure includes a first reflective layer and a second reflective layer stacked together, and the first reflective layer and the second reflective layer are formed of different materials.
[0050] Preferably, the first reflective layer comprises one or more stacks of gold, silver, titanium, tungsten, aluminum, and nickel; the second reflective layer comprises one or more stacks of gold, silver, titanium, tungsten, aluminum, and nickel.
[0051] Preferably, the thickness of the first reflective layer is 20nm-800nm, including the endpoint values; the thickness of the second reflective layer is 20nm-800nm, including the endpoint values.
[0052] The above technical solution achieves the following results:
[0053] 1. The LED chip provided by this invention comprises an ODR (Optical Discharge Reflection) structure consisting of a metal reflective structure and a transparent dielectric structure. On one hand, it reflects light emitted from the active region, ensuring all light is emitted from the light-emitting surface of the first type of roughened layer. On the other hand, it prevents metal material from migrating to the active region, avoiding chip aging and severe brightness decay. The metal reflective structure is a multi-layered composite reflective structure, effectively improving reflectivity. The transparent dielectric structure includes a dielectric layer or an insulating dielectric layer, and the insulating dielectric layer has multiple through-holes penetrating the insulating dielectric layer. Each through-hole is filled with metal material to form multiple conductive channels, allowing current to be evenly distributed through the dielectric layer or multiple conductive channels, avoiding current congestion and poor reliability issues in the LED chip under high-current operating conditions. Furthermore, the roughened light-emitting surface expands the LED chip's emission angle and improves its light extraction efficiency.
[0054] 2. Furthermore, by setting a metal reflective structure including a stacked first reflective layer and a second reflective layer, and the first reflective layer and the second reflective layer are formed of different materials, the interface between the reflectors formed of different materials can better increase the light emission angle of the LED chip.
[0055] 3. Furthermore, by setting each conductive channel to be evenly distributed in the insulating dielectric layer, and by gradually increasing the horizontal cross-sectional area of each conductive channel from the center of the insulating dielectric layer to the edge of the insulating dielectric layer, the current of the LED chip can be better diffused evenly.
[0056] 4. The LED chip manufacturing method provided by the present invention can effectively solve the problems of current congestion and poor reliability of LED chips under high current operating conditions by manufacturing LED chips through a simple and convenient process, thereby improving the luminous efficiency and reliability of LED chips. Attached Figure Description
[0057] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0058] Figure 1 This is a schematic diagram of an LED chip structure provided in an embodiment of the present invention;
[0059] Figures 2 to 12 This is a schematic diagram of the structure corresponding to each step of an LED chip manufacturing method provided in an embodiment of the present invention.
[0060] Explanation of symbols in the diagram:
[0061] 01. Growth substrate; 02. Buffer layer; 03. Etching stop layer;
[0062] 1. Conductive substrate; 2. Metal bonding layer; 3. Metal reflective structure; 31. First reflective layer; 32. Second reflective layer; 4. Transparent dielectric structure; 41. Dielectric layer; 42. Insulating dielectric layer; 43. Conductive channel; 5. Stacked structure; 51. Type I semiconductor layer; 511. Type I ohmic contact layer; 512. Type I roughening layer; 513. Type I current spreading layer; 514. Type I confinement layer; 52. First waveguide layer; 53. Active region; 54. Second waveguide layer; 55. Type II semiconductor layer; 551. Type II confinement layer; 552. Type II current spreading layer; 553. Type II ohmic contact layer; 6. First electrode; 7. Second electrode; A. Through-hole. Detailed Implementation
[0063] To make the content of this invention clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.
[0064] Many specific details are set forth in the following description in order to provide a full understanding of this application. However, this application may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.
[0065] Secondly, this application provides a detailed description in conjunction with schematic diagrams. When detailing the embodiments of this application, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged, not adhering to the usual scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of this application. In addition, actual fabrication should include three-dimensional spatial dimensions of length, width, and depth.
[0066] An LED chip provided in this embodiment of the invention, such as... Figure 1 As shown, it includes:
[0067] Conductive substrate 1;
[0068] A metal bonding layer 2, a metal reflective structure 3, a transparent dielectric structure 4, and a stacked structure 5 are sequentially stacked on one side surface of a conductive substrate 1 along a first direction. The first direction is perpendicular to the conductive substrate 1 and points from the conductive substrate 1 to the stacked structure 5.
[0069] Among them, the metal reflective structure 3 and the transparent medium structure 4 constitute the ODR reflective structure, which is used to reflect the light emitted from the active region 53 and block the metal material from migrating to the active region 53.
[0070] The metal reflective structure 3 is a multi-layered composite reflective structure; the transparent dielectric structure 4 includes a dielectric layer 41 or an insulating dielectric layer 42, and the insulating dielectric layer 42 has multiple through holes A penetrating the insulating dielectric layer 42, and each through hole A is filled with metal material to form multiple conductive channels 43.
[0071] The stacked structure 5 includes a second type semiconductor layer 55, a second waveguide layer 54, an active region 53, a first waveguide layer 52, and a first type semiconductor layer 51, which are stacked sequentially along a first direction.
[0072] The first type semiconductor layer 51 includes a first type confinement layer 514, a first type current spreading layer 513, a first type roughening layer 512 and a first type ohmic contact layer 511 stacked sequentially along a first direction; the second type semiconductor layer 55 includes a second type ohmic contact layer 553, a second type current spreading layer 552 and a second type confinement layer 551 stacked sequentially along a first direction.
[0073] Among them, the first type of ohmic contact layer 511 exposes a portion of the first type of roughening layer 512, and the exposed portion of the first type of roughening layer 512 is the light-emitting surface, and the light-emitting surface is the roughened surface.
[0074] The first electrode 6 is disposed on the side surface of the first type ohmic contact layer 511 opposite to the first type roughening layer 512, and forms an electrical connection with the first type semiconductor layer 51.
[0075] The second electrode 7 is disposed on the side surface of the conductive substrate 1 away from the metal bonding layer 2 and is electrically connected to the second type semiconductor layer 55.
[0076] Optionally, in this embodiment, the dielectric layer 41 includes an ITO layer;
[0077] Alternatively, the dielectric layer 41 may include a DBR structure composed of alternating ITO and ZnO layers, which can increase the reflection effect and emission angle of the ODR.
[0078] Optionally, in this embodiment, the insulating dielectric layer 42 includes a SiO2 layer;
[0079] Alternatively, the insulating dielectric layer 42 may include a DBR structure composed of alternating layers of two transparent insulating materials such as SiN layer, SiO2 layer, MgF layer, and MgO layer, which can increase the reflection effect and luminous angle of the ODR.
[0080] Optionally, in this embodiment, each conductive channel 43 is uniformly distributed in the insulating dielectric layer 42, and the horizontal cross-sectional area of each conductive channel 43 gradually increases from the center of the insulating dielectric layer 42 towards the edge of the insulating dielectric layer 42.
[0081] It should be noted that this embodiment does not limit the specific doping type of the first type semiconductor layer and the second type semiconductor layer. The doping types of the first type semiconductor layer and the second type semiconductor layer are opposite. The first type semiconductor layer can be a P-type semiconductor layer or an N-type semiconductor layer. The specific materials of the N-type semiconductor layer and the P-type semiconductor layer can be selected according to the actual situation.
[0082] Optionally, in another embodiment of this application, the metal reflective structure 3 includes a first reflective layer 31 and a second reflective layer 32 stacked together, and the first reflective layer 31 and the second reflective layer 32 are formed of different materials.
[0083] Optionally, in this embodiment, the first reflective layer 31 comprises one or more stacks of gold, silver, titanium, tungsten, aluminum, and nickel; and the second reflective layer 32 comprises one or more stacks of gold, silver, titanium, tungsten, aluminum, and nickel.
[0084] Optionally, in this embodiment, the thickness of the first reflective layer 31 is 20nm-800nm, including the endpoint values; the thickness of the second reflective layer 32 is 20nm-800nm, including the endpoint values.
[0085] This invention also provides a method for manufacturing an LED chip, the method comprising the following steps:
[0086] Step 01, as follows Figure 2 As shown, a growth substrate 01 is provided;
[0087] Step 02, as follows Figure 3 As shown, a buffer layer 02, an etching stop layer 03, and a stacked structure 5 are sequentially grown on the surface of the growth substrate 01.
[0088] The stacked structure 5 includes a first type semiconductor layer 51, a first waveguide layer 52, an active region 53, a second waveguide layer 54, and a second type semiconductor layer 55, which are stacked sequentially along the growth direction.
[0089] The first type semiconductor layer 51 includes a first type ohmic contact layer 511, a first type roughening layer 512, a first type current spreading layer 513 and a first type confinement layer 514 stacked sequentially along the growth direction; the second type semiconductor layer 55 includes a second type confinement layer 551, a second type current spreading layer 552 and a second type ohmic contact layer 553 stacked sequentially along the growth direction.
[0090] Step 03, as follows Figure 4As shown, a transparent dielectric structure 4 is grown on the surface of the second type ohmic contact layer 553 on the side opposite to the second type current spreading layer 552;
[0091] The transparent dielectric structure 4 includes a dielectric layer 41 or an insulating dielectric layer 42, and the insulating dielectric layer 42 has a plurality of through holes A penetrating the insulating dielectric layer 42, and each through hole A is filled with a metal material to form a plurality of conductive channels 43.
[0092] Forming multiple conductive channels 43 includes the following steps:
[0093] like Figure 5 As shown, by etching along the upper surface of the insulating dielectric layer 42, a portion of the first type roughened layer 512 is exposed, forming multiple through holes A penetrating the insulating dielectric layer 42.
[0094] like Figure 6 As shown, metal material is filled into each through hole A to form multiple conductive channels 43;
[0095] Step 04, as follows Figure 7 As shown, a metal reflective structure 3 is formed on the surface of the transparent dielectric structure 4 facing away from the second type ohmic contact layer 553;
[0096] Among them, the metal reflective structure 3 is a multi-layered composite reflective structure;
[0097] The metal reflective structure 3 and the transparent medium structure 4 constitute the ODR reflective structure, which is used to reflect the light emitted from the active region 53 and to block the metal material from migrating to the active region 53.
[0098] Step 05, as follows Figure 8 As shown, the chip structure formed in step 04 is fixed to the conductive substrate 1 through the metal bonding layer 2, and the metal bonding layer 2 is formed on the side surface of the metal reflective structure 3 facing away from the transparent dielectric structure 4.
[0099] Step 06, as follows Figure 9 As shown, the growth substrate 01, buffer layer 02 and etching stop layer 03 are peeled off to expose the first type ohmic contact layer 511;
[0100] Step 07, as follows Figure 10 As shown, by etching, the upper surface of the first type ohmic contact layer 511 is etched to expose part of the first type roughening layer 512 to form a light-emitting surface.
[0101] Step 08, as follows Figure 11 As shown, the first electrode 6 and the second electrode 7 are fabricated.
[0102] The first electrode 6 is disposed on the side surface of the first type ohmic contact layer 511 opposite to the first type roughening layer 512, and forms an electrical connection with the first type semiconductor layer 51.
[0103] The second electrode 7 is disposed on the side of the conductive substrate 1 away from the metal bonding layer 2 and is electrically connected to the second type semiconductor layer 55.
[0104] Step 09, as follows Figure 12 As shown, a roughened surface is formed on the light-emitting surface.
[0105] Optionally, in this embodiment, the dielectric layer 41 includes an ITO layer;
[0106] Alternatively, the dielectric layer 41 may include a DBR structure composed of alternating ITO and ZnO layers, which can increase the reflection effect and emission angle of the ODR.
[0107] Optionally, in this embodiment, the insulating dielectric layer 42 includes a SiO2 layer;
[0108] Alternatively, the insulating dielectric layer 42 may include a DBR structure composed of alternating layers of two transparent insulating materials such as SiN layer, SiO2 layer, MgF layer, and MgO layer, which can increase the reflection effect and luminous angle of the ODR.
[0109] Optionally, in this embodiment, each conductive channel 43 is uniformly distributed in the insulating dielectric layer 42, and the horizontal cross-sectional area of each conductive channel 43 gradually increases from the center of the insulating dielectric layer 42 towards the edge of the insulating dielectric layer 42.
[0110] It should be noted that this embodiment does not limit the specific doping type of the first type semiconductor layer and the second type semiconductor layer. The doping types of the first type semiconductor layer and the second type semiconductor layer are opposite. The first type semiconductor layer can be a P-type semiconductor layer or an N-type semiconductor layer. The specific materials of the N-type semiconductor layer and the P-type semiconductor layer can be selected according to the actual situation.
[0111] Optionally, in another embodiment of this application, the metal reflective structure 3 includes a first reflective layer 31 and a second reflective layer 32 stacked together, and the first reflective layer 31 and the second reflective layer 32 are formed of different materials.
[0112] Optionally, in this embodiment, the first reflective layer 31 comprises one or more stacks of gold, silver, titanium, tungsten, aluminum, and nickel; and the second reflective layer 32 comprises one or more stacks of gold, silver, titanium, tungsten, aluminum, and nickel.
[0113] Optionally, in this embodiment, the thickness of the first reflective layer 31 is 20nm-800nm, including the endpoint values; the thickness of the second reflective layer 32 is 20nm-800nm, including the endpoint values.
[0114] In summary, the above technical solution achieves the following results:
[0115] 1. The LED chip provided in this embodiment uses a metal reflective structure and a transparent dielectric structure to form an ODR reflective structure. On the one hand, it reflects the light emitted from the active region, ensuring that all light is emitted from the light-emitting surface of the first type of roughened layer. On the other hand, it prevents the metal material from migrating to the active region, avoiding chip aging and severe brightness decay. The metal reflective structure is a multi-layered composite reflective structure, which can effectively improve reflectivity. The transparent dielectric structure includes a dielectric layer or an insulating dielectric layer, and the insulating dielectric layer has multiple through-holes penetrating the insulating dielectric layer. Each through-hole is filled with metal material to form multiple conductive channels. Current can be evenly distributed through the dielectric layer or multiple conductive channels, avoiding current congestion and poor reliability of the LED chip under high current operating conditions. Combined with the roughened light-emitting surface, the light emission angle of the LED chip can be expanded while improving the light extraction efficiency of the LED chip.
[0116] 2. Furthermore, by setting a metal reflective structure including a stacked first reflective layer and a second reflective layer, and the first reflective layer and the second reflective layer are formed of different materials, the interface between the reflectors formed of different materials can better increase the light emission angle of the LED chip.
[0117] 3. Furthermore, by setting each conductive channel to be evenly distributed in the insulating dielectric layer, and by gradually increasing the horizontal cross-sectional area of each conductive channel from the center of the insulating dielectric layer to the edge of the insulating dielectric layer, the current of the LED chip can be better diffused evenly.
[0118] 4. The LED chip manufacturing method provided in this embodiment can effectively solve the problems of current congestion and poor reliability of LED chips under high current operating conditions by manufacturing LED chips through a simple and convenient process, thereby improving the luminous efficiency and reliability of LED chips.
[0119] Those skilled in the art should understand that, in the disclosure of this invention, the terms "lateral", "longitudinal", "upper", "lower", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the above terms should not be construed as limiting this invention.
[0120] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.
[0121] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. An LED chip, characterized in that, include: Conductive substrate; A metal bonding layer, a metal reflective structure, a transparent dielectric structure, and a stacked structure are sequentially stacked along a first direction on one side surface of the conductive substrate. The first direction is perpendicular to the conductive substrate and extends from the conductive substrate to the stacked structure. The metal reflective structure and the transparent medium structure constitute an ODR reflective structure, which is used to reflect light emitted from the active region and block the metal material from migrating to the active region. The metal reflective structure is a multi-layered composite reflective structure; the transparent dielectric structure includes a dielectric layer or an insulating dielectric layer, and the insulating dielectric layer has multiple through holes penetrating the insulating dielectric layer, each of the through holes being filled with a metal material to form multiple conductive channels; The stacked structure includes a second type semiconductor layer, a second waveguide layer, an active region, a first waveguide layer, and a first type semiconductor layer stacked sequentially along a first direction; The first type of semiconductor layer includes a first type of confinement layer, a first type of current spreading layer, a first type of roughening layer, and a first type of ohmic contact layer stacked sequentially along the first direction; the second type of semiconductor layer includes a second type of ohmic contact layer, a second type of current spreading layer, and a second type of confinement layer stacked sequentially along the first direction. Wherein, the first type of ohmic contact layer exposes a portion of the first type of roughened layer, and the exposed portion of the first type of roughened layer is the light-emitting surface, and the light-emitting surface is the roughened surface; The first electrode is disposed on the side surface of the first type ohmic contact layer away from the first type roughened layer and forms an electrical connection with the first type semiconductor layer. The second electrode is disposed on the side surface of the conductive substrate opposite to the metal bonding layer and forms an electrical connection with the second type of semiconductor layer.
2. The LED chip according to claim 1, characterized in that: The dielectric layer includes an ITO layer; Alternatively, the dielectric layer may comprise a DBR structure consisting of alternating ITO and ZnO layers.
3. The LED chip according to claim 1, characterized in that: The insulating dielectric layer includes a SiO2 layer; Alternatively, the insulating dielectric layer may include a transparent insulating material layer, which is a DBR structure composed of alternating layers of two of the following materials: SiN layer, SiO2 layer, MgF layer, and MgO layer.
4. The LED chip according to claim 1, characterized in that: Each of the conductive channels is uniformly distributed in the insulating dielectric layer, and the horizontal cross-sectional area of each conductive channel gradually increases from the center of the insulating dielectric layer towards the edge of the insulating dielectric layer.
5. The LED chip according to claim 1, characterized in that: The metal reflective structure includes a first reflective layer and a second reflective layer stacked together, and the first reflective layer and the second reflective layer are formed of different materials.
6. The LED chip according to claim 5, characterized in that: The first reflective layer comprises one or more stacks of gold, silver, titanium, tungsten, aluminum, and nickel; the second reflective layer comprises one or more stacks of gold, silver, titanium, tungsten, aluminum, and nickel.
7. The LED chip according to claim 5, characterized in that: The thickness of the first reflective layer is 20nm-800nm, including the endpoint values; the thickness of the second reflective layer is 20nm-800nm, including the endpoint values.
8. A method for manufacturing an LED chip, characterized in that, The manufacturing method includes the following steps: Step 01: Provide a growth substrate; Step 02: A buffer layer, an etch stop layer, and a stacked structure are sequentially grown on the surface of the growth substrate; The stacked structure includes a first type semiconductor layer, a first waveguide layer, an active region, a second waveguide layer, and a second type semiconductor layer stacked sequentially along the growth direction. The first type of semiconductor layer includes a first type of ohmic contact layer, a first type of roughening layer, a first type of current spreading layer and a first type of confinement layer stacked sequentially along the growth direction; the second type of semiconductor layer includes a second type of confinement layer, a second type of current spreading layer and a second type of ohmic contact layer stacked sequentially along the growth direction. Step 03: Grow a transparent dielectric structure on the surface of the stacked structure opposite to the corrosion stop layer; The transparent dielectric structure includes a dielectric layer or an insulating dielectric layer, and the insulating dielectric layer has multiple through holes penetrating the insulating dielectric layer, each of the through holes being filled with a metal material to form multiple conductive channels; Forming multiple conductive channels includes the following steps: By etching along the upper surface of the insulating dielectric layer, a portion of the first type roughened layer is exposed, forming multiple through holes penetrating the insulating dielectric layer. The metal material is filled into each of the through holes to form multiple conductive channels; Step 04: Form a metal reflective structure on the surface of the transparent dielectric structure that is away from the second type of ohmic contact layer; The metal reflective structure is a multi-layered composite reflective structure. The metal reflective structure and the transparent medium structure constitute an ODR reflective structure, which is used to reflect light emitted from the active region and block the migration of metal material to the active region. Step 05: Fix the chip structure formed in step 04 to the conductive substrate through a metal bonding layer, wherein the metal bonding layer is formed on the side surface of the metal reflective structure that is away from the transparent dielectric structure. Step 06: Peel off the growth substrate, the buffer layer, and the etching stop layer to expose the first type of ohmic contact layer; Step 07: Using an etching process, etch along the upper surface of the first type of ohmic contact layer to expose part of the first type of roughened layer to form a light-emitting surface; Step 08: Fabricate the first and second electrodes; The first electrode is disposed on the side surface of the first type ohmic contact layer away from the first type roughened layer and forms an electrical connection with the first type semiconductor layer. The second electrode is disposed on the side surface of the conductive substrate away from the metal bonding layer and forms an electrical connection with the second type of semiconductor layer. Step 09: Roughen the light-emitting surface to form a roughened surface.
9. The method for manufacturing an LED chip according to claim 8, characterized in that: The dielectric layer includes an ITO layer; Alternatively, the dielectric layer may comprise a DBR structure consisting of alternating ITO and ZnO layers.
10. The method for manufacturing an LED chip according to claim 8, characterized in that: The insulating dielectric layer includes a SiO2 layer; Alternatively, the insulating dielectric layer may include a transparent insulating material layer, which is a DBR structure composed of alternating layers of two of the following materials: SiN layer, SiO2 layer, MgF layer, and MgO layer.
11. The method for manufacturing an LED chip according to claim 8, characterized in that: Each of the conductive channels is uniformly distributed in the insulating dielectric layer, and the horizontal cross-sectional area of each conductive channel gradually increases from the center of the insulating dielectric layer towards the edge of the insulating dielectric layer.
12. The method for manufacturing an LED chip according to claim 8, characterized in that: The metal reflective structure includes a first reflective layer and a second reflective layer stacked together, and the first reflective layer and the second reflective layer are formed of different materials.
13. The method for manufacturing an LED chip according to claim 12, characterized in that: The first reflective layer comprises one or more stacks of gold, silver, titanium, tungsten, aluminum, and nickel; the second reflective layer comprises one or more stacks of gold, silver, titanium, tungsten, aluminum, and nickel.
14. The method for manufacturing an LED chip according to claim 12, characterized in that: The thickness of the first reflective layer is 20nm-800nm, including the endpoint values; the thickness of the second reflective layer is 20nm-800nm, including the endpoint values.