Mitigating crosstalk in flux adjustable coupler architecture

Abstract

A method of reducing spurious coupling in a qubit array includes turning on a first coupler between a first qubit and a second qubit of the qubit array by providing a pulse having a first amplitude to the first coupler. Spurious coupling between the first coupler and a spectator qubit is reduced by turning on a second coupler coupled to the spectator qubit by providing a compensating pulse having a second amplitude to the second coupler based on the pulse having the first amplitude.

Description

Technical Field

[0001] This disclosure generally relates to superconducting devices, and more specifically to qubit control. Background Technology

[0002] Superconducting quantum computing is the realization of a quantum computer within superconducting electronic circuits. Quantum computing studies the application of quantum phenomena in information processing and communication. Different models of quantum computing exist, with the most popular models including the concepts of qubits and quantum gates. A qubit is a generalization of a bit having two possible states, but a quantum superposition of those two states. A quantum gate is a generalization of logic gates. A quantum gate is a quantum circuit that operates on a small number of qubits, which are the building blocks of larger quantum circuits, much like classical logic gates in conventional digital circuits. However, a quantum gate describes the transformation that one or more qubits will undergo after the gate is applied to them, given their initial state. Different quantum phenomena (such as superposition and entanglement) have no analogues in the world of classical computing and therefore may involve special structures, techniques, and materials. Summary of the Invention

[0003] According to various embodiments, methods, systems, and computing devices for mitigating stray coupling in a qubit array are provided. A first coupler is activated by providing a pulse of a first amplitude between a first qubit and a second qubit in the qubit array. The second coupler is activated by providing a compensation pulse of a second amplitude to a second coupler coupled to a spectator qubit based on the pulse of the first amplitude, thereby reducing (e.g., eliminating) stray coupling between the first coupler and the spectator qubit. The compensation pulse provided to the second coupler prevents undesirable interactions with the spectator qubit during the formation of a gate between the first and second qubits.

[0004] In one embodiment, each of the first and second couplers is flux-tunable.

[0005] In one embodiment, opening the first coupler between the first qubit and the second qubit creates a gate between the first qubit and the second qubit. The reduction of stray coupling between the first coupler and the bystander qubit is operable to prevent accidental gates between the first qubit and the bystander qubit.

[0006] In one embodiment, the width of the compensation pulse is substantially similar to the width of the pulse used to turn on the first coupler.

[0007] In one embodiment, the amplitude of the compensation pulse is lower than the amplitude of the pulse used to turn on the first coupler.

[0008] In one embodiment, the second coupler is turned on by the compensation pulse during the first edge (e.g., the rising edge) of the pulse used to turn on the first coupler, when the frequency of the first qubit is substantially similar to the frequency of the bystander qubit.

[0009] In one embodiment, the second coupler is turned off by the compensation pulse during the second edge (e.g., the falling edge) of the pulse used to turn off the first coupler, when the frequency of the first qubit is substantially similar to the frequency of the bystander qubit.

[0010] In one embodiment, during the first edge of the pulse used to turn on the first coupler, when the frequency of the first qubit is substantially dissimilar to the frequency of the bystander qubit, the second coupler is turned off by the compensation pulse.

[0011] In one embodiment, during the second edge of the pulse used to turn off the first coupler, the second coupler is turned on by the compensation pulse when the frequency of the first qubit is substantially similar to the frequency of the bystander qubit.

[0012] In one embodiment, when the frequency of the second qubit is substantially similar to the frequency of the bystander qubit, collision between the second qubit and the bystander qubit is prevented by turning on or keeping the second coupler on by the compensation pulse.

[0013] In one embodiment, the amplitude of the compensation pulse differs from the amplitude of the compensation pulse when the frequency of the first qubit is substantially similar to the frequency of the bystander qubit.

[0014] In one embodiment, during the setup phase: applying a series of N pulses to the first coupler; for each of the N pulses, scanning the amplitude of the compensation signal; and selecting the amplitude of the compensation signal that provides a minimum amount of spurious coupling between the first coupler and the bystander qubit.

[0015] In one embodiment, the waiting time or Z-rotation between each of the N pulses is adjusted based on the highest constructive interference between two compensation pulses.

[0016] These and other features will become apparent from the following detailed description of illustrative embodiments thereof, which will be read in conjunction with the accompanying drawings. Attached Figure Description

[0017] The accompanying drawings are illustrative embodiments. They do not show all embodiments. Other embodiments may be used alternatively or as an alternative. Details that may be obvious or unnecessary may be omitted to save space or for more efficient illustration. Some embodiments may be practiced with additional components or steps and / or without all components or steps shown. When the same number appears in different drawings, it refers to the same or similar parts or steps.

[0018] Figure 1 This is an example architecture of a quantum computing system that conforms to the illustrative embodiments.

[0019] Figure 2 This is a conceptual block diagram of multiple qubits connected by a coupler, consistent with an illustrative embodiment.

[0020] Figure 3 A circuit diagram of multiple qubits connected by a coupler, consistent with the illustrative embodiment, is provided.

[0021] Figure 4 A circuit diagram of multiple qubits connected by couplers, consistent with the illustrative embodiments, is provided, which are controlled in such a way that stray coupling is mitigated during the formation of gates between the qubits.

[0022] Figure 5 This is an exemplary timing operation consistent with the illustrative embodiment for reducing unwanted coupling between two qubits during gate formation.

[0023] Figure 6 This is an example timing operation consistent with the illustrative embodiment for reducing multiple collisions during door formation.

[0024] Figure 7 This is an example timing diagram consistent with the illustrative embodiments, which facilitates the calibration of waveform parameters to minimize leakage during gate formation.

[0025] Figure 8 This is a conceptual block diagram of a complete calibration of a waveform reduction (e.g., elimination) according to an illustrative embodiment.

[0026] Figure 9 This is an illustrative process related to mitigating stray coupling with bystander qubits during gate formation.

[0027] Figure 10A functional block diagram of a computer hardware platform is provided, which can be used to implement a specially configured computing device that can host a qubit crosstalk suppression engine. Detailed Implementation

[0028] Overview

[0029] In the following detailed description, numerous specific details are illustrated by way of examples to provide a thorough understanding of the relevant teachings. However, it should be clear that the teachings can be practiced without such details. In other cases, well-known methods, processes, components, and / or circuits have been described at a relatively high level without detail to avoid unnecessarily obscuring aspects of this teaching.

[0030] In discussing this technique, it may be helpful to describe the different prominent terms. As used herein, a qubit represents a quantum bit and a quantum gate is an operation performed on a qubit, such as controlling super-positioning between two qubits.

[0031] As used herein, the term C-phase refers to a controlled phase gate, in which the Z-rotation of one qubit is defined by the state of another qubit. ZZ refers to state-dependent qubit interactions that can be used to form a C-phase gate.

[0032] As used herein, the term flux adjustable refers to a device whose frequency depends on the magnetic flux.

[0033] As used herein, a transmon is a type of superconducting qubit in which the charging energy Ec is much smaller than the Josephson energy Ej.

[0034] As used herein, the drive system involves a qubit control line that carries the signal to the qubit.

[0035] As used herein, the term degenerate refers to the quantum mechanical energy levels corresponding to two or more distinct measurable states of a quantum system. Conversely, if two or more distinct states of a quantum mechanical system give the same energy value when measured, they are said to be degenerate.

[0036] Although the terms first, second, third, etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the scope of the exemplary embodiments, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0037] Exemplary embodiments are described herein with reference to schematic diagrams of idealized or simplified implementations (and intermediate structures). Therefore, variations in the shapes of the illustrations are expected due to factors such as manufacturing techniques and / or tolerances. Consequently, the areas shown in the figures are schematic in nature, and their shapes do not necessarily represent the actual shapes of the areas of the device, nor are they limiting in scope.

[0038] It should be understood that other embodiments may be used and structural or logical changes may be made without departing from the spirit and scope defined by the claims. The description of the embodiments is not restrictive. In particular, elements of the embodiments described below may be combined with elements of different embodiments.

[0039] As used herein, certain terms are used to indicate what can be considered idealized behavior, such as “non-destructive,” “superconductor,” “superconducting,” and “absolute zero.” These terms are intended to cover functionality that may not be precisely ideal but is within an acceptable margin for a given application. For example, a certain level of loss or tolerance may be acceptable so that the resulting material and structure can still be referred to using these “idealized” terms.

[0040] This disclosure generally relates to superconducting devices, and more specifically to improving the integrity of qubits by mitigating stray coupling from a dominant qubit that influences bystander qubits during gate formation. The electromagnetic energy associated with the qubit can be stored in a so-called Josephson junction and in capacitive and inductive elements used to form the qubit. In one instance, to read out the qubit state, a microwave signal is applied to a microwave readout cavity coupled to the qubit at that cavity frequency. The emitted (or reflected) microwave signal passes through multiple thermal isolation stages and low-noise amplifiers used to block or reduce noise and improve the signal-to-noise ratio. Alternatively or additionally, the microwave signal (e.g., a pulse) can be used to wind around one or more qubits. Most of the process is performed in a cold environment (e.g., in a low-temperature room temperature), while the microwave signal of the qubit is ultimately measured at room temperature. The amplitude and / or phase of the returned / output microwave signal carry information about the qubit state, such as whether the qubit has shifted to the ground or excited state. Microwave signals carrying quantum information about the state of a qubit are typically weak (e.g., on the order of a few microwave photons).

[0041] To measure this weak signal using room-temperature electronics (i.e., outside of a refrigerated environment), low-noise quantum-confined amplifiers (QLAs) (such as Josephson amplifiers and traveling-wave parametric amplifiers (TWPAs)) can be used as preamplifiers (i.e., the first amplification stage) at the output of the quantum system to amplify the quantum signal while adding a minimum amount of noise specified by quantum mechanics to improve the signal-to-noise ratio of the output chain. In addition to Josephson amplifiers, certain Josephson microwave components using Josephson amplifiers or Josephson mixers (such as Josephson circulators, Josephson isolators, and Josephson mixers) can be used in scalable quantum processors.

[0042] The ability to include more qubits is significant for the potential to realize quantum computers. Generally, performance increases as temperature decreases, for example by reducing the remaining population of thermally excited qubits and reducing the thermal broadening of their transition frequencies. Thus, the lower the temperature, the better the quantum processor. Furthermore, crosstalk between active qubits (sometimes referred to here as dominant qubits) and adjacent circuitry (such as coupler resonators of adjacent qubits) can increase the error rate. Typically, there are two main sources of gate error: decoherence (randomness) and non-ideal interactions (determinism). The latter includes parasitic coupling, leakage to non-computational states, and control crosstalk. For example, second nearest neighbor (NNN) coupling is a spurious phenomenon and aims to introduce unwanted interactions between unconnected qubits, which will be discussed in more detail below. NNNs, along with any other qubits in the qubit array (which can be affected by stray capacitances during gate formation), are collectively referred to here as bystander qubits.

[0043] The applicant has recognized that improvements are needed along two main dimensions to increase the computational power and reliability of quantum computers. First, there is the qubit count itself. The more qubits in a quantum processor, the more states can be manipulated and stored in principle. Second is a low error rate, which involves precisely manipulating qubit states and performing sequential operations that provide consistent results rather than just unreliable data. Therefore, to improve the fault tolerance of quantum computers, a large number of physical qubits should be used to store logical qubits. In this way, the local information is delocalized, making the quantum computer less susceptible to local errors and the performance of measurements in the eigenbasis of the qubits, similar to parity checking in classical computers, thus advancing to more fault-tolerant qubits. Placing one or more bystander qubits near active qubits can exacerbate stray coupling problems.

[0044] In one respect, the teachings herein are based on the applicants' insights that directly applying conventional integrated circuit technology used for interacting with computing elements to superconducting quantum circuits may be ineffective because the unique challenges presented by quantum circuits are not present in classical computing architectures. Therefore, embodiments of this disclosure are further based on the understanding that the unique problems of quantum circuits have been taken into account when evaluating the suitability of conventional integrated circuit technology for constructing superconducting quantum circuits, and specifically for the suitability of selected methods and architectures for effective interaction with qubits.

[0045] Example Architecture

[0046] Figure 1 This is an example architecture 100 of a quantum computing system according to an illustrative embodiment. The architecture 100 includes a quantum processor 112 comprising a plurality of qubits 114. The quantum processor 112 is located in a cooling unit 110, which may be a dilution refrigerator. A dilution refrigerator is a cryogenic device that provides continuous cooling to temperatures typically 10 mK. A large portion of the physical volume of the structure 100 is due to the large size of the cooling unit 110. To achieve near-absolute zero temperatures for system operation, the cooling unit 110 may use liquid helium as a coolant.

[0047] A measurement and control unit 130 is located outside the refrigeration unit 110. The measurement and control unit 130 is able to communicate with the quantum processor through an opening 116 (sometimes referred to as the partition of the dilution refrigerator 110), which also forms an hermetically sealed seal that separates the ambient atmospheric pressure from the vacuum pressure of the operating cryostat.

[0048] The multiple qubits 114 can interact with each other. For example, a gate can be formed between qubits 114A and 114B, sometimes referred to here as nearest neighbor (NN). However, stray coupling between the dominant qubit (e.g., 114A) and the bystander (e.g., 114B) can introduce undesirable interactions, leading to additional errors. In one aspect, two qubits are coupled together via a tunable coupler bus (e.g., a coupler). A flux pulse is applied to drive the C-phase gate of the two qubits. Stray coupling can significantly limit the gate speed achievable by the tunable coupler. Although large couplings (e.g., up to 300 MHz) have been used in experiments with isolated two qubits in the literature, such large couplings can introduce high stray couplings between the qubits and the unconnected coupler (NNN). Such stray couplings can add to the coherence errors that typically exist only in multi-qubit devices (i.e., more than two isolated qubits). Therefore, large couplings are problematic for large multi-qubit devices.

[0049] Therefore, in one respect, the teachings presented here substantially reduce stray coupling to the observer qubit during two-qubit gate operations. Stray coupling will be discussed in more detail below.

[0050] Example diagram

[0051] Figure 2 A conceptual block diagram 200 of multiple qubits connected by a coupler, consistent with the illustrative embodiments, is provided. More specifically, Figure 2 It shows the first coupler C 12 (204) The first qubit Q1 (202) and the second qubit Q2 (206) are coupled. A third qubit Q3 (210) exists, which is coupled through the second coupler C. 23 (208) is coupled to the second qubit Q2 (206). In one embodiment, each of couplers 204 and 208 is flux-tunable, sometimes referred to as a tunable bus architecture. Although in Figure 2 Only three qubits and two couplers are shown here to avoid confusion, but it should be understood that the teachings here support additional qubits and couplers.

[0052] For example, consider executing a gate between the second qubit Q2 (206) and the third qubit Q3 (210). Ideally, the first coupler C 12 (204) is in the disconnected state, thereby decoupling (e.g., isolating) the first qubit Q1 (202) from the system. However, in practice, stray coupling exists between components. For example, during the formation of the gate between qubits Q3 (210) and Q2 (206), stray coupling occurs between the second coupler C and the second coupler C. 23 (208) can have a stray (e.g., capacitive) coupling 220 with the first qubit Q1 (202). Similarly, during the formation of the gate between the first qubit Q1 (202) and the second qubit Q2 (206), a stray (e.g., capacitive) coupling 220 can exist between the first coupler C and the second qubit Q2 (206). 12 There may be stray coupling 230 between (204) and the third qubit Q3 (210).

[0053] Therefore, during the formation of the gate between the second qubit Q2 (206) and the third qubit Q3 (210), the third qubit Q3 (210) and the second coupler C 23 (208) Hybridization. In the second coupler C... 23The stray coupling 220 between (208) and the first qubit Q1 (202) results in a limited interaction with the first qubit (202). As a result, during the formation of this gate, the third qubit Q3 (210) and the first qubit Q1 (202) can exchange excitations. In other words, in a tunable bus architecture, stray coupling can produce unwanted rotations with the bystander qubit.

[0054] See now Figure 3 The figure provides a circuit diagram 300 of multiple qubits connected by a coupler, consistent with the illustrative embodiment. Figure 3 The qubits Q1 (302), Q2 (304), and Q3 (306) coupled by tunable couplers 310 and 320, respectively, are shown. Although preferred types of couplers (310, 320) are shown by way of example, it will be understood that other types of tunable couplers are also supported by the teachings herein.

[0055] As mentioned above Figure 2 In the context of this discussion, when a gate is generated between qubit Q3 (306) and qubit Q2 (304), the coupler C... 23 (320) is turned on while other adjacent couplers (e.g., 310) remain off. When a gate is created between qubits Q1 (302) and Q2 (304), coupler C 12 (310) is turned on while coupler 320 remains off. Each coupler (e.g., 310) may have a preceding coupler (e.g., JC). 12 (330)) The preceding coupler is operable to reduce (e.g., cancel) the coupler C. 12 (310) Coupling effect between qubits Q1 (302) and Q2 (304). For example, the preceding coupler JC 12 (330) is tuned such that its coupling effect with its corresponding coupler 310 has the same amplitude but opposite sign, thus tuning out the coupling between the first qubit and the second qubit Q2. Therefore, a prior coupler JC is specifically introduced. 12 To facilitate a true disconnected state. Similarly, the coupler JC 23 (340) provides a similar prior coupling for coupler 320. Nevertheless, stray coupling (as in 350) between the active (e.g., ON) coupler 320 and the bystander qubit (e.g., Q1(302)) can lead to unreliable performance (e.g., unwanted rotation) of that bystander qubit (e.g., Q1(302)). Such stray coupling can be transmitted through coupler C 12 (310) and C 23(320) is invoked by specific timing operations, wherein the amplitude and duration of these couplers being turned on are controlled in a specific manner, which will be discussed in more detail below.

[0056] Now for reference Figure 4 , Figure 4 A circuit diagram of multiple qubits connected by couplers, consistent with the illustrative embodiments, is provided, which are controlled such that stray coupling is mitigated during the formation of gates between the qubits. Figure 4 The components are basically similar to Figure 3 Therefore, for the sake of brevity, a detailed explanation will not be provided here.

[0057] By way of example, consider forming a gate between qubits Q3 (306) and Q2 (304). For this purpose, a first pulse 402 is sent to coupler C. 23 (320), thereby coupling C 23 (320) Start. A second pulse 404, which may have a start and end time substantially similar to the first pulse 402, is sent to the coupler C. 12 (310), thereby enabling coupler C 12 (310). In some embodiments, the amplitude of pulse 404 is lower than the amplitude of pulse 402. The applicant has determined that the interaction generated by the stray coupling 350 is mitigated (e.g., canceled) by initiating a small (e.g., smaller than the interaction between qubits Q2 (304) and Q3 (306)) interaction between qubits Q1 (302) and Q2 (304). In other words, by activating (i.e., sending a pulse to) the second coupler C 12 (310) To induce a small interaction between the observer qubit Q1 (302) and another qubit (e.g., Q2 (304)), thereby avoiding adverse interactions with the observer qubit during qubit formation, such as accidental gates with the observer qubit, can reduce and mitigate stray capacitance between the first coupler (between the two dominant qubits) and the observer qubit during the formation of the gate between the two dominant qubits.

[0058] Example of timed operation

[0059] As mentioned above, in some embodiments, the compensation pulse can be as simple as a scaled (e.g., amplitude-based) copy of a pulse that is operated to turn on the coupler between the two dominant qubits. In one embodiment, the scaling is set such that the ratio of the coupler C... 12 (310) The additional interaction generated is dimensionally similar to that produced by the coupler C 23(320) Actions performed via spurious coupling 350 produce interactions that are equal and opposite in magnitude. However, more advanced timing operations are possible. A significant insight is that when a qubit frequency becomes degenerate, it tends to induce bystander errors via a tunable coupler with a bystander qubit. In quantum mechanics, a quantum system is degenerate if its energy level corresponds to two or more distinct measurable states. Conversely, a quantum mechanical system is said to be degenerate if two or more distinct states give the same energy value when measured. It should be noted that turning on the coupler can shift the frequencies of the two coupled qubits. Thus, a non-degenerate qubit may degenerate during partial pulses.

[0060] Figure 5 This is an exemplary timing operation consistent with the illustrative embodiment for reducing (e.g., eliminating / preventing) unwanted coupling between two qubits during gate formation. (Refer to...) Figure 3 The circuit diagram 300 discusses waveform 500. For example, when a gate is formed between qubits Q3 (306) and Q2 (304), a pulse (e.g., waveform) 510 is provided to coupler C. 23 (320). In coupler C 23 During this pulse (waveform) 510 on (320), the frequencies of qubits Q2 and Q3 will change. At a certain amplitude, Q1 and Q3 will become degenerate, thus allowing swapping (e.g., unwanted gates). For example, the frequencies of both qubits Q1 (302) and Q3 (306) will be equal. During this phase (i.e., when the frequencies of the two qubits are substantially similar), accidental swapping may occur, and the bystander qubit is most vulnerable. To mitigate (e.g., cancel) the collision between qubit Q3 (306) and Q1 (302), which is caused by qubit Q1 (302) and coupler C 23 (320) assisted by stray coupling 350 between them, pulse 512 is applied to coupler C. 12 (310) This ensures that the coupling between qubits Q3 (306) and Q1 (302) is canceled upon collision. As shown in waveform 512, this is applied to the second coupler C. 12 The waveform of (310) does not need to be applied to the qubit C. 23 A copy of the waveform (320). Instead, in one embodiment, waveform 512 may be a specially designed pulse that achieves an appropriate magnitude of reduction (e.g., elimination) of stray coupling 350 precisely during the correlation time. This correlation time is a period in which the frequency difference between the dominant qubit Q3 (306) and the bystander qubit Q1 (302) is comparable (e.g., within a predetermined range) to the interaction strength resulting from stray coupling. When the frequency of qubit Q3 (306) deviates from this condition, the coupler C...12 (310) is turned off. A similar operation is performed during the next edge of waveform 510 (e.g., a falling edge). In this way, with Figure 4 Compared to waveform 404 in the previous example, it provides more precise (i.e., time-targeted) turn-on and turn-off times for the second coupler, which prevents collisions between qubits Q3 (306) and Q1 (302) while reducing ZZ (state-dependent qubit interactions that can be used to form C-phase gates).

[0061] The teachings in this article are not limited to preventing single collisions. For this purpose, refer to... Figure 6 , Figure 6 This is an example timing operation consistent with the illustrative embodiment for reducing (e.g., eliminating (preventing)) multiple collisions during door formation. Reference will be made to... Figure 3 The circuit diagram 300 discusses the waveform 600. Multiple collisions can occur when there is more than one bystander qubit affected by the stray capacitance introduced during the formation of a gate between two dominant qubits (e.g., Q3(306) and Q2(304)). Typically, such collisions can occur in different manifolds, i.e., only qubit Q3(306) or qubit Q1(302) is in an excited state (i.e., 1 photon manifold) vs. qubits Q2(304) and Q3(306) are excited (i.e., 2 photon manifold).

[0062] Different collisions can have different reduction (e.g., elimination) conditions. However, in C... 23 (320) Different collisions are encountered at different amplitudes of the coupler. Therefore, an elimination waveform can be created that accommodates more than one collision during gate formation. For example, when a gate is formed between qubits Q3 (306) and Q2 (304), a pulse (e.g., waveform) 610 is provided to the coupler C with a first amplitude 650. 23 (320). In coupler C 23 During the pulse (waveform) 610 at (320), the frequencies of qubits Q2 (304) and Q3 (306) will both change. At a certain amplitude, Q1 and Q3 will become degenerate, thus allowing swapping (e.g., accidental gates). At time 602, the frequencies of both qubits Q1 (302) and Q3 (306) will be equal. In order to reduce (e.g., cancel) the frequency change caused by qubit Q1 (302) and coupler C 23The pulse 612 has a second amplitude 652, which assists in the collision between qubits Q3 (306) and Q1 (302) assisted by the stray coupling 350 between (320). Therefore, when a collision occurs between qubits Q1 (302) and Q3 (306), the coupling between qubits Q1 and Q3 is canceled. However, at time 604, a collision exists between qubits Q2 (304) and Q1 (302). To counteract this, in order to eliminate the collision between qubit Q1 (302) and coupler C... 12 The collision between qubits Q2 (304) and Q1 (302) facilitated by stray coupling between (310) pulses 612 has a third amplitude 654. A similar operation is performed during the next edge of waveform 610 (e.g., the falling edge).

[0063] Example calibration of compensated waveform

[0064] Therefore, the shape of the compensation waveform can prevent unwanted rotations in the observer qubit during the formation of gates between the dominant qubits. Figure 7 This is an example timing diagram 700 consistent with the illustrative embodiment, designed to facilitate the calibration of waveform parameters to minimize leakage during gate formation. (Refer to...) Figure 3 The circuit diagram 300 discusses waveforms 710 and 712.

[0065] Waveform 710 represents coupler C 23 The activation period of (320) is used to assist in the generation of a gate between qubits Q2 (304) and Q3 (306). A series of N pulses are applied to the coupler C. 23 (320) The compensation waveform is applied to coupler C. 12 (310) to compensate for the difference between the observer qubit Q1 (302) and the coupler C 23 (320) stray coupling 350. A second coupler C is applied between the observer qubit Q1 (302) and the second qubit Q2 (304). 12The compensation waveform 712 on (310) varies at least one of its amplitude or pulse width in each cycle to determine at least one of the following: (i) the timing of the pulse start (e.g., a positive ramp), (ii) the pulse width (e.g., when a negative ramp starts), and (iii) the amplitude of the pulses of the compensation waveform 712. These parameters are optimized to minimize any exchange of excitation between the relevant qubits (e.g., Q3(306) and Q1(302)). For example, the measurement and control unit 130 may adjust the parameters for each pulse and measure the leakage (e.g., how it affects the bystander qubit) and create a plot of it. A point that provides the minimum leakage is selected for that particular parameter. Other parameters may be adjusted similarly until all parameters are properly adjusted to provide the appropriate start time, pulse width, and / or amplitude for the compensation signal 712.

[0066] In one embodiment, the pulse wait time 720 between pulses of waveform 710 is adjusted to improve contrast. The wait time between pulses alters the contrast. For example, there is a frequency difference between the exchanged and non-exchanged states between pulses of waveform 710. This frequency difference results in a phase difference, which can cause constructive (higher contrast) or destructive (lower contrast) interference between consecutive pulses. In this regard, in one embodiment, the measurement and control unit 130 may perform a scan of the wait time 720 to identify wait times 720 that provide constructive interference between pulses, thereby resulting in higher contrast.

[0067] Figure 8 This is a conceptual block diagram 800 of a complete calibration for reduction (e.g., waveform elimination) according to an illustrative embodiment. (Refer to...) Figure 1 Discussion diagram 800.

[0068] At block 801, a blind scan is performed by measurement and control unit 130. For example, a reduction (e.g., elimination) amplitude is scanned. This scan is "blind" in the sense that an appropriate waiting time has not yet been determined. Therefore, the measured contrast may be poor (e.g., unoptimized). To address this, at block 802, a waiting scan is performed. For example, the waiting time (720) is scanned using a near-optimal reduction (e.g., elimination) amplitude selected in block 801. The point with the maximum contrast is selected, thus providing constructive interference. At block 803, a non-blind scan is performed on the parameters of a second coupler (e.g., coupled to a bystander qubit), using the waiting time from waiting scan 802. Optimization of the waiting time provides enhanced contrast and thus allows finding the optimal elimination amplitude in the presence of noise. In one embodiment, the effect of this waiting time can be replaced by a Z-rotation on one or both qubits involved.

[0069] Instance Procedure

[0070] Building upon the foregoing overview of the example architecture, it may now be helpful to consider a more advanced discussion of the example process. To this end, Figure 9 An illustrative process related to mitigating stray coupling with bystander qubits during gate formation is presented. Process 900 is shown in a logic flowchart as a collection of blocks, representing a series of operations that can be implemented in hardware, software, or a combination thereof. In the context of software, blocks represent computer-executable instructions that perform the operations when executed by one or more processors. Typically, computer-executable instructions may include routines, programs, objects, components, data structures, etc., that perform functions or implement abstract data types. In each process, the order in which operations are described is not intended to be construed as limiting, and any number of described blocks may be combined and / or executed in parallel in any order to implement the process. In various embodiments, it can be achieved through... Figure 1 The measurement and control unit 130 controls the process in a low-temperature environment or at room temperature. For discussion purposes, see references... Figure 3 The architecture is used to describe the process.

[0071] In block 902, the qubit crosstalk mitigation engine (which may be part of the measurement and control unit 130) is connected via a first coupler C between the first qubit Q3 (306) and the second qubit Q2 (304) of the qubit array. 23 (320) A pulse with a first amplitude is provided to turn on the first coupler C. 23 (320). Activate the first coupler C between the first qubit Q3 (306) and the second qubit Q2 (304). 23 (320) A door was created between them.

[0072] At box 904, the second coupler C is connected based on the timing of the first pulse. 12 (302) A compensation pulse with a second amplitude is provided by turning on the second coupler C coupled to the bystander qubit Q1 (302). 12 (302) to reduce (e.g., cancel) the first coupler C 23 (320) stray coupling with the bystander qubit Q1 (302). For example, in Figure 4 to Figure 7 Explained within the context of the discussion, the timing of the compensation pulse is based on the timing of the first pulse. In different embodiments, the compensation pulse may be a simple clone of the first pulse at an appropriate amplitude, or it may have a different shape to further reduce noise and / or accommodate any additional collisions with bystander qubits. The first and second couplers are flux-tunable. First coupler C 23The reduction (e.g., cancellation) of stray coupling 350 between (320) and the bystander qubit Q1 (302) is operable to prevent accidental gates between these qubits.

[0073] Example computer platform

[0074] As discussed above, functions involving interaction with qubits through measurement and control signals can include measurement and control units, such as... Figure 1 As shown. Figure 10 A functional block diagram of a computer hardware platform 1000 is provided, which can be used to implement a specially configured computing device that can host a qubit crosstalk mitigation engine 1040, which is operable to perform the functions discussed herein. Specifically, Figure 10 A network or host computer platform 1000 is shown, such as a computing device that can be used to implement a suitable configuration, such as... Figure 1 Measurement and control block 130.

[0075] The computer platform 1000 may include a central processing unit (CPU) 1004, a hard disk drive (HDD) 1006, random access memory (RAM) and / or read-only memory (ROM) 1008, a keyboard 1010, a mouse 1012, a display 1014, and a communication interface 1016, which are connected to the system bus 1002.

[0076] In one embodiment, HDD 1006 includes the ability to store programs capable of performing various processes in the manner described herein, such as a qubit crosstalk suppression engine 1040. The qubit crosstalk suppression engine 1040 may have various modules configured to perform different functions. For example, a pulse width module 1042 may be present, operable to determine the start and stop times of a compensation pulse for mitigating spurious coupling based on the timing of pulses applied to the coupler used when creating a gate between two qubits. An amplitude module 1044 may be present, operable to provide an appropriate compensation signal amplitude, as described herein, based on the collision time between the dominant qubit and the bystander qubit. A wait time module 1046 may be present, operable to adjust the wait time between pulses applied to the coupler during gate formation, such that appropriate contrast is achieved between pulses. A compensation timing module 1048 may be present, operable to determine the start and stop times of the compensation pulse for mitigating spurious coupling based on when a collision occurs between the dominant qubit and the bystander qubit.

[0077] in conclusion

[0078] Various embodiments of this teaching have been described for illustrative purposes, but are not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein has been chosen to best explain the principles of the embodiments, their practical application, or technical improvements to technologies found in the market, or to enable those skilled in the art to understand the embodiments disclosed herein.

[0079] While the content considered to be the best state and / or other instances has been described above, it should be understood that various modifications may be made therein, and the subject matter disclosed herein can be implemented in different forms and instances, and the teachings can be applied to many applications, of which only some have been described herein. The appended claims are intended to claim protection for any and all applications, modifications, and variations falling within the true scope of this teaching.

[0080] The components, steps, features, purposes, benefits, and advantages discussed herein are illustrative only. They, and the discussions associated with them, are not intended to limit the scope of protection. While various advantages have been discussed herein, it will be understood that not all embodiments are necessarily required to include all advantages. Unless otherwise stated, all measurements, values, ratings, positions, amplitudes, sizes, and other specifications set forth in this specification (including in the following claims) are approximate and imprecise. They are intended to have a reasonable range of functionality associated with them and consistent with functionality customary in the art to which they pertain.

[0081] Many other embodiments are also conceived. These include embodiments with fewer, additional, and / or different components, steps, features, purposes, benefits, and advantages. These also include embodiments in which components and / or steps are arranged and / or ordered differently.

[0082] Various aspects of this disclosure are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this disclosure. It should be understood that each block of the flowcharts and / or block diagrams, and combinations of blocks in the flowcharts and / or block diagrams, can be implemented by computer-readable program instructions.

[0083] These computer-readable program instructions may be provided to a processor of a suitably configured computer, special-purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions / actions specified in one or more blocks of a flowchart and / or block diagram. These computer-readable program instructions may also be stored in a computer-readable storage medium that causes a computer, programmable data processing apparatus, and / or other device to function in a certain way, such that the computer-readable storage medium storing the instructions comprises an article of manufacture containing instructions that implement aspects of the functions / actions specified in one or more blocks of a flowchart and / or block diagram.

[0084] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus, or other device to produce computer-implemented processing, such that the instructions executed on the computer, other programmable apparatus, or other device perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0085] The calling flows, flowcharts, and block diagrams in this document illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to different embodiments of this disclosure. Each block in a flowchart or block diagram may represent a module, segment, or portion of instructions, including one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the diagram. For example, depending on the functions involved, two consecutively shown blocks may actually execute substantially simultaneously, or these blocks may sometimes execute in reverse order. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action or executes a combination of dedicated hardware and computer instructions.

[0086] Although the foregoing has been described in conjunction with exemplary embodiments, it should be understood that the term "exemplary" means only as an example, and not the best or optimal. Nothing stated or shown beyond what is immediately stated above is intended or should be construed as causing any contribution or public equivalent of any component, step, feature, object, benefit, advantage, or advantage, whether or not it is stated in the claims.

[0087] It should be understood that the terms and expressions used herein have their general meanings as assigned to their respective corresponding queries and fields of study, unless otherwise specified herein. Relational terms such as "first" and "second" may be used merely to distinguish one entity or action from another, without necessarily requiring or implying any actual such relationship or order between these entities or actions. The terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but may also include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element beginning with "a" or "an" does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes that element.

[0088] An abstract of this disclosure is provided to allow the reader to quickly determine the nature of this technical disclosure. It is submitted under the understanding that it is not intended to interpret or limit the scope or meaning of the claims. Furthermore, as can be seen from the above detailed description, various features are combined in various embodiments for the purpose of simplification. The method of this disclosure should not be construed as reflecting an intention to have more features than expressly recited in each claim of the claimed embodiments. Rather, as reflected in the following claims, the inventive subject matter lies in fewer than all features of a single disclosed embodiment. Therefore, the following claims are hereby incorporated into the detailed description, wherein each claim is independently claimed as a separate subject matter.

Claims

1. A method for reducing stray coupling in a qubit array, comprising: The first coupler is turned on by providing a pulse of the first amplitude to the first coupler between the first and second qubits of the qubit array; By providing a compensation pulse with a second amplitude to a second coupler coupled to the bystander qubit and the second qubit based on the pulse having the first amplitude, the second coupler is turned on to reduce stray coupling between the first coupler and the bystander qubit, wherein the second amplitude is smaller than the first amplitude.

2. The method according to claim 1, wherein, Each of the first and second couplers is flux-adjustable.

3. The method according to any one of claims 1-2, wherein turning on the first coupler between the first qubit and the second qubit generates a gate between the first qubit and the second qubit.

4. The method of claim 3, wherein the reduction of stray coupling between the first coupler and the bystander qubit is operable to prevent accidental gates between the first qubit and the bystander qubit.

5. The method according to any one of claims 1-2, wherein the width of the compensation pulse is equal to the width of the pulse used to turn on the first coupler.

6. The method of claim 5, wherein the amplitude of the compensation pulse is lower than the amplitude of the pulse used to turn on the first coupler.

7. The method according to any one of claims 1-2, wherein the second coupler is turned on by the compensation pulse during the first edge of the pulse used to turn on the first coupler, when the frequency of the first qubit is equal to the frequency of the bystander qubit.

8. The method according to any one of claims 1-2, wherein the second coupler is turned off by the compensation pulse during the second edge of the pulse for turning off the first coupler, when the frequency of the first qubit is equal to the frequency of the bystander qubit.

9. The method of claim 7, wherein during the first edge of the pulse for turning on the first coupler, when the frequency of the first qubit is not equal to the frequency of the bystander qubit, the second coupler is turned off by the compensation pulse.

10. The method according to claim 8, wherein, During the second edge of the pulse used to turn off the first coupler, the second coupler is turned on by the compensation pulse when the frequency of the first qubit is equal to the frequency of the bystander qubit.

11. The method of claim 9, further comprising preventing collisions between the second qubit and the bystander qubit by turning on or keeping the second coupler on by the compensation pulse when the frequency of the second qubit is equal to the frequency of the bystander qubit.

12. The method of claim 11, wherein the amplitude of the compensation pulse is different when the frequency of the first qubit is equal to the frequency of the bystander qubit.

13. The method according to any one of claims 1-2, further comprising determining the amplitude of the compensation pulse during the setup phase by: A series of N pulses are applied to the first coupler; For each of the N pulses, scan the amplitude of the compensation pulse; as well as The amplitude of the compensation pulse is selected to provide a minimum amount of spurious coupling between the first coupler and the bystander qubit.

14. The method of claim 13, further comprising adjusting the waiting time or Z-rotation between each of the N pulses based on the highest constructive interference between two compensation pulses.

15. A computing device, comprising: processor; Storage device coupled to the processor; An engine stored in the storage device, wherein execution of the engine by the processor configures the computing device to perform actions including: The first coupler is turned on by providing a pulse of the first amplitude to the first coupler between the first and second qubits of the qubit array; By providing a compensation pulse with a second amplitude to the second coupler based on a pulse with the first amplitude, spurious coupling between the first coupler and the bystander qubit is reduced by activating the second coupler coupled to the bystander qubit and the second qubit, wherein the second amplitude is smaller than the first amplitude.

16. The computing device according to claim 15, wherein: Enabling the first coupler between the first qubit and the second qubit generates a gate between the first qubit and the second qubit; and The reduction of stray coupling between the first coupler and the bystander qubit is operable to prevent accidental gates between the first qubit and the bystander qubit.

17. The computing device according to any one of claims 15 to 16, wherein: The width of the compensation pulse is equal to the width of the pulse used to turn on the first coupler; as well as The amplitude of the compensation pulse is less than the amplitude of the pulse used to turn on the first coupler.

18. The computing device according to any one of claims 15 to 16, wherein: In a first edge device of a pulse used to turn on the first coupler, the second coupler is turned on by the compensation pulse when the frequency of the first qubit is equal to the frequency of the bystander qubit; and During the second edge of the pulse used to shut down the first coupler, the second coupler is shut down by the compensation pulse when the frequency of the first qubit is equal to the frequency of the bystander qubit.

19. The computing device according to claim 18, wherein: During the first edge of the pulse used to turn on the first coupler, when the frequency of the first qubit is not equal to the frequency of the bystander qubit, the second coupler is turned off by the compensation pulse; and During the second edge of the pulse used to turn off the first coupler, the second coupler is turned on by the compensation pulse when the frequency of the first qubit is equal to the frequency of the bystander qubit.

20. The computing device of claim 19, further configured by execution of the engine of the processor to perform an action including preventing a collision between the second qubit and the bystander qubit by turning on or keeping the second coupler on by the compensation pulse when the frequency of the second qubit is equal to the frequency of the bystander qubit.

Images