Method, apparatus, storage medium, and electronic device for processing test data

Abstract

The present disclosure provides a method for processing test data, a device for processing test data, a computer-readable storage medium, and an electronic device, belonging to the field of semiconductor technology. The method includes: obtaining test data of a chip to be tested; performing feature analysis on the feature data of the test data to determine the scenario category of the test data, so as to determine the data compression rule corresponding to the scenario category as the data compression rule of the test data; and performing compression processing on the test data according to the data compression rule. The present disclosure can improve the compression performance of test data.

Description

Background Art

[0002] Memory chips are important components of most electronic products. In order to detect the qualification rate of memory chips and ensure their normal operation after going online, semiconductor manufacturers often need to test memory chips before they leave the factory.

[0003] Among them, Failure Shading Analysis (FSA) is an important method to improve the process and product yield of memory chips. With the continuous increase in the capacity of memory chips and the complexity of the test process, this method needs to process a large amount of test data. For example, when the first-generation product is upgraded from 8 Gb to 16 Gb, the storage requirement for test data will double, and the amount of data generated along with the test process will continue to increase. Due to the increase in the amount of test data, the test efficiency of memory chips is reduced, and a large amount of cost is also consumed.

[0004] It should be noted that the information disclosed in the above background art section is only used to enhance the understanding of the background of the present disclosure, and thus may include information that does not constitute the prior art known to those of ordinary skill in the art. Summary of the Invention

[0005] The present disclosure provides a method for processing test data, an apparatus for processing test data, a computer-readable storage medium, and an electronic device, thereby at least to some extent improving the problem of low test efficiency of memory chips in the prior art.

[0006] Other features and advantages of the present disclosure will become apparent from the following detailed description, or will be learned in part through the practice of the present disclosure.

[0007] According to a first aspect of the present disclosure, there is provided a method for processing test data, the method including: obtaining test data of a chip to be tested; performing feature analysis on feature data of the test data to determine a scenario category of the test data, so as to determine a data compression rule corresponding to the scenario category as the data compression rule of the test data; and performing compression processing on the test data according to the data compression rule.

[0008] In an exemplary embodiment of the present disclosure, the feature data of the test data includes any one or more of the product yield of the wafer corresponding to the chip to be tested, the position of the chip to be tested in the wafer, the number of chip failures in the wafer, and the distance of the chip to be tested from the center of the wafer.

[0009] In an exemplary embodiment of the present disclosure, the feature analysis of the feature data of the test data to determine the scenario category of the test data, so as to determine the data compression rule of the test data corresponding to the scenario category includes: judging the screening conditions satisfied by the feature values of each feature variable according to the priority of each feature variable in the feature data of the test data, so as to divide the test data into multiple scenario categories; determining the data compression rule of the corresponding data in the test data according to the compression rule corresponding to each scenario category.

[0010] In an exemplary embodiment of the present disclosure, the feature analysis of the feature data of the test data to determine the scenario category of the test data, so as to determine the data compression rule of the test data corresponding to the scenario category includes: classifying the feature data of the test data by using a classification algorithm, dividing the test data into multiple scenario categories, so as to determine the bit compression algorithm corresponding to the scenario category as the data compression rule of the corresponding data in the test data; the compression processing of the test data according to the data compression rule includes: compressing the corresponding data in the test data by using the bit compression algorithm corresponding to the scenario category, and converting the test data into compressed data.

[0011] In an exemplary embodiment of the present disclosure, the classifying the feature data of the test data by using a classification algorithm and dividing the test data into multiple scenario categories includes: dividing the wafer into multiple position regions according to the chip region in the wafer corresponding to the chip to be tested; dividing the test data into multiple scenario categories according to the feature data and the position region where the chip to be tested is located in the wafer.

[0012] In an exemplary embodiment of the present disclosure, the position region includes a first position region and a second position region. The first position region is a circular region at a preset distance from the center of the wafer corresponding to the chip to be tested, and the second position region is an annular region in the wafer except the circular region. The dividing the test data into multiple scenario categories according to the feature data and the position region where the chip to be tested is located in the wafer includes: when the product yield of the wafer corresponding to the chip to be tested is greater than a first preset threshold and the position of the chip to be tested in the wafer is located in the first position region, determining the scenario category of the test data as the first scenario category; when the product yield of the wafer corresponding to the chip to be tested is less than a second preset threshold and the position of the chip to be tested in the wafer is located in the second position region, determining the scenario category of the test data as the second scenario category; wherein, the first preset threshold is equal to or greater than the second preset threshold.

[0013] In an exemplary embodiment of the present disclosure, when the first preset threshold is greater than the second preset threshold, the method further includes: when the product yield of the wafer corresponding to the chip under test is greater than the second preset threshold and less than the first preset threshold, and at the same time the position of the chip under test in the wafer is located in the first position area, determining that the scenario category of the test data is the third scenario category.

[0014] In an exemplary embodiment of the present disclosure, the number of chips included in the first position area is the same as that included in the second position area.

[0015] In an exemplary embodiment of the present disclosure, before performing feature analysis on the feature data of the test data, the method further includes: extracting the feature data in the test data and performing data conversion on the feature data according to a preset conversion rule, where the preset conversion rule includes any one or more of the following: mapping non-numerical feature variables in the feature data to numerical feature variables; performing normalization processing on the feature data; removing outliers in the feature data.

[0016] In an exemplary embodiment of the present disclosure, the data compression rule is determined by the following method: obtaining sample data of the chip under test; using the classification algorithm to perform classification processing on the sample data to divide the sample data into multiple scenario categories, and using different bit compression algorithms to perform compression processing on the sample data corresponding to each scenario category; in the sample data corresponding to each scenario category, calculating the compression efficiency of each bit compression algorithm, and determining the bit compression algorithm with the maximum compression efficiency as the data compression rule for the sample data corresponding to the corresponding scenario category.

[0017] In an exemplary embodiment of the present disclosure, the bit compression algorithm includes any one or more of the PackBits compression algorithm, the run-length compression algorithm, and the LZW compression algorithm, where the PackBits compression algorithm includes compression algorithms with multiple bit lengths.

[0018] In an exemplary embodiment of the present disclosure, after performing compression processing on the test data according to the data compression rule, the method further includes: performing text compression processing on the test data after compression processing using a preset text compression algorithm.

[0019] According to a second aspect of the present disclosure, there is provided a processing device for test data, the device comprising: an acquisition module for acquiring test data of a chip under test; an analysis module for performing feature analysis on the feature data of the test data to determine the scenario category of the test data, so as to determine the data compression rule of the test data as the compression rule corresponding to the scenario category; and a processing module for performing compression processing on the test data according to the data compression rule.

[0020] In an exemplary embodiment of the present disclosure, the feature data of the test data includes any one or more of the product yield of the wafer corresponding to the chip under test, the position of the chip under test in the wafer, the number of chip failures in the wafer, and the distance of the chip under test from the center of the wafer.

[0021] In an exemplary embodiment of the present disclosure, the analysis module is configured to judge the screening conditions satisfied by the feature values of each feature variable according to the priority of each feature variable in the feature data of the test data, so as to divide the test data into multiple scenario categories, and determine the data compression rule of the corresponding data in the test data according to the compression rules corresponding to each scenario category.

[0022] In an exemplary embodiment of the present disclosure, the analysis module is configured to perform classification processing on the feature data of the test data by using a classification algorithm, divide the test data into multiple scenario categories, so as to determine the bit compression algorithm corresponding to the scenario category as the data compression rule of the corresponding data in the test data; and the processing module is configured to perform compression processing on the corresponding data in the test data by using the bit compression algorithm corresponding to the scenario category, and convert the test data into compressed data.

[0023] In an exemplary embodiment of the present disclosure, the analysis module is configured to divide the wafer into multiple position regions according to the chip region in the wafer corresponding to the chip under test, and divide the test data into multiple scenario categories according to the feature data and the position region where the chip under test is located in the wafer.

[0024] In an exemplary embodiment of the present disclosure, the position area includes a first position area and a second position area. The first position area is a circular area at a preset distance from the center of the wafer corresponding to the chip under test. The second position area is an annular area in the wafer except for the circular area. The analysis module is configured to determine that the scenario category of the test data is the first scenario category when the product yield of the wafer corresponding to the chip under test is greater than a first preset threshold and the position of the chip under test in the wafer is located in the first position area, and to determine that the scenario category of the test data is the second scenario category when the product yield of the wafer corresponding to the chip under test is less than a second preset threshold and the position of the chip under test in the wafer is located in the second position area; wherein, the first preset threshold is equal to or greater than the second preset threshold.

[0025] In an exemplary embodiment of the present disclosure, when the first preset threshold is greater than the second preset threshold, the analysis module is further configured to determine that the scenario category of the test data is the third scenario category when the product yield of the wafer corresponding to the chip under test is greater than the second preset threshold and less than the first preset threshold, and at the same time the position of the chip under test in the wafer is located in the first position area.

[0026] In an exemplary embodiment of the present disclosure, the number of chips included in the first position area is the same as that included in the second position area.

[0027] In an exemplary embodiment of the present disclosure, before performing feature analysis on the feature data of the test data, the analysis module is further configured to extract the feature data from the test data and perform data conversion on the feature data according to a preset conversion rule. The preset conversion rule includes any one or more of the following: mapping non-numerical feature variables in the feature data to numerical feature variables, normalizing the feature data, and removing outliers from the feature data.

[0028] In an exemplary embodiment of the present disclosure, the analysis module determines the data compression rule by performing the following method: obtaining the sample data of the chip under test, classifying the sample data by using the classification algorithm to divide the sample data into multiple scenario categories, and performing compression processing on the sample data corresponding to each scenario category by using different bit compression algorithms. In the sample data corresponding to each scenario category, calculate the compression efficiency of each bit compression algorithm, and determine the bit compression algorithm with the maximum compression efficiency as the data compression rule for the sample data of the corresponding scenario category.

[0029] In an exemplary embodiment of the present disclosure, the bit compression algorithm includes any one or more of the PackBits compression algorithm, the run-length compression algorithm, and the LZW compression algorithm, wherein the PackBits compression algorithm includes compression algorithms with multiple bit lengths.

[0030] In an exemplary embodiment of the present disclosure, after compressing the test data according to the data compression rule, the processing module is further configured to perform text compression processing on the compressed test data by using a preset text compression algorithm.

[0031] According to a third aspect of the present disclosure, there is provided a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, it implements any one of the above-mentioned test data processing methods.

[0032] According to a fourth aspect of the present disclosure, there is provided an electronic device, including: a processor; and a memory for storing executable instructions of the processor; wherein the processor is configured to execute any one of the above-mentioned test data processing methods by executing the executable instructions.

[0033] In summary, according to the test data processing method, the test data processing device, the computer-readable storage medium, and the electronic device in this exemplary embodiment, the characteristic data of the test data of the chip to be tested can be analyzed for characteristics, the scenario category of the test data can be determined, the compression rule corresponding to the scenario category can be determined as the data compression rule of the test data, and then the test data can be compressed according to the data compression rule. This solution can determine the scenario category of the test data by analyzing the characteristic data of the test data, so as to determine the compression rule corresponding to the scenario category as the data compression rule of the test data. It can achieve the rapid adaptation of the compression rule to the test data through the classification processing of the characteristic data, quickly determine the best compression method for the test data, make the compression performance of the test data reach the best, thereby saving the storage space of the test data and reducing the production cost.

[0034] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The accompanying drawings herein are incorporated into the specification and form a part of the specification, showing embodiments consistent with the present disclosure, and are used together with the specification to explain the principles of the present disclosure. Obviously, the accompanying drawings in the following description are only some embodiments of the present disclosure, and those of ordinary skill in the art can obtain other drawings without creative efforts based on these drawings.

[0036] Figure 1 A flowchart showing a method for processing test data in this exemplary embodiment;

[0037] Figure 2 A sub - flowchart showing a method for processing test data in this exemplary embodiment;

[0038] Figure 3 A sub - flowchart showing another method for processing test data in this exemplary embodiment;

[0039] Figure 4A and Figure 4B A schematic diagram showing a location area in this exemplary embodiment;

[0040] Figure 5 A block diagram showing the structure of a test data processing device in this exemplary embodiment;

[0041] Figure 6 A computer - readable storage medium for implementing the above - mentioned method in this exemplary embodiment;

[0042] Figure 7 An electronic device for implementing the above - mentioned method in this exemplary embodiment. Detailed implementation manners

[0043] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in various forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be more complete and comprehensive, and will fully convey the concept of the example embodiments to those skilled in the art. The features, structures, or characteristics described may be combined in any suitable manner in one or more embodiments.

[0044] The exemplary embodiment of the present disclosure first provides a method for processing test data. This method can perform feature analysis on the feature data of the acquired test data, determine the scenario category of the test data, determine the data compression rule corresponding to the scenario category as the data compression rule for the test data, and then perform compression processing on the test data according to this data compression rule. Through this method, the adaptability between the test data and the data compression rule can be improved, and better compression performance can be provided for the compression of test data, such as achieving a higher compression efficiency and compression ratio, etc.

[0045] Figure 1 A process of this exemplary embodiment is shown, which may include the following steps S110 - S130:

[0046] Step S110. Obtain the test data of the chip to be tested.

[0047] The chip under test can be any one or more types of memory chips, which can include any one or more of volatile memory chips and non-volatile memory chips. Among them, the volatile memory chips can be DRAM (Dynamic Random Access Memory), SRAM (Static Random-Access Memory), etc., and the non-volatile memory chips can be optical discs, ROM (Read-Only Memory), floppy disks, etc.; the test data refers to the data used and generated in the design, production, and testing of the chip under test, which can include the relevant information generated during the manufacturing process of the chip under test, such as a large amount of intermediate process data, part graphic data, process graphic data, etc.

[0048] During the production process of the chip under test, a variety of machine devices and multiple manufacturing processes are usually required. For this reason, in order to ensure the production quality of the chip under test, a large amount of test data will be generated during the production process, and the accumulation of this test data will occupy a very large storage space. Therefore, after the test data is generated, it often needs to be compressed. In order to determine the best compression method for these test data, the test data can be obtained first. For example, the process data of each machine device can be automatically obtained according to the time unit of compressing the test data, such as every day, every 12 hours, etc., so as to obtain the test data of the chip under test.

[0049] Step S120. Perform feature analysis on the feature data of the test data to determine the scenario category of the test data, so as to determine the data compression rule of the test data as the compression rule corresponding to this scenario category.

[0050] Among them, the feature data of the test data refers to the attribute data of the chip under test, which can be used to represent the data characteristics of the chip under test. From the perspective of data composition, the feature data can include the attribute data of many dimensions associated with the chip under test. For example, it can include any one or more of the product yield of the wafer corresponding to the chip under test, the position of the chip under test in the wafer and the number of chip failures in the wafer, and the distance of the chip under test from the center of the wafer. The scenario category of the test data refers to the classification category corresponding to the test data determined according to the data attributes of the test data, and this classification category can be used to indicate the compression rule corresponding to the test data. The compression rule represents the compression strategy of the test data, which can include the data compression ratio, compression algorithm, compression order, etc. of the test data. For example, for a set of test data, its corresponding compression rule can include the data ratio of each scenario category in this set of test data and the compression algorithm corresponding to the data of each scenario category.

[0051] After obtaining the test data of the chip to be tested, the characteristic data in the test data can be extracted, such as the product yield of the wafer corresponding to the chip to be tested in the test data, the position of the chip to be tested in the wafer, and the number of chip failures in the wafer, etc., and the characteristic analysis is performed on the characteristic data to determine the scenario category of the test data. The test data of the same scenario category has similar data characteristics, so the same compression rule can be adopted. For example, when it is determined that the scenario category of the test data is category a, the compression rule corresponding to category a of the scenario category can be determined as the data compression rule of the test data; when it is determined that the scenario category of the test data includes category a, category b, and category c, the compression rule corresponding to each scenario category can be determined respectively, so as to determine the data compression rule of the data with different scenario categories in the test data as the data compression rule of the test data corresponding to the scenario category. In this way, before compressing the test data, the data characteristics of the test data can be analyzed, the scenario category of the test data can be divided, and the best compression rule applicable to the test data can be determined.

[0052] When extracting the characteristic data in the test data, since there may be problems with non-standard data in the characteristic data, therefore, in order to improve the analysis accuracy of the test data, in an optional implementation manner, before performing the characteristic analysis on the characteristic data of the test data, the characteristic data in the test data can also be extracted, and the data is converted according to a preset conversion rule. Among them, the preset conversion rule can include any one or more of the following: mapping non-numerical characteristic variables in the characteristic data to numerical characteristic variables, normalizing the characteristic data, and removing outliers in the characteristic data.

[0053] In the characteristic data of the test data, the characteristic variable refers to the variable in the characteristic data of the test data, which can include the product yield variable of the wafer corresponding to the chip to be tested, the position variable of the chip to be tested in the wafer, the number of chip failures in the wafer, and the distance variable between the chip to be tested and the center of the wafer. For non-numerical variables in the characteristic data, such as the position variable of the chip to be tested in the wafer, it can be mapped to a numerical variable according to the distance range between the chip to be tested and the center of the circle. For characteristic variables with a large numerical range, they can be normalized to be within the interval [0, 1]. The outlier can be a value in the characteristic data that is much larger or much smaller than the normal range. Through statistics and judgment, the outliers in the characteristic data can be deleted. Through this method, the preprocessing of the characteristic data can be completed, and the accuracy of subsequent characteristic data analysis can be improved.

[0054] After completing the conversion of the characteristic data, next, the scenario category of the test data can be analyzed, and then the data compression rule of the test data can be determined. Specifically, in an optional implementation manner, step S120 can be implemented by the following method:

[0055] According to the priorities of each feature variable in the feature data of the test data, determine the screening conditions satisfied by the feature values of each feature variable, so as to divide the test data into multiple scenario categories;

[0056] Determine the data compression rules for the corresponding data in the test data according to the compression rules corresponding to each scenario category.

[0057] As mentioned above, a feature variable refers to a variable in the feature data of the test data, which may include the product yield variable of the wafer corresponding to the chip under test, the position variable of the chip under test in the wafer, the number of chip failures in the wafer, and the distance variable of the chip under test from the center of the wafer. The feature value refers to the value of each feature variable in the test data. For example, for the position variable of the chip under test in the wafer, its feature value can be coordinate data represented by horizontal and vertical coordinates, such as the center position (0, 0) of the wafer. The priority of the feature variable can be the predefined judgment order of the feature variables, which can be customized by the operator according to requirements. For example, the product yield variable of the wafer corresponding to the chip under test and the position variable of the chip under test in the wafer can be set as the first priority and the second priority respectively.

[0058] Specifically, when determining the data compression rules of the test data, it is possible to first judge whether each feature variable meets the corresponding screening conditions according to the priorities of each feature variable in the feature data of the test data. For example, assuming that the product yield variable of the wafer corresponding to the chip under test is the first priority, it is possible to first judge whether the product yield is greater than a preset yield condition, such as greater than 80%. When it is determined that the product yield is greater than 80%, further judge whether the position variable of the chip under test in the wafer, which is in the second priority, meets the position condition, such as whether it is located in the central area within a certain range from the center of the wafer. Until all feature variables are judged, divide the test data into multiple scenario categories according to the judgment results of the screening conditions corresponding to each feature variable, and then determine the data compression rules for the corresponding data in the test data according to the compression rules corresponding to each scenario category. For example, for the test data corresponding to scenario category a, the compression rules corresponding to scenario category a can be determined as the data compression rules for this type of test data.

[0059] Through the above method, the scenario categories of the test data can be divided by means of sequential judgment, and the data compression rules of the test data can be determined. The implementation process of this method is simple, highly interpretable, and the operator can freely define the priorities of the feature variables and the screening conditions corresponding to the feature variables, with strong flexibility.

[0060] When the data volume of the test data is large, in order to improve the analysis efficiency of the test data, in an alternative implementation manner, step S120 can also be implemented by the following method:

[0061] The classification algorithm is used to classify the feature data of the test data, and the test data is divided into multiple scenario categories, so as to determine the bit compression algorithm corresponding to the scenario category as the data compression rule of the corresponding data in the test data.

[0062] In this exemplary embodiment, the bit compression algorithm refers to a compression algorithm for performing bit compression on the test data, and may include any one or more of the PackBits compression algorithm, the run-length compression algorithm, and the LZW compression algorithm. In particular, the PackBits compression algorithm includes compression algorithms with various bit lengths, such as a 4-bit compression algorithm, a 12-bit compression algorithm, etc. Among them, the PackBits compression algorithm is also called the tight bit compression algorithm, which is a compression method used in the TIFF specification. It mainly performs compression processing according to the value of the header data of each segment of data; the LZW compression algorithm is a method of encoding each first-occurring string with a numerical value to achieve the purpose of compression; the run-length compression algorithm is a method of encoding according to the continuous repeated characters of the string. For example, for the string "aaaaaaabbccccdefff", the compressed result is "a7b2c4d1e1f3".

[0063] When using the classification algorithm to classify the feature data of the test data, any classification algorithm can be used, such as a decision tree classification algorithm, an SVM (Support Vector Machine) classification algorithm, a random forest classification algorithm, etc. The test data is divided into multiple scenario categories according to the feature attributes through the classification algorithm, so as to determine the bit compression algorithm corresponding to each scenario category as the data compression rule of the corresponding scenario category in the test data. In the case of a large amount of data, this method can improve the analysis efficiency of the test data, and according to the characteristics of various classification algorithms, the operator can select a suitable classification algorithm to make the analysis of the test data achieve better analysis performance.

[0064] In the above method, the data compression rule corresponding to each scenario category can be determined in advance through the analysis of the sample data. Specifically, in an optional embodiment, as shown in Figure 2 the data compression rule can be determined by the following method:

[0065] Step S210, obtain the sample data of the chip to be tested.

[0066] In this exemplary embodiment, the sample data of the chip to be tested can be the data generated and used during the production of the chip to be tested, and it can have the same data content as the test data of the chip to be tested. For example, the sample data can directly select the test data of the chips to be tested in a certain month, or can be obtained by selecting the test data of the chips to be tested in multiple months and then sampling the test data.

[0067] Step S220: Classify the sample data using a classification algorithm to divide the sample data into multiple scenario categories, and use different bit compression algorithms to compress the sample data corresponding to each scenario category.

[0068] Among them, the bit compression algorithm can also include any one or more of the above-mentioned PackBits compression algorithm, run-length compression algorithm, and LZW compression algorithm. The classification algorithm for classifying the sample data can be the same as the classification algorithm for classifying the test data.

[0069] Step S230: Calculate the compression efficiency of each bit compression algorithm in the sample data corresponding to each scenario category, and determine the bit compression algorithm with the maximum compression efficiency as the data compression rule for the sample data corresponding to the corresponding scenario category.

[0070] Using a classification algorithm to classify the sample data, dividing the scenario categories of the sample data, and then using multiple bit compression algorithms to compress the sample data of each scenario category can determine which bit compression algorithm can obtain higher compression efficiency for the sample data corresponding to each scenario category, so as to determine the bit compression algorithm corresponding to each scenario category, that is, obtain the data compression rule corresponding to each scenario category.

[0071] Through the above method, the adaptability between the scenario category and the bit compression algorithm can be determined in advance, and the data compression rule can be obtained. Thus, after determining the scenario category of the test data during online operation, the data compression rule applicable to the test data can be quickly determined, improving the data compression efficiency of the test data.

[0072] Furthermore, in order to improve the analysis accuracy of the test data, in an optional embodiment, when using a classification algorithm to classify the characteristic data of the test data, as Figure 3 shown, the following method can also be executed:

[0073] Step S310: Divide the wafer into multiple position regions according to the chip regions in the wafer corresponding to the chips to be tested.

[0074] Each wafer can produce multiple chips. According to the shape of the wafer, the area where multiple chips in the wafer are located can be divided into a position area, so as to divide multiple position areas in the wafer. For example, when the wafer is circular, the chip area of the wafer can be divided into a circular area and multiple annular areas, or can be divided into multiple position areas such as a rectangular area, an annular area and an irregular area. Specifically, as shown in FIG. 4, the position areas in the wafer can include, for example Figure 4A the circular area and annular area 1 and annular area 2 shown, or can include, for example Figure 4B the rectangular area, annular area 1 and irregular area 2 shown. That is to say, according to the shape of the chip to be tested and the wafer it is located in, the wafer can be divided into multiple position areas of different shapes and sizes. It should be noted that the above division method is only for illustrative purposes and should not constitute a limitation on the scope of this exemplary embodiment.

[0075] Step S320: Divide the test data into multiple scenario categories according to the feature data and the position area where the chip to be tested is located in the wafer.

[0076] Combining the feature data of the test data and the position area where the chip to be tested is located in the wafer, the test data can be divided into multiple scenario categories. For example, it can first be determined which position area the chip to be tested is in the wafer, and the conditions satisfied by the feature data of the chip to be tested are determined according to the screening conditions corresponding to each position area, so as to divide the test data into multiple scenario categories.

[0077] Due to the special structure of the wafer, the closer the chip is to the center of the wafer, the better its quality. Therefore, by determining the position area where the chip to be tested is located and combining the feature data of the chip to be tested, the chip to be tested can be effectively distinguished and the test data can be divided, so that the accuracy of dividing the test data can be improved in combination with industrial practice.

[0078] Specifically, in an optional implementation manner, the above position area may include a first position area and a second position area, where the first position area may be a circular area at a preset distance from the wafer of the wafer corresponding to the chip to be tested, and the second position area may be an annular area in the wafer except the above circular area. For example, in the wafer as shown in Figure 4A the first position area may be a circular area at a distance x (0 < x < wafer radius) from the center of the wafer, and the second position area may be the annular area in the wafer area except the first position area, that is, the area formed by annular area 1 and annular area 2.

[0079] Therefore, step S320 can also be implemented by the following method:

[0080] When the product yield of the wafer corresponding to the chip to be tested is greater than the first preset threshold and the position of the chip to be tested in the wafer is within the first position area, determine that the scenario category of the test data is the first scenario category.

[0081] When the product yield of the wafer corresponding to the chip to be tested is less than the second preset threshold and the position of the chip to be tested in the wafer is within the second position area, determine that the scenario category of the test data is the second scenario category.

[0082] Among them, the first preset threshold is equal to or greater than the second preset threshold. When the product yield of the wafer corresponding to the chip to be tested is greater than the first preset threshold and the position of the chip to be tested in the wafer is within the first position area, it indicates that the overall quality of the chip to be tested is relatively good. At this time, the scenario category of its test data can be determined as the first scenario category; correspondingly, when the product yield of the wafer corresponding to the chip to be tested is less than the second preset threshold and the position of the chip to be tested in the wafer is within the second position area, it indicates that the overall quality of the chip to be tested may not be high. At this time, the scenario category of the test data can be determined as the second scenario category.

[0083] Furthermore, in order to further divide the test data and improve the division fineness of the test data, in an optional implementation manner, when the first preset threshold is greater than the second preset threshold, the following method can also be executed:

[0084] When the product yield of the wafer corresponding to the chip to be tested is greater than the second preset threshold and less than the first preset threshold, and at the same time the position of the chip to be tested in the wafer is within the first position area, it can be determined that the scenario category of the test data is the third scenario category. According to the product yield of the wafer corresponding to the chip to be tested, the test data of the chips to be tested within the first position area can be further divided, that is, it is divided into the first scenario category and the third scenario category.

[0085] Through the above method, the test data can be divided into three scenario categories according to the product yield of the wafer to which the chip to be tested belongs and the position of the chip to be tested in the wafer, and the test data of each scenario category presents similar characteristics.

[0086] In an optional implementation manner, the number of chips included in the first position area and the second position area can be the same. In this case, the data volume of the test data generated by the chips corresponding to each position area is also similar. When performing data compression subsequently, the compression performance of the test data of the chips in each position area can be better compared, so as to further adjust the compression rules corresponding to each scenario category.

[0087] Step S130. Compress the test data according to the above data compression rules.

[0088] By compressing the test data according to the above data compression rules, the adaptability between the data compression rules and the test data can be fully utilized to improve the compression performance of the test data.

[0089] Specifically, in an optional implementation, a bit compression algorithm corresponding to the scenario category can be used to compress the corresponding data in the test data to convert the test data into compressed data. For example, for test data with scenario categories including two categories a and b, the bit compression algorithm corresponding to scenario category a can be used to compress the data with scenario category a in the test data, and the bit compression algorithm corresponding to scenario category b can be used to compress the data with scenario category b in the test data. After the compression process is completed, the compressed data of the two scenario categories are integrated to obtain the compressed data of the entire test data.

[0090] Through the above method, it can be ensured that the test data corresponding to each scenario category can be compressed using the most applicable bit compression algorithm, making the compression performance of the entire test data reach the best.

[0091] Furthermore, in an optional implementation, after compressing the test data according to the above data compression rules, a preset text compression algorithm can be used to perform text compression on the compressed test data. For example, the Huffman compression algorithm or the arithmetic compression algorithm can be used to compress the compressed test data to further compress it into data with a smaller data volume.

[0092] Through the above method, the test data can be further compressed into compressed data with a smaller data volume, thereby saving the storage space of the test data.

[0093] In summary, according to the processing method of the test data in this exemplary embodiment, the characteristic data of the test data of the chip to be tested can be analyzed for characteristics, the scenario category of the test data can be determined, the compression rule corresponding to the scenario category can be determined as the data compression rule of the test data, and then the test data can be compressed according to this data compression rule. This solution analyzes the characteristic data of the test data to determine the scenario category of the test data, thereby determining the compression rule corresponding to the scenario category as the data compression rule of the test data. It can achieve the rapid adaptation of the compression rule and the test data through the classification processing of the characteristic data, can quickly determine the best compression method of the test data, make the compression performance of the test data reach the best, thereby saving the storage space of the test data and reducing the production cost.

[0094] This exemplary embodiment also provides a processing device for test data. Refer to Figure 5As shown, the processing device 500 for test data may include: an acquisition module 510, which may be used to acquire test data of a chip to be tested; an analysis module 520, which may be used to perform feature analysis on the feature data of the test data to determine the scenario category of the test data, so as to determine the data compression rule of the test data as the compression rule corresponding to the scenario category; and a processing module 530, which may be used to perform compression processing on the test data according to the data compression rule.

[0095] In an exemplary embodiment of the present disclosure, the feature data of the test data includes any one or more of the product yield of the wafer corresponding to the chip to be tested, the position of the chip to be tested in the wafer, the number of chip failures in the wafer, and the distance of the chip to be tested from the center of the wafer.

[0096] In an exemplary embodiment of the present disclosure, the analysis module 520 may be used to judge the screening conditions satisfied by the feature values of each feature variable according to the priority of each feature variable in the feature data of the test data, so as to divide the test data into multiple scenario categories, and determine the data compression rule of the corresponding data in the test data according to the compression rule corresponding to each scenario category.

[0097] In an exemplary embodiment of the present disclosure, the analysis module 520 may be used to perform classification processing on the feature data of the test data by using a classification algorithm, divide the test data into multiple scenario categories, so as to determine the bit compression algorithm corresponding to the scenario category as the data compression rule of the corresponding data in the test data; the processing module 530 may be used to perform compression processing on the corresponding data in the test data by using the bit compression algorithm corresponding to the scenario category, and convert the test data into compressed data.

[0098] In an exemplary embodiment of the present disclosure, the analysis module 520 may be used to divide the wafer into multiple position regions according to the chip regions in the wafer corresponding to the chips to be tested, and divide the test data into multiple scenario categories according to the feature data and the position region where the chip to be tested is located in the wafer.

[0099] In an exemplary embodiment of the present disclosure, the position region includes a first position region and a second position region. The first position region is a circular region at a preset distance from the center of the wafer corresponding to the chip to be tested, and the second position region is an annular region in the wafer except for the circular region. The analysis module 520 may be used to determine that the scenario category of the test data is the first scenario category when the product yield of the position region where the chip to be tested is located is greater than a first preset threshold and the position of the chip to be tested in the wafer is located in the first position region, and determine that the scenario category of the test data is the second scenario category when the product yield of the position region where the chip to be tested is located is less than a second preset threshold and the position of the chip to be tested in the wafer is located in the second position region; wherein, the first preset threshold is equal to or greater than the second preset threshold.

[0100] In an exemplary embodiment of the present disclosure, when the first preset threshold is greater than the second preset threshold, the analysis module 520 can also be used to determine that the scenario category of the test data is the third scenario category when the product yield of the location area where the chip to be tested is located is greater than the second preset threshold and less than the first preset threshold, and at the same time, the location of the chip to be tested in the wafer is in the first location area.

[0101] In an exemplary embodiment of the present disclosure, the number of chips included in the first location area is the same as that in the second location area.

[0102] In an exemplary embodiment of the present disclosure, before performing feature analysis on the feature data of the test data, the analysis module 520 can also be used to extract the feature data in the test data and perform data conversion on the feature data according to a preset conversion rule. The preset conversion rule includes any one or more of the following: mapping non-numerical feature variables in the feature data to numerical feature variables, normalizing the feature data, and removing outliers in the feature data.

[0103] In an exemplary embodiment of the present disclosure, the analysis module 520 can determine the data compression rule by performing the following method: obtaining sample data of the chip to be tested, classifying the sample data using a classification algorithm to divide the sample data into multiple scenario categories, and performing compression processing on the sample data corresponding to each scenario category using different bit compression algorithms. In the sample data corresponding to each scenario category, calculate the compression efficiency of each bit compression algorithm, and determine the bit compression algorithm with the maximum compression efficiency as the data compression rule for the sample data corresponding to the corresponding scenario category.

[0104] In an exemplary embodiment of the present disclosure, the bit compression algorithm includes any one or more of the PackBits compression algorithm, the run-length compression algorithm, and the LZW compression algorithm. Among them, the PackBits compression algorithm includes compression algorithms with multiple bit lengths.

[0105] In an exemplary embodiment of the present disclosure, after performing compression processing on the test data according to the data compression rule, the processing module 530 can also be used to perform text compression processing on the compressed test data using a preset text compression algorithm.

[0106] The specific details of each module in the above device have been described in detail in the method part of the embodiment. The details of the undisclosed solutions can be seen in the embodiment content of the method part, so they will not be repeated here.

[0107] Those skilled in the art to which the present disclosure pertains will appreciate that various aspects of the present disclosure can be implemented as a system, a method, or a program product. Accordingly, various aspects of the present disclosure can be embodied in the following forms, namely: a complete hardware implementation, a complete software implementation (including firmware, microcode, etc.), or an implementation combining hardware and software aspects, which can be collectively referred to herein as "circuitry", "module", or "system".

[0108] Exemplary embodiments of the present disclosure also provide a computer-readable storage medium having stored thereon a program product capable of implementing the methods described above in this specification. In some possible embodiments, various aspects of the present disclosure can also be implemented in the form of a program product, which includes program code that, when the program product runs on a terminal device, causes the terminal device to execute the steps according to various exemplary embodiments of the present disclosure described in the "Exemplary Methods" section above in this specification.

[0109] Referring Figure 6 As shown, a program product 600 for implementing the above method according to an exemplary embodiment of the present disclosure is described, which can be a portable compact disc read-only memory (CD-ROM) and includes program code, and can run on a terminal device, such as a personal computer. However, the program product of the present disclosure is not limited thereto. In this document, a readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0110] The program product 600 can adopt any combination of one or more readable media. The readable media can be a readable signal medium or a readable storage medium. A readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the above. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0111] A computer-readable signal medium can include a data signal propagated in a baseband or as part of a carrier wave, which carries the readable program code. Such a propagated data signal can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. The readable signal medium can also be any readable medium other than the readable storage medium, which can send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, apparatus, or device.

[0112] The program code embodied on the readable medium can be transmitted using any appropriate medium, including but not limited to wireless, wired, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

[0113] The program code for performing the operations of the present disclosure can be written in any combination of one or more programming languages, including object-oriented programming languages such as Java, C++, etc., and also including conventional procedural programming languages such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computing device, partially on the user's device, executed as a stand-alone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In the case of a remote computing device, the remote computing device can be connected to the user's computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computing device (e.g., by connecting through the Internet using an Internet service provider).

[0114] Exemplary embodiments of the present disclosure also provide an electronic device capable of implementing the above method. The following refers to Figure 7 to describe the electronic device 700 according to such an exemplary embodiment of the present disclosure. Figure 7 The electronic device 700 shown is merely an example and should not impose any limitation on the functions and scope of use of the embodiments of the present disclosure.

[0115] As Figure 7 shown, the electronic device 700 can be presented in the form of a general-purpose computing device. The components of the electronic device 700 may include but are not limited to: at least one of the above-mentioned processing units 710, at least one of the above-mentioned storage units 720, a bus 730 connecting different system components (including the storage unit 720 and the processing unit 710), and a display unit 740.

[0116] Among them, the storage unit 720 stores program code, and the program code can be executed by the processing unit 710, so that the processing unit 710 executes the steps according to various exemplary embodiments of the present disclosure described in the above "Exemplary Method" section of this specification. For example, the processing unit 710 can execute Figures 1 to 3 the method steps shown, etc.

[0117] The storage unit 720 may include a readable medium in the form of a volatile storage unit, such as a random access storage unit (RAM) 721 and / or a cache storage unit 722, and may further include a read-only storage unit (ROM) 723.

[0118] The storage unit 720 may also include a program / utilities 724 having a set (at least one) of program modules 725, such program modules 725 including but not limited to: an operating system, one or more application programs, other program modules, and program data, each of these examples or some combination thereof may include an implementation of a network environment.

[0119] The bus 730 may represent one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processing unit, or a local bus using any of a variety of bus structures.

[0120] The electronic device 700 may also communicate with one or more external devices 800 (such as a keyboard, a pointing device, a Bluetooth device, etc.), may also communicate with one or more devices that enable a user to interact with the electronic device 700, and / or may communicate with any device that enables the electronic device 700 to communicate with one or more other computing devices (such as a router, a modem, etc.). Such communication may be through the input / output (I / O) interface 750. Also, the electronic device 700 may communicate with one or more networks (such as a local area network (LAN), a wide area network (WAN), and / or a public network, such as the Internet) through the network adapter 760. As shown in the figure, the network adapter 760 communicates with other modules of the electronic device 700 through the bus 730. It should be understood that although not shown in the figure, other hardware and / or software modules may be used in conjunction with the electronic device 700, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, etc.

[0121] It should be noted that although several modules or units of the device for action execution are mentioned in the above detailed description, such a division is not mandatory. In fact, according to the exemplary embodiments of the present disclosure, the features and functions of two or more of the above-described modules or units may be embodied in one module or unit. Conversely, the features and functions of one module or unit described above may be further divided and embodied by multiple modules or units.

[0122] In addition, the above drawings are only schematic illustrations of the processes included in the method according to the exemplary embodiments of the present disclosure, rather than for limiting purposes. It is easy to understand that the processes shown in the above drawings do not indicate or limit the time sequence of these processes. Additionally, it is also easy to understand that these processes may be executed, for example, synchronously or asynchronously in multiple modules.

[0123] Those skilled in the art can easily understand from the description of the above embodiments that the exemplary embodiments described herein can be implemented by software or by a combination of software and necessary hardware. Therefore, the technical solutions according to the exemplary embodiments of the present disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, a USB flash drive, a mobile hard disk, etc.) or on a network, and includes several instructions to enable a computing device (such as a personal computer, a server, a terminal device, or a network device, etc.) to execute the method according to the exemplary embodiments of the present disclosure.

[0124] After considering the specification and practicing the invention disclosed herein, those skilled in the art will readily conceive of other embodiments of the present disclosure. This application is intended to cover any variations, uses, or adaptations of the present disclosure, which follow the general principles of the present disclosure and include known common knowledge or conventional technical means in the technical field not disclosed in the present disclosure. The specification and embodiments are only to be regarded as exemplary, and the true scope and spirit of the present disclosure are pointed out by the claims.

Claims

1. A method for processing test data, characterized in that The method includes: Obtaining test data of a chip to be tested; Performing feature analysis on the feature data of the test data to determine the scenario category of the test data, so as to determine the data compression rule corresponding to the scenario category as the data compression rule of the test data; Performing compression processing on the test data according to the data compression rule; Among them, performing feature analysis on the feature data of the test data to determine the scenario category of the test data, so as to determine the data compression rule corresponding to the scenario category as the data compression rule of the test data, includes: Using a classification algorithm to classify the feature data of the test data, dividing the test data into multiple scenario categories, so as to determine the bit compression algorithm corresponding to the scenario category as the data compression rule of the corresponding data in the test data; The performing compression processing on the test data according to the data compression rule includes: Using the bit compression algorithm corresponding to the scenario category to perform compression processing on the corresponding data in the test data, and converting the test data into compressed data; Among them, using a classification algorithm to classify the feature data of the test data, and dividing the test data into multiple scenario categories, includes: Dividing the wafer according to the chip area in the wafer corresponding to the chip to be tested, where the wafer is divided into multiple position areas, where the position areas include a first position area and a second position area, the first position area is a circular area at a preset distance from the center of the wafer corresponding to the chip to be tested, and the second position area is an annular area in the wafer except for the circular area; Dividing the test data into multiple scenario categories according to the feature data and the position area where the chip to be tested is located in the wafer; Among them, dividing the test data into multiple scenario categories according to the feature data and the position area where the chip to be tested is located in the wafer, includes: When the product yield of the wafer corresponding to the chip to be tested is greater than a first preset threshold and the position of the chip to be tested in the wafer is located in the first position area, determining the scenario category of the test data as the first scenario category; When the product yield of the wafer corresponding to the chip to be tested is less than a second preset threshold and the position of the chip to be tested in the wafer is located in the second position area, determining the scenario category of the test data as the second scenario category; Among them, the first preset threshold is equal to or greater than the second preset threshold.

2. The method according to claim 1, wherein The feature data of the test data includes any one or more of the product yield of the wafer corresponding to the chip to be tested, the position of the chip to be tested in the wafer, the number of chip failures in the wafer, and the distance of the chip to be tested from the center of the wafer.

3. The method according to claim 1, characterized in that, When the first preset threshold is greater than the second preset threshold, the method further includes: When the product yield of the wafer corresponding to the chip to be tested is greater than the second preset threshold and less than the first preset threshold, and at the same time the position of the chip to be tested in the wafer is located in the first position area, determining the scenario category of the test data as the third scenario category.

4. The method according to claim 1, wherein The number of chips included in the first position area and the second position area is the same.

5. The method according to claim 1, wherein Before performing feature analysis on the feature data of the test data, the method further includes: extracting the feature data in the test data and performing data conversion on the feature data according to a preset conversion rule, where the preset conversion rule includes any one or more of the following: mapping non-numerical feature variables in the feature data to numerical feature variables; performing normalization processing on the feature data; removing outliers from the feature data.

6. The method according to claim 1, characterized in that, The data compression rule is determined by the following method: obtaining sample data of the chip to be tested; performing classification processing on the sample data by using the classification algorithm to divide the sample data into multiple scenario categories, and performing compression processing on the sample data corresponding to each scenario category by using different bit compression algorithms; calculating the compression efficiency of each bit compression algorithm in the sample data corresponding to each scenario category, and determining the bit compression algorithm with the maximum compression efficiency as the data compression rule for the sample data of the corresponding scenario category.

7. The method according to claim 6, wherein The bit compression algorithm includes any one or more of the PackBits compression algorithm, the run-length compression algorithm, and the LZW compression algorithm, where the PackBits compression algorithm includes compression algorithms with multiple bit lengths.

8. The method according to claim 1, wherein After performing compression processing on the test data according to the data compression rule, the method further includes: performing text compression processing on the test data after compression processing by using a preset text compression algorithm.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method according to any one of claims 1-8.

10. An electronic device, characterized in that, including: a processor; and a memory for storing executable instructions of the processor; wherein the processor is configured to execute the method according to any one of claims 1-8 by executing the executable instructions.

Images