Drive backplane, preparation method thereof, and display device

Abstract

A driving backplane (90) includes a substrate (311), a plurality of pad groups (91), and a plurality of line groups (92). One line (921, 922) in each line group (92) is connected to one pad (911, 912) in one pad group (91). The pattern of at least one pad (911, 912) in the pad group (91) and the line group (92) connected thereto defines a line hollow area (92a). The line hollow area (92a) includes a first line hollow area (92a1) and a second line hollow area (92a2) respectively disposed on both sides of the pad (911, 912) along the second direction (X). It further includes a first surface (311a) of the substrate (311) and a plurality of line group reflective layers (314). Each window area (61) on the reflective layer (314) includes a first area (611), a second area (612), and a third area (613) arranged along the second direction (X). The second area (612) exposes one pad group (91) and the pad interval area (91a) corresponding to the pad group (91). The first area (611) and the third area (613) expose the first surface (311a) of the substrate (311).

Description

Technical Field

[0001] The present disclosure relates to the field of display technologies, and particularly to a driving backplane, a preparation method thereof, and a display device. Background Art

[0002] LED (Light Emitting Diode) has the advantages of small size, high brightness, low power consumption, less heat generation, long service life, environmental protection, etc., and plays an indispensable role as a backlight source in electronic products such as mobile phones, TVs, and computers that require backlight display. Taking Mini-LED (miniature LED) as an example, Mini-LED display devices have many advantages such as ultra-thin, high brightness, energy saving, and high color gamut, and have become a hot spot in current market development. Summary of the Invention

[0003] On the one hand, a driving backplane is provided. The driving backplane includes a substrate, a plurality of pad groups, a plurality of line groups, and a reflective layer. The plurality of pad groups are arranged in an array on the first surface of the substrate. Each pad group includes two pads spaced apart along a first direction. There is a pad spacing area between the two pads. The plurality of line groups are disposed on the first surface of the substrate. Each line group includes two lines. One line in each line group is connected to one pad in one pad group. Wherein, at least one pad in the pad group and the pattern of the line group connected thereto define a line hollow-out area. The line hollow-out area includes a first line hollow-out area and a second line hollow-out area. The first line hollow-out area and the second line hollow-out area are respectively disposed on both sides of the pad along a second direction. The size of the first line hollow-out area and the second line hollow-out area in the first direction is greater than the size of the pad spacing area corresponding to the pad group in the first direction. The second direction is perpendicular to the first direction, and the second direction and the first direction are parallel to the first surface of the substrate.

[0004] The reflective layer covers the first surface of the substrate and the plurality of line groups. A plurality of window areas are provided on the reflective layer. Each window area includes a first area, a second area, and a third area arranged along the second direction. The second area exposes one pad group and the pad spacing area corresponding to the pad group. The first area and the third area expose the first surface of the substrate. The projection of the first line hollow-out area on the substrate is farther from the boundary of the pad group than the projection of the first area on the substrate is from the boundary of the pad group away from the pad group. The projection of the second line hollow-out area on the substrate is farther from the boundary of the pad group than the projection of the third area on the substrate is from the boundary of the pad group away from the pad group.

[0005] In some embodiments, the line hollow-out area is defined by two pads in the pad group and the line group connected thereto, and the first line hollow-out area and the second line hollow-out area are respectively disposed on two sides of the pad group along the second direction.

[0006] In some embodiments, the distance between the projection of the first line hollow-out area on the substrate away from the boundary of the pad group and the projection of the first region on the substrate away from the boundary of the pad group in the second direction is greater than 1.2 times the distance between the surface of the reflective layer away from the substrate and the first surface of the substrate in the third direction. The distance between the projection of the second line hollow-out area on the substrate away from the boundary of the pad group and the projection of the third region on the substrate away from the boundary of the pad group in the second direction is greater than 1.2 times the distance between the surface of the reflective layer away from the substrate and the first surface of the substrate in the third direction. The third direction is perpendicular to the plane where the substrate is located.

[0007] In some embodiments, the dimensions of the first region and the third region in the second direction range from 0.05 mm to 0.1 mm.

[0008] In some embodiments, the two second boundaries of the first line hollow-out area opposite to each other in the first direction are farther away from the pad spacing area than the two first boundaries of the positive projection of the first region on the substrate opposite to each other in the first direction. The two fourth boundaries of the second line hollow-out area opposite to each other in the first direction are farther away from the pad spacing area than the two third boundaries of the positive projection of the third region on the substrate opposite to each other in the first direction.

[0009] In some embodiments, among the two first boundaries of the positive projection of the first region on the substrate opposite to each other in the first direction, and among the two second boundaries of the first line hollow-out area opposite to each other in the first direction, the distance between the first boundary and the second boundary on the same side of the pad spacing area in the first direction is greater than 1.2 times the distance between the surface of the reflective layer away from the substrate and the first surface of the substrate in the third direction. And / or, among the two third boundaries of the positive projection of the third region on the substrate opposite to each other in the first direction, and among the two fourth boundaries of the second line hollow-out area opposite to each other in the first direction, the distance between the third boundary and the fourth boundary on the same side of the pad spacing area in the first direction is greater than 1.2 times the distance between the surface of the reflective layer away from the substrate and the first surface of the substrate in the third direction.

[0010] In some embodiments, the two pads of each pad group are a first pad and a second pad. Among the two second boundaries of the first circuit hollow-out region that are opposite to each other in the first direction, the second boundary on the same side of the pad spacing region as the first pad is farther away from the pad spacing region than the side of the first pad that is away from the pad spacing region, and / or, the second boundary on the same side of the pad spacing region as the second pad is farther away from the pad spacing region than the side of the second pad that is away from the pad spacing region. And / or, the fourth boundary on the same side of the pad spacing region as the first pad is farther away from the pad spacing region than the side of the first pad that is away from the pad spacing region, and / or, the fourth boundary on the same side of the pad spacing region as the second pad is farther away from the pad spacing region than the side of the second pad that is away from the pad spacing region.

[0011] In some embodiments, among the two second boundaries of the first circuit hollow-out region that are opposite to each other in the first direction, and among the two fourth boundaries of the second circuit hollow-out region that are opposite to each other in the first direction, the spacing range in the first direction between the second boundary on the same side of the pad spacing region as the first pad and the side of the first pad that is away from the pad spacing region, and the spacing range in the first direction between the fourth boundary on the same side of the pad spacing region as the first pad and the side of the first pad that is away from the pad spacing region are both 0.04 mm to 0.06 mm. And / or, the spacing range in the first direction between the second boundary on the same side of the pad spacing region as the second pad and the side of the second pad that is away from the pad spacing region, and the spacing range in the first direction between the fourth boundary on the same side of the pad spacing region as the second pad and the side of the second pad that is away from the pad spacing region are both 0.04 mm to 0.06 mm.

[0012] In some embodiments, the sizes of the first circuit hollow-out region and the second circuit hollow-out region in the second direction are both greater than 0.15 mm.

[0013] In some embodiments, the first circuit hollow-out region and the second circuit hollow-out region are symmetrically arranged with respect to the pad group.

[0014] In some embodiments, the projected shapes of the first pad and the second pad on the substrate are both square.

[0015] In some embodiments, the projected shape of the windowing region on the substrate is square.

[0016] In some embodiments, the driving backplane further includes a plurality of first connection solders and a plurality of second connection solders, and each first connection solder covers one first pad. Each second connection solder covers one second pad.

[0017] In some embodiments, the driving backplane further includes a plurality of light-emitting chips, and each light-emitting chip is electrically connected to a pad group through a first connection solder paste and a second connection solder paste.

[0018] In some embodiments, the reflective layer includes a first reflective layer and a second reflective layer stacked on a side of the first reflective layer away from the substrate.

[0019] In some embodiments, an edge portion of the reflective layer near the windowed area has a slit, a maximum dimension of the slit in a third direction is 1 / 2 to 2 / 3 of a thickness of the reflective layer, and a dimension of the slit in the second direction is 1.1 to 1.2 times the thickness of the reflective layer, and the third direction is a direction perpendicular to a plane where the substrate is located.

[0020] On the other hand, a method for manufacturing a driving backplane is provided. The method for manufacturing a driving backplane includes: manufacturing a substrate, forming a circuit layer on a first surface of the substrate, and the circuit layer includes a plurality of circuit groups and a plurality of pad groups. The plurality of pad groups are arranged in an array on the first surface of the substrate, and each pad group includes two pads spaced apart along a first direction. There is a pad interval area between the two pads. The plurality of circuit groups are disposed on the first surface of the substrate, and each circuit group includes two circuits, and one circuit in each circuit group is connected to one pad in a pad group. Wherein, at least one pad in the pad group and a pattern of the circuit group connected thereto define a circuit hollowed-out area, and the circuit hollowed-out area includes a first circuit hollowed-out area and a second circuit hollowed-out area. The first circuit hollowed-out area and the second circuit hollowed-out area are respectively disposed on two sides of the pad group along a second direction. A dimension of the first circuit hollowed-out area and the second circuit hollowed-out area in the first direction is greater than a dimension of the corresponding pad interval area of the pad group in the first direction. The second direction is perpendicular to the first direction, and the second direction and the first direction are parallel to the first surface of the substrate.

[0021] A reflective layer is formed on the first surface of the substrate, the reflective layer covers the first surface of the substrate and the multiple circuit groups, and a plurality of window areas are arranged on the reflective layer, each of which includes a first area, a second area, and a third area arranged along the second direction. The second area exposes a pad group and a pad spacing area corresponding to the pad group. The first area and the third area expose the first surface of the substrate. The projection of the first circuit hollow area on the substrate is farther away from the boundary of the pad group than the projection of the first area on the substrate is farther away from the boundary of the pad group and farther away from the pad group. The projection of the second circuit hollow area on the substrate is farther away from the boundary of the pad group than the projection of the third area on the substrate is farther away from the boundary of the pad group and farther away from the pad group. A solder paste is formed on each pad.

[0022] In some embodiments, the step of forming a reflective layer on the first surface of the substrate includes forming a first reflective layer on the first surface of the substrate, and forming a second reflective layer on a side of the first reflective layer away from the first surface.

[0023] In yet another aspect, a display device is provided, comprising the driving backplane as described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the present disclosure, the following briefly introduces the drawings required to be used in some embodiments of the present disclosure. Obviously, the drawings described below are only drawings of some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can also be obtained based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams, and are not limitations on the actual size of the product involved in the embodiments of the present disclosure, the actual process of the method, the actual timing of the signal, etc.

[0025] Figure 1 is a structural diagram of a display device provided according to some embodiments;

[0026] Figure 2 is another structural diagram of a display device provided according to some embodiments;

[0027] Figure 3 A structural diagram of a liquid crystal display screen provided according to some embodiments;

[0028] Figure 4 A structural diagram of a backlight source provided according to some embodiments;

[0029] Figure 5 is another structural diagram of a backlight source provided according to some embodiments;

[0030] Figure 6Another structural diagram of a backlight according to some embodiments;

[0031] Figure 7 Structural diagram of a driving backplane provided by some embodiments in the related art;

[0032] Figure 8 Based on the driving backplane provided by some embodiments in the related art Figure 7 Enlarged view of part A;

[0033] Figure 9 Structural diagram of a driving backplane provided by some embodiments in the related art;

[0034] Figure 10 Cross-sectional view of the driving backplane provided by some embodiments in the related art along BB according to Figure 9 ;

[0035] Figure 11 Structural diagram of a driving backplane provided by some embodiments in the related art;

[0036] Figure 12A Cross-sectional view of the driving backplane provided by some embodiments in the related art along CC according to Figure 11 ;

[0037] Figure 12B Cross-sectional view of the driving backplane provided by some embodiments in the related art along WW according to Figure 11 ;

[0038] Figure 13 Step diagram of forming a reflective layer provided by some embodiments of the present disclosure;

[0039] Figure 14 Structural diagram of a driving backplane provided by some embodiments in the related art;

[0040] Figure 15 Based on the driving backplane provided by some embodiments in the related art Figure 14 Enlarged view of part D;

[0041] Figure 16 Structural diagram of a driving backplane provided by some embodiments of the present disclosure;

[0042] Figure 17A Based on the driving backplane provided by some embodiments of the present disclosure Figure 16 Enlarged view of part E;

[0043] Figure 17B Structural diagram of a driving backplane provided by some embodiments of the present disclosure;

[0044] Figure 18Structural diagram of a driving backplane provided by some embodiments of the present disclosure;

[0045] Figure 19 For the driving backplane provided by some embodiments of the present disclosure based on Figure 18 Enlarged view at F;

[0046] Figure 20 For the driving backplane provided by some embodiments of the present disclosure based on Figure 19 Cross-sectional view obtained along GG;

[0047] Figure 21 Structural diagram of a driving backplane provided by some embodiments of the present disclosure;

[0048] Figure 22 For the driving backplane provided by some embodiments of the present disclosure based on Figure 21 Cross-sectional view obtained along HH;

[0049] Figure 23 Another structural diagram of a driving backplane provided by some embodiments of the present disclosure;

[0050] Figure 24 Another structural diagram of a driving backplane provided by some embodiments of the present disclosure;

[0051] Figure 25 For the driving backplane provided by some embodiments of the present disclosure based on Figure 21 Enlarged view at I;

[0052] Figure 26 For the driving backplane provided by some embodiments of the present disclosure based on Figure 24 Enlarged view at J;

[0053] Figure 27 For the driving backplane provided by some embodiments of the present disclosure based on Figure 25 Enlarged view at L;

[0054] Figure 28 For the driving backplane provided by some embodiments of the present disclosure based on Figure 23 Cross-sectional view obtained along NN;

[0055] Figure 29 Flowchart of the preparation method of a driving backplane provided by some embodiments of the present disclosure;

[0056] Figures 30 - 32 、 Figures 34 - 37 Step diagram of S2 in the preparation method of a driving backplane provided by some embodiments of the present disclosure;

[0057] Figure 33 Partial structural diagram of a mask provided by some embodiments of the present disclosure;

[0058] Figures 38 - 40 It is a step diagram of S3 in the method for preparing a driving backplane provided by some embodiments of the present disclosure. Detailed implementation manners

[0059] Next, the technical solutions in some embodiments of the present disclosure will be clearly and completely described in conjunction with the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by those of ordinary skill in the art belong to the scope of protection of the present disclosure.

[0060] Unless otherwise required by the context, throughout the specification and claims, the term "comprise" and its other forms such as the third-person singular form "comprises" and the present participle form "comprising" are interpreted as open and inclusive, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example", or "some examples", etc. are intended to indicate that specific features, structures, materials, or characteristics related to the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms are not necessarily referring to the same embodiment or example. In addition, the specific features, structures, materials, or characteristics may be included in any one or more embodiments or examples in any appropriate manner.

[0061] Hereinafter, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the embodiments of the present disclosure, unless otherwise stated, the meaning of "a plurality" is two or more.

[0062] "At least one of A, B, and C" has the same meaning as "at least one of A, B, or C", and both include the following combinations of A, B, and C: only A, only B, only C, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B, and C.

[0063] "A and / or B" includes the following three combinations: only A, only B, and the combination of A and B.

[0064] In addition, the use of "based on" implies openness and inclusivity, because a process, step, calculation, or other action "based on" one or more of the stated conditions or values can, in practice, be based on additional conditions or values beyond those stated.

[0065] As used herein, "about", "substantially", or "approximately" includes the stated value and an average within an acceptable deviation range of the specific value, where the acceptable deviation range is determined by one of ordinary skill in the art in view of the measurement being discussed and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system).

[0066] As used herein, "parallel", "perpendicular", "equal" include the stated situation and situations similar to the stated situation, where the range of the similar situations is within an acceptable deviation range, and the acceptable deviation range is determined by one of ordinary skill in the art in view of the measurement being discussed and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, where the acceptable deviation range for approximate parallelism can be, for example, within 5° deviation; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, where the acceptable deviation range for approximate perpendicularity can also be, for example, within 5° deviation. "Equal" includes absolute equality and approximate equality, where the acceptable deviation range for approximate equality can be, for example, that the difference between the two equal values is less than or equal to 5% of either one.

[0067] It should be understood that when a layer or element is referred to as being on another layer or substrate, it can be that the layer or element is directly on the other layer or substrate, or there can be an intermediate layer between the layer or element and the other layer or substrate.

[0068] Exemplary embodiments are described herein with reference to cross-sectional views and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of layers and regions is exaggerated for clarity. Thus, variations in the shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Accordingly, exemplary embodiments should not be construed as being limited to the shapes of the regions shown herein, but include shape deviations resulting from, for example, manufacturing. For example, an etched region shown as rectangular will typically have curved features. Thus, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shape of the regions of the device and are not intended to limit the scope of the exemplary embodiments.

[0069] Mini-LED display devices have many advantages such as being ultra-thin, having high brightness, energy-saving, and a high color gamut, and have become a hot spot in current market development. In related technologies, taking the display device 100' as a mobile phone as an example for illustration, as Figure 1As shown, the display device 100’ includes a cover plate 10, a liquid crystal display screen 20, a backlight unit (BLU) 30, a middle frame 40, and a housing 50. The liquid crystal display screen 20, the backlight 30, and the middle frame 40 are disposed within the housing 50.

[0070] Among them, the middle frame 40 is located between the backlight 30 and the housing 50. As Figure 2 shown, the surface of the middle frame 40 away from the backlight 30 is used to mount internal components such as the main board 41. The main board 41 is used to provide electrical signals to the backlight 30 and the liquid crystal display screen 20. The liquid crystal display screen 20 and the backlight 30 are electrically connected to the main board 41 through a flexible printed circuit (FPC) 42. For example, the liquid crystal display screen 20 is electrically connected to the main board 41 through a first flexible circuit board 421, and the backlight 30 is electrically connected to the main board 41 through a second flexible circuit board 422.

[0071] The liquid crystal display screen 20 has a light-emitting side where the display screen can be seen and a back surface disposed opposite to the light-emitting side. The cover plate 10 is located on the light-emitting side of the liquid crystal display screen 20 and is used to protect the liquid crystal display screen 20. The cover plate 10 and the liquid crystal display screen 20 can be bonded through an Optically Clear Adhesive (OCA).

[0072] Exemplarily, the cover plate 10 can be, for example, a cover glass (CG), and this cover glass can have a certain toughness.

[0073] In some examples, as Figure 3 shown, the liquid crystal display screen 20 includes an array substrate 21, a counter substrate 22, a liquid crystal layer 23, an upper polarizing layer 24, and a lower polarizing layer 25. The liquid crystal layer 23 is disposed between the array substrate 21 and the counter substrate 22. The array substrate 21 and the counter substrate 22 are joined together through a sealing glue 26, thereby defining the liquid crystal layer 23 within a liquid crystal cell surrounded by the array substrate 21, the counter substrate 22, and the sealing glue 26.

[0074] Among them, in order to enable the liquid crystal display screen 20 to achieve color display, as Figure 3 shown, the liquid crystal display screen 20 further includes a color filter layer 27. The color filter layer 27 can be disposed on the counter substrate 22. At this time, the counter substrate 22 can be referred to as a color film substrate.

[0075] Exemplarily, the backlight 30 is located on the back surface of the liquid crystal display screen 20 and is used to provide a light source to the liquid crystal display screen 20.

[0076] In some examples, as Figure 4As shown, the backlight 30 includes a driving backplane 31 and an optical film layer 32, and the optical film layer 32 is disposed on the light-emitting side of the driving backplane 31.

[0077] Exemplarily, as Figure 5 shown, the driving backplane 31 is a blue light driving backplane, and the optical film layer 32 includes a transflective film 321, a quantum dot (QD) / fluorescent film 322, a diffusion film 323, and a prism film 324. Among them, the transflective film 321 and the QD / fluorescent film 322 are color conversion films of the blue light driving backplane, which can achieve blue light incident and white light outgoing. The diffusion film 323 plays a role in mixing light, and the prism film 324 can increase the brightness in the positive viewing angle direction.

[0078] Alternatively, as Figure 6 shown, the driving backplane 31 is a white light driving backplane, and the optical film layer 32 includes a diffusion film 323 and a prism film 324. Since it does not need to convert color light into white light, there is no need to provide a transflective film 321 and a QD / fluorescent film 322 above the driving backplane 31.

[0079] From the above description, it can be seen that the optical film layer 32 in the backlight 30 plays a role in adjusting light, and the driving backplane 31 is used to provide a light source. Therefore, the quality of the driving backplane 31 is one of the key factors affecting the yield of the display device 100.

[0080] In the related art, as Figure 7 shown, the driving backplane 31 includes a substrate 311, a plurality of pad groups 312, and a plurality of line groups 313. It should be noted that Figure 7 only the structure of the driving backplane 31 in the internal area of the dashed box A is shown, and the structure of the driving backplane 31 in the external area of the dashed box A is not limited. Therefore, Figure 7 the structure of the driving backplane 31 in the external area of the dashed box A is not shown. The plurality of pad groups 312 are arranged in an array on the surface of the substrate 311. Each pad group 312 includes two pads arranged at intervals, namely a P-pole pad 312a and an N-pole pad 312b. The plurality of line groups 313 are disposed on the surface of the substrate 311. Each line group 313 includes a P-pole line 313a and an N-pole line 313b. As Figure 7 and Figure 8 shown, the P-pole line 313a of a line group 313 is connected to the P-pole pad 312a of a pad group 312, and the N-pole line 313b of a line group 313 is connected to the N-pole pad 312b of a pad group 312.

[0081] It should be noted that in the related art, the pad and the corresponding circuit are integrally provided. That is to say, the P-pole pad 312a and the corresponding P-pole circuit 313a are taken as a whole, for example, as a P-pole overall conductive structure. The P-pole pad 312a is a part of the P-pole overall conductive structure. A part of the P-pole overall conductive structure near the edge on the side corresponding to the N-pole circuit 313b is subjected to an electroless nickel immersion gold process or an organic solderability preservatives (OSP) process to form the P-pole pad 312a, and the remaining part of the P-pole overall conductive structure serves as the P-pole circuit 313a. Similarly, the N-pole pad 312b and the corresponding N-pole circuit 313b are taken as a whole, for example, as an N-pole overall conductive structure. The N-pole pad 312a is a part of the N-pole overall conductive structure. A part of the N-pole overall conductive structure near the edge on the side corresponding to the P-pole circuit 313a is subjected to an electroless nickel immersion gold process or an organic solderability preservatives process to form the N-pole pad 312b, and the remaining part of the N-pole overall conductive structure serves as the N-pole circuit 313a.

[0082] It can be understood that the above A and B "correspond". When A and B have a connection relationship, B corresponding to A refers to B connected to A. When A and B belong to the same group, B corresponding to A refers to B belonging to the same group as A. For example, the same pad group 312 or the same circuit group 313.

[0083] Exemplarily, referring again to Figure 8 , the P-pole pad 312a is square. Except for the side facing the corresponding N-pole pad 312b, the other three sides of the P-pole pad 312a are integrally connected to the corresponding P-pole circuit 313a. The N-pole pad 312b is square. Except for the side facing the corresponding P-pole pad 312a, the other three sides of the N-pole pad 312b are integrally connected to the corresponding N-pole circuit 313b.

[0084] Exemplarily, the substrate 311 can be, for example, a printed circuit board (PCB) or a flexible printed circuit board (FPC).

[0085] As Figure 9 and Figure 10 shown, the driving backplane 31 further includes a reflective layer 314. The reflective layer 314 is disposed on the substrate 311, and the reflective layer 314 covers a plurality of circuit groups 313. A plurality of openings 60 are provided on the reflective layer 314, and each opening 60 exposes the P-pole pad 312a and the N-pole pad 312b of a pad group 312 and the area between the P-pole pad 312a and the N-pole pad 312b.

[0086] Exemplarily, the reflective layer 314 may be a white ink layer. The white ink has a high reflectivity and functions to reflect light, which is used to improve the optical effect of the driving backplane 31.

[0087] It should be noted that in the existing design, the size of the opening 60 on the reflective layer 314 corresponds to the sizes of the P-pole pad 312a and the N-pole pad 312b. The opening 60 is used to expose the pad group 312. That is to say, one opening 60 on the reflective layer 314 is only used to expose the P-pole pad 312a and the N-pole pad 312b of one pad group 312 and the area between the P-pole pad 312a and the N-pole pad 312b.

[0088] It should be noted that "exposure" means a state where no other film layer is provided on the side of the reflective layer 314 away from the substrate 311. That is to say, when the film layer farthest from the substrate 311 is the reflective layer 314, looking at the substrate 311 along the direction perpendicular to the plane where the substrate 311 is located, the opening 60 on the reflective layer 314 exposes the pad group 312.

[0089] As Figure 11 、 Figure 12A and Figure 12B shown, the driving backplane 31 further includes a connecting solder paste 315 and a light-emitting chip 316. Connecting solder paste 315 is provided on both the P-pole pad 312a and the N-pole pad 312b. One light-emitting chip 316 is connected to the P-pole pad 312a and the N-pole pad 312b of one pad group 312 through the connecting solder paste 315. Therefore, the light-emitting chips 316 on the substrate 311 are arranged in a regular array.

[0090] Exemplarily, the light-emitting chip 316 may be a blue-light LED packaging chip (such as a blue-light Mini-LED packaging chip). In this case, the driving backplane 31 is a blue-light driving backplane. Alternatively, the light-emitting chip 316 may be a white-light LED packaging chip (such as a white-light Mini-LED packaging chip). In this case, the driving backplane 31 is a white-light driving backplane.

[0091] However, the inventor found that as Figure 13As shown, in step R1 of forming the reflective layer 314, white ink for forming the reflective layer 314 is coated on the substrate 311. The white ink is cured by ultraviolet (UV) light irradiation. The upper layer of the white ink is sufficiently exposed to light, and the upper layer ink 314a is sufficiently photopolymerized, so the upper layer ink 314a is completely cured. However, the lower layer ink 314b is not sufficiently photopolymerized, resulting in incomplete curing of the lower layer ink 314b. After the curing of the white ink is completed, when the etching and windowing process of the white ink is carried out, the lower layer ink 314b with insufficient polymerization in the white ink at the edge of the window 60 will fall off following the etching solution, and a gap 70 is formed after the lower layer ink 314b falls off.

[0092] It should be noted that the upper layer ink 314a is the part of the white ink away from the surface of the substrate 311, and the lower layer ink 314b is the part of the white ink close to the surface of the substrate 311. The upper layer ink 314a is closer to the light source of the ultraviolet light than the lower layer ink 314b.

[0093] It can be understood that since the gap 70 in the reflective layer 314 is formed by the falling off of the lower layer ink 314b at the edge of the window 60 of the reflective layer 314, the shape of the positive projection of the contour of the gap 70 on the reflective layer 314 on the surface of the substrate 311 corresponds to the shape of the positive projection of the contour of the window 60 on the reflective layer 314 on the surface of the substrate 311. Referring again to Figure 9 , when the positive projection of the contour of the window 60 of the reflective layer 314 on the substrate 311 is square, the positive projection of the contour of the gap 70 on the reflective layer 314 on the substrate 311 is also square. The area where the gap 70 is located on the reflective layer 314 is the area between the reflective layer 314 and the surface of the substrate 311 between the boundary line G of the window 60 of the reflective layer 314 and the dotted line frame K. The dotted line frame K is the contour line of the periphery of the gap 70 far from the boundary line G of the window 60.

[0094] When applying solder paste to form the connecting solder paste 315 on the P - pole pad 312a and the N - pole pad 312b of the pad group 312 during the solder brushing process, referring again to Figure 11 and Figure 12A , when the solder brushing is off - set or re - worked, the gap 70 under the edge of the white ink window 60 will retain solder paste, and it cannot be cleaned and removed. The retained solder paste accumulates to form residual solder paste 80. In the y - direction where the P - pole pad 312a and the N - pole pad 312b of a pad group 312 are arranged at intervals, when the residual amount of the residual solder paste 80 is large and the residual solder paste 80 accumulates to form a connecting line LL1 connecting the P - pole pad 312a and the N - pole pad 312b, it will cause bridging short - circuit between the P - pole pad 312a and the N - pole pad 312b. That is to say, the residual solder paste 80 in the gap under the edge of the white ink windowing area forms a path connecting the P - pole pad 312a and the N - pole pad 312b.

[0095] In the driving backplane 31, as Figure 14 and Figure 15 shown, the display area is generally divided into multiple display partitions D. A plurality of light-emitting chips 316 in each display partition D are connected in series. When the residual solder paste 80 of a solder pad group 312 forms a path connecting the P-pole pad 312a and the N-pole pad 312b, the light-emitting chip 316a connected to the P-pole pad 312a and the N-pole pad 312b will be short-circuited, resulting in the extinguishing of the light-emitting chip 316a. The other multiple light-emitting chips 316 connected in series will experience a phenomenon of sudden brightening due to an increase in current, causing the driving substrate 31 to be scrapped and affecting the product yield.

[0096] Therefore, referring again to Figure 11 , when the size of the connection line LL1 formed by the residual solder paste 80 in the y direction is equal to the pitch H between the P-pole pad 312a and the N-pole pad 312b, it will cause a connection short circuit between the P-pole pad 312a and the N-pole pad 312b. As the size of the light-emitting chips 316 used in the prior art becomes smaller and smaller, the pitch H between the corresponding P-pole pad 312a and N-pole pad 312b of the light-emitting chips 316 also correspondingly decreases. The accumulation of a relatively small amount of residual solder paste 80 can form the connection line LL1, further increasing the risk of solder bridging between the P-pole pad 312a and the N-pole pad 312b of a solder pad group 312 and making it easier to cause the driving substrate 31 to be scrapped.

[0097] The inventors also found that, referring again to Figure 13 , the more white ink falls off at the gap 70 formed in the reflective layer 314 closer to the opening window 60. That is to say, the closer the formed gap 70 is to the opening window 60, the larger the size in the z direction. The z direction is the direction perpendicular to the plane where the substrate 311 is located. The maximum size d2 of the gap 70 in the z direction is located at the boundary line G of the white ink opening window 60, that is, the opening of the gap 70. Moreover, in the z direction, the thicker the thickness d1 of the reflective layer 314, the larger the maximum size d2 of the gap 70 in the z direction and the size d3 in the x direction. Among them, the x direction is perpendicular to the extension direction of the boundary G of the opening window 60 of the reflective layer 314, and the x direction is perpendicular to the z direction. The maximum size d2 of the gap 70 in the third direction (z direction) is 1 / 2 to 2 / 3 of the thickness d1 of the reflective layer 314, and the size d3 of the gap 70 in the second direction (x direction) is 1.1 to 1.2 times the thickness d1 of the reflective layer 314.

[0098] Based on this, as Figure 16 shown, some embodiments of the present disclosure provide a driving backplane 90. The driving backplane 90 includes a substrate 311, a plurality of solder pad groups 91, and a plurality of line groups 92. It should be noted that Figure 16Only the structure of the driving backplane 90 in the internal area of the dashed box E is shown, and the structure of the driving backplane 90 in the external area of the dashed box E is not limited. Therefore, Figure 16 The structure of the driving backplane 90 in the external area of the dashed box A is not shown. A plurality of pad groups 91 are arranged in an array on the first surface 311a of the substrate 311. Each pad group 91 includes two pads arranged at intervals along the first direction Y. There is a pad interval area 91a between the two pads.

[0099] A plurality of line groups 92 are arranged on the first surface 311a of the substrate 311. Each line group 92 includes two lines. One line in each line group 92 is connected to one pad in one pad group 91.

[0100] The substrate 311 includes FR4 (a double-sided copper-clad PCB board made of epoxy resin and glass cloth), BT (a thermosetting resin formed by using bismaleimide and triazine as the main resin components and adding epoxy resin, polyphenylene ether resin or allyl compound as a modification component), FPC or glass, etc., and there is no limitation here.

[0101] In addition, the substrate 311 further includes other film layers (such as a buffer layer) provided between the substrate 311 and the line group 92 / pad group 91. Here, the substrate 311 is not limited to the substrate 311 itself, but represents the general term of the substrate 311 and other film layers provided between the substrate 311 and the line group 92.

[0102] In some examples, as Figure 17A shown, each pad group 91 includes a first pad 911 and a second pad 912 arranged at intervals along the first direction Y. Each line group 92 includes a first line 921 and a second line 922. The first pad 911 of one pad group 91 is connected to the first line 921 of one line group 92, and the second pad 912 of this pad group 91 is connected to the second line 922 of this line group 92.

[0103] Exemplarily, the first pad 911 is one of a P-pole pad and an N-pole pad, and the second pad 912 is the other of a P-pole pad and an N-pole pad, and there is no limitation here.

[0104] Among them, as Figure 17A and 17BAs shown, the pattern of at least one pad in the pad group 91 and the line connected thereto defines a line hollow area 92a. For example, the pattern of the first pad 911 and the first line 921 in the line group 92 connected thereto defines the line hollow area 92a. The line hollow area 92a includes a first line hollow area 92a1 and a second line hollow area 92a2. The first line hollow area 92a1 and the second line hollow area 92a2 are respectively disposed on both sides of the pad (the first pad 911) along the second direction X. The dimension d4 of the first line hollow area 92a1 and the second line hollow area 92a1 in the first direction Y is greater than the dimension h of the corresponding pad spacing area 91a of the pad group 91 in the first direction Y. The second direction X is perpendicular to the first direction Y, and the second direction X and the first direction Y are parallel to the first surface 311a of the substrate 311.

[0105] In some examples, as Figure 17B shown, the first line hollow area 92a1 is located on the left side of the first pad 911 along the second direction X, and the second line hollow area 92a2 is located on the right side of the first pad 911 along the second direction X. The first line hollow area 92a1 and the second line hollow area 92a2 are not provided on both sides of the second pad 912 along the second direction X.

[0106] It can be understood that the hollow area refers to the area where the whole material surface is hollowed out of the pattern, and the line hollow area 92a refers to the position where a part of the line material is hollowed out on the line material surface, forming a line hollow area, that is, no line material is provided in this area.

[0107] In some embodiments, as Figure 17A shown, the line hollow area 92a is defined by two pads in the pad group 91 and the line group 92 connected thereto. The first line hollow area 92a1 and the second line hollow area 92a2 are respectively disposed on both sides of the pad group 91 along the second direction X.

[0108] In some examples, as Figure 17A shown, the first line hollow area 92a1 is located on the left side of the pad group 91 along the second direction X, and the second line hollow area 92a2 is located on the right side of the pad group 91 along the second direction X. That is to say, line hollow areas 92a are provided on both sides of the first pad 911 and the second pad 912 along the second direction X. One end of the first pad 911 far from the pad spacing area 91a is connected to the first line 921, and one end of the second pad 912 far from the pad spacing area 91a is connected to the second line 922. Compared with the related art, the present disclosure provides a hollow area without lines on both sides of the pad group 91 along the second direction X.

[0109] It should be noted that the connection manner between the first pad 911 and the first circuit 921, and the connection manner between the second pad 912 and the second circuit 922 vary according to the setting of the hollowed-out area, and are not limited herein.

[0110] In some embodiments, as Figure 18 shown, the driving backplane 90 further includes a reflective layer 314. The reflective layer 314 covers the first surface 311a of the substrate 311 and multiple circuit groups 92. Multiple windowing areas 61 are provided on the reflective layer 314. Each windowing area 61 includes a first area 611, a second area 612, and a third area 613 arranged along the second direction X. The second area 612 exposes a pad group 91 and the pad spacing area 91a corresponding to the pad group 91. The first area 611 and the third area 613 expose the first surface 311a of the substrate 311. The projection of the first circuit hollowed-out area 92a1 on the substrate 311 is farther from the boundary Ab1 of the pad group 91 than the projection of the first area 611 on the substrate 311 is from the boundary Bb1 of the pad group 91 and is farther from the pad group 91. The projection of the second circuit hollowed-out area 92a2 on the substrate 311 is farther from the boundary Cb1 of the pad group 91 than the projection of the third area 613 on the substrate 311 is from the boundary Db1 of the pad group 91 and is farther from the pad group 91.

[0111] The explanation of "exposure" is as described above and will not be elaborated herein. Additionally, in the case where there are other film layers provided between the substrate 311 and the circuit group 92, "exposing the first surface 311a of the substrate 311" means exposing the surface of the film layer between the substrate 311 and the circuit group 92, and this film layer is the film layer close to the circuit group 92.

[0112] In some examples, referring again to Figure 18 , the reflective layer 314 can be a white ink layer. The white ink has a high reflectivity and functions to reflect light, and is used to improve the optical effect of the driving backplane 31. The first area 611, the second area 612, and the third area 613 on the reflective layer 314 are arranged and connected in sequence along the second direction X. The second area 612 exposes a pad group 91 and the pad spacing area 91a corresponding to the pad group 91. Therefore, the second area 612 has the same function as the above-mentioned window 60.

[0113] In some examples, as Figure 19 and Figure 20As shown, the first region 611 exposes a portion 61a of the first surface 311a of the substrate 311 exposed by the first circuit cutout region 92a1, and the projection of the first region 611 on the substrate 311 is spaced apart from the boundary Bb1 of the pad group 91 and the projection of the first circuit cutout region 92a1 on the substrate 311 is spaced apart from the boundary Ab1 of the pad group 91 by a distance d6 in the second direction X. The third region 613 exposes a portion 61b of the first surface 311a of the substrate 311 exposed by the second circuit cutout region 92a2, and the projection of the third region 613 on the substrate 311 is spaced apart from the boundary Db1 of the pad group 91 and the projection of the second circuit cutout region 92a2 on the substrate 311 is spaced apart from the boundary Cb1 of the pad group 91 by a distance d6 in the second direction X.

[0114] It should be noted that the distance d6 between the projection of the first region 611 on the substrate 311 and the boundary Bb1 of the pad group 91 and the projection of the first circuit cutout region 92a1 on the substrate 311 and the boundary Ab1 of the pad group 91, and the distance d6 between the projection of the third region 613 on the substrate 311 and the boundary Db1 of the pad group 91 and the projection of the second circuit cutout region 92a2 on the substrate 311 and the boundary Cb1 of the pad group 91 can be the same or different, and there is no limitation here.

[0115] In some examples, referring again to Figure 19 , there is a distance d5 in the second direction X between the gap 70 formed at the edge of the opening region 61 close to the reflective layer 314 and the pad group 91. The gap 70 includes the region between the reflective layer 314 and the first surface 311a of the substrate 311 between the dashed line K1 (a part of the dashed box K) and the boundary Bb1 of the first region 611, and the region between the reflective layer 314 and the first surface 311a of the substrate 311 between the dashed line K2 (a part of the dashed box K) and the boundary Db1 of the third region 613. The dashed box K is the contour line of the gap 70 away from the boundary line G of the opening 60. The formation principle of the gap 70 is as described above and will not be elaborated here.

[0116] And, in some examples, referring again to Figure 20, the distance d5 in the second direction X between the gap 70 on the left side of the pad group 91 and the pad group 91 is the same as the dimension of the first region 611 in the second direction X. The distance d5 in the second direction X between the gap 70 on the right side of the pad group 91 and the pad group 91 is the same as the dimension of the third region 613 in the second direction X. The dimension of the first region 611 in the second direction X and the dimension of the third region 613 in the second direction X may be the same or different, and there is no limitation here. Therefore, the distance d5 in the second direction X between the gap 70 on the left side of the pad group 91 and the pad group 91, and the distance d5 in the second direction X between the gap 70 on the right side of the pad group 91 and the pad group 91 may be the same or different, and there is no limitation here.

[0117] In some embodiments, as Figure 21 shown, the driving backplane 90 further includes a plurality of first connection solders 315a and a plurality of second connection solders 315b. Each first connection solder 315a covers one first pad 911. Each second connection solder 315b covers one second pad 912.

[0118] In some examples, referring again to Figure 21 , the first pad 911 is covered with the first connection solder 315a, and the second pad 912 is covered with the second connection solder 315b. Since the first pad 911 is covered with the first connection solder 315a and the second pad 912 is covered with the second connection solder 315b, the first pad 911 and the second pad 912 are not shown in the figure. It can be understood that the position indicated by the first connection solder 315a can be understood as the position where the first pad 911 is located, and the position indicated by the second connection solder 315b can be understood as the position where the second pad 912 is located.

[0119] It should be noted that the solder paste has the function of protecting the pads and is used for the connection of subsequent electrical components. In the step of brushing the solder paste, when the brushing is offset once, the solder paste can be cleaned and removed by ultrasonic cleaning. The cleaning step can remove the solder paste on the surface of the pads and the first surface 311a of the substrate 311, and then the second brushing is carried out. However, in the step of cleaning and removing the solder paste, the solder paste in the gap 70 is not easy to clean. Especially when the brushing step is carried out repeatedly for many times, more solder paste will remain in the gap 70. In the related art, as Figure 11 shown, when the size of the connection line LL1 formed by the solder paste in the gap 70 in the y direction is the same as the distance H between the P-pole pad 312a and the N-pole pad 312b in the y direction, it can cause the short circuit of the P-pole pad 312a and the N-pole pad 312b. Specifically, as described above, it will not be elaborated here.

[0120] The present disclosure provides a circuit hollowing area 92a between the pad group 91 and the circuit group 92 connected thereto along the second direction X, and provides a first area 611 and a third area 613 on both sides of the second area 612 along the second direction X. Figure 20 and Figure 22 As shown, there is a spacing d5 between the gap 70 formed near the edge of the window area 61 of the reflective layer 314 and the pad group 91 in the second direction X. In this way, even if a lot of solder paste remains in the gap 70, due to the spacing d5 between the gap 70 and the pad group 91, the residual solder paste will not contact the pad group 91, so it is not easy to cause a short circuit between the first pad 911 and the second pad 912. For example, see again Figure 21 When the size of the connecting line LL1 formed by the residual solder paste 80 accumulated in the gap 70 on the left side of the pad spacing area 91a along the second direction X in the first direction Y is equal to the size h of the pad spacing area 91a corresponding to the pad group 91 in the first direction Y, it will not cause a short circuit between the first pad 911 and the second pad 912, thereby reducing the risk of a short circuit between the pads and improving the product yield.

[0121] In some implementations, see again Figure 20 , the distance d6 between the projection of the first circuit hollow area 92a1 on the substrate 311 away from the boundary Ab1 of the pad group 91 and the projection of the first region 611 on the substrate 311 away from the boundary Bb1 of the pad group 91 in the second direction X is greater than 1.2 times the distance d7 between the surface 314m of the reflective layer 314 away from the substrate 311 and the first surface 311a of the substrate 311 in the third direction Z, that is, d6>1.2×d7. The distance d6 between the projection of the second circuit hollow area 92a2 on the substrate 311 away from the boundary Cb1 of the pad group 91 and the projection of the third region 613 on the substrate 311 away from the boundary Db1 of the pad group 91 in the second direction X is greater than 1.2 times the distance d7 between the surface 314m of the reflective layer 314 away from the substrate 311 and the first surface 311a of the substrate 311 in the third direction Z, that is, d6>1.2×d7. The third direction Z is perpendicular to the plane where the substrate 311 is located.

[0122] In some examples, see again Figure 20, the projection of the first circuit hollow area 92a1 on the substrate 311 is far from the boundary Ab1 of the pad group 91, and the spacing d6 in the second direction X between the projection of the first region 611 on the substrate 311 far from the boundary Bb1 of the pad group 91 is 1.3 times, 1.5 times, 2 times, or 2.5 times, etc. of the spacing d7 in the third direction Z between the surface 314m of the reflective layer 314 far from the substrate 311 and the first surface 311a of the substrate 311, that is, d6 = 1.3×d7, d6 = 1.5×d7, d6 = 2×d7, or d6 = 2.5×d7, etc., and there is no limit here. The spacing d6 in the second direction X between the projection of the second circuit hollow area 92a2 on the substrate 311 far from the boundary Cb1 of the pad group 91 and the projection of the third region 613 on the substrate 311 far from the boundary Db1 of the pad group 91 is 1.4 times, 1.6 times, 1.8 times, or 2.3 times, etc. of the spacing d7 in the third direction Z between the surface 314m of the reflective layer 314 far from the substrate 311 and the first surface 311a of the substrate 311, that is, d6 = 1.4×d7, d6 = 1.6×d7, d6 = 1.8×d7, or d6 = 2.3×d7, etc., and there is no limit here.

[0123] From the above analysis of the formation principle of the gap 70 in the reflective layer 314, as Figure 13 shown, the dimension d3 of the gap 70 in the x direction is 1.1 to 1.2 times the thickness d1 of the reflective layer 314, and the specific content is as described above, and will not be elaborated here. The dimension d3 of the gap 70 in the x direction is the same as the dimension d3 of the gap 70 in the second direction X here, and the thickness d1 of the reflective layer 314 is the same as the spacing d7 in the third direction Z between the surface 314m of the reflective layer 314 far from the substrate 311 and the first surface 311a of the substrate 311. Referring again to Figure 20 , setting d6 > 1.2×d7 can ensure that d6 > d3, that is, the residual solder paste in the gap 70 will not be short-circuited with the circuits in the circuit group 92 in the second direction X.

[0124] In some examples, such as Figure 23As shown, in the region between the two second boundaries Ab2 of the first circuit cutout region 92a1 away from the pad spacer region 91a and the pad spacer region 91a, no circuit needs to be provided. That is to say, in the region on the left side of the first pad 911 along the second direction X, in the region between the second boundary Ab2 on the same side of the pad spacer region 91a as the first pad 911 and the pad spacer region 91a, no circuit is provided. In the region on the left side of the second pad 92 along the second direction X, in the region between the second boundary Ab2 on the same side of the pad spacer region 91a as the second pad 912 and the pad spacer region 91a, no circuit is provided. Similarly, in the region between the two fourth boundaries Cb2 of the second circuit cutout region 92a2 away from the pad spacer region 91a and the pad spacer region 91a, no circuit needs to be provided. That is to say, in the region on the right side of the first pad 911 along the second direction X, in the region between the fourth boundary Cb2 on the same side of the pad spacer region 91a as the first pad 911 and the pad spacer region 91a, no circuit is provided. In the region on the right side of the second pad 912 along the second direction X, in the region between the fourth boundary Cb2 on the same side of the pad spacer region 91a as the second pad 912 and the pad spacer region 91a, no circuit is provided. Such a design can maximize the size of the first circuit cutout region 92a1 and the second circuit cutout region 92a2 in the second direction X, and can ensure that the residual solder paste in the gap 70 will not be short-circuited with the circuits in the circuit group 92 in the second direction X.

[0125] It should be noted that, as Figure 23 shown, the first pad 911 and the second pad 912 are not shown in the figure. It can be understood that the position marked by the first connecting solder paste 315a can be understood as the position where the first pad 911 is located, and the position marked by the second connecting solder paste 315b can be understood as the position where the second pad 912 is located.

[0126] In some embodiments, referring again to Figure 19 , the dimension d5 of the first region 611 and the third region 613 in the second direction X ranges from 0.05 mm to 0.1 mm, that is, 0.1 mm ≥ d5 ≥ 0.05 mm.

[0127] Exemplarily, the dimension d5 of the first region 611 in the second direction X is 0.05 mm, 0.08 mm, or 0.09 mm, etc., and there is no limitation here. The dimension d5 of the third region 613 in the second direction X is 0.06 mm, 0.07 mm, or 0.1 mm, etc., and there is no limitation here.

[0128] By setting the dimension d5 range of the first region 611 and the third region 613 in the second direction X to be greater than or equal to 0.05 mm, it can be ensured that there is a spacing d5 between the gap 70 and the pad group 91 in the second direction X, reducing the risk of short - circuit connection between the solder paste accumulated in the part where the gap 70 extends in the first direction Y and the pads in the second direction X. By setting the dimension d5 range of the first region 611 and the third region 613 in the second direction X to be less than or equal to 0.1 mm, it can effectively ensure that the area of the reflective layer 314 is large enough, ensuring that the reflective layer 314 has a good light reflection effect and does not affect the light - emitting effect of the driving backplane 90.

[0129] In some embodiments, such as Figure 24 and Figure 25 shown, the two second boundaries Ab2 of the first - line hollowed - out area 92a1 opposite to each other in the first direction Y are farther from the pad spacer 91a than the two first boundaries Bb2 of the projection of the first region 611 on the substrate 311 opposite to each other in the first direction Y. The two fourth boundaries Cb2 of the second - line hollowed - out area 92a2 opposite to each other in the first direction Y are farther from the pad spacer 91a than the two third boundaries Db2 of the projection of the third region 613 on the substrate 311 opposite to each other in the first direction Y.

[0130] In some examples, referring again to Figure 24 , since the two fourth boundaries Cb2 of the second - line hollowed - out area 92a2 are farther from the pad spacer 91a than the two third boundaries Db2 of the third region 613, only when the continuous residual solder paste 80 accumulates in the part 70a where the gap 70 extends in the first direction Y to form the connection line LL2, and the continuous residual solder paste 80 accumulates in the part 70b where the gap 70 extends in the second direction X to form the connection line LL3, and the connection line LL3 is formed in the gap 70 at both of the two third boundaries Db2 of the third region 613 opposite to each other in the first direction Y, that is, the residual solder paste 80 needs to form the connection line LL2, the connection line LL31, and the connection line LL32, will it cause the solder short - circuit of the driving backplane 90.

[0131] That is to say, one end of the connection line LL31 along the second direction X is connected to the first pad 911 covered by the first connecting solder paste 315a, and the other end of the connection line LL31 is connected to one end of the connection line LL2. Specifically, as shown in the enlarged Figure 26As shown, one end of the connection line LL32 along the second direction X is connected to the second pad 912 covered by the second connection solder paste 315b. The other end of the connection line LL32 is connected to the other end of the connection line LL2, forming a path connecting the first pad 911 and the second pad 912, which will cause solder short - circuit between the pads of the driving backplane 90. The length of the connection line connecting the first pad 911 and the second pad 912 is equal to the length of LL2 + LL31+LL32. The length of LL2 + LL31+LL32 is much greater than the length of the connection line LL1. Therefore, a relatively large amount of residual solder paste 80 is required. So, the present disclosure effectively reduces the risk of solder short - circuit between the pads of the driving backplane 90.

[0132] It should be noted that, as Figures 24 - 26 shown, the first pad 911 and the second pad 912 are not shown in the figure. It can be understood that the position marked by the first connection solder paste 315a can be regarded as the position where the first pad 911 is located, and the position marked by the second connection solder paste 315b can be regarded as the position where the second pad 912 is located.

[0133] It can be understood that Figures 24 - 26 shown is a schematic diagram of the connection line LL2 + LL31+LL32 formed by the residual solder paste in the gap 70 in the third region 613. It is also possible to form the connection line LL2 + LL31+LL32 by the residual solder paste in the gap 70 in the first region 611, which causes solder short - circuit between the pads of the driving backplane 90. Details are not described here.

[0134] In some embodiments, referring again to Figure 24 and Figure 25 , among the two first boundaries Bb2 opposite to each other in the first direction Y of the positive projection of the first region 611 on the substrate 311, and among the two second boundaries Ab2 opposite to each other in the first direction Y of the first - line hollowing area 92a1, the distance d8 between the first boundary Bb2 and the second boundary Ab2 on the same side of the pad interval area 91a in the first direction Y is greater than 1.2 times the distance d7 between the surface 314m of the reflective layer 314 away from the substrate 311 and the first surface 311a of the substrate 311 in the third direction Z, that is, d8>1.2×d7. Among the two third boundaries Db2 opposite to each other in the first direction Y of the positive projection of the third region 613 on the substrate 311, and among the two fourth boundaries Cb2 opposite to each other in the first direction Y of the second - line hollowing area 92a2, the distance d9 between the third boundary Db2 and the fourth boundary Cb2 on the same side of the pad interval area 91a in the first direction Y is greater than 1.2 times the distance d7 between the surface 314m of the reflective layer 314 away from the substrate 311 and the first surface 311a of the substrate 311 in the third direction Z, that is, d9>1.2×d7. It should be noted that Figure 24 and Figure 25The distance d7 in the third direction Z between the surface 314m of the reflective layer 314 away from the substrate 311 and the first surface 311a of the substrate 311 is not shown in the figure. For specific details, please refer to Figure 20 as shown.

[0135] Exemplarily, referring again to Figure 24 , among the two first boundaries Bb2 opposite to each other in the first direction Y of the orthographic projection of the first region 611 on the substrate 311, and among the two second boundaries Ab2 opposite to each other in the first direction Y of the first circuit cutout region 92a1, the distance d8 in the first direction Y between the first boundary Bb2 and the second boundary Ab2 on the same side of the pad spacer region 91a is equal to 1.3 times or 1.5 times, etc. of the distance d7 in the third direction Z between the surface 314m of the reflective layer 314 away from the substrate 311 and the first surface 311a of the substrate 311. There is no limit here. Among the two third boundaries Db2 opposite to each other in the first direction Y of the orthographic projection of the third region 613 on the substrate 311, and among the two fourth boundaries Cb2 opposite to each other in the first direction Y of the second circuit cutout region 92a2, the distance d9 in the first direction Y between the third boundary Db2 and the fourth boundary Cb2 on the same side of the pad spacer region 91a is equal to 1.3 times or 1.4 times of the distance d7 in the third direction Z between the surface 314m of the reflective layer 314 away from the substrate 311 and the first surface 311a of the substrate 311. There is no limit. The principle of the setting of d8 > 1.2×d7 and the setting of d9 > 1.2×d7 is the same as the setting of the distance d6, as described above in detail, and will not be elaborated here. It can prevent the solder paste remaining in the part 70b where the gap 70 extends in the second direction X from connecting with the circuits in the circuit group 92 in the first direction Y, extend the length of the connecting line formed by the remaining solder paste required for the pad solder short circuit of the driving backplane 90, and reduce the risk of pad solder short circuit of the driving backplane 90.

[0136] It should be noted that the distance d8 between the first boundary Bb2 and the second boundary Ab2 on one side of the pad spacer region 91a in the first direction Y may be the same or different from the distance d8 between the first boundary Bb2 and the second boundary Ab2 on the other side of the pad spacer region 91a in the first direction Y. There is no limit here. The distance d9 between the third boundary Db2 and the fourth boundary Cb2 on one side of the pad spacer region 91a in the first direction Y may be the same or different from the distance d9 between the third boundary Db2 and the fourth boundary Cb2 on the other side of the pad spacer region 91a in the first direction Y. There is no limit here. Moreover, the distance d8 between the first boundary Bb2 and the second boundary Ab2 and the distance d9 between the third boundary Db2 and the fourth boundary Cb2 may be the same or different. There is no limit here.

[0137] Or, in some examples, referring again to Figure 23, the orthographic projection of the first region 611 on the substrate 311 coincides with the orthographic projection on the substrate 311 of two second boundaries Ab2 opposite to each other in the first direction Y of the first line cutout region 92a1. The orthographic projection of the third region 613 on the substrate 311 coincides with the orthographic projection on the substrate 311 of two fourth boundaries Cb2 opposite to each other in the first direction Y of the second line cutout region 92a2. In this case, if the connection line LL2 in the connection line is formed, one end of the connection line LL2 formed by the accumulated residual solder paste 80 along the first direction Y is connected to the first line 921, and the other end of the connection line LL2 along the first direction Y is connected to the second line 922. At this time, it is equivalent to the connection line LL2 being connected to the first pad 911 and the second pad 912, and it can still be called a solder short circuit between the pads of the driving backplane 90. The length of the connection line (i.e., the connection line LL2) here is still greater than the length of the connection line LL1, reducing the risk of solder short circuit between the pads of the driving backplane 90.

[0138] Therefore, it can be understood that the two second boundaries Ab2 opposite to each other in the first direction Y of the first line cutout region 92a1 can be farther away from the pad spacer 91a than the two first boundaries Bb2 opposite to each other in the first direction Y of the orthographic projection of the first region 611 on the substrate 311, or the distance between the two second boundaries Ab2 opposite to each other in the first direction Y of the first line cutout region 92a1 can be equal to the distance of the pad spacer 91a in the first direction Y. The two fourth boundaries Cb2 opposite to each other in the first direction Y of the second line cutout region 92a2 can be farther away from the pad spacer 91a than the two third boundaries Db2 opposite to each other in the first direction Y of the orthographic projection of the third region 613 on the substrate 311, or the distance between the two fourth boundaries Cb2 opposite to each other in the first direction Y of the second line cutout region 92a2 can also be equal to the distance of the pad spacer 91a in the first direction Y. Both can reduce the risk of solder short circuit between the pads of the driving backplane 90.

[0139] In some embodiments, referring back to Figure 17A, for each pad group 91, the two pads are the first pad 911 and the second pad 912. Among the two second boundaries Ab2 of the first circuit hollow-out area 92a1 opposite to each other in the first direction Y, the second boundary Ab2 on the same side of the pad spacing area 91a as the first pad 911 is farther from the pad spacing area 91a than the side 911a of the first pad 911 away from the pad spacing area. The second boundary Ab2 on the same side of the pad spacing area 91a as the second pad 912 is farther from the pad spacing area 91a than the side 912a of the second pad 912 away from the pad spacing area. The fourth boundary Cb2 on the same side of the pad spacing area 91a as the first pad 911 is farther from the pad spacing area 91a than the side 91a of the first pad 911 away from the pad spacing area. The fourth boundary Cb2 on the same side of the pad spacing area 91a as the second pad 912 is farther from the pad spacing area 91a than the side 912a of the second pad 912 away from the pad spacing area.

[0140] In some examples, referring back to Figure 17A , among the two second boundaries Ab2 of the first circuit hollow-out area 92a1 opposite to each other in the first direction Y, the second boundary Ab2 on the same side of the pad spacing area 91a as the first pad 911 is farther from the pad spacing area 91a than the side 911a of the first pad 911. The second boundary Ab2 on the same side of the pad spacing area 91a as the second pad 912 is farther from the pad spacing area 91a than the side 912a of the second pad 912. The fourth boundary Cb2 on the same side of the pad spacing area 91a as the first pad 911 is farther from the pad spacing area 91a than the side 91a of the first pad 911. The fourth boundary Cb2 on the same side of the pad spacing area 91a as the second pad 912 is farther from the pad spacing area 91a than the side 912a of the second pad 912. That is to say, the dimension d4 of the first circuit hollow-out area 92a1 in the first direction Y is greater than the spacing d14 between the side 911a of the first pad 911 and the side 912a of the second pad 912 in the first direction Y. The dimension d4 of the second circuit hollow-out area 92a2 in the first direction Y is greater than the spacing d14 between the side 911a of the first pad 911 and the side 912a of the second pad 912 in the first direction Y.

[0141] As Figure 17A shown, the structure of the driving backplane 90 after setting the reflective layer 314 is as Figure 25As shown, among the two second boundaries Ab2 opposite to each other in the first direction Y of the first circuit hollow-out area 92a1, the second boundary Ab2 on the same side of the pad spacing area 91a as the first pad 911 is set farther away from the pad spacing area 91a than the side 911a of the first pad 911. This can conveniently extend the length of the portion 70a of the gap 70 of the reflective layer 314 extending in the first direction Y, making the connection line LL2 formed by the residual solder paste 80 accumulated in the portion 70a of the gap 70 extending in the first direction Y longer, which will cause a short circuit, thereby reducing the risk of solder short circuit between the pads of the driving backplane 90. The setting that the second boundary Ab2 on the same side of the pad spacing area 91a as the second pad 912 is farther away from the pad spacing area 91a than the side 912a of the second pad 912, the setting that the fourth boundary Cb2 on the same side of the pad spacing area 91a as the first pad 911 is farther away from the pad spacing area 91a than the side 91a of the first pad 911, and the setting that the fourth boundary Cb2 on the same side of the pad spacing area 91a as the second pad 912 is farther away from the pad spacing area 91a than the side 912a of the second pad 912 are the same as the above principle and will not be elaborated here.

[0142] In some embodiments, referring again to Figure 17A , among the two second boundaries Ab2 opposite to each other in the first direction Y of the first circuit hollow-out area 92a1, and among the two fourth boundaries Cb2 opposite to each other in the first direction Y of the second circuit hollow-out area 92a2, the range of the distance d10 in the first direction Y between the second boundary Ab2 on the same side of the pad spacing area 91a as the first pad 911 and the side 911a of the first pad 911 away from the pad spacing area 91a, and the range of the distance d11 in the first direction Y between the fourth boundary Cb2 on the same side of the pad spacing area 91a as the first pad 911 and the side 911a of the first pad 911 away from the pad spacing area 91a are both 0.04 mm to 0.06 mm, that is, 0.06 mm ≥ d10 ≥ 0.04 mm, 0.06 mm ≥ d11 ≥ 0.04 mm. The range of the distance d12 in the first direction Y between the second boundary Ab2 on the same side of the pad spacing area 91a as the second pad 912 and the side 912a of the second pad 912 away from the pad spacing area 91a, and the range of the distance d13 in the first direction Y between the fourth boundary Cb2 on the same side of the pad spacing area 91a as the second pad 912 and the side 912a of the second pad 912 away from the pad spacing area 91a are both 0.04 mm to 0.06 mm, that is, 0.06 mm ≥ d12 ≥ 0.04 mm, 0.06 mm ≥ d13 ≥ 0.04 mm.

[0143] Exemplarily, referring again to Figure 17A, the distance d10 between the second boundary Ab2 on the same side of the pad spacer 91a as the first pad 911 and the side 911a of the first pad 911 in the first direction Y is 0.04 mm, 0.05 mm, 0.06 mm, etc., and there is no limit here. The distance d11 between the fourth boundary Cb2 on the same side of the pad spacer 91a as the first pad 911 and the side 911a of the first pad 911 in the first direction Y is 0.04 mm, 0.05 mm, 0.06 mm, etc., and there is no limit here. The distance d12 between the second boundary Ab2 on the same side of the pad spacer 91a as the second pad 912 and the side 912a of the second pad 912 in the first direction Y is 0.04 mm, 0.05 mm, 0.06 mm, etc., and there is no limit here. The distance d13 between the fourth boundary Cb2 on the same side of the pad spacer 91a as the second pad 912 and the side 912a of the second pad 912 in the first direction Y is 0.04 mm, 0.05 mm, 0.06 mm, etc., and there is no limit here.

[0144] It should be noted that the distance d10 between the second boundary Ab2 on the same side of the pad spacer 91a as the first pad 911 and the side 911a of the first pad 911 in the first direction Y, the distance d11 between the fourth boundary Cb2 on the same side of the pad spacer 91a as the first pad 911 and the side 911a of the first pad 911 in the first direction Y, the distance d12 between the second boundary Ab2 on the same side of the pad spacer 91a as the second pad 912 and the side 912a of the second pad 912 in the first direction Y, and the distance d13 between the fourth boundary Cb2 on the same side of the pad spacer 91a as the second pad 912 and the side 912a of the second pad 912 in the first direction Y can be equal or not equal, and there is no limit here, that is, d10 = d11 = d12 = d13, or d10 ≠ d11, d11 ≠ d12, d12 ≠ d13, and there is no limit here.

[0145] The setting of the dimension range of 0.06 mm ≥ d10 ≥ 0.04 mm, 0.06 mm ≥ d11 ≥ 0.04 mm, 0.06 mm ≥ d12 ≥ 0.04 mm, and 0.06 mm ≥ d13 ≥ 0.04 mm can maximize the length of the connection line LL2 required for solder bridging while meeting the requirement of reducing the overall size of the driving backplane 90.

[0146] In some examples, see again Figure 24, among the two second boundaries Ab2 opposite to each other in the first direction Y of the first circuit hollowing area 92a1, the second boundary Ab2 on the same side of the pad spacing area 91a as the first pad 911 is closer to the pad spacing area 91a than the side 911a of the first pad 911. The second boundary Ab2 on the same side of the pad spacing area 91a as the second pad 912 is closer to the pad spacing area 91a than the side 912a of the second pad 912. The fourth boundary Cb2 on the same side of the pad spacing area 91a as the first pad 911 is closer to the pad spacing area 91a than the side 91a of the first pad 911, and the fourth boundary Cb2 on the same side of the pad spacing area 91a as the second pad 912 is closer to the pad spacing area 91a than the side 912a of the second pad 912. In this case, the length of the connection line LL2 required for solder bridging of the pads of the driving backplane 90, such as Figure 25 shown, the length of the connection line LL2 required for solder bridging of the pads of the driving backplane 90 is shortened. However, the length of the connection line LL2 is still greater than the length of the above-mentioned connection line LL1, and the risk of solder bridging of the pads of the driving backplane 90 can still be reduced.

[0147] Therefore, the dimension d4 of the first circuit hollowing area 92a1 in the first direction Y and the dimension d4 of the second circuit hollowing area 92a2 in the first direction Y can be greater than the spacing d14 between the side 911a of the first pad 911 and the side 912a of the second pad 912 in the first direction Y. The dimension d4 of the first circuit hollowing area 92a1 in the first direction Y and the dimension d4 of the second circuit hollowing area 92a2 in the first direction Y can also be less than the spacing d14 between the side 911a of the first pad 911 and the side 912a of the second pad 912 in the first direction Y. As long as the dimension d4 of the first circuit hollowing area 92a1 in the first direction Y and the dimension d4 of the second circuit hollowing area 92a2 in the first direction Y are greater than the dimension h of the pad spacing area 91a in the first direction Y, there is no limitation here.

[0148] From the above content, it can be seen that in the structural design of the driving backplane 90 as shown in the present disclosure Figure 25 shown, the situation where the driving backplane 90 forms solder bridging is that it is necessary to form a connected line LL2 + LL31 + LL32. The lengths of the connection lines LL31 and LL32 are equal to the dimension of the first area 611 or the third area 613 along the second direction. Extending the length of the connection line LL2 can further reduce the risk of solder bridging of the pads of the driving backplane 90. Extending the dimension d4 of the first circuit hollowing area 92a1 in the first direction Y and the dimension d4 of the second circuit hollowing area 92a2 in the first direction Y can facilitate the subsequent setting of extending the length of the connection line LL2.

[0149] It should be noted that the dimension d4 of the first circuit hollow area 92a1 in the first direction Y and the dimension d4 of the second circuit hollow area 92a2 in the first direction Y may be the same or different, and there is no limitation here.

[0150] It can be understood that, as Figure 25 and Figure 27 shown, when among the two fourth boundaries Cb2 of the second circuit hollow area 92a2 that are opposite to each other in the first direction Y, the second boundary Ab2 on the same side of the first pad 911 as the pad spacer area 91a is far from the pad spacer area 91a, one end of LL31 in the connected circuit along the second direction X is connected to the first circuit 921 connected to the first pad 911. At this time, it is equivalent to the connected circuit LL2 + LL31 + LL32 being connected to the first pad 911, and it can still be called a solder short circuit of the pads of the driving backplane 90.

[0151] It should be noted that, as Figure 27 shown, the first pad 911 and the second pad 912 are not shown in the figure. It can be understood that the position marked by the first connecting solder paste 315a can be understood as the position where the first pad 911 is located, and the position marked by the second connecting solder paste 315b can be understood as the position where the second pad 912 is located.

[0152] In some embodiments, as Figure 17A shown, the dimensions d15 of the first circuit hollow area 92a1 and the second circuit hollow area 92a2 in the second direction X are both greater than 0.15 mm.

[0153] Exemplarily, the dimensions d15 of the first circuit hollow area 92a1 and the second circuit hollow area 92a2 in the second direction X can be 0.18 mm, 0.20 mm, 0.22 mm, etc., and there is no limitation here.

[0154] In some examples, referring back to Figure 23 , the structural introduction of the first circuit hollow area 92a1 and the second circuit hollow area 92a2 is as described above, and will not be elaborated here. It is only necessary that the dimensions d15 of the first circuit hollow area 92a1 and the second circuit hollow area 92a2 in the second direction X are greater than 0.15 mm, and the specific values are not limited.

[0155] With the setting that the dimensions d15 of the first circuit hollow area 92a1 and the second circuit hollow area 92a2 in the second direction X are both greater than 0.15 mm, when the dimension d5 range of the first area 611 and the third area 613 in the second direction X is 0.05 mm to 0.1 mm, it can ensure that the solder paste remaining in the gap 70 at the reflective layer 314 connected to the first area 611 and the third area 613 does not short-circuit with the circuit group 92 in the second direction X, reducing the risk of short circuit.

[0156] It should be noted that the dimension d15 of the first circuit hollow area 92a1 in the second direction X and the dimension d15 of the second circuit hollow area 92a2 in the second direction X may be the same or different, and are not limited herein.

[0157] In some embodiments, referring again to Figure 17A , the first circuit hollow area 92a1 and the second circuit hollow area 92a2 are symmetrically arranged with respect to the pad group 91.

[0158] Exemplarily, referring again to Figure 17A , the first circuit hollow area 92a1 and the second circuit hollow area 92a2 being symmetrically arranged with respect to the pad group 91 means that the first circuit hollow area 92a1 and the second circuit hollow area 92a2 are symmetrically arranged about the central axis ZZ of the pad group 91 in the second direction X, and can both be arranged as squares.

[0159] Arranging the first circuit hollow area 92a1 and the second circuit hollow area 92a2 symmetrically about the central axis ZZ of the pad group 91 in the second direction X, that is to say, the dimensions d4 of the first circuit hollow area 92a1 and the second circuit hollow area 92a2 in the first direction Y are equal, and the dimensions d15 of the first circuit hollow area 92a1 and the second circuit hollow area 92a2 in the second direction X are equal, which facilitates the fabrication of the driving backplane 90. The details are as described in the following content of the preparation method of the driving backplane 90, and will not be elaborated herein.

[0160] In some embodiments, referring again to Figure 17A and Figure 18 , the projected shapes of the first pad 911 and the second pad 912 on the substrate 311 are both square.

[0161] Exemplarily, the projected shapes of the first pad 911 and the second pad 912 on the substrate 311 are both square or rectangular.

[0162] In some embodiments, referring again to Figure 18 , the projected shape of the windowing area 61 on the substrate 311 is square.

[0163] In some examples, referring again to Figure 18, when the projections of the first pad 911 and the second pad 912 on the substrate 311 are square, the second region 612 exposes a pad group 91 and a pad spacer 91a corresponding to the pad group 91. Therefore, the second region 612 is square, and the dimension of the second region 612 in the first direction Y is equal to the distance d14 between the side 911a of the first pad 911 away from the pad spacer and the side 912a of the second pad 912 away from the pad spacer 91a in the first direction Y. When the opening region 61 is square, then the dimensions of the first region 611, the second region 612, and the third region 613 in the first direction Y are equal, all being the distance d14 between the side 911a of the first pad 911 away from the pad spacer and the side 912a of the second pad 912 away from the pad spacer 91a in the first direction Y.

[0164] In some examples, referring again to Figure 18 , the first region 611 and the third region 613 can be symmetrically arranged with respect to the central axis ZZ of the pad group 91 in the second direction X. That is to say, the dimensions d5 of the first region 611 and the third region 613 in the second direction X are equal.

[0165] The first pad 911 and the second pad 912 are set to the same square structure, and the projected shape of the opening region 61 on the substrate 311 is set to square, which is convenient for fabricating the opening region 61 on the reflective layer 314. The specific content is as described in the preparation method of the driving backplane 90 below and will not be elaborated here.

[0166] In some embodiments, as Figure 28 shown, the reflective layer 314 includes a first reflective layer 314c and a second reflective layer 314d stacked on the side of the first reflective layer 314c away from the substrate 311.

[0167] Exemplarily, both the first reflective layer 314c and the second reflective layer 314d are white ink layers. When the reflective layer 314 includes the first reflective layer 314c and the second reflective layer 314d stacked in the first direction Y, the thickness of the reflective layer 314 can be increased, and the light reflectivity of the reflective layer 314 can be improved.

[0168] As mentioned above, the edge portion of the reflective layer 314 near the opening region 61 has a gap 70. This gap 70 is formed by a part of the edge portion of the reflective layer 314 near the substrate 311 falling off. Refer to Figure 13 and Figure 20 , the gap 70 has defined dimensions in the third direction Z and the second direction X.

[0169] In some embodiments, the driving backplane 90 further includes a protective layer that covers the reflective layer 314 and is embedded in the windowing area 61 and the slit 70. Embedding the protective layer in the slit 70 can make the combination of the protective layer and the reflective layer 314 more firm, making the protective layer not easily fall off.

[0170] Some embodiments of the present disclosure also provide a method for manufacturing a driving backplane, as Figure 29 shown, the manufacturing method of the driving backplane 90 includes:

[0171] S1: Fabricate the substrate 311;

[0172] Exemplarily, the substrate 311 includes FR4 (a double-sided copper-clad PCB board made by laminating epoxy resin and glass cloth), BT (a thermosetting resin formed by using bismaleimide and triazine as the main resin components and adding epoxy resin, polyphenylene ether resin or allyl compound as a modification component), FPC or glass, etc., and there is no limitation here.

[0173] S2: As Figure 16 shown, form a circuit layer on the first surface 311a of the substrate 311. The circuit layer includes a plurality of circuit groups 92 and a plurality of pad groups 91. The plurality of pad groups 91 are arranged in an array on the first surface 311a of the substrate 311. Each pad group 91 includes two pads spaced apart along the first direction Y. A pad spacing area 91a is provided between the two pads. The plurality of circuit groups 92 are provided on the first surface 311a of the substrate 311. Each circuit group 92 includes two circuits, and one circuit in each circuit group 92 is connected to one pad in one pad group 91. Among them, as Figure 17A and 17B shown, at least one pad in the pad group 91 and the pattern of the circuit group 92 connected thereto define a circuit hollow-out area 92a. The circuit hollow-out area 92a includes a first circuit hollow-out area 92a1 and a second circuit hollow-out area 92a2. The first circuit hollow-out area 92a1 and the second circuit hollow-out area 92a2 are respectively provided on both sides of the pad along the second direction X. The dimension d4 of the first circuit hollow-out area 92a1 and the second circuit hollow-out area 92a1 in the first direction Y is greater than the dimension h of the pad spacing area 91a corresponding to the pad group 91 in the first direction Y. The second direction X is perpendicular to the first direction Y, and the second direction X and the first direction Y are parallel to the first surface 311a of the substrate 311.

[0174] Exemplarily, a metal material layer can be formed by processes such as sputtering, evaporation or chemical vapor deposition, and then an etching process is performed to form a circuit layer on the first surface 311a of the substrate 311.

[0175] In some examples, as Figure 17AAs shown, each pad group 91 includes a first pad 911 and a second pad 912 spaced along the first direction Y. Each line group 92 includes a first line 921 and a second line 922. The first pad 911 of a pad group 91 is connected to the first line 921 of a line group 92, and the second pad 912 of this pad group 91 is connected to the second line 922 of this line group 92. The first line hollow-out area 92a1 is located on the left side of the pad group 91 along the second direction X, and the second line hollow-out area 92a2 is located on the right side of the pad group 91 along the second direction X. One end of the first pad 911 far from the pad spacing area 91a is connected to the first line 921, and one end of the second pad 912 far from the pad spacing area 91a is connected to the second line 922.

[0176] It should be noted that both the first pad 911 and the second pad 912 are processed by the electroless nickel immersion gold process or the OSP process to improve the anti-oxidation function of the first pad 911 and the second pad 912 and improve their welding performance.

[0177] S3: As Figure 18 shown, a reflective layer 314 is formed on the first surface 311a of the substrate 311. The reflective layer 314 covers the first surface 311a of the substrate 311 and multiple line groups 92. Multiple windowing areas 61 are provided on the reflective layer 314. Each windowing area 61 includes a first area 611, a second area 612, and a third area 613 arranged along the second direction X. The second area 612 exposes a pad group 91 and the corresponding pad spacing area 91a of the pad group 91. The first area 611 and the third area 613 expose the first surface 311a of the substrate 311. The projection of the first line hollow-out area 92a1 on the substrate 311 is farther from the boundary Ab1 of the pad group 91 than the projection of the first area 611 on the substrate 311 is from the boundary Bb1 of the pad group 91 and is farther from the pad group 91. The projection of the second line hollow-out area 92a2 on the substrate 311 is farther from the boundary Cb1 of the pad group 91 than the projection of the third area 613 on the substrate 311 is from the boundary Db1 of the pad group 91 and is farther from the pad group 91.

[0178] Exemplarily, the reflective layer 314 is formed by an ink printing process, and multiple windowing areas 61 are formed on the reflective layer 314 by irradiation with ultraviolet light.

[0179] S4: As Figure 21 shown, a solder paste is formed on each pad.

[0180] Exemplarily, by arranging a stencil above the driving backplane 90, the solder paste on the stencil is scraped onto the corresponding pads by a squeegee.

[0181] In some examples, to form as Figure 25Taking the driving backplane 90 shown as an example, in step S2 of forming a circuit layer on the first surface 311a of the substrate 311, as Figure 30 shown, it includes:

[0182] S21: As Figure 31 shown, form a metal material layer 901 on the first surface 311a of the substrate 311.

[0183] Exemplarily, the metal material layer 901 includes, for example, silver (Ag), magnesium (Mg), calcium (Ca), lithium (Li), etc.

[0184] S22: As Figure 32 shown, form a photoresist layer 93 on the metal material layer 901.

[0185] Exemplarily, the material of the photoresist layer 93 is polyimide. By using a coating process, a photoresist material is coated on the metal material layer 901 to form the photoresist layer 93.

[0186] S23: As Figure 34 shown, expose the photoresist layer 93 using a mask plate 94 to form a fully exposed area photoresist 93a and a non-exposed area photoresist 93b in the photoresist layer 93. The local structure of the mask plate 94 is as Figure 33 shown, Figure 34 The mask plate 94 in Figure 34 is a cross-sectional view obtained based on the cross-section line OO.

[0187] Exemplarily, the mask plate 94 includes a light-shielding area 94a and an opening 94b. The light-shielding area 94a blocks all light from passing through, corresponding to the non-exposed area photoresist 93b in the photoresist layer 93. The opening 94b does not block light, corresponding to the fully exposed area photoresist 93a in the photoresist layer 93. After exposure, corresponding to the positions of the opening 94b and the light-shielding area 94a of the mask plate 94, the photoresist layer 93 forms a fully exposed area photoresist 93a and a non-exposed area photoresist 93b.

[0188] It should be noted that the above A and B "correspond", and the orthographic projections of A and B on the substrate 10 coincide.

[0189] S24: As Figure 35 shown, develop the photoresist layer 93 to remove the fully exposed area photoresist 93a.

[0190] Exemplarily, use a developer to develop the photoresist layer 93. The fully exposed area photoresist 93a is completely removed, and the non-exposed area photoresist 93b is completely retained.

[0191] S25: As Figure 36As shown, etch the metal material layer 901 to remove the portion of the metal material layer 901 exposed by the photoresist layer 93. Expose the first surface 311a of the substrate 311, and the portion exposing the first surface 311a of the substrate 311 forms a pad spacer region 91a and a line hollowing region 92a.

[0192] S26: As Figure 37 shown, strip the remaining portion in the photoresist layer 93.

[0193] The remaining portion of the photoresist layer 93 is the unexposed area photoresist 93b.

[0194] S27: Treat the position corresponding to the pad group 91 in the line layer by electroless nickel immersion gold process to form a first pad 911 and a second pad 912, and form a line layer, the structure is as Figure 17A shown.

[0195] In some examples, taking the formation of the driving backplane 90 as shown in Figure 25 as an example, the step S3 of forming the reflective layer 314 on the first surface 311a of the substrate 311, as Figure 38 shown, includes:

[0196] S31: As Figure 39 shown, form a reflective material layer 3140 on the substrate 311.

[0197] Exemplarily, the material of the reflective material layer 3140 includes white ink, and the reflective material layer 3140 is formed by an ink printing process.

[0198] S32: As Figure 40 shown, expose the reflective material layer 3140 using a mask plate 95 to form a fully exposed area reflective material 140a and an unexposed area reflective material 140b in the reflective material layer 3140.

[0199] Exemplarily, the mask plate 95 includes a light-shielding region 95a and an opening 95b. After exposure, corresponding to the positions of the opening 95b and the light-shielding region 95a of the mask plate 95, the reflective material layer 3140 forms a fully exposed area reflective material 140a and an unexposed area reflective material 140b.

[0200] S33: Develop the reflective material layer 3140 to remove the fully exposed area reflective material 140a and form the reflective layer 314. The position of the fully exposed area reflective material 140a corresponds to the position of the windowing area 61 of the reflective layer 314, and the structure is as Figure 18 shown.

[0201] In some embodiments, as Figure 28As shown, in step S3 of forming the reflective layer 314 on the first surface 311a of the substrate 311, it includes forming a first reflective layer 314c on the first surface 311a of the substrate 311, and forming a second reflective layer 314d on a side of the first reflective layer 314c away from the first surface 311a.

[0202] Exemplarily, after forming two layers of reflective material layers 3140 by an ink printing process, step S32 is then carried out to form an opening region 61 on the two layers of reflective material layers 3140, obtaining a structure with a first reflective layer 314c and a second reflective layer 314d, increasing the thickness of the reflective layer 314 and improving the light reflectivity of the reflective layer 314.

[0203] It should be noted that the reflective layer 314 may include one layer of reflective material layer, two layers of reflective material layers, three layers of reflective material layers, etc., and there is no limitation here.

[0204] The beneficial effects of the above method for preparing the driving backplane are the same as those of the driving backplane provided in the first aspect of the present disclosure, and will not be elaborated here.

[0205] Some embodiments of the present disclosure further provide a display device, including the driving backplane as described above. The display device is, for example, a liquid crystal display device, and the driving backplane is disposed in the backlight 30 of the liquid crystal display device. For related structures, reference can be made to Figures 1 - 6 and the related descriptions above.

[0206] The display device provided by the embodiments of the present disclosure can be any device that displays whether moving (e.g., video) or stationary (e.g., still image) and whether text or image. More specifically, it is expected that the embodiments can be implemented in or associated with a variety of electronic devices, such as (but not limited to) mobile phones, wireless devices, personal digital assistants (PDAs), handheld or portable computers, GPS receivers / navigators, cameras, MP4 video players, video cameras, game consoles, watches, clocks, calculators, television monitors, flat panel displays, computer monitors, automotive displays (e.g., odometer displays, etc.), navigators, cockpit controllers and / or displays, displays of camera views (e.g., displays of rear view cameras in vehicles), electronic photos, electronic billboards or signs, projectors, architectural structures, packaging, and aesthetic structures (e.g., displays of images of a piece of jewelry), etc.

[0207] The beneficial effects of the above display device are the same as those of the driving backplane provided in the first aspect of the present disclosure, and will not be elaborated here.

[0208] As described above, it is only the specific implementation manner of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present disclosure, thinking of changes or substitutions, should be covered within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims described.

Claims

1. A driving backplane, characterized in that, Comprising: A substrate; A plurality of pad groups, arranged in an array on the first surface of the substrate, each pad group including two pads spaced apart in a first direction; there is a pad spacing region between the two pads; A plurality of line groups, disposed on the first surface of the substrate, each line group including two lines, and one line in each line group is connected to one pad in one pad group; Wherein, in the pad group, at least one pad and the pattern of the line connected thereto define a line hollow-out region, and the line hollow-out region includes a first line hollow-out region and a second line hollow-out region; the first line hollow-out region and the second line hollow-out region are respectively disposed on both sides of the pad in the second direction; the sizes of the first line hollow-out region and the second line hollow-out region in the first direction are greater than the size of the corresponding pad spacing region of the pad group in the first direction; the second direction is perpendicular to the first direction, and the second direction and the first direction are parallel to the first surface of the substrate; A reflective layer, covering the first surface of the substrate and the plurality of line groups, and a plurality of window regions are provided on the reflective layer, each window region including a first region, a second region, and a third region arranged in the second direction; the second region exposes one pad group and the corresponding pad spacing region of the pad group; the first region and the third region expose the first surface of the substrate; the projection of the first line hollow-out region on the substrate is farther from the boundary of the pad group than the projection of the first region on the substrate is from the boundary of the pad group and is farther from the pad group; the projection of the second line hollow-out region on the substrate is farther from the boundary of the pad group than the projection of the third region on the substrate is from the boundary of the pad group and is farther from the pad group.

2. The driving backplane according to claim 1, wherein The line hollow-out region is defined by two pads in the pad group and the line group connected thereto; The first line hollow-out region and the second line hollow-out region are respectively disposed on both sides of the pad group in the second direction.

3. The driving backplane according to claim 1 or 2, wherein The distance in the second direction between the projection of the first line hollow-out region on the substrate and the boundary of the pad group and the projection of the first region on the substrate and the boundary of the pad group is greater than 1.2 times the distance in the third direction between the surface of the reflective layer away from the substrate and the first surface of the substrate; And, The distance in the second direction between the projection of the second line hollow-out region on the substrate and the boundary of the pad group and the projection of the third region on the substrate and the boundary of the pad group is greater than 1.2 times the distance in the third direction between the surface of the reflective layer away from the substrate and the first surface of the substrate; The third direction is perpendicular to the plane where the substrate is located.

4. The driving backplane according to claim 1 or 2, characterized in that, The sizes of the first region and the third region in the second direction range from 0.05 mm to 0.1 mm.

5. The driving backplane according to claim 1, wherein The two second boundaries of the first circuit hollow-out region that are opposite to each other in the first direction are farther away from the pad spacing region than the two first boundaries of the projection of the first region on the substrate that are opposite to each other in the first direction; The two fourth boundaries of the second circuit hollow-out region that are opposite to each other in the first direction are farther away from the pad spacing region than the two third boundaries of the projection of the third region on the substrate that are opposite to each other in the first direction.

6. The driving backplane according to claim 5, wherein Among the two first boundaries of the projection of the first region on the substrate that are opposite to each other in the first direction, and among the two second boundaries of the first circuit hollow-out region that are opposite to each other in the first direction, The distance between the first boundary and the second boundary on the same side of the pad spacing region in the first direction is greater than 1.2 times the distance between the surface of the reflective layer away from the substrate and the first surface of the substrate in the third direction; and / or, Among the two third boundaries of the projection of the third region on the substrate that are opposite to each other in the first direction, and among the two fourth boundaries of the second circuit hollow-out region that are opposite to each other in the first direction, The distance between the third boundary and the fourth boundary on the same side of the pad spacing region in the first direction is greater than 1.2 times the distance between the surface of the reflective layer away from the substrate and the first surface of the substrate in the third direction.

7. The driving backplane according to claim 1 or 5, characterized in that, The two pads of each pad group are a first pad and a second pad. Among the two second boundaries of the first circuit hollow-out region that are opposite to each other in the first direction, The second boundary on the same side of the pad spacing region as the first pad is farther away from the pad spacing region than the side of the first pad away from the pad spacing region; and / or, the second boundary on the same side of the pad spacing region as the second pad is farther away from the pad spacing region than the side of the second pad away from the pad spacing region; and / or, among the two fourth boundaries of the second circuit hollow-out region that are opposite to each other in the first direction, The fourth boundary on the same side of the pad spacing region as the first pad is farther away from the pad spacing region than the side of the first pad away from the pad spacing region; and / or, the fourth boundary on the same side of the pad spacing region as the second pad is farther away from the pad spacing region than the side of the second pad away from the pad spacing region.

8. The driving backplane according to claim 7, characterized in that, Among the two second boundaries of the first circuit hollow-out region that are opposite to each other in the first direction, and among the two fourth boundaries of the second circuit hollow-out region that are opposite to each other in the first direction, The distance range between the second boundary on the same side of the pad spacing region as the first pad and the side of the first pad away from the pad spacing region in the first direction, and the distance range between the fourth boundary on the same side of the pad spacing region as the first pad and the side of the first pad away from the pad spacing region in the first direction are both 0.04 mm to 0.06 mm; and / or, The spacing range in the first direction between the second boundary on the same side of the pad spacer as the second pad and the side of the second pad away from the pad spacer, and the spacing range in the first direction between the fourth boundary on the same side of the pad spacer as the second pad and the side of the second pad away from the pad spacer are both 0.04 mm to 0.06 mm.

9. The driving backplane according to claim 1 or 8, characterized in that, The sizes of the first circuit hollow-out area and the second circuit hollow-out area in the second direction are both greater than 0.15 mm.

10. The driving backplane according to claim 1 or 2, characterized in that, The first circuit hollow-out area and the second circuit hollow-out area are symmetrically arranged with respect to the pad group.

11. The driving backplane according to claim 7, characterized in that, The projected shapes of the first pad and the second pad on the substrate are both square.

12. The driving backplane according to claim 11, wherein The projected shape of the windowing area on the substrate is square.

13. The driving backplane according to claim 7, wherein Further comprising: A plurality of first connecting solder pastes, each first connecting solder paste covering one first pad; A plurality of second connecting solder pastes, each second connecting solder paste covering one second pad.

14. The driving backplane according to claim 13, wherein, Further comprising a plurality of light-emitting chips, each light-emitting chip being electrically connected to a pad group through one first connecting solder paste and one second connecting solder paste.

15. The driving backplane according to claim 1 or 2, characterized in that, The reflective layer includes a first reflective layer and a second reflective layer stacked on the side of the first reflective layer away from the substrate.

16. The driving backplane according to claim 1 or 2, wherein The edge portion of the reflective layer near the windowing area has a gap. The maximum size of the gap in the third direction is 1 / 2 to 2 / 3 of the thickness of the reflective layer, and the size of the gap in the second direction is 1.1 to 1.2 times the thickness of the reflective layer. The third direction is perpendicular to the plane of the substrate.

17. A manufacturing method of a driving backplane, characterized in that, Comprising: Fabricating a substrate; Forming a circuit layer on the first surface of the substrate, the circuit layer including a plurality of circuit groups and a plurality of pad groups; The plurality of pad groups are arranged in an array on the first surface of the substrate. Each pad group includes two pads spaced apart in the first direction; there is a pad spacer between the two pads; the plurality of circuit groups are arranged on the first surface of the substrate. Each circuit group includes two circuits, and one circuit in each circuit group is connected to one pad in one pad group; wherein, at least one pad in the pad group and the pattern of the circuit connected thereto define a circuit hollow-out area, and the circuit hollow-out area includes a first circuit hollow-out area and a second circuit hollow-out area; the first circuit hollow-out area and the second circuit hollow-out area are respectively arranged on both sides of the pad in the second direction; the size of the first circuit hollow-out area and the second circuit hollow-out area in the first direction is greater than the size of the pad spacer corresponding to the pad group in the first direction; the second direction is perpendicular to the first direction, and the second direction and the first direction are parallel to the first surface of the substrate; A reflective layer is formed on a first surface of the substrate, the reflective layer covering the first surface of the substrate and the plurality of line groups, and a plurality of windowed areas are provided on the reflective layer, each windowed area including a first area, a second area, and a third area arranged along the second direction; the second area exposes a pad group and a pad spacer corresponding to the pad group; the first area and the third area expose the first surface of the substrate; a projection of the first line cutout area on the substrate is farther from a boundary of the pad group than a projection of the first area on the substrate is from the boundary of the pad group and farther from the pad group; a projection of the second line cutout area on the substrate is farther from a boundary of the pad group than a projection of the third area on the substrate is from the boundary of the pad group and farther from the pad group. A connection solder paste is formed on each pad.

18. The manufacturing method of the driving backplane according to claim 17, characterized in that, In the step of forming the reflective layer on the first surface of the substrate, it includes forming a first reflective layer on the first surface of the substrate and forming a second reflective layer on a side of the first reflective layer away from the first surface.

19. A display device, characterized in that, It includes the driving backplane according to any one of claims 1 to 16.

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