A test circuit for a memristor

Abstract

The present application relates to a kind of test circuit of memristor, belong to the technical field of test of memristor.The present application discloses a kind of test circuit of memristor, including voltage source module 1, constant current source module 2, analog switch 3, sampling resistance 4, current-limiting judging module 5, memristor 6 and auxiliary measurement acquisition module 7, with the following advantages:(1) the test instrument of the test circuit of memristor is small and portable, can verify device immediately;(2) limiting current can reach microampere level, can reach smaller limiting current value, and can detect current value in real time;(3) the resistance range of detection is large, can cover most use scenarios, can be extended into two-end device IV curve measurement;(4) compared with large instrument, cost is lower.

Description

Technical Field

[0001] This invention belongs to the field of memristor testing and relates to a memristor testing circuit. Background Technology

[0002] Memristors are a new type of electronic component discovered in recent years. The resistance of a memristor changes with the magnitude of the current flowing through it, and its resistance remains unchanged after power is turned off, thus exhibiting the characteristic of resistance memory. Due to its advantages in switching performance, integration density, non-volatility, and multi-value storage, memristors have attracted widespread attention from researchers since their introduction in 2008, and have broad application prospects in the field of next-generation computer fundamental physics devices.

[0003] Memristors possess non-volatile storage characteristics; therefore, it is typically necessary to test their DC voltage-current characteristic curves to obtain the SET voltage, RESET voltage, and high / low resistance window values. The testing procedure for the memristor's resistance transition characteristics is as follows: During the SET process, a bias voltage is applied to the memristor, increasing from zero to a set positive or negative voltage value, and then decreasing back to zero. During the scan, if the voltage exceeds the memristor's SET voltage value, the memristor's resistance will change from a high resistance state to a low resistance state. The RESET process involves decreasing the applied bias voltage to the memristor from zero to a set negative voltage value, and then increasing it back to zero. During the scan, if the voltage exceeds the memristor's RESET voltage value, the memristor's resistance will change from a low resistance state to a high resistance state. It is usually necessary to limit the current flowing through the memristor during the SET process to prevent excessive current from flowing when the memristor transitions from a high resistance state to a low resistance state, which could damage the device's performance or cause hard breakdown and failure.

[0004] Currently, common electrical testing instruments for memristors mainly include the Keithley 4200A-SCS and Agilent B-1500A from abroad. These large instruments are not only expensive, but also bulky, which is not conducive to the portability and timeliness of testing.

[0005] Therefore, it is necessary to study new test circuits for memristors to address the issues of portability and timeliness in testing. Summary of the Invention

[0006] In view of this, the purpose of the present invention is to provide a test circuit for a memristor.

[0007] To achieve the above objectives, the present invention provides the following technical solution:

[0008] 1. A test circuit for a memristor, comprising a voltage source module 1, a constant current source module 2, an analog switch 3, a sampling resistor 4, a current limiting judgment module 5, a memristor 6, and an auxiliary measurement and acquisition module 7, wherein the output terminal of the voltage source module 1 is connected to the first branch 3-1 of the analog switch 3, the constant current source module 2 is connected to the second branch 3-2 of the analog switch 3, the output terminal of the analog switch 3 is connected to one end of the sampling resistor 4, the other end of the sampling resistor 4 is connected to the input terminal of the memristor 6, the current limiting judgment module 5 is connected in parallel across the sampling resistor 4, and the output terminal of the memristor 6 is connected to the auxiliary measurement and acquisition module 7.

[0009] Preferably, the voltage source module 1 includes a DAC chip and a first operational amplifier of the voltage source module, wherein the output terminal of the DAC chip is connected to the non-inverting input terminal of the first operational amplifier of the voltage source module, and the inverting input terminal of the first operational amplifier of the voltage source module is connected to the output terminal of the first operational amplifier.

[0010] Preferably, the constant current source module 2 includes a first operational amplifier U1, a second operational amplifier U2, a third operational amplifier U3, a fourth operational amplifier U4, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, and an eighth resistor R8. The resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5, the seventh resistor R7, and the eighth resistor R8 are equal, and the resistance value of the sixth resistor R6 is set to the output value of the constant current source.

[0011] The first resistor R1 is connected to the externally input reference voltage and the inverting input of the first operational amplifier U1, respectively; the second resistor R2 is connected to the inverting input and output of the first operational amplifier U1, respectively; the non-inverting input of the first operational amplifier U1 is grounded; the third resistor R3 is connected to the output of the first operational amplifier U1 and the inverting input of the second operational amplifier U2, respectively; the fourth resistor R4 is connected to the output of the fourth operational amplifier U4 and the inverting input of the second operational amplifier U2, respectively; the fifth resistor R5... The two ends of the first resistor R1 are connected to the output terminal and the inverting input terminal of the second operational amplifier U2, respectively; the two ends of the sixth resistor R6 are connected to the output terminal of the second operational amplifier U2 and the non-inverting input terminal of the third operational amplifier U3, respectively; the inverting input terminal of the third operational amplifier U3 is connected to the output terminal of the third operational amplifier U3; the two ends of the seventh resistor R7 are connected to the output terminal of the third operational amplifier U3 and the inverting input terminal of the fourth operational amplifier U4, respectively; the two ends of the eighth resistor R8 are connected to the output terminal and the inverting input terminal of the fourth operational amplifier U4, respectively.

[0012] Preferably, the current limiting judgment module 5 includes a first current detection operational amplifier A1, a first voltage operational amplifier A2, a first comparator, a second comparator, a judgment signal IS1, a judgment signal IIS2, and a microcontroller;

[0013] Both ends of the sampling resistor 4 are connected to the input terminals of the first current detection operational amplifier A1; the output terminal of the first current detection operational amplifier A1 is connected to the input terminal of the first voltage operational amplifier A2; the output of the first voltage operational amplifier A2 is connected to the inverting input terminal of the first comparator; the non-inverting input terminal of the first comparator is connected to the externally input reference voltage, and the output terminal of the first comparator is connected to the judgment signal IS1; the non-inverting input terminal of the second comparator is connected to the output terminal of the constant current source module 2, the inverting input terminal of the second comparator is connected to the output terminal of the voltage source module 1, and the output terminal of the first comparator is connected to the judgment signal IS2.

[0014] The judgment signal IS1 and judgment signal IIS2 are connected to the input register of the microcontroller. The analog switch 3 includes two branches, wherein the input terminal of the first branch 3-1 is connected to the output terminal of the voltage source module 1, the input terminal of the second branch 3-2 is connected to the output terminal of the constant current source module 2, and the control signal input terminal of the analog switch 3 is connected to the output register of the microcontroller.

[0015] Preferably, the auxiliary measurement and acquisition module 7 includes a first transimpedance operational amplifier U-7-1, a first resistor R-7-1, a first capacitor C1, an ADC chip, and a first operational amplifier U-7-2.

[0016] The output terminal of the memristor 6 is connected to the inverting input terminal of the first transimpedance operational amplifier U-7-1. The non-inverting input terminal of the first transimpedance operational amplifier U-7-1 is grounded. The output terminal of the first transimpedance operational amplifier U-7-1 is connected to one end of the first resistor R-7-1 of the auxiliary measurement and acquisition module and then connected to the non-inverting input terminal of the first operational amplifier U-7-2 of the auxiliary measurement and acquisition module. The inverting input terminal of the first operational amplifier U-7-2 of the auxiliary measurement and acquisition module is connected to the output terminal of the first operational amplifier U-7-2 of the auxiliary measurement and acquisition module and the input terminal of the ADC chip, respectively.

[0017] The beneficial effects of the present invention are as follows: The present invention discloses a test circuit for a memristor, including a voltage source module 1, a constant current source module 2, a sampling resistor 4, a current limiting judgment module 5, a memristor 6, and an auxiliary measurement and acquisition module 7, which has the following advantages: (1) The test instrument of the memristor test circuit is small and portable, and can verify the device in real time; (2) The current limiting can reach the microamp level, which can achieve a small current limiting value, and can detect the current value in real time; (3) The detection resistance range is large, which can cover most application scenarios, and can be extended to the measurement of the IV curve of the two-terminal device; (4) The cost is lower than that of large instruments.

[0018] Other advantages, objectives, and features of the invention will be set forth in part in the description which follows, and in part will be apparent to those skilled in the art from the following examination, or may be learned from practice of the invention. The objectives and other advantages of the invention can be realized and obtained through the following description. Attached Figure Description

[0019] To make the objectives, technical solutions, and advantages of the present invention clearer, the preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, wherein:

[0020] Figure 1 This is a detailed circuit diagram of the memristor test circuit of the present invention;

[0021] Figure 2 This is a detailed circuit diagram of the current limiting judgment module of the memristor test circuit of the present invention.

[0022] Figure 3 This is a detailed circuit diagram of the voltage source module of the memristor test circuit of the present invention;

[0023] Figure 4 This is a detailed circuit diagram of the constant current source module of the memristor test circuit of the present invention;

[0024] Figure 5 This is a detailed circuit diagram of the auxiliary sampling module of the memristor test circuit of the present invention;

[0025] 1 is a voltage source module, 2 is a constant current source module (where U1 is the first operational amplifier, U2 is the second operational amplifier, U3 is the third operational amplifier, U4 is the fourth operational amplifier, R1 is the first resistor, R2 is the second resistor, R3 is the third resistor, R4 is the fourth resistor, R5 is the fifth resistor, R6 is the sixth resistor, R7 is the seventh resistor, and R8 is the eighth resistor), 3 is an analog switch (3-1 is the first branch, 3-2 is the second branch), 4 is a sampling resistor, 5 is a current limiting judgment module (where A1 is the first current detection operational amplifier, A2 is the first voltage operational amplifier, S1 is judgment signal I, and S2 is judgment signal II), 6 is a memristor, and 7 is an auxiliary measurement acquisition module (where U-7-1 is the first transimpedance operational amplifier, R-7-1 is the first resistor of the auxiliary measurement acquisition module, C1 is the first capacitor, and U-7-2 is the first operational amplifier of the auxiliary measurement acquisition module). Detailed Implementation

[0026] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0027] Example 1

[0028] A test circuit for a memristor (e.g.) Figure 1 As shown, the system includes a voltage source module 1, a constant current source module 2, an analog switch 3, a sampling resistor 4, a current limiting judgment module 5, a memristor 6, and an auxiliary measurement and acquisition module 7. The output terminal of the voltage source module 1 is connected to the first branch 3-1 of the analog switch 3. The constant current source module 2 is connected to the second branch 3-2 of the analog switch 3. The output terminal of the analog switch 3 is connected to one end of the sampling resistor 4. The other end of the sampling resistor 4 is connected to the input terminal of the memristor 6. The current limiting judgment module 5 is connected in parallel across the two ends of the sampling resistor 4. The output terminal of the memristor 6 is connected to the auxiliary measurement and acquisition module 7.

[0029] The voltage source module 1 includes a DAC chip and a first operational amplifier of the voltage source module. The output terminal of the DAC chip is connected to the non-inverting input terminal of the first operational amplifier of the voltage source module, and the inverting input terminal of the first operational amplifier of the voltage source module is connected to the output terminal of the first operational amplifier.

[0030] The aforementioned constant current source module 2 includes a first operational amplifier U1, a second operational amplifier U2, a third operational amplifier U3, a fourth operational amplifier U4, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, and an eighth resistor R8. The resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5, the seventh resistor R7, and the eighth resistor R8 are equal, and the resistance value of the sixth resistor R6 is set as the output value of the constant current source.

[0031] The first resistor R1 is connected to the externally input reference voltage and the inverting input of the first operational amplifier U1, respectively; the second resistor R2 is connected to the inverting input and output of the first operational amplifier U1, respectively; the non-inverting input of the first operational amplifier U1 is grounded; the third resistor R3 is connected to the output of the first operational amplifier U1 and the inverting input of the second operational amplifier U2, respectively; the fourth resistor R4 is connected to the output of the fourth operational amplifier U4 and the inverting input of the second operational amplifier U2, respectively; the fifth resistor R5... The two ends of the first resistor R1 are connected to the output terminal and the inverting input terminal of the second operational amplifier U2, respectively; the two ends of the sixth resistor R6 are connected to the output terminal of the second operational amplifier U2 and the non-inverting input terminal of the third operational amplifier U3, respectively; the inverting input terminal of the third operational amplifier U3 is connected to the output terminal of the third operational amplifier U3; the two ends of the seventh resistor R7 are connected to the output terminal of the third operational amplifier U3 and the inverting input terminal of the fourth operational amplifier U4, respectively; the two ends of the eighth resistor R8 are connected to the output terminal and the inverting input terminal of the fourth operational amplifier U4, respectively.

[0032] The aforementioned current limiting judgment module 5 includes a first current detection operational amplifier A1, a first voltage operational amplifier A2, a first comparator, a second comparator, judgment signal IS1, judgment signal IIS2, and a microcontroller; wherein both ends of the sampling resistor 4 are connected to the input terminals of the first current detection operational amplifier A1; the output terminal of the first current detection operational amplifier A1 is connected to the input terminal of the first voltage operational amplifier A2; the output of the first voltage operational amplifier A2 is connected to the inverting input terminal of the first comparator; the non-inverting input terminal of the first comparator is connected to an externally input reference voltage, and the first comparator... The output terminal is connected to the judgment signal IS1; the non-inverting input terminal of the second comparator is connected to the output terminal of the constant current source module 2, the inverting input terminal of the second comparator is connected to the output terminal of the voltage source module 1, and the output terminal of the first comparator is connected to the judgment signal IIS2; the judgment signals IS1 and IIS2 are connected to the input register of the microcontroller, the analog switch 3 includes two branches, the input terminal of the first branch 3-1 is connected to the output terminal of the voltage source module 1, the input terminal of the second branch 3-2 is connected to the output terminal of the constant current source module 2, and the control signal input terminal of the analog switch is connected to the output register of the microcontroller.

[0033] The aforementioned auxiliary measurement and acquisition module 7 includes a first transimpedance operational amplifier U-7-1, a first resistor R-7-1, a first capacitor C1, an ADC chip, and a first operational amplifier U-7-2. The output of the memristor 6 is connected to the inverting input of the first transimpedance operational amplifier U-7-1, the non-inverting input of the first transimpedance operational amplifier U-7-1 is grounded, the output of the first transimpedance operational amplifier U-7-1 is connected to one end of the first resistor R-7-1 and then to the non-inverting input of the first operational amplifier U-7-2, and the inverting input of the first operational amplifier U-7-2 is connected to both the output of the first operational amplifier U-7-2 and the input of the ADC chip.

[0034] The process and principle of testing the DC voltage-current characteristics of a memristor according to the present invention are described in detail below with reference to the accompanying drawings:

[0035] During the SET and RESET processes, the DAC chip in the voltage source module provides a linearly increasing voltage excitation to the memristor, and the first operational amplifier in the voltage source module enhances the load-carrying capacity of the DAC chip's output voltage.

[0036] The specific circuit diagram in the current limiting judgment module is as follows: Figure 2 (Where DAC is the DAC chip, U1 is the first operational amplifier, and Vout is the output voltage) As shown, the current limiting judgment module converts the flowing current into voltage through a sampling resistor, and the calculation formula is as follows:

[0037] V 采 =I 忆 *R 采 *A1*A2(1.1)

[0038] Where A1 is the gain of the first current detection operational amplifier in the current limiting judgment module, A2 is the gain of the first voltage operational amplifier in the current limiting judgment module, and V 采 The voltage across the sampling resistor is amplified by the first current detection operational amplifier and the first voltage operational amplifier, R. 采 I is the resistance value of the sampling resistor. 忆 This is the current flowing through the sampling resistor (i.e., the current value flowing through the memristor).

[0039] The voltage value of the externally input reference voltage (V) 参 By setting the current limit (I) 限 The calculation is as follows:

[0040] V 参 =I 限 *R 采 *A1*A2 (1.2)

[0041] When the sampled voltage (the voltage flowing through the sampling resistor, amplified by the first current detection operational amplifier and the first voltage operational amplifier) ​​is greater than the reference voltage (V) 采 >V 参 At this time, the current value flowing through the sampling resistor (I) 忆 The current value (I) is greater than the current limit. 限 The first comparator of the current limiting judgment module outputs a high level to the microcontroller, and the microcontroller switches the analog switch to the current limiting branch.

[0042] After switching to the current-limiting branch, the second comparator in the current-limiting judgment module starts working.

[0043] V 恒流源 =I 忆 *(R 采 +R 忆 (1.3)

[0044] The specific circuitry in the voltage source module is as follows: Figure 3 As shown, when the voltage in the constant current source module is greater than the voltage in the voltage source module (V) 恒流源 When the voltage source is greater than V, the current generated by the voltage source-driven memristor will be less than the current limit value, and the microcontroller will control the analog switch to switch to the voltage source output branch.

[0045] The specific circuit diagram of the constant current source module is as follows: Figure 4As shown, it uses the third operational amplifier (U3) to convert the output voltage (V) 输出 The value is fed back to the output voltage, so that the input voltage at the left end of the sixth resistor (R6) satisfies the following formula:

[0046] V 输入 =V 参考 +V 输出 (1.4)

[0047] Where V 输入 The input voltage at the left end of the sixth resistor, V 参考 The external input reference voltage for the constant current source, V 输出 This is the output voltage at the right end of the sixth resistor.

[0048] The current (I) flowing through the sixth resistor (R6) 恒 Calculate according to the following formula:

[0049] I 恒 =(V ted输入 -V ted输出 ) / R6=(V ted参考 +V ted输入 -V ted输出 ) / R6=V ted参考 / R6 (1.5)

[0050] R6 is the resistance value of the sixth resistor (R6) (set as the output value of the constant current source), thereby achieving a constant output current value.

[0051] The specific circuit diagram of the auxiliary sampling module is as follows: Figure 5 As shown, the auxiliary sampling module includes a first transimpedance operational amplifier, a first resistor, a first capacitor, an ADC, and a first operational amplifier. The first transimpedance operational amplifier converts the current (I) into a signal. 忆 The value is converted into a voltage (V1) value, and the calculation formula is as follows (where R is the transimpedance value of the first transimpedance operational amplifier):

[0052] V1 = -I 忆 *R (1.6)

[0053] The inverting amplifier circuit formed by the second operational amplifier (U2) in the constant current source module converts the negative voltage (V1) output by the first transimpedance operational amplifier into a positive voltage (V2), which facilitates ADC sampling, as detailed below:

[0054] V2 = -V1 (1.7)

[0055] The low-pass filter formed by the first resistor and the first capacitor of the auxiliary measurement and acquisition module filters out high-frequency noise in the output voltage, reducing noise interference to the signal. Where f 低通Here, R1 is the filter frequency value, R1 is the resistance value of the first resistor (R1) in the auxiliary measurement and acquisition module, and C1 is the capacitance value of the first capacitor (C1). 低通 The calculation formula is as follows:

[0056]

[0057] The sampled voltage is sent to the microcontroller to calculate the current value. R is the transimpedance value of the first transimpedance operational amplifier. The specific calculation method is as follows:

[0058]

[0059] The IV curve of the DC characteristic is thus plotted.

[0060] In actual testing, if the current limit needs to be set to 100uA, then the sixth resistor (R6) in the constant current source module is set to 10KΩ, the reference voltage can be set to 1V, the sampling resistor of the current limit module is set to 1Ω, and A1 and A2 are both 100 times, then the reference voltage of the current limit module is set to 1V.

[0061] During the scanning process, if the current exceeds 100uA, the output of the first voltage operational amplifier A2 in the current limiting module will exceed 1V, which is greater than the reference voltage. Then, the current limiting module will switch the analog switch to the constant current source branch. At this time, the constant current source module will generate a constant current of 100uA to achieve the purpose of current limiting.

[0062] In summary, this invention discloses a test circuit for a memristor, comprising a voltage source module 1, a constant current source module 2, an analog switch 3, a sampling resistor 4, a current limiting judgment module 5, a memristor 6, and an auxiliary measurement and acquisition module 7, which has the following advantages: (1) The test instrument of this memristor test circuit is small and portable, and can verify the device in real time; (2) The current limiting can reach the microamp level, which can achieve a small current limiting value, and can detect the current value in real time; (3) The resistance range that can be detected is large, which can cover most application scenarios, and can be extended to the measurement of the IV curve of the device at both ends; (4) The cost is lower than that of large instruments.

[0063] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A test circuit for a memristor, comprising a voltage source module (1), a constant current source module (2), an analog switch (3), a sampling resistor (4), a current limiting judgment module (5), a memristor (6), and an auxiliary measurement and acquisition module (7), characterized in that, The output terminal of the voltage source module (1) is connected to the first branch (3-1) of the analog switch (3), the constant current source module (2) is connected to the second branch (3-2) of the analog switch (3), the output terminal of the analog switch (3) is connected to one end of the sampling resistor (4), the other end of the sampling resistor (4) is connected to the input terminal of the memristor (6), the current limiting judgment module (5) is connected in parallel across the two ends of the sampling resistor (4), and the output terminal of the memristor (6) is connected to the auxiliary measurement acquisition module (7). The current limiting judgment module (5) includes a first current detection operational amplifier (A1), a first voltage operational amplifier (A2), a first comparator, a second comparator, judgment signal I (S1), judgment signal II (S2), and a microcontroller; Both ends of the sampling resistor (4) are connected to the input terminals of the first current detection operational amplifier (A1); the output terminal of the first current detection operational amplifier (A1) is connected to the input terminal of the first voltage operational amplifier (A2); the output of the first voltage operational amplifier (A2) is connected to the inverting input terminal of the first comparator; the non-inverting input terminal of the first comparator is connected to the externally input reference voltage, and the output terminal of the first comparator is connected to the judgment signal I (S1); the non-inverting input terminal of the second comparator is connected to the output terminal of the constant current source module (2), the inverting input terminal of the second comparator is connected to the output terminal of the voltage source module (1), and the output terminal of the first comparator is connected to the judgment signal II (S2). The judgment signal I (S1) and judgment signal II (S2) are connected to the input register of the microcontroller. The analog switch (3) contains two branches, wherein the input terminal of the first branch (3-1) is connected to the output terminal of the voltage source module (1), the input terminal of the second branch (3-2) is connected to the output terminal of the constant current source module (2), and the control signal input terminal of the analog switch (3) is connected to the output register of the microcontroller.

2. The test circuit for the memristor according to claim 1, characterized in that, The voltage source module (1) includes a DAC chip and a first operational amplifier of the voltage source module, wherein the output terminal of the DAC chip is connected to the non-inverting input terminal of the first operational amplifier of the voltage source module, and the inverting input terminal of the first operational amplifier of the voltage source module is connected to the output terminal of the first operational amplifier.

3. The test circuit for the memristor according to claim 1, characterized in that, The constant current source module (2) includes a first operational amplifier (U1), a second operational amplifier (U2), a third operational amplifier (U3), a fourth operational amplifier (U4), a first resistor (R1), a second resistor (R2), a third resistor (R3), a fourth resistor (R4), a fifth resistor (R5), a sixth resistor (R6), a seventh resistor (R7), and an eighth resistor (R8). The resistance values ​​of the first resistor (R1), the second resistor (R2), the third resistor (R3), the fourth resistor (R4), the fifth resistor (R5), the seventh resistor (R7), and the eighth resistor (R8) are equal, and the resistance value of the sixth resistor (R6) is set as the output value of the constant current source. The first resistor (R1) is connected to the external input reference voltage and the inverting input of the first operational amplifier (U1); the second resistor (R2) is connected to the inverting input and output of the first operational amplifier (U1); the non-inverting input of the first operational amplifier (U1) is grounded; the third resistor (R3) is connected to the output of the first operational amplifier (U1) and the inverting input of the second operational amplifier (U2); the fourth resistor (R4) is connected to the output of the fourth operational amplifier (U4) and the inverting input of the second operational amplifier (U2); the fifth resistor (R5)... The two ends of the first resistor (R1) are connected to the output terminal of the second operational amplifier (U2) and the inverting input terminal of the second operational amplifier (U2), respectively; the two ends of the sixth resistor (R6) are connected to the output terminal of the second operational amplifier (U2) and the non-inverting input terminal of the third operational amplifier (U3), respectively; the inverting input terminal of the third operational amplifier (U3) is connected to the output terminal of the third operational amplifier (U3), respectively; the two ends of the seventh resistor (R7) are connected to the output terminal of the third operational amplifier (U3) and the inverting input terminal of the fourth operational amplifier (U4), respectively; the two ends of the eighth resistor (R8) are connected to the output terminal of the fourth operational amplifier (U4) and the inverting input terminal of the fourth operational amplifier (U4), respectively.

4. The test circuit for the memristor according to claim 1, characterized in that, The auxiliary measurement and acquisition module (7) includes a first transimpedance operational amplifier (U-7-1), a first resistor (R-7-1), a first capacitor (C1), an ADC chip, and a first operational amplifier (U-7-2). The output terminal of the memristor (6) is connected to the inverting input terminal of the first transimpedance operational amplifier (U-7-1). The non-inverting input terminal of the first transimpedance operational amplifier (U-7-1) is grounded. The output terminal of the first transimpedance operational amplifier (U-7-1) is connected to one end of the first resistor (R-7-1) of the auxiliary measurement and acquisition module and then connected to the non-inverting input terminal of the first operational amplifier (U-7-2) of the auxiliary measurement and acquisition module. The inverting input terminal of the first operational amplifier (U-7-2) of the auxiliary measurement and acquisition module is connected to the output terminal of the first operational amplifier (U-7-2) of the auxiliary measurement and acquisition module and the input terminal of the ADC chip, respectively.

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