A transducer, a transducer array and a method of manufacturing a transducer array

Abstract

The application discloses a kind of transducer, transducer array and the manufacturing method of transducer array, it is related to transduction technical field, transducer includes: first piezoelectric material, one side of first piezoelectric material is used to receive acoustic wave and send acoustic wave, when receiving acoustic wave, acoustic wave is converted into electric energy, when sending acoustic wave, electric energy is converted into acoustic wave;First electrode, one end of first electrode is connected with the other side of first piezoelectric material, the other end of first electrode is set to the other side of first piezoelectric material, to be connected with external circuit through the other side of first piezoelectric material;Second electrode, one end of second electrode is connected with one side of first piezoelectric material, the other end of second electrode extends to the other side of first piezoelectric material, to be connected with external circuit through the other side of first piezoelectric material.The application leads out conductor from the bottom of silicon groove, does not affect the radiation area of the piezoelectric material of top, improves the proportion of effective working area of piezoelectric material.

Description

Technical Field

[0001] This invention relates to the field of transducer technology, and in particular to a transducer, a transducer array, and a method for manufacturing the transducer array. Background Technology

[0002] Existing technologies utilize MEMS processes and piezoelectric materials to fabricate single transducers or arrays of multiple transducers. Mo / AlN / Mo is sputtered onto the silicon layer of the SOI device as the lower electrode layer, piezoelectric layer, upper electrode layer, and a SiO2 protective layer on the device surface. The lower electrode pad requires the removal of the piezoelectric and upper electrode layers to be exposed, and the upper and lower electrode traces are both located above the piezoelectric layer. Simultaneously, deep silicon etching is performed on the back of the SOI down to the buried oxide layer to release the vibration film, or multiple release holes are etched into the upper electrode, piezoelectric layer, and lower electrode to release the vibration film.

[0003] For a single MEMS piezoelectric transducer, the sound pressure level / sensitivity at a certain frequency is fixed, and the directivity is also determined. The beam angle and beam direction cannot be changed. If the sound pressure level / sensitivity, beam angle, and beam direction are to be improved, the MEMS transducer structure needs to be redesigned. It also does not have the application capability of phased scanning.

[0004] Existing technology involves etching holes through the passivation protection layer, the upper electrode layer, and the piezoelectric material layer when fabricating piezoelectric material electrodes to bring the lower electrode to the upper surface. This process is complex, and when the circuit is brought out from the upper end of the piezoelectric material layer, the area of ​​the circuit at the upper end of the piezoelectric material layer is large, resulting in a small radiation surface area per unit area of ​​piezoelectric material, which severely limits the improvement of radiation source level and receiver sensitivity. Summary of the Invention

[0005] The purpose of this invention is to provide a transducer, a transducer array, and a method for manufacturing the transducer array, thereby increasing the effective working area ratio of piezoelectric materials.

[0006] To solve the above-mentioned technical problems, the present invention adopts the following technical solution:

[0007] One aspect of this invention provides a transducer comprising: a first piezoelectric material, one side of which is used to receive and transmit sound waves; when receiving sound waves, the first piezoelectric material converts the sound waves into electrical energy; and when transmitting sound waves, the first piezoelectric material converts the electrical energy into sound waves; a first electrode, one end of which is connected to the other side of the first piezoelectric material, and the other end of which is disposed on the other side of the first piezoelectric material for connection to an external circuit via the other side of the first piezoelectric material; and a second electrode, one end of which is connected to one side of the first piezoelectric material, and the other end of which extends to the other side of the first piezoelectric material for connection to an external circuit via the other side of the first piezoelectric material.

[0008] In some embodiments, the first electrode includes a silicon trench, a first upper electrode, and a first lower electrode. One side of the first upper electrode is connected to the edge of the opening of the silicon trench, and the other side of the first upper electrode is connected to the other side of the first piezoelectric material. One side of the first lower electrode is connected to the back side opposite the opening of the silicon trench, and the other side of the first lower electrode is used to connect to an external circuit. The second electrode includes a silicon connector block, a second upper electrode, and a second lower electrode. One end of the second upper electrode is connected to one end of the silicon connector block, and the other end of the second upper electrode passes through the first piezoelectric material and is connected to one side of the first piezoelectric material. The other end of the silicon connector block is connected to one side of the second lower electrode, and the other side of the second lower electrode is used to connect to an external circuit. Both the silicon trench and the silicon connector block are made of low-resistivity silicon.

[0009] In some embodiments, the transducer further includes a first passivation layer and a second passivation layer. The first passivation layer is deposited and covers one side of the first piezoelectric material and the other end of the second upper electrode. The second passivation layer is deposited and covers the other side of the first lower electrode, the other side of the second lower electrode, the back surface opposite the opening of the silicon trench, and the other end of the silicon connector. The second passivation layer on the other side of the first lower electrode has a first groove to expose the other side of the first lower electrode, and the second passivation layer on the other side of the second lower electrode has a second groove to expose the other side of the second lower electrode.

[0010] One aspect of this invention provides a transducer array, the transducer array including at least one transducer as described above, a silicon wafer, a second piezoelectric material, a third passivation layer, a fourth passivation layer, and at least two insulating materials. One side of the silicon wafer is connected to the third passivation layer through the second piezoelectric material, and the other side of the silicon wafer is connected to the fourth passivation layer. A through-hole corresponding to the number of the at least two insulating materials is opened in the middle of the silicon wafer. A single insulating material is attached to the inner wall of a single through-hole. A first electrode corresponding to the transducer is disposed in a portion of the insulating material, and a second electrode corresponding to the transducer is disposed in another portion of the insulating material. The first passivation layer of the at least one transducer is connected to the third passivation layer, the first piezoelectric material of the at least one transducer is connected to the second piezoelectric material, and the second passivation layer of the at least one transducer is connected to the fourth passivation layer.

[0011] One aspect of this invention provides a method for fabricating a transducer array. The method includes: obtaining a low-resistivity silicon wafer; fabricating a plurality of silicon trenches and a plurality of silicon interconnect blocks in the middle of the silicon wafer, wherein the plurality of silicon trenches and the plurality of silicon interconnect blocks are all insulated from the silicon wafer; fabricating a first upper electrode on the silicon trenches, wherein a through-hole of the first upper electrode is etched in the middle of the first upper electrode; fabricating a second upper electrode on the silicon interconnect blocks; depositing a piezoelectric material on the first upper electrode, the second upper electrode, and the silicon wafer; etching through-holes of the piezoelectric material on the piezoelectric material, wherein the through-holes of the piezoelectric material are coaxial with the through-holes of the first upper electrode; grinding the bottom of the silicon wafer to expose the insulating material, the bottom of the silicon trenches, and the bottom of the silicon interconnect blocks; fabricating a first lower electrode on the bottom of the silicon trenches; and fabricating a second lower electrode on the bottom of the silicon interconnect blocks.

[0012] In some embodiments, in obtaining a low-resistivity silicon wafer, a plurality of silicon trenches and a plurality of silicon connectors are fabricated in the middle of the silicon wafer, wherein the plurality of silicon trenches and the plurality of silicon connectors are all insulated from the silicon wafer, the method includes: etching a plurality of first annular insulating trenches and second annular insulating trenches in the middle of the upper end of the silicon wafer; filling each first annular insulating trench with insulating material; etching cavities on the silicon surrounding the upper end of each first annular insulating trench to obtain silicon trenches; and filling each second annular insulating trench with insulating material to obtain silicon connectors.

[0013] In some embodiments, in fabricating a first upper electrode on the silicon trench, wherein a through-hole of the first upper electrode is etched in the middle of the first upper electrode, and in fabricating a second upper electrode on the silicon interconnect block, the method includes: filling the silicon trench with PSG material; depositing a first metal layer on the PSG material, the silicon interconnect block, and the silicon wafer; etching away the first metal layer except for the upper end of the silicon trench and the upper end of the silicon interconnect block to obtain the first upper electrode and the second upper electrode, wherein a through-hole of the first upper electrode is etched in the middle of the first upper electrode on the PSG material; in fabricating a first lower electrode at the bottom of the silicon trench and in fabricating a second lower electrode at the bottom of the silicon interconnect block, the method includes: depositing a second metal layer at the bottom of the silicon wafer, the bottom of the silicon trench, and the bottom of the silicon interconnect block; etching away the second metal layer except for the bottom of the silicon trench and the bottom of the silicon interconnect block to obtain the first lower electrode and the second lower electrode.

[0014] In some embodiments, after depositing piezoelectric material on the first upper electrode, the second upper electrode, and the silicon wafer, and etching through-holes in the piezoelectric material, wherein the through-holes in the piezoelectric material are coaxial with the through-holes in the first upper electrode, the method further includes: etching extension holes in the piezoelectric material on the second upper electrode; depositing a third metal layer on the piezoelectric material; and etching away the third metal layer outside the connection lines above the first upper electrode, above the second upper electrode, and above the first upper electrode and the second upper electrode to obtain an extension of the second upper electrode, wherein the extension of the second upper electrode is etched with through-holes in the extension, wherein the through-holes in the extension are coaxial with the through-holes in the piezoelectric material.

[0015] In some embodiments, after etching away a third metal layer other than the connection lines above the first upper electrode, above the second upper electrode, and above the first upper electrode and above the second upper electrode to obtain an extension of the second upper electrode, wherein the extension of the second upper electrode has a through-hole, the through-hole of the extension being coaxial with the through-hole of the piezoelectric material, the method further includes: attaching a passivation layer to the piezoelectric material and the extension of the second upper electrode; etching a through-hole of the upper passivation layer at the upper end of the through-hole of the extension, the through-hole of the upper passivation layer being coaxial with the through-hole of the extension; after fabricating a first lower electrode at the bottom of the silicon trench and fabricating a second lower electrode at the bottom of the silicon interconnect, the method further includes: attaching a lower passivation layer to the bottom of the silicon wafer, the bottom of the first lower electrode, and the bottom of the second lower electrode; etching a first groove on the lower passivation layer at the bottom of the first lower electrode to expose the bottom of the first lower electrode, and etching a second groove on the lower passivation layer at the bottom of the second lower electrode to expose the bottom of the second lower electrode.

[0016] In some embodiments, after etching a first groove on the lower passivation layer at the bottom of the first lower electrode to expose the bottom of the first lower electrode, and etching a second groove on the lower passivation layer at the bottom of the second lower electrode to expose the bottom of the second lower electrode, the method includes: releasing the PSG material through the through-hole of the first upper electrode, the through-hole of the piezoelectric material, the through-hole of the extension, and the through-hole of the upper passivation layer, so that the silicon trench is a cavity.

[0017] According to an embodiment of the present invention, a transducer, a transducer array, and a method for fabricating the transducer array have at least the following advantages: Existing technologies, when fabricating piezoelectric material electrodes, require etching holes through the passivation layer, the upper electrode layer, and the piezoelectric material when leading the lower electrode to the upper surface. This process is complex, and when leading lines out from the upper end of the piezoelectric material layer, the area of ​​the lines at the upper end of the piezoelectric material layer is large, resulting in a small radiating surface area per unit area of ​​the piezoelectric material, severely limiting the improvement of radiation source and receiving sensitivity. This application leads out the first and second electrodes from the bottom of the first piezoelectric material without affecting the radiating area of ​​the piezoelectric material at the top. Without changing the active material structure of mature MEMS transducers, the transducer of this application can both increase the radiating area of ​​the piezoelectric material and maintain the transducer having electrodes for independent excitation or reception of signals, while also simplifying the complexity of the electrode circuitry.

[0018] It should be understood that the above general description and the following detailed description are merely exemplary and do not limit this disclosure. Attached Figure Description

[0019] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram of the transducer array structure according to an embodiment;

[0021] Figure 2 A simplified flowchart of a method for fabricating a transducer array according to an embodiment;

[0022] Figure 3 This is a schematic diagram of the structure of a method for fabricating the first part of a transducer array according to an embodiment;

[0023] Figure 4 This is a schematic diagram of the method for fabricating the second part of the transducer array according to an embodiment.

[0024] The reference numerals in the attached figures are explained as follows: 1. First piezoelectric material; 2. Silicon trench; 3. First upper electrode; 4. First lower electrode; 5. Silicon connector block; 6. Second upper electrode; 7. Second lower electrode; 8. First passivation layer; 9. Second passivation layer; 10. First groove; 11. Second groove; 12. Silicon wafer; 13. Second piezoelectric material; 14. Third passivation layer; 15. Fourth passivation layer; 16. Insulating material; 17. Through hole; 18. PSG material; 19. Extension; 20. Connecting line. Detailed Implementation

[0025] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0026] In the description of this invention, it should be understood that the terms "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0027] The terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include one or more of that feature.

[0028] In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0029] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "connection," "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0030] The flowcharts shown in the accompanying drawings are merely illustrative and do not necessarily include all content and operations / steps, nor do they necessarily have to be performed in the described order. For example, some operations / steps can be broken down, while others can be combined or partially combined; therefore, the actual execution order may change depending on the specific circumstances.

[0031] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that the description of this disclosure will be more complete and fully convey the concept of the exemplary embodiments to those skilled in the art. The drawings are merely illustrative of this disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted.

[0032] The transducer of the embodiment of this application is briefly described below:

[0033] According to some embodiments, such as Figure 1 As shown, this application provides a transducer, the transducer comprising:

[0034] A first piezoelectric material 1, one side of the first piezoelectric material 1 is used to receive sound waves and transmit sound waves. When the first piezoelectric material 1 receives sound waves, it converts the sound waves into electrical energy. When the first piezoelectric material 1 transmits sound waves, it converts electrical energy into sound waves.

[0035] The first electrode has one end connected to the other side of the first piezoelectric material 1, and the other end of the first electrode is disposed on the other side of the first piezoelectric material 1 for connection to an external circuit through the other side of the first piezoelectric material 1.

[0036] The second electrode has one end connected to one side of the first piezoelectric material 1, and the other end extending to the other side of the first piezoelectric material 1 for connection to an external circuit via the other side of the first piezoelectric material 1.

[0037] Based on the above embodiments, piezoelectric materials are crystalline materials that exhibit a voltage between their two end faces when subjected to pressure. A transducer is a device that converts electrical energy into acoustic energy. Sound waves propagate through air using air as the medium. Piezoelectric materials are solids; when the vibrations of sound waves in the air are transmitted to the piezoelectric material, the material vibrates, generating pressure, which in turn causes the material to generate an electrical signal.

[0038] like Figure 1As shown, the top of the first piezoelectric material 1 is used to receive and transmit sound waves. When the first piezoelectric material 1 receives sound waves and generates an electrical signal, it transmits the signal to the first electrode and the second electrode respectively. The top of the first electrode is connected to the bottom of the first piezoelectric material 1, and the bottom of the upper end of the second electrode is connected to the top of the first piezoelectric material 1. The top of the first electrode and the bottom of the upper end of the second electrode are located on the upper and lower sides of the first piezoelectric material 1.

[0039] The bottom of the first electrode extends to the bottom of the first piezoelectric material 1, and the top of the first electrode receives the electrical signal generated by the first piezoelectric material 1. The signal is then led out to the outside through the bottom of the first electrode, which is connected to an external circuit. The bottom of the second electrode extends to the bottom of the first piezoelectric material 1, and the top of the second electrode receives the electrical signal generated by the first piezoelectric material 1. The signal is then led out to the outside through the bottom of the second electrode, which is connected to an external circuit.

[0040] Similarly, when transmitting sound waves, the external circuit inputs electrical signals to the bottom of the first electrode and the bottom of the second electrode. The first electrode and the second electrode transmit the electrical signals to the first piezoelectric material 1. The first piezoelectric material 1 converts electrical energy into sound waves and emits them. That is, the first piezoelectric material 1 vibrates after being energized, and the vibration emits sound waves.

[0041] Existing technologies require etching holes through the passivation layer, upper electrode layer, and piezoelectric material layer when fabricating piezoelectric material electrodes and leading the lower electrode to the upper surface. This process is complex, and the large area occupied by the lines at the top of the piezoelectric material layer results in a small radiating surface area per unit area, severely limiting the improvement of radiation source and receiver sensitivity. This application addresses this by leading the first and second electrodes from the bottom of the first piezoelectric material 1, without affecting the radiating area of ​​the piezoelectric material at the top. Without altering the active material structure of mature MEMS transducers, the transducer of this application can both increase the radiating area of ​​the piezoelectric material and maintain the transducer having independent excitation or reception electrodes, while also simplifying the complexity of the electrode wiring.

[0042] The following is in conjunction with the appendix to this instruction manual. Figure 1 The transducer of this application will be further described in detail.

[0043] According to some embodiments, such as Figure 1 As shown, the first electrode includes a silicon trench 2, a first upper electrode 3 and a first lower electrode 4. One side of the first upper electrode 3 is connected to the edge of the trench opening of the silicon trench 2, and the other side of the first upper electrode 3 is connected to the other side of the first piezoelectric material 1. One side of the first lower electrode 4 is connected to the back side opposite the trench opening of the silicon trench 2, and the other side of the first lower electrode 4 is used to connect to an external circuit.

[0044] The second electrode includes a silicon connector block 5, a second upper electrode 6, and a second lower electrode 7. One end of the second upper electrode 6 is connected to one end of the silicon connector block 5, and the other end of the second upper electrode 6 passes through the first piezoelectric material 1 and is connected to one side of the first piezoelectric material 1. The other end of the silicon connector block 5 is connected to one side of the second lower electrode 7, and the other side of the second lower electrode 7 is used to connect to an external circuit.

[0045] Both the silicon tank 2 and the silicon connector 5 are made of low-resistivity silicon.

[0046] Based on the above embodiments, when sound waves propagate in the air, air serves as the medium. The piezoelectric material is a solid; when the vibrations of the sound waves in the air are transmitted to the piezoelectric material, the material vibrates, thereby generating pressure and ultimately producing an electrical signal. Low-resistivity silicon is conductive.

[0047] According to some embodiments, such as Figure 1 As shown, the transducer further includes a first passivation layer 8 and a second passivation layer 9. The first passivation layer 8 is laid and covers one side of the first piezoelectric material 1 and the other end of the second upper electrode 6. The second passivation layer 9 is laid and covers the other side of the first lower electrode 4, the other side of the second lower electrode 7, the back side opposite the groove of the silicon trench 2, and the other end of the silicon connecting block 5.

[0048] The second passivation layer 9 on the other side of the first lower electrode 4 has a first groove 10 to expose the other side of the first lower electrode 4, and the second passivation layer 9 on the other side of the second lower electrode 7 has a second groove 11 to expose the other side of the second lower electrode 7.

[0049] Based on the above embodiments, the passivation layer is equivalent to an insulating and protective dielectric film on the transducer surface, which can prevent harmful impurities from contaminating the transducer surface for a long time.

[0050] The first groove 10 is used to lead out the first lower electrode 4, and the second groove 11 is used to lead out the second lower electrode 7.

[0051] The transducer array of the embodiments of this application is described below:

[0052] According to some embodiments, such as Figure 1As shown, this application provides a transducer array, which includes at least one transducer as described above, a silicon wafer 12, a second piezoelectric material 13, a third passivation layer 14, a fourth passivation layer 15, and at least two insulating materials 16. One side of the silicon wafer 12 is connected to the third passivation layer 14 through the second piezoelectric material 13, and the other side of the silicon wafer 12 is connected to the fourth passivation layer 15. A through-hole corresponding to the number of the at least two insulating materials 16 is opened in the middle of the silicon wafer 12. Each insulating material 16 is attached to the inner wall of the through-hole. A first electrode corresponding to the transducer is disposed in a portion of the insulating material 16, and a second electrode corresponding to the transducer is disposed in another portion of the insulating material 16. The first passivation layer 8 of the at least one transducer is connected to the third passivation layer 14, the first piezoelectric material 1 of the at least one transducer is connected to the second piezoelectric material 13, and the second passivation layer 9 of the at least one transducer is connected to the fourth passivation layer 15.

[0053] Based on the above embodiments, such as Figure 1 As shown, a portion of the insulating material 16 contains a first electrode corresponding to the transducer, and another portion of the insulating material 16 contains a second electrode corresponding to the transducer. The transducers within multiple openings form a transducer array. The openings can be square, circular, or other irregular shapes, the specific shape determined by the shape of the transducer array elements. The silicon wafer 12 is low-resistivity silicon.

[0054] Furthermore, in some specific embodiments, such as Figure 4 As shown, the transducer array is provided with four first electrodes and three second electrodes. In some embodiments, such as... Figure 4 As shown, there can be two first electrodes and one second electrode connected in series, or three first electrodes and one second electrode connected in series, or one first electrode and one second electrode connected in series; this application does not limit the specific type of electrode.

[0055] like Figure 4 As shown, four first electrodes are arranged in a square pattern at the left end of silicon wafer 12, and three second electrodes are arranged in a vertical pattern at the right end of silicon wafer 12.

[0056] The first piezoelectric material under the four first electrodes can receive sound waves at four different angles and emit sound waves at four different angles. The first and second electrodes can be externally connected to an electronic processing unit with phased-array transmission / reception to perform beam angle scanning and realize the orientation and positioning of the detection target.

[0057] Furthermore, such as Figure 1As shown, the silicon trench 2 and silicon connector 5 in the transducer are on the same level as the silicon wafer 12, the first passivation layer 8 and the third passivation layer 14 in the transducer are on the same level, the first piezoelectric material 1 and the second piezoelectric material 13 in the transducer are on the same level, and the second passivation layer 9 and the fourth passivation layer 15 in the transducer are on the same level.

[0058] Existing technologies require etching holes through the passivation layer, upper electrode layer, and piezoelectric material when fabricating piezoelectric material electrodes to bring the lower electrode to the upper surface. This process is complex, and the large area occupied by the lines at the top of the piezoelectric material layer results in a small radiating surface area per unit area, severely limiting the improvement of radiation source and receiver sensitivity. This application addresses this by bringing out the first and second electrodes from the bottom of the first piezoelectric material 1, without affecting the radiating area of ​​the piezoelectric material at the top. Without altering the active material structure of mature MEMS transducers, the transducer of this application can both increase the radiating area of ​​the piezoelectric material and maintain the transducer having independent excitation or reception electrodes, while also simplifying the complexity of the electrode wiring.

[0059] The fabrication method of the transducer array according to the embodiments of this application will be briefly described below:

[0060] According to some embodiments, such as Figure 2 As shown, this application provides a method for fabricating a transducer array, the method comprising:

[0061] Step 101: Obtain a low-resistivity silicon wafer 12, and fabricate a plurality of silicon trenches 2 and a plurality of silicon connecting blocks 5 in the middle of the silicon wafer 12. The plurality of silicon trenches 2 and the plurality of silicon connecting blocks 5 are all insulated from the silicon wafer 12.

[0062] Step 102: A first upper electrode 3 is fabricated on the silicon tank 2, and a through hole 17 of the first upper electrode 3 is etched in the middle of the first upper electrode 3. A second upper electrode 6 is fabricated on the silicon connector block 5.

[0063] Step 103: Deposit piezoelectric material on the first upper electrode 3, the second upper electrode 6 and the silicon wafer 12, and etch through holes 17 of the piezoelectric material on the piezoelectric material, wherein the through holes 17 of the piezoelectric material are coaxial with the through holes 17 of the first upper electrode 3;

[0064] Step 104: Etch the bottom of the silicon wafer 12 to expose the insulating material 16, the bottom of the silicon trench 2, and the bottom of the silicon connector block 5;

[0065] Step 105: A first lower electrode 4 is fabricated at the bottom of the silicon tank 2, and a second lower electrode 7 is fabricated at the bottom of the silicon connector block 5.

[0066] Based on the above embodiments, in step 101, as follows Figure 3 As shown in A1 to A2, a plurality of silicon trenches 2 and a plurality of silicon connector blocks 5 are fabricated in the middle of the silicon wafer 12. The plurality of silicon connector blocks 5 are all in the shape of small cylinders, and the plurality of silicon trenches 2 are all in the shape of large cylinders. A cavity is etched at the upper end of the large cylinders. The plurality of silicon trenches 2 and the plurality of silicon connector blocks 5 are all insulated from the silicon wafer 12.

[0067] In step 102, as Figure 4 As shown in A3, a first upper electrode 3 is fabricated on the silicon tank 2. The first upper electrode 3 is a large circular plate, and a circular through-hole 17 is etched in the middle of the first upper electrode 3. A second upper electrode 6 is fabricated on the silicon interconnect block 5. The second upper electrode 6 is a small circular plate. The middle part of the first upper electrode 3 covers the cavity of the silicon tank 2, and the edge of the first upper electrode 3 is connected to the top side edge of the silicon tank 2. The two ends of the through-hole 17 are connected to the outside and the cavity of the silicon tank 2, respectively.

[0068] In step 103, as Figure 4 As shown in A4 of the document.

[0069] The following is in conjunction with the appendix to this instruction manual. Figures 1 to 4 The method for fabricating the transducer array of this application is further described in detail.

[0070] According to some embodiments, in step 101, a low-resistivity silicon wafer 12 is obtained, and a plurality of silicon trenches 2 and a plurality of silicon connectors 5 are fabricated in the middle of the silicon wafer 12, wherein the plurality of silicon trenches 2 and the plurality of silicon connectors 5 are all insulated from the silicon wafer 12. The method includes:

[0071] Step 1011: Etch a plurality of first annular insulating grooves and second annular insulating grooves in the middle of the upper end of the silicon wafer 12.

[0072] Step 1012: Fill each of the first annular insulating grooves with insulating material 16, etch cavities on the silicon surrounding the upper end of each of the first annular insulating grooves to obtain silicon grooves 2, and fill each of the second annular insulating grooves with insulating material 16 to obtain silicon connectors 5.

[0073] Based on the above embodiments, in step 1011, as follows Figure 3 As shown in A1; in step 1012, as Figure 3 As shown in A2, the upper end of the first annular insulating groove surrounds the etched cavity on the silicon, and the cavity is cylindrical.

[0074] According to some embodiments, in step 102, a first upper electrode 3 is fabricated on the silicon trench 2, and a through-hole 17 of the first upper electrode 3 is etched in the middle of the first upper electrode 3. In fabricating the second upper electrode 6 on the silicon interconnect block 5, the method includes:

[0075] Step 1021: Fill the silicon trench 2 with PSG material 18;

[0076] Step 1022: Deposit a first metal layer on the PSG material 18, on the silicon interconnect block 5, and on the silicon wafer 12;

[0077] Step 1023: The first metal layer outside the upper end of the silicon tank 2 and the upper end of the silicon connector block 5 is etched away to obtain the first upper electrode 3 and the second upper electrode 6. A through hole 17 of the first upper electrode 3 is etched in the middle of the first upper electrode 3 on the PSG material 18.

[0078] Based on the above embodiments, in step 1021, as follows Figure 3 As shown in A2, PSG material 18 is filled into a cylindrical cavity.

[0079] After step 1023 is completed, it will be as follows: Figure 4 As shown in A3 of the diagram.

[0080] Further, in step 105, in fabricating a first lower electrode 4 at the bottom of the silicon tank 2 and a second lower electrode 7 at the bottom of the silicon connector block 5, the method includes:

[0081] Step 1051: Deposit a second metal layer on the bottom of the silicon wafer 12, the bottom of the silicon trench 2, and the bottom of the silicon interconnect block 5;

[0082] Step 1052: Etch away the second metal layer outside the bottom of the silicon tank 2 and the bottom of the silicon interconnect block 5 to obtain the first lower electrode 4 and the second lower electrode 7.

[0083] According to some embodiments, in step 103, piezoelectric material is deposited on the first upper electrode 3, the second upper electrode 6, and the silicon wafer 12. Through-holes 17 of the piezoelectric material are etched onto the piezoelectric material. After the through-holes 17 of the piezoelectric material are coaxial with the through-holes 17 of the first upper electrode 3, it is as follows: Figure 4 As shown in A4 to A5, the method further includes:

[0084] Step 1031, as follows Figure 4 As shown in A4, an extended hole is etched on the piezoelectric material on the second upper electrode 6;

[0085] Step 1032: Deposit a third metal layer on the piezoelectric material;

[0086] Step 1033: The third metal layer above the first upper electrode 3, above the second upper electrode 6, and outside the connecting line 20 above the first upper electrode 3 and above the second upper electrode 6 is etched away to obtain the extension 19 of the second upper electrode 6. The extension 19 of the second upper electrode 6 is etched with a through hole 17, and the through hole 17 of the extension 19 is coaxial with the through hole 17 of the piezoelectric material.

[0087] After step 1033 is completed, it will be as follows: Figure 4 As shown in A5. The two ends of the extension 19 are connected by the connecting line 20. One end of the extension 19 is connected to the top of the second upper electrode 6, and the other end of the extension 19 extends to the upper end of the piezoelectric material on the first upper electrode 3 through the connecting line 20. It is coaxial with the first upper electrode 3 and symmetrical about the piezoelectric material as the axis of symmetry.

[0088] According to some embodiments, in step 1033, the third metal layer above the first upper electrode 3, above the second upper electrode 6, and outside the connecting lines 20 above the first upper electrode 3 and the second upper electrode 6 is etched away to obtain the extension 19 of the second upper electrode 6. The extension 19 of the second upper electrode 6 is etched with a through hole 17. After the through hole 17 of the extension 19 is coaxial with the through hole 17 of the piezoelectric material, the method further includes:

[0089] Step 1034: A passivation layer is attached to the piezoelectric material and the extension 19 of the second upper electrode 6.

[0090] Step 1035: Etch the upper passivation layer through hole 17 on the upper passivation layer at the upper end of the through hole 17 of the extension 19, wherein the upper passivation layer through hole 17 is coaxial with the through hole 17 of the extension 19.

[0091] Further, in step 105, after fabricating a first lower electrode 4 at the bottom of the silicon trench 2 and a second lower electrode 7 at the bottom of the silicon connector block 5, the method further includes:

[0092] Step 106: Attach a lower passivation layer to the bottom of the silicon wafer 12, the bottom of the first lower electrode 4, and the bottom of the second lower electrode 7.

[0093] Step 107: Etch a first groove 10 on the lower passivation layer at the bottom of the first lower electrode 4 to expose the bottom of the first lower electrode 4, and etch a second groove 11 on the lower passivation layer at the bottom of the second lower electrode 7 to expose the bottom of the second lower electrode 7.

[0094] Based on the above embodiments, the first groove 10 is used to lead out the first lower electrode 4, and the second groove 11 is used to lead out the second lower electrode 7.

[0095] According to some embodiments, after step 107, etching a first groove 10 on the lower passivation layer at the bottom of the first lower electrode 4 to expose the bottom of the first lower electrode 4, and etching a second groove 11 on the lower passivation layer at the bottom of the second lower electrode 7 to expose the bottom of the second lower electrode 7, the method includes:

[0096] Step 108: The PSG material 18 is released through the through hole 17 of the first upper electrode 3, the through hole 17 of the piezoelectric material, the through hole 17 of the extension 19 and the through hole 17 of the upper passivation layer, so that the silicon trench 2 is a cavity.

[0097] The cavity inside silicon tank 2 facilitates the vibration of piezoelectric materials and reduces energy consumption.

[0098] Based on the above embodiments, after step 108 is completed, it is as follows: Figure 1 As shown.

[0099] In the description of the above embodiments, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0100] Although this disclosure has been described with reference to several typical embodiments, it should be understood that the terminology used is descriptive and exemplary, and not restrictive. Because this disclosure can be embodied in many forms without departing from the spirit or substance of this application, it should be understood that the above embodiments are not limited to any of the foregoing details, but should be interpreted broadly within the spirit and scope defined by the appended claims. Therefore, all variations and modifications falling within the scope of the claims or their equivalents should be covered by the appended claims.

Claims

1. A transducer, characterized in that, The transducer includes: A first piezoelectric material, one side of which is used to receive and transmit sound waves. When the first piezoelectric material receives sound waves, it converts the sound waves into electrical energy. When the first piezoelectric material transmits sound waves, it converts electrical energy into sound waves. A first electrode has one end connected to the other side of the first piezoelectric material, and the other end of the first electrode is disposed on the other side of the first piezoelectric material for connection to an external circuit via the other side of the first piezoelectric material. The first electrode includes a silicon trench, a first upper electrode, and a first lower electrode. One side of the first upper electrode is connected to the edge of the opening of the silicon trench, and the other side of the first upper electrode is connected to the other side of the first piezoelectric material. One side of the first lower electrode is connected to the back side opposite the opening of the silicon trench, and the other side of the first lower electrode is used for connection to an external circuit. The second electrode has one end connected to one side of the first piezoelectric material and the other end extending to the other side of the first piezoelectric material for connection to an external circuit via the other side of the first piezoelectric material. The second electrode includes a silicon connector block, a second upper electrode, and a second lower electrode. One end of the second upper electrode is connected to one end of the silicon connector block, and the other end of the second upper electrode passes through the first piezoelectric material and is connected to one side of the first piezoelectric material. The other end of the silicon connector block is connected to one side of the second lower electrode, and the other side of the second lower electrode is used for connection to an external circuit.

2. The transducer according to claim 1, characterized in that, Both the silicon trench and the silicon connector block are made of low-resistivity silicon.

3. The transducer according to claim 2, characterized in that, The transducer further includes a first passivation layer and a second passivation layer. The first passivation layer is laid and covers one side of the first piezoelectric material and the other end of the second upper electrode. The second passivation layer is laid and covers the other side of the first lower electrode, the other side of the second lower electrode, the back side opposite the opening of the silicon trench, and the other end of the silicon connector block. A first groove is formed in the second passivation layer on the other side of the first lower electrode to expose the other side of the first lower electrode, and a second groove is formed in the second passivation layer on the other side of the second lower electrode to expose the other side of the second lower electrode.

4. A transducer array, characterized in that, The transducer array includes at least one transducer as described in any one of claims 1 to 3, a silicon wafer, a second piezoelectric material, a third passivation layer, a fourth passivation layer, and at least two insulating materials. One side of the silicon wafer is connected to the third passivation layer through the second piezoelectric material, and the other side of the silicon wafer is connected to the fourth passivation layer. A through-hole corresponding to the number of the at least two insulating materials is opened in the middle of the silicon wafer. A single insulating material is attached to the inner wall of a single through-hole. A first electrode corresponding to the transducer is disposed in a portion of the insulating material, and a second electrode corresponding to the transducer is disposed in another portion of the insulating material. The first passivation layer of the at least one transducer is connected to the third passivation layer. The first piezoelectric material of the at least one transducer is connected to the second piezoelectric material. The second passivation layer of the at least one transducer is connected to the fourth passivation layer.

5. A method for fabricating a transducer array, characterized in that, The fabrication method is used to fabricate the transducer array as described in claim 4, and the fabrication method includes: A low-resistivity silicon wafer is obtained, and a plurality of silicon trenches and a plurality of silicon connectors are fabricated in the middle of the silicon wafer, wherein the plurality of silicon trenches and the plurality of silicon connectors are all insulated from the silicon wafer; A first upper electrode is fabricated on the silicon tank, and a through hole for the first upper electrode is etched in the middle of the first upper electrode. A second upper electrode is fabricated on the silicon interconnect block. Piezoelectric material is deposited on the first upper electrode, the second upper electrode, and the silicon wafer. Through holes of the piezoelectric material are etched on the piezoelectric material, and the through holes of the piezoelectric material are coaxial with the through holes of the first upper electrode. The bottom of the silicon wafer is ground to expose the insulating material, the bottom of the silicon trench, and the bottom of the silicon connector block; A first lower electrode is fabricated at the bottom of the silicon tank, and a second lower electrode is fabricated at the bottom of the silicon connector block.

6. The manufacturing method according to claim 5, characterized in that, In the process of obtaining a low-resistivity silicon wafer, and fabricating a plurality of silicon trenches and a plurality of silicon interconnect blocks in the middle portion of the silicon wafer, wherein the plurality of silicon trenches and the plurality of silicon interconnect blocks are all insulated from the silicon wafer, the method includes: Multiple first annular insulating grooves and second annular insulating grooves are etched in the middle of the upper end of the silicon wafer; Each of the first annular insulating grooves is filled with insulating material, and cavities are etched on the silicon surrounding the upper end of each of the first annular insulating grooves to obtain silicon grooves. Each of the second annular insulating grooves is filled with insulating material to obtain silicon connector blocks.

7. The manufacturing method according to claim 6, characterized in that, In fabricating a first upper electrode on the silicon trench, wherein a through-hole of the first upper electrode is etched in the middle of the first upper electrode, and in fabricating a second upper electrode on the silicon interconnect block, the method includes: PSG material is filled into the silicon trench; A first metal layer is deposited on the PSG material, the silicon interconnect block, and the silicon wafer; The first metal layer outside the upper end of the silicon tank and the upper end of the silicon connector block is etched away to obtain the first upper electrode and the second upper electrode. A through hole of the first upper electrode is etched in the middle of the first upper electrode on the PSG material. In the process of fabricating a first lower electrode at the bottom of the silicon trench and a second lower electrode at the bottom of the silicon interconnect block, the method includes: A second metal layer is deposited at the bottom of the silicon wafer, the bottom of the silicon trench, and the bottom of the silicon interconnect block; The second metal layer outside the bottom of the silicon trench and the bottom of the silicon interconnect is etched away to obtain the first lower electrode and the second lower electrode.

8. The manufacturing method according to claim 7, characterized in that, After depositing piezoelectric material on the first upper electrode, the second upper electrode, and the silicon wafer, and etching through-holes in the piezoelectric material, wherein the through-holes in the piezoelectric material are coaxial with the through-holes in the first upper electrode, the method further includes: Etch an extended hole in the piezoelectric material on the second upper electrode; Deposit a third metal layer on a piezoelectric material; The third metal layer above the first upper electrode, above the second upper electrode, and outside the connecting lines above the first upper electrode and the second upper electrode is etched away to obtain the extension of the second upper electrode. The extension of the second upper electrode has a through hole, and the through hole of the extension is coaxial with the through hole of the piezoelectric material.

9. The manufacturing method according to claim 8, characterized in that, After etching away the third metal layer above the first upper electrode, above the second upper electrode, and outside the connecting lines above the first upper electrode and above the second upper electrode to obtain an extension of the second upper electrode, wherein the extension of the second upper electrode has a through hole, and the through hole of the extension is coaxial with the through hole of the piezoelectric material, the method further includes: A passivation layer is attached to the piezoelectric material and the extension of the second upper electrode; The upper passivation layer is etched on the upper passivation layer at the upper end of the through hole of the extension, and the through hole of the upper passivation layer is coaxial with the through hole of the extension; After fabricating a first lower electrode at the bottom of the silicon trench and a second lower electrode at the bottom of the silicon interconnect block, the method further includes: A lower passivation layer is attached to the bottom of the silicon wafer, the bottom of the first lower electrode, and the bottom of the second lower electrode; A first groove is etched on the lower passivation layer at the bottom of the first lower electrode to expose the bottom of the first lower electrode, and a second groove is etched on the lower passivation layer at the bottom of the second lower electrode to expose the bottom of the second lower electrode.

10. The manufacturing method according to claim 9, characterized in that, After etching a first groove on the lower passivation layer at the bottom of the first lower electrode to expose the bottom of the first lower electrode, and etching a second groove on the lower passivation layer at the bottom of the second lower electrode to expose the bottom of the second lower electrode, the method includes: The PSG material is released through the through-hole of the first upper electrode, the through-hole of the piezoelectric material, the through-hole of the extension, and the through-hole of the upper passivation layer, so that the silicon trench is a cavity.

Images