Package structure and method of forming the same

Abstract

A packaging structure and a forming method thereof, the forming method, forming a first bonding layer and a plurality of protruding metal columns on a surface of a carrier substrate; providing a first chip including opposite first functional surfaces and a first back surface, the first functional surfaces having first external terminals, the first back surface having a second bonding layer; bonding the second bonding layer and the first bonding layer together; forming a first encapsulation layer encapsulating the first chip and the metal columns; providing a second chip including opposite second functional surfaces and a second back surface, the second functional surfaces having second external terminals; flip-chipping the second chip on the first encapsulation layer, the second external terminals on the second chip being electrically connected with the first external terminals and top surfaces of the metal columns. The first chip is prevented from being shifted or moved during packaging.

Description

Technical Field

[0001] This application relates to the field of packaging, and more particularly to a packaging structure and a method for forming the same. Background Technology

[0002] EMIB (Embedded Multi-Die Interconnect Bridge) is one of the existing advanced packaging technologies.

[0003] Similar to 2.5D packages based on silicon interposers, EMIB packages utilize localized high-density interconnects within a silicon die. Compared to traditional 2.5D packages, EMIB packages offer advantages such as normal package yield, smaller size, no need for additional processes, and simpler design because they lack through-silicon vias (TSVs).

[0004] However, in the existing EMIB packaging process, the embedded chip is prone to positional misalignment during packaging. Summary of the Invention

[0005] Some embodiments of this application provide a method for forming an encapsulation structure, including:

[0006] Provide carrier board;

[0007] A first bonding layer and a plurality of protruding metal pillars are formed on the upper surface of the carrier plate;

[0008] A first chip is provided, the first chip including a first functional surface and a first back surface opposite to each other, the first functional surface having a first external terminal, and the first back surface having a second bonding layer;

[0009] The second bonding layer on the first back side of the first chip is bonded to the first bonding layer on the upper surface of the carrier board;

[0010] A first molding layer is formed to encapsulate the first chip and the metal pillar, the first molding layer exposing the top surface of the first external terminal and the metal pillar;

[0011] A second chip is provided, the second chip including a second functional surface and a second back surface opposite to each other, the second functional surface having a second external terminal;

[0012] The second chip is flip-chipped onto the first molding compound, and the second external terminal on the second chip is electrically connected to the first external terminal and the top surface of the metal pillar.

[0013] A second molding layer is formed on the first molding layer to mold the second chip;

[0014] Remove the carrier board and the first bonding layer to expose the bottom surface of the metal pillar and the surface of the second bonding layer on the first back side of the first chip;

[0015] An external connection protrusion is formed on the bottom surface of the metal column to connect with the metal column.

[0016] In some embodiments, the upper surface of the carrier plate has a metal layer, which serves as the first bonding layer, and the protruding metal pillars are formed on the upper surface of the metal layer.

[0017] In some embodiments, the material of the second bonding layer is a metal or a dielectric material.

[0018] In some embodiments, when the material of the second bonding layer is a metal, the material of the second bonding layer is the same as the material of the metal layer.

[0019] In some embodiments, the upper surface of the carrier plate has a metal layer, a metal pillar protruding from the upper surface of the metal layer, and a photosensitive polymer layer located on the upper surface of the metal layer and covering the lower part of the sidewall of the metal pillar, wherein the photosensitive polymer layer is used as the first bonding layer.

[0020] In some embodiments, a temporary bonding layer is further formed between the metal layer and the carrier plate; the temporary bonding layer is removed simultaneously with the removal of the carrier plate and the first bonding layer.

[0021] In some embodiments, the upper surface of the carrier plate has a temporary bonding layer and metal pillars protruding from the upper surface of the temporary bonding layer, and the temporary bonding layer is used as the first bonding layer.

[0022] In some embodiments, the temporary bonding layer is made of silicon oxide.

[0023] In some embodiments, the material of the second bonding layer is a metal.

[0024] In some embodiments, the method further includes forming a pseudo-external protrusion on a second bonding layer on the first back side of the first chip.

[0025] In some embodiments, an external connection protrusion connected to the metal pillar is formed on the bottom surface of the metal pillar, while a pseudo external connection protrusion is formed on the surface of the second bonding layer on the first back side of the first chip.

[0026] In some embodiments, prior to forming the external connection bump and the pseudo external connection bump, a polymer layer is formed on the back surface of the first molding compound, the polymer layer having a first opening exposing a second bonding layer surface on a first back surface of the first chip and a second opening exposing the bottom surface of the metal pillar; the pseudo external connection bump is formed in the first opening, and the external connection bump is formed in the second opening, both the pseudo external connection bump and the external connection bump protruding from the surface of the polymer layer.

[0027] In some embodiments, before flip-chipping the second chip onto the first molding compound, the method further includes: forming a redistribution layer on the first molding compound, the redistribution layer being electrically connected to the first external terminal and the metal pillar; flip-chipping the second chip onto the first molding compound, the second external terminal on the second chip being electrically connected to the first external terminal and the metal pillar through the redistribution layer.

[0028] Some embodiments of this application also provide an encapsulation structure, including:

[0029] Carrier plate;

[0030] A first bonding layer and multiple protruding metal pillars are located on the upper surface of the carrier plate;

[0031] A first chip, the first chip includes a first functional surface and a first back surface opposite to each other, the first functional surface has a first external terminal, the first back surface has a second bonding layer, and the second bonding layer on the first back surface of the first chip is bonded to the first bonding layer on the upper surface of the carrier board.

[0032] A first molding layer is formed to encapsulate the first chip and the metal pillar, the first molding layer exposing the top surfaces of the first external terminal and the metal pillar;

[0033] The second chip includes a second functional surface and a second back surface, the second functional surface having a second external terminal, the second chip being flip-chip mounted on the first molding compound, and the second external terminal on the second chip being electrically connected to the first external terminal and the top surface of the metal pillar.

[0034] A second molding layer is located on the first molding layer to encapsulate the second chip.

[0035] In some embodiments, the upper surface of the carrier plate has a metal layer, which serves as the first bonding layer, and the protruding metal pillars are formed on the upper surface of the metal layer.

[0036] In some embodiments, the material of the second bonding layer is a metal or a dielectric material. When the material of the second bonding layer is a metal, the material of the second bonding layer is the same as the material of the metal layer.

[0037] In some embodiments, the upper surface of the carrier plate has a metal layer, a metal pillar protruding from the upper surface of the metal layer, and a photosensitive polymer layer located on the upper surface of the metal layer and covering the lower part of the sidewall of the metal pillar, wherein the photosensitive polymer layer is used as the first bonding layer.

[0038] In some embodiments, a temporary bonding layer is also formed between the metal layer and the carrier plate.

[0039] In some embodiments, the upper surface of the carrier plate has a temporary bonding layer and metal pillars protruding from the upper surface of the temporary bonding layer, and the temporary bonding layer is used as the first bonding layer.

[0040] In some embodiments, the temporary bonding layer is made of silicon oxide.

[0041] In some embodiments, the material of the second bonding layer is a metal.

[0042] The packaging structure and its formation method in some of the foregoing embodiments of this application include the following steps: A first bonding layer and a plurality of raised metal pillars are formed on the upper surface of a carrier substrate; a first chip is provided, the first chip including a first functional surface and a first back surface, the first functional surface having a first external terminal, and the first back surface having a second bonding layer; the second bonding layer on the first back surface of the first chip is bonded to the first bonding layer on the upper surface of the carrier substrate; a first molding compound is formed to encapsulate the first chip and the metal pillars, the first molding compound exposing the top surfaces of the first external terminal and the metal pillars; a second chip is provided, the second chip including a second functional surface and a second back surface, the second functional surface having a second external terminal; the second chip is flip-chip mounted on the first molding compound, the second external terminal on the second chip being electrically connected to the first external terminal and the top surface of the metal pillars; a second molding compound is formed on the first molding compound to encapsulate the second chip; the carrier substrate and the first bonding layer are removed, exposing the bottom surface of the metal pillars and the surface of the second bonding layer on the first back surface of the first chip; an external connection protrusion connected to the metal pillar is formed on the bottom surface of the metal pillar. In the encapsulation process, this application bonds the second bonding layer on the first back side of the first chip to the first bonding layer on the upper surface of the carrier board, thereby providing a high degree of bonding between the first chip and the carrier board. This ensures that the first chip is firmly fixed to the carrier board, preventing the first chip from shifting or moving (left-right or up-down) during subsequent encapsulation processes (such as during the formation of the first molding layer or the flip-chip bonding of the second chip). This guarantees the accuracy of the first chip's position during the encapsulation process, thereby improving the accuracy of electrical connections between the first chip and the subsequent second chip and enhancing the electrical performance of the encapsulation structure. Attached Figure Description

[0043] Figures 1-9 This is a schematic diagram illustrating the formation process of the packaging structure in some embodiments of this application;

[0044] Figures 10-15 This is a schematic diagram illustrating the formation process of the packaging structure in some other embodiments of this application;

[0045] Figures 16-20 This is a schematic diagram illustrating the formation process of the encapsulation structure in some embodiments of this application. Detailed Implementation

[0046] The specific embodiments of this application will be described in detail below with reference to the accompanying drawings. In describing the embodiments of this application in detail, for ease of explanation, the schematic diagrams may be partially enlarged without adhering to the general scale, and the schematic diagrams are merely examples and should not limit the scope of protection of this application. Furthermore, in actual manufacturing, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0047] This application first provides a method for forming an encapsulation structure, and the method is described in detail below with reference to the accompanying drawings.

[0048] refer to Figure 1 , providing carrier board 100.

[0049] The carrier plate 100 serves as a carrier for subsequent processes, and it will be removed after the corresponding process steps.

[0050] In some embodiments, the carrier plate 100 may be a glass carrier plate, a ceramic carrier plate, a resin carrier plate, or a silicon carrier plate. In this embodiment, the carrier plate 100 is a glass carrier plate.

[0051] In some embodiments, a temporary bonding layer 101 is further formed on the surface (upper surface) of the carrier plate 100, the temporary bonding layer 101 being used to enhance the performance of the metal layer 102 subsequently formed on the carrier plate 100 (see reference). Figure 2 The adhesion strength between the temporary bonding layer 101 and the carrier plate 100. In some embodiments, the material of the temporary bonding layer 101 is a polymer material, which can be subsequently removed by heating or UV irradiation to separate the carrier plate.

[0052] refer to Figure 2 Multiple protruding metal pillars 103 and metal layers 102 are formed on the upper surface of the carrier plate 100, and the metal layers 102 are used as the first bonding layer.

[0053] The metal layer 102 serves as the first bonding layer for subsequent bonding with the second bonding layer on the first back side of the first chip. In addition, the metal layer 102 can also serve as a conductive layer when the metal pillar 102 is formed by electroplating.

[0054] In some embodiments, the material of the metal layer 102 is one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, and silver. The metal layer 102 is formed by sputtering.

[0055] In some embodiments, the metal layer 102 is formed on the surface of the temporary bonding layer 101 on the carrier plate 100.

[0056] The metal pillar 103 protrudes from the surface of the metal layer 102. The metal pillar 103 is used for subsequent electrical connection with the flip-chip second chip, so as to lead the electrical contact points on the second chip in the package structure to the side of the first molding compound away from the second chip. In some embodiments, the number of the metal pillar 103 is multiple (≥2).

[0057] In some embodiments, the material of the metal pillar 103 is aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, or silver. The formation process of the metal pillar 103 includes an electroplating process, and when the metal pillar 103 is formed by electroplating, the metal layer 102 is used as the conductive layer in the electroplating process.

[0058] Electroplating is a process in which metal ions in an electroplating solution are reduced to metal atoms through an electrolytic reaction under the action of an external electric field, and then deposited on the cathode. During electroplating, the plating metal acts as the anode and the workpiece to be plated acts as the cathode. In a specific embodiment, the process of forming the metal pillar 103 using an electroplating process includes: forming a mask layer (not shown in the figure) on the metal layer 103, the mask layer having several openings that expose a portion of the surface of the metal layer 103; an electroplating solution is contained in a plating tank, the electroplating solution being an aqueous solution containing a compound of the plating metal, conductive salts, buffers, pH adjusters, and additives; at least a portion of a carrier plate 100 with the mask layer formed is placed in the plating tank, the metal layer 102 is used as the cathode, the plating metal is used as the anode, the metal layer 102 on the carrier plate 100 is connected to the negative terminal of a DC power supply, and the plating metal is connected to the positive terminal of a DC power supply; after energizing, metal ions in the electroplating solution move to the surface of the metal layer 102 exposed by the openings of the mask layer under the action of the potential difference, and are reduced to form the metal pillar 103; the metal of the anode (plating metal) is oxidized to form metal ions that enter the electroplating solution to maintain the concentration of the plated metal ions; after the metal pillar 103 is formed, the mask layer is removed.

[0059] In some embodiments, the metal layer 102 may include a central region and an edge region surrounding the central region, the formed metal pillars 103 are distributed on the edge region of the metal layer 102, and the central region of the metal layer 102 is subsequently used to place a first chip and bond it to a first back side of the first chip.

[0060] refer to Figure 3 A first chip 201 is provided, the first chip 201 includes a first functional surface and a first back surface opposite to each other, the first functional surface has a first external terminal 203, and the first back surface has a second bonding layer 204; the second bonding layer 204 of the first back surface of the first chip 201 is bonded to a first bonding layer (metal layer 102) on the upper surface of the carrier board 100.

[0061] In some embodiments, the first chip 201 is a chip with a high-density interconnect structure, serving as an interconnect bridge for interconnecting other chips (a plurality of subsequent flip-chips) in a flip-chip configuration.

[0062] The first chip 201 includes a first functional surface and a first back surface, the interconnect structure is located in the first chip 201, and the first external terminal 203 is electrically connected to the interconnect structure. In some embodiments, the first external terminal 203 is a first pad located in the first functional surface of the first chip 201 (the surface of the first pad may be flush with the surface of the first functional surface). In other embodiments, the first external terminal 203 includes a first pad located in the first functional surface of the first chip 201 and a first solder bump protruding from the surface of the first functional surface on the first pad. In some embodiments, the first solder bump may be a solder bump or include a metal bump and a solder bump located on the top surface of the metal bump. In some embodiments, the material of the first pad is one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, and silver. The material of the metal bump is one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, and silver. The material of the solder protrusion is one or more of tin, tin silver, tin lead, tin silver copper, tin silver zinc, tin zinc, tin bismuth indium, tin indium, tin gold, tin copper, tin zinc indium, or tin silver antimony.

[0063] The second bonding layer 204 on the first back side of the first chip 201 is bonded to the first bonding layer (metal layer 102) on the upper surface of the carrier 100, so that the first chip 201 and the carrier 100 have a high degree of firmness. This makes the first chip 201 firmly fixed on the carrier 100, preventing the first chip 201 from shifting or moving (moving left or right or up and down) during subsequent packaging processes (such as during the formation of the first molding layer or the flip-chip bonding process of the second chip). This ensures the accuracy of the position of the first chip 201 during the packaging process, thereby improving the accuracy of the electrical connection between the first chip 201 and the subsequent second chip and improving the electrical performance of the packaging structure.

[0064] The second bonding layer 204 on the first back side of the first chip 201 is bonded to the first bonding layer (metal layer 102) on the upper surface of the carrier 100 using a bonding process.

[0065] The material of the second bonding layer 204 can be a metal or a dielectric material.

[0066] In some embodiments, when the material of the second bonding layer 204 is a metal, the material of the second bonding layer 204 is the same as the material of the metal layer 102, and the first back side of the first chip 201 is bonded to the metal layer 102 by metal-metal diffusion bonding. In some embodiments, the material of the second bonding layer 204 is one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, and silver.

[0067] In another embodiment, when the material of the second bonding layer 204 is a dielectric material, the dielectric material can be silicon oxide, and the first back side of the first chip 201 is bonded to the metal layer 102 by metal-silicon oxide diffusion bonding.

[0068] In some embodiments, after the first back side of the first chip 201 is bonded to the first bonding layer (metal layer 102) on the upper surface of the carrier 100, the top surface of the first external terminal 203 of the first functional surface of the first chip 201 is flush with the top surface of the metal pillar 103.

[0069] refer to Figure 4 A first molding layer 104 is formed to encapsulate the first chip 201 and the metal pillar 103, and the first molding layer 104 exposes the top surface of the first external terminal 203 and the metal pillar 103.

[0070] The first molding layer 104 is made of molding resin, including epoxy resin, polyimide resin, benzocyclobutene resin, or polybenzoxazole resin. In one embodiment, the first molding layer 104 is formed by injection molding or transfer molding.

[0071] The first molding layer 104 formed covers the sidewall and first functional surface of the first chip 201, the sidewall surface of the first external terminal 203, and the sidewall surface of the metal pillar 103, and exposes the top surface of the first external terminal 203 and the metal pillar 103.

[0072] refer to Figure 5 A second chip 202 is provided, the second chip 202 includes a second functional surface and a second back surface, the second functional surface has a second external terminal 205; the second chip 202 is flip-chip mounted on the first molding compound 104, and the second external terminal 205 on the second chip 202 is electrically connected to the first external terminal 203 and the metal post 103.

[0073] There are multiple second chips 202, which are flip-mounted on the first molding compound 104. A portion of the second external terminals 205 of each second chip 202 is electrically connected to the first external terminals 203 on the first chip 201, and another portion of the second external terminals 205 is electrically connected to the metal pillars 103. The interconnection between the multiple second chips 202 is achieved by the first chip 201 embedded in the first molding compound 104. Furthermore, the metal pillars 103 located in the first molding compound 104 can lead some of the electrical connection points (second external terminals 205) on the second chip 202 to the back side of the first molding compound 104 (the back side of the first molding compound 104 is the surface of the first molding compound 104 away from the second chip 202) to facilitate the connection of other chips or devices.

[0074] The second chip 202 includes a second functional surface and a second back surface, the second functional surface having a second external terminal 205. In some embodiments, the second external terminal 205 includes a second pad located on the second functional surface of the second chip 202 and a second solder bump protruding from the surface of the second functional surface on the second pad. In some embodiments, the second solder bump may include a metal bump and a solder bump located on the top surface of the metal bump. In some embodiments, the material of the second pad is one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, and silver. The material of the metal bump is one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, and silver. The material of the solder bump is one or more of tin, tin-silver, tin-lead, tin-silver-copper, tin-silver-zinc, tin-zinc, tin-bismuth-indium, tin-indium, tin-gold, tin-copper, tin-zinc-indium, or tin-silver-antimony.

[0075] The plurality of second chips 202 may be chips with the same or different functions, and the plurality of second chips 202 may include logic chips and / or memory chips. In some embodiments, the logic chip may include gate arrays, cell substrate arrays, embedded arrays, structured application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), complex programmable logic devices (CPLDs), central processing units (CPUs), microprocessor units (MPUs), microcontroller units (MCUs), logic integrated circuits (ICs), application processors (APs), display driver ICs (DDIs), radio frequency (RF) chips, power supply chips, or complementary metal-oxide-semiconductor (CMOS) image sensors. In some embodiments, the memory chip may include volatile memory chips (such as dynamic random access memory (DRAM) or static RAM (SRAM)) or non-volatile memory chips (such as flash memory (Flash), phase-change RAM (PRAM), magnetoresistive RAM (MRAM), ferroelectric RAM (FeRAM), or resistive RAM (ReRAM)).

[0076] In some embodiments, before flip-chipping the second chip 202 onto the first molding compound 104, the method further includes: forming a redistribution layer (not shown) on the first molding compound 104, the redistribution layer being electrically connected to the first external terminal 203 and the metal pillar 103; flip-chipping the second chip 202 onto the first molding compound 104, the second external terminal 205 on the second functional surface of the second chip 202 being electrically connected to the first external terminal 203 and the metal pillar 103 through the redistribution layer.

[0077] refer to Figure 6 and Figure 7 A second molding layer 106 is formed on the first molding layer 104 to mold the second chip 202.

[0078] In one embodiment, prior to the formation of the second molding compound 106, the space between the second chip 202 and the first molding compound 104 is filled with a filler layer 105 (see reference). Figure 6 The bottom filler layer 105 protects the solder joints connecting the second chip 202 and the first molding compound layer 104, protecting the second chip 202 from moisture, ionic contaminants, radiation, and harmful operating environments such as mechanical stretching, shearing, twisting, and vibration. Furthermore, the bottom filler layer 105 reduces the mismatch in thermal expansion coefficients between the second chip 202 and the first molding compound layer 104, improving the reliability of the packaging structure. In one embodiment, the material of the bottom filler layer 105 can be a silicone-based resin material, a thermoplastic resin material, a thermosetting resin material, or a UV-curable resin material, and the bottom filler is formed using a dispensing process.

[0079] The second molding compound 106 is made of molding resin, including epoxy resin, polyimide resin, benzocyclobutene resin, or polybenzoxazole resin. In one embodiment, the second molding compound 106 is formed by injection molding or transfer molding. The formed second molding compound 106 covers the surface of the sidewall of the second chip 202 and exposes the second back surface of the second chip 202. Subsequently, a heat sink can be attached to the second back surface of the second chip 202 to dissipate heat and control the second chip 202 to a suitable temperature. In some embodiments, the heat sink is formed of a material with high thermal conductivity, including metals (e.g., copper, aluminum, gold, nickel, steel, or stainless steel) or carbon-containing materials (e.g., graphite, graphene, or carbon nanotubes).

[0080] refer to Figure 8 Remove the carrier plate 100 and the first bonding layer (metal layer 102, see reference). Figure 7 This exposes the bottom surface of the metal pillar 103 and the surface of the second bonding layer 204 on the first back side of the first chip 201.

[0081] The carrier plate 100 can be removed using a carrier plate peeling process, and the removed carrier plate 100 can be reused. After removing the carrier plate 100, the first bonding layer (metal layer 102) can be removed. The removal of the metal layer 102 can be performed using an etching process or a chemical mechanical polishing process.

[0082] After removing the carrier 100 and the metal layer 102, in addition to exposing the bottom surface of the metal pillar 103, the bottom surface of the second bonding layer 204 on the first back side of the first chip 201 and the bottom surface of the first molding layer 104 are also exposed.

[0083] In some embodiments, when a temporary bonding layer 101 is formed between the first bonding layer (metal layer 102) and the carrier plate 100, the temporary bonding layer 101 is removed at the same time as the carrier plate 100 and the first bonding layer (metal layer 102) are removed.

[0084] refer to Figure 9 An external connection protrusion 108 is formed on the bottom surface of the metal pillar 103 to connect with the metal pillar 103.

[0085] The external connection protrusion 108 is used to connect the package structure formed in this application to other chips or devices (such as packaging substrates or PCB substrates).

[0086] In some embodiments, the method further includes forming a pseudo-external bump 109 on the surface of a second bonding layer 204 on the first back side of the first chip 201. The pseudo-external bump 109 may be formed simultaneously with the external connection bump 108, that is, while the external connection bump 108 connected to the metal pillar 103 is formed on the bottom surface of the metal pillar 103, the pseudo-external bump 109 is formed on the first back side of the first chip 201.

[0087] In some embodiments, the formation process of the external connection protrusion 108 and the pseudo external connection protrusion 109 includes: forming a polymer layer 107 on the back surface of the first molding compound, the polymer layer 107 having a first opening exposing the surface of the second bonding layer 204 on the first back surface of the first chip 201 and a second opening exposing the bottom surface of the metal pillar 103, the polymer layer 107 being made of resin, including photosensitive resin; forming an under-protruding metal layer (UBM, not shown in the figure) on the inner wall surfaces of the first and second openings and on the surface of the polymer layer 107; forming a (second) mask layer on the polymer layer 107, the ( (Second) The mask layer has several third openings, which are connected to the corresponding first and second openings. The size of the third opening is larger than that of the first and second openings. The pseudo-external protrusion is formed in the first opening and the corresponding third opening, and the external connection protrusion is formed in the second opening and the corresponding third opening. The external connection protrusion 108 and the pseudo-external protrusion 109 can be formed by electroplating. The protruding metal layer on both sides of the (second) mask layer and the external connection protrusion 108 and the pseudo-external protrusion 109 is removed so that the external connection protrusion 108 and the pseudo-external protrusion 109 both protrude from the surface of the polymer layer 107. By forming the pseudo-external bump 109, on the one hand, the formed pseudo-external bump 109 increases reliability as a mechanical structural balance, and when forming the pseudo-external bump 109, it is necessary to open the polymer layer 107 at the bottom of the first chip 201 (forming a second opening), which can prevent the positional displacement of the external connection bump 108 caused by internal stress; on the other hand, when the pseudo-external bump 109 contacts the second bonding layer 204 of the metal material on the back of the first chip 201, the pseudo-external bump 109 can be grounded to improve the electromagnetic shielding (EMI) effect.

[0088] In one embodiment, both the external connection bump 108 and the pseudo external connection bump 109 may include a metal bump and a solder bump located on the top surface of the metal bump. In some embodiments, the metal bump is made of one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, and silver. The solder bump is made of one or more of tin, tin-silver, tin-lead, tin-silver-copper, tin-silver-zinc, tin-zinc, tin-bismuth-indium, tin-indium, tin-gold, tin-copper, tin-zinc-indium, or tin-silver-antimony.

[0089] Other embodiments of this application also provide a method for forming an encapsulation structure. The main difference between this embodiment and the foregoing embodiments is that the object of the first bonding layer is different (it should be noted that the limitations of the same or similar parts in this embodiment and the foregoing embodiments will not be repeated in this embodiment; please refer to the limitations of the corresponding parts in the foregoing embodiments for details). First, refer to Figure 10 The upper surface of the carrier plate 100 has a metal layer 102, a metal pillar 103 protruding from the upper surface of the metal layer 102, and a photosensitive polymer layer 110 located on the upper surface of the metal layer 102 and covering the lower part of the sidewall of the metal pillar 103, and the photosensitive polymer layer 110 is used as the first bonding layer.

[0090] The photosensitive polymer layer 110 serves two purposes. First, it acts as a first bonding layer, bonding together with the second bonding layer 204 on the first back side of the subsequent first chip 201. This ensures the first chip 201 is firmly fixed to the carrier board 100, preventing positional shifts or movements (left-right or up-down movements) during subsequent packaging processes (such as the formation of the first molding compound or the flip-chip bonding of the second chip). This guarantees the accuracy of the first chip 201's position during packaging, thereby improving the precision of electrical connections between the first chip 201 and the subsequent second chip and enhancing the electrical performance of the packaging structure. Second, the photosensitive polymer layer 110 better secures the metal pillar 103, preventing the subsequent formation of the first molding compound 104 (see reference). Figure 12 When the metal pillar 103 shifts or moves (left-right or up-down) during the packaging process, it ensures the accuracy of the metal pillar 103's position, thereby improving the alignment between the metal pillar 103 and the subsequent second chip 202 (see reference). Figure 13 The precision of electrical connections further improves the electrical performance of the packaging structure.

[0091] In some embodiments, the material of the photosensitive polymer layer 110 is a photosensitive epoxy resin, a photosensitive polyimide resin, a photosensitive benzocyclobutene resin, or a photosensitive polybenzoxazole resin.

[0092] In some embodiments, the mask layer used in the electroplating process to form the metal pillar 103 is made of a photosensitive polymer material; after the metal pillar 103 is formed in the opening in the mask layer by the electroplating process, a portion of the thickness of the photosensitive polymer material is etched away, and the remaining photosensitive polymer material is placed in the photosensitive polymer layer 110.

[0093] In some embodiments, a temporary bonding layer 101 is further provided between the metal layer 102 and the upper surface of the carrier plate 100.

[0094] refer to Figure 11A first chip 201 is provided, the first chip 201 includes a first functional surface and a first back surface opposite to each other, the first functional surface has a first external terminal 203, and the first back surface has a second bonding layer 204; the second bonding layer 204 of the first back surface of the first chip 201 is bonded to a first bonding layer (photosensitive polymer layer 110) on the upper surface of the carrier 100.

[0095] refer to Figure 12 A first molding layer 104 is formed to encapsulate the first chip 201 and the metal pillar 103, and the first molding layer 104 exposes the top surface of the first external terminal 203 and the metal pillar 103.

[0096] refer to Figure 13 A second chip 202 is provided, the second chip 202 includes a second functional surface and a second back surface, the second functional surface having a second external terminal 205; the second chip 202 is flip-chip mounted on the first molding compound 104, the second external terminal 205 on the second chip 202 is electrically connected to the first external terminal 203 and the metal pillar 103; a second molding compound 106 is formed on the first molding compound 104 to mold the second chip 202.

[0097] refer to Figure 14 Remove the carrier plate 100 and the first bonding layer (photosensitive polymer layer 110, see reference). Figure 13 This exposes the bottom surface of the metal pillar 103 and the surface of the second bonding layer 204 on the first back side of the first chip 201.

[0098] After removing the first bonding layer (photosensitive polymer layer 110), in addition to exposing the bottom surface of the metal pillar 103, a portion of the sidewall surface of the metal pillar 103 is also exposed.

[0099] refer to Figure 15 An external connection protrusion 108 is formed on the bottom surface of the metal pillar 103 to connect with the metal pillar 103; a pseudo external connection protrusion 109 is formed on the surface of the second bonding layer 204 on the first back side of the first chip 201.

[0100] The external connection protrusion 108 and the pseudo external connection protrusion 109 are partially located in the polymer layer 107 on the back surface of the first molding layer 104.

[0101] Some embodiments of this application also provide a method for forming an encapsulation structure. The main difference between this embodiment and the previous embodiments is that the object of the first bonding layer is different (it should be noted that the limitations of the same or similar parts as those in the previous embodiments will not be repeated in this embodiment; please refer to the limitations of the corresponding parts in the previous embodiments for details). First, refer to Figure 16 The upper surface of the carrier plate 100 has a temporary bonding layer 101 and a metal pillar 103 protruding from the upper surface of the temporary bonding layer 101, and the temporary bonding layer 101 is used as the first bonding layer.

[0102] The temporary bonding layer 101 serves as the first bonding layer and is bonded together with the second bonding layer 204 on the first back side of the subsequent first chip 201, so that the first chip 201 is firmly fixed on the carrier board 100. This prevents the first chip 201 from shifting or moving (moving left or right or up or down) during subsequent packaging processes (such as during the formation of the first molding layer or the flip-chip bonding process of the second chip), ensuring the accuracy of the position of the first chip 201 during the packaging process. This improves the accuracy of the electrical connection between the first chip 201 and the subsequent second chip and enhances the electrical performance of the packaging structure.

[0103] In some embodiments, the temporary bonding layer 101 is made of silicon oxide.

[0104] refer to Figure 17 A first chip 201 is provided, the first chip 201 includes a first functional surface and a first back surface opposite to each other, the first functional surface has a first external terminal 203, and the first back surface has a second bonding layer 204; the second bonding layer 204 of the first back surface of the first chip 201 is bonded together with a first bonding layer (temporary bonding layer 101) on the upper surface of the carrier board 100.

[0105] refer to Figure 18 A first molding layer 104 is formed to encapsulate the first chip 201 and the metal pillar 103, and the first molding layer 104 exposes the top surface of the first external terminal 203 and the metal pillar 103.

[0106] refer to Figure 19 A second chip 202 is provided, the second chip 202 includes a second functional surface and a second back surface, the second functional surface having a second external terminal 205; the second chip 202 is flip-chip mounted on the first molding compound 104, the second external terminal 205 on the second chip 202 is electrically connected to the first external terminal 203 and the metal pillar 103; a second molding compound 106 is formed on the first molding compound 104 to mold the second chip 202.

[0107] refer to Figure 20 Remove the carrier plate 100 and the first bonding layer (temporary bonding layer 101, see reference). Figure 19The bottom surface of the metal pillar 103 and the surface of the second bonding layer 204 on the first back side of the first chip 201 are exposed; an external connection protrusion 108 connected to the metal pillar 103 is formed on the bottom surface of the metal pillar 103; and a pseudo external connection protrusion 109 is formed on the surface of the second bonding layer 204 on the first back side of the first chip 201.

[0108] The external connection protrusion 108 and the pseudo external connection protrusion 109 are partially located in the polymer layer 107 on the back surface of the first molding layer 104.

[0109] Some embodiments of this application also provide a packaging structure, see reference. Figure 7 ,include:

[0110] Carrier plate 100;

[0111] A first bonding layer (metal layer 102) and a plurality of protruding metal pillars 103 are located on the carrier plate 100;

[0112] The first chip 201 includes a first functional surface and a first back surface. The first functional surface has a first external terminal 203, and the first back surface has a second bonding layer 204. The second bonding layer 204 on the first back surface of the first chip 201 is bonded to the first bonding layer (metal layer 102) on the upper surface of the carrier board 100.

[0113] A first molding layer 104 is used to encapsulate the first chip 201 and the metal pillar 103, and the first molding layer 104 exposes the top surface of the first external terminal 203 and the metal pillar 103.

[0114] The second chip 202 includes a second functional surface and a second back surface, the second functional surface has a second external terminal 205, the second chip 202 is flip-chip mounted on the first molding compound 104, and the second external terminal 205 on the second chip 202 is electrically connected to the first external terminal 203 and the metal pillar 103.

[0115] A second molding layer 106 is located on the first molding layer 104 to mold the second chip 202.

[0116] In this embodiment, the upper surface of the carrier plate 100 has a metal layer 102, which serves as the first bonding layer, and the protruding metal pillars 103 are formed on the upper surface of the metal layer 102.

[0117] In some embodiments, the material of the second bonding layer 204 is a metal or a dielectric material. When the material of the second bonding layer 204 is a metal, the material of the second bonding layer 204 is the same as the material of the first bonding layer (metal layer 102).

[0118] In some embodiments, reference Figure 13 The upper surface of the carrier plate 100 has a metal layer 102, a metal pillar 103 protruding from the upper surface of the metal layer 102, and a photosensitive polymer layer 110 located on the upper surface of the metal layer 102 and covering the lower part of the sidewall of the metal pillar 103, and the photosensitive polymer layer 110 is used as the first bonding layer.

[0119] In some embodiments, reference Figure 7 or Figure 13 A temporary bonding layer 101 is also formed between the metal layer 102 and the carrier plate 100.

[0120] In some embodiments, reference Figure 19 The upper surface of the carrier plate 100 has a temporary bonding layer 101 and a metal pillar 103 protruding from the upper surface of the temporary bonding layer 101, and the temporary bonding layer 101 is used as the first bonding layer.

[0121] In some embodiments, the temporary bonding layer 101 is made of silicon oxide, and the second bonding layer 204 is made of metal.

[0122] It should be noted that the terms "comprising" and "having," and their variations, used in this application are intended to cover non-exclusive inclusion. The terms "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence, unless explicitly indicated by the context. It should be understood that such data can be used interchangeably where appropriate. Furthermore, the embodiments and features described in the embodiments of this application can be combined with each other unless otherwise specified. In addition, descriptions of well-known components and technologies have been omitted in the above description to avoid unnecessarily obscuring the concepts of this application. In the various embodiments described above, each embodiment focuses on its differences from other embodiments; similar or identical parts between embodiments can be referred to (or understood) interchangeably.

[0123] Although this application has been disclosed above with reference to preferred embodiments, it is not intended to limit this application. Any person skilled in the art can make possible changes and modifications to the technical solutions of this application by utilizing the methods and techniques disclosed above without departing from the spirit and scope of this application. Therefore, any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of this application without departing from the content of the technical solutions of this application shall fall within the protection scope of the technical solutions of this application.

Claims

1. A method for forming an encapsulation structure, characterized in that, include: Provide carrier board; A first bonding layer and a plurality of protruding metal pillars are formed on the upper surface of the carrier plate; A first chip is provided, the first chip including a first functional surface and a first back surface opposite to each other, the first functional surface having a first external terminal, and the first back surface having a second bonding layer; The second bonding layer on the first back side of the first chip is bonded to the first bonding layer on the upper surface of the carrier board; A first molding layer is formed to encapsulate the first chip and the metal pillar, the first molding layer exposing the top surface of the first external terminal and the metal pillar; A second chip is provided, the second chip including a second functional surface and a second back surface opposite to each other, the second functional surface having a second external terminal; The second chip is flip-chipped onto the first molding compound, and the second external terminal on the second chip is electrically connected to the first external terminal and the top surface of the metal pillar. A second molding layer is formed on the first molding layer to mold the second chip; Remove the carrier board and the first bonding layer to expose the bottom surface of the metal pillar and the surface of the second bonding layer on the first back side of the first chip; An external connection protrusion is formed on the bottom surface of the metal column to connect with the metal column.

2. The method for forming the packaging structure according to claim 1, characterized in that, The upper surface of the carrier plate has a metal layer, which serves as the first bonding layer, and the protruding metal pillars are formed on the upper surface of the metal layer.

3. The method for forming the packaging structure according to claim 2, characterized in that, The material of the second bonding layer is a metal or a dielectric material.

4. The method for forming the packaging structure according to claim 3, characterized in that, When the material of the second bonding layer is metal, the material of the second bonding layer is the same as the material of the metal layer.

5. The method for forming the packaging structure according to claim 1, characterized in that, The upper surface of the carrier plate has a metal layer, a metal pillar protruding from the upper surface of the metal layer, and a photosensitive polymer layer located on the upper surface of the metal layer and covering the lower part of the sidewall of the metal pillar, with the photosensitive polymer layer serving as the first bonding layer.

6. The method for forming the packaging structure according to claim 2 or 5, characterized in that, A temporary bonding layer is also formed between the metal layer and the carrier plate; the temporary bonding layer is removed at the same time as the carrier plate and the first bonding layer are removed.

7. The method for forming the packaging structure according to claim 1, characterized in that, The upper surface of the carrier plate has a temporary bonding layer and metal pillars protruding from the upper surface of the temporary bonding layer, and the temporary bonding layer is used as the first bonding layer.

8. The method for forming the packaging structure according to claim 7, characterized in that, The temporary bonding layer is made of silicon oxide.

9. The method for forming the packaging structure according to claim 5 or 7, characterized in that, The material of the second bonding layer is metal.

10. The method for forming the packaging structure according to claim 1, characterized in that, Also includes: A pseudo-external protrusion is formed on the second bonding layer on the first back side of the first chip.

11. The method for forming the packaging structure according to claim 10, characterized in that, While forming an external connection protrusion connected to the metal pillar on the bottom surface of the metal pillar, a pseudo external connection protrusion is formed on the surface of the second bonding layer on the first back side of the first chip.

12. The method for forming the packaging structure according to claim 11, characterized in that, Before forming the external connection bump and the pseudo external connection bump, a polymer layer is formed on the back surface of the first molding compound. The polymer layer has a first opening that exposes the surface of the second bonding layer on the first back surface of the first chip and a second opening that exposes the bottom surface of the metal pillar. The pseudo external connection bump is formed in the first opening, and the external connection bump is formed in the second opening. Both the pseudo external connection bump and the external connection bump protrude from the surface of the polymer layer.

13. The method for forming the packaging structure according to claim 1, characterized in that, Before flip-chipping the second chip onto the first molding compound, the method further includes: forming a redistribution layer on the first molding compound, the redistribution layer being electrically connected to the first external terminal and the metal pillar; flip-chipping the second chip onto the first molding compound, the second external terminal on the second chip being electrically connected to the first external terminal and the metal pillar through the redistribution layer.

14. A packaging structure, characterized in that, include: Carrier plate; A first bonding layer and multiple protruding metal pillars are located on the upper surface of the carrier plate; A first chip, the first chip includes a first functional surface and a first back surface opposite to each other, the first functional surface has a first external terminal, the first back surface has a second bonding layer, and the second bonding layer on the first back surface of the first chip is bonded to the first bonding layer on the upper surface of the carrier board. A first molding layer is formed to encapsulate the first chip and the metal pillar, the first molding layer exposing the top surfaces of the first external terminal and the metal pillar; The second chip includes a second functional surface and a second back surface, the second functional surface having a second external terminal, the second chip being flip-chip mounted on the first molding compound, and the second external terminal on the second chip being electrically connected to the first external terminal and the top surface of the metal pillar. A second molding layer is located on the first molding layer to encapsulate the second chip.

15. The packaging structure according to claim 14, characterized in that, The upper surface of the carrier plate has a metal layer, which serves as the first bonding layer, and the protruding metal pillars are formed on the upper surface of the metal layer.

16. The packaging structure according to claim 15, characterized in that, The material of the second bonding layer is a metal or a dielectric material. When the material of the second bonding layer is a metal, the material of the second bonding layer is the same as the material of the metal layer.

17. The packaging structure according to claim 14, characterized in that, The upper surface of the carrier plate has a metal layer, a metal pillar protruding from the upper surface of the metal layer, and a photosensitive polymer layer located on the upper surface of the metal layer and covering the lower part of the sidewall of the metal pillar, with the photosensitive polymer layer serving as the first bonding layer.

18. The packaging structure according to claim 15 or 17, characterized in that, A temporary bonding layer is also formed between the metal layer and the carrier plate.

19. The packaging structure according to claim 14, characterized in that, The upper surface of the carrier plate has a temporary bonding layer and metal pillars protruding from the upper surface of the temporary bonding layer, and the temporary bonding layer is used as the first bonding layer.

20. The packaging structure according to claim 19, characterized in that, The temporary bonding layer is made of silicon oxide.

21. The packaging structure according to claim 17 or 19, characterized in that, The material of the second bonding layer is metal.

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