Solar energy collector daily control system

Abstract

The application relates to a solar heat collecting device daily control system, which comprises an MCU unit, two direct-current motor driving units, two state detecting units, a remote communication unit, an inclination sensor, a first serial interface unit, a second serial interface unit, an input-output interface unit and a power supply unit. In the application, the daily control system with the integration of the controller and the motor driving circuit can greatly reduce the equipment installation space and the material management cost; the two-way direct-current motor driving units can realize the motor control of the two-way single-shaft daily system or the motor control of the one-way double-shaft daily system; and the input-output interface unit can conveniently connect external detection signals or realize the control of external equipment.

Description

Technical Field

[0001] This invention belongs to the technical field of solar thermal collectors and relates to a daily control system for a solar thermal collector. Background Technology

[0002] A solar-powered automatic tracking system (referred to as a solar tracking system) tracks the sun's daily trajectory and uses a motor to control the rotation of solar panels and other solar energy equipment, thereby improving the utilization rate of solar energy. It is mainly used in solar power generation devices, solar thermal collectors, and other solar energy equipment. The solar tracking control system is the core of the solar tracking system. Existing solar tracking control systems only have control functions and lack motor drive circuitry, requiring a separate motor driver to drive the motor. This results in a complex structure, high cost, and relatively low motor control precision. Generally, a single solar tracking control system can only be applied to a single, specific type of solar tracking system. Summary of the Invention

[0003] In view of the shortcomings of the prior art, the technical problem to be solved by the present invention is to provide a daily control system for a solar thermal collector.

[0004] To achieve the above objectives, the present invention provides the following technical solution:

[0005] A daily control system for a solar thermal collector includes

[0006] The MCU unit is used to store at least one day-by-day algorithm, calculate the sun's position using the day-by-day algorithm, and output the corresponding pulse drive signal;

[0007] Two DC motor drive units are provided, which are used to generate motor drive voltage according to the pulse drive signal of the MCU unit.

[0008] Two status detection units are provided, each corresponding to a DC motor drive unit, and are used to detect the working status of the corresponding DC motor drive unit.

[0009] The remote communication unit is used for data transmission between the MCU unit and the remote control terminal.

[0010] An inclinometer is used to measure the angle of the mirror field and provide it to the MCU unit through the first serial interface unit;

[0011] The second serial interface unit is used to access meteorological station data;

[0012] The input / output interface unit provides an interface for connecting the MCU unit to external devices; and

[0013] The power supply unit is used to provide power voltage to each unit.

[0014] Furthermore, each of the DC motor drive units includes a full-bridge drive circuit, which is used to generate the drive voltage of the motor according to the pulse drive signal of the MCU unit; the full-bridge drive circuit includes a half-bridge drive chip U13, resistors R18 and R19, current sampling resistors U42 and U43, capacitor C34, diodes D12, D14, D15, D24, D25, MOSFET 16, and MOSFET 17;

[0015] The IN pin of chip U13 is connected to the first pulse drive signal from the MCU unit; the VCC pin of chip U13 is connected to the 11V power supply voltage output by the power supply unit; the SD# pin of chip U13 is connected to the shutdown signal; the COM pin of chip U13 is grounded; the VB pin of chip U13 is electrically connected to its VS pin through capacitor C34; the VB pin of chip U13 is also electrically connected to the negative terminal of diode D12; the positive terminal of diode D12 is connected to the 11V power supply voltage.

[0016] The HO pin of chip U13 is electrically connected to the negative terminal of diode D14, and the positive terminal of diode D14 is electrically connected to the gate of field-effect transistor U16. Resistor R18 is connected in parallel with diode D14. The drain of field-effect transistor U16 is connected to an external power supply voltage. The drain of field-effect transistor U16 is also electrically connected to the negative terminal of diode D25, and the positive terminal of diode D25 is electrically connected to the VS pin of chip U13.

[0017] The LO pin of chip U13 is electrically connected to the negative terminal of diode D15, and the positive terminal of diode D15 is electrically connected to the gate of field-effect transistor U17. Resistor R19 is connected in parallel with diode D15. The drain of field-effect transistor U17 is connected to the external power supply voltage, and the drain of field-effect transistor U17 is also electrically connected to the negative terminal of diode D24. The negative terminal of diode D24 is connected to sampling ground MGND. Sampling ground MGND is grounded through current sampling resistor U42, and current sampling resistor U43 is connected in parallel with current sampling resistor U42. The positive terminal of diode D24 is electrically connected to the VS pin of chip U13, and the VS pin of chip U13 is used to output motor drive voltage MO+.

[0018] The full-bridge drive circuit also includes a half-bridge drive chip U15, resistors R20 and R21, capacitor C35, diodes D13, D16, D17, D22, D23, MOSFET 18, and MOSFET 19.

[0019] The IN pin of chip U15 is connected to the second pulse drive signal from the MCU unit; the VCC pin of chip U15 is connected to the 11V power supply voltage; the SD# pin of chip U15 is connected to the shutdown signal; the COM pin of chip U15 is grounded; the VB pin of chip U15 is electrically connected to its VS pin through capacitor C35; the VB pin of chip U15 is also electrically connected to the negative terminal of diode D13; the positive terminal of diode D13 is connected to the 11V power supply voltage.

[0020] The HO pin of chip U15 is electrically connected to the negative terminal of diode D16, and the positive terminal of diode D16 is electrically connected to the gate of field-effect transistor U18. Resistor R20 is connected in parallel with diode D16. The drain of field-effect transistor U18 is connected to the external power supply voltage. The drain of field-effect transistor U18 is also electrically connected to the negative terminal of diode D23. The positive terminal of diode D23 is electrically connected to the VS pin of chip U15.

[0021] The LO pin of chip U15 is electrically connected to the negative terminal of diode D17, and the positive terminal of diode D17 is electrically connected to the gate of field-effect transistor U19. Resistor R21 is connected in parallel with diode D17. The drain of field-effect transistor U19 is connected to the external power supply voltage, and the drain of field-effect transistor U19 is also electrically connected to the negative terminal of diode D22. The negative terminal of diode D22 is connected to sampling ground MGND, and the positive terminal of diode D22 is electrically connected to the VS pin of chip U15. The VS pin of chip U15 is used to output the motor drive voltage MO-.

[0022] Furthermore, the DC motor drive unit also includes a forward and reverse limit circuit, which is used to limit the forward rotation angle and the reverse rotation angle of the motor. The forward and reverse limit circuit includes a forward limit switch, a reverse limit switch, a first NOR gate, and a second NOR gate. The first pulse drive signal and the second pulse drive signal from the MCU unit are electrically connected to the first input terminals of the two NOR gates after photoelectric isolation. The first limit signal from the forward limit switch and the second limit signal from the reverse limit switch are electrically connected to the second input terminals of the two NOR gates after photoelectric isolation. The output terminals of the two NOR gates are electrically connected to the IN pin of chip U13 and the IN pin of chip U15, respectively.

[0023] Furthermore, the positive and negative limit circuits also include two opto-isolation circuits. The opto-isolation circuits are used to send the first limit signal or the second limit signal to the second input terminal of the NOR gate after opto-isolation, and to send the opto-isolated signal to the MCU unit after opto-isolation again.

[0024] The opto-isolation circuit includes a dual-channel opto-isolation chip U63, resistors R70, R73, R83, R84, and capacitor C152. The Anode1 pin of chip U63 is connected to a 5V power supply through resistor R83, and the Cathode1 pin of chip U63 is connected to a limit signal Q1. The Collector1 pin of chip U63 outputs a limit signal SQ1, and the Collector1 pin of chip U63 is connected to a 5V power supply through resistor R70. The pin is also grounded through capacitor C152; the Emitter1 pin of the U63 chip is grounded, the Anode2 pin of the U63 chip is connected to a 5V power supply voltage through resistor R84, the Cathode2 pin of the U63 chip is electrically connected to its Collector1 pin; the Collector2 pin of the U63 chip is connected to a 3.3V power supply voltage through resistor R73, the Collector2 pin of the U63 chip is also electrically connected to the MCU unit; the Emitter2 pin of the U63 chip is connected to digital ground DGND.

[0025] Furthermore, the state detection unit includes a current and voltage acquisition circuit, a hardware overcurrent detection circuit, and an overcurrent shutdown control circuit. The current and voltage acquisition circuit is used to sample the output current of the full-bridge drive circuit to obtain a current sampling signal ADC_I, and to sample the externally input power supply voltage to obtain a voltage sampling signal ADC_V. The hardware overcurrent detection circuit is used to detect the current sampling signal ADC_I and output a valid overcurrent signal when the current sampling signal ADC_I exceeds a predetermined value. The overcurrent shutdown control circuit is used to output a valid shutdown signal when the overcurrent signal is valid and the overcurrent shutdown control signal sent by the MCU unit is valid.

[0026] Furthermore, the current and voltage acquisition circuit includes an isolation amplifier chip U25, a precision amplifier chip U30, a current sampling resistor U26, a current sampling resistor U27, a current sampling resistor U29, a current sampling resistor U31, a current sampling resistor U32, a current sampling resistor U33, a resistor R27, a capacitor C41, a capacitor C42, and a capacitor C43.

[0027] The VDD1 pin of chip U25 is connected to the 5V power supply voltage output by the power supply unit, the VDD2 pin of chip U25 is connected to the 3.3V power supply voltage output by the power supply unit, the GND1 pin of chip U25 is grounded, and the GND2 pin of chip U25 is connected to analog ground AGND. The VINP pin of chip U25 is connected to the sampling ground MGND through the current sampling resistor U26, and the VINP pin of chip U25 is grounded through the capacitor C43. The VINP pin of chip U25 is also electrically connected to its VINN pin through the capacitor C41. The VINN pin of chip U25 is also grounded through the capacitor C42. The current sampling resistor U27 is connected in parallel with the capacitor C42.

[0028] The VOUTP pin of chip U25 is electrically connected to the INA+ pin of chip U30 through current sampling resistor U29. The INA+ pin of chip U30 is connected to the 1.25V reference voltage output by the power supply unit through current sampling resistor U31. The VOUTN pin of chip U25 is electrically connected to the INA- pin of chip U30 through current sampling resistor U32. The INA- pin of chip U30 is electrically connected to its OUTA pin through current sampling resistor U33. The OUTA pin of chip U30 outputs the current sampling signal ADC_I through resistor R27. The VDD pin of chip U30 is connected to the 3.3V supply voltage output by the power supply unit, and the VSS pin of chip U30 is connected to analog ground.

[0029] The current and voltage acquisition circuit also includes an isolation amplifier chip U34, a current sampling resistor U35, a current sampling resistor U36, a current sampling resistor U37, a current sampling resistor U38, a resistor R28, a resistor R29, a resistor R30, a resistor R31, a resistor R32, and a capacitor C59.

[0030] The VDD1 pin of chip U34 is connected to the 5V power supply voltage output by the power supply unit, the VDD2 pin of chip U34 is connected to the 3.3V power supply voltage output by the power supply unit, the GND1 pin of chip U34 is grounded, and the GND2 pin of chip U34 is connected to analog ground AGND. The VINP pin of chip U34 is electrically connected to the first end of resistor R31, the second end of resistor R31 is connected to the external power supply voltage through resistors R28 and R29 in sequence, and the second end of resistor R31 is also grounded through resistor R30. The VINP pin of chip U34 is grounded through capacitor C59, and the VINN pin of chip U34 is grounded.

[0031] The VOUTP pin of chip U34 is electrically connected to the INB+ pin of chip U30 through current sampling resistor U35. The INB+ pin of chip U30 is connected to the 1.25V reference voltage output by the power supply unit through current sampling resistor U36. The VOUTN pin of chip U34 is electrically connected to the INB- pin of chip U30 through current sampling resistor U37. The INB- pin of chip U30 is electrically connected to its OUTB pin through current sampling resistor U38. The OUTB pin of chip U30 outputs the voltage sampling signal ADC_V through resistor R32.

[0032] Furthermore, the overcurrent detection circuit includes an operational amplifier chip U40, resistors R37, R38, R39, R40, R41, R42, and capacitor C66. The V+ pin of chip U40 is connected to the 3.3V power supply voltage output by the power supply unit, and the V- pin of chip U40 is connected to analog ground AGND. The IN+ pin of chip U40 is electrically connected to the first end of resistor R37, and the second end of resistor R37 is connected to the 3.3V power supply voltage through resistor R40. The second end of resistor R37 is also connected to analog ground AGND through resistor R39. The IN- pin of chip U40 is connected to the current sampling signal ADC_I through resistor R38. The IN+ pin of chip U40 is electrically connected to its Out pin through resistor R41, and the Out pin of chip U40 is connected to the 3.3V power supply voltage through resistor R42. The Out pin of chip U40 is also electrically connected to the overcurrent shutdown control circuit.

[0033] The overcurrent shutdown control circuit includes an optocoupler chip U41, resistors R43, R44, R45, R46, R47, R48, R49, and R50, an LED3, a field-effect transistor Q1, a transistor Q2, and a transistor Q3. The source of the field-effect transistor Q1 is connected to analog ground AGND, and the gate of the field-effect transistor Q1 is electrically connected to the Out pin of the chip U40. The gate of the field-effect transistor Q1 is also electrically connected to the negative terminal of the LED3, and the positive terminal of the LED3... The terminal of the LED3 is connected to a 3.3V power supply via resistor R45; the negative terminal of the LED3 is also electrically connected to the collector of the transistor Q2 via resistor R46, and the collector of the transistor Q2 is electrically connected to the base of the transistor Q3 via resistor R47; the emitter of the transistor Q2 is connected to analog ground AGND, and the base of the transistor Q2 is electrically connected to the collector of the transistor Q3 via resistor R50; the collector of the transistor Q3 is connected to analog ground AGND via resistor R49, and the emitter of the transistor Q3 is electrically connected to the MCU unit;

[0034] The drain of the field-effect transistor Q1 is electrically connected to the Cathode pin of the chip U41. The Anode pin of the chip U41 is electrically connected to the first end of the resistor R44. The second end of the resistor R44 is electrically connected to the MCU unit. The second end of the resistor R44 is also connected to analog ground AGND through the resistor R43. The Collector pin of the chip U41 is connected to the 5V power supply voltage. The Emitter pin of the chip U41 is grounded through the resistor R48. The Emitter pin of the chip U41 also serves as the output terminal of the overcurrent shutdown control circuit and is electrically connected to the SD# pins of the chips U13 and U15 in the full-bridge drive circuit.

[0035] Furthermore, the status detection unit also includes a temperature acquisition circuit and an AD conversion circuit. The temperature acquisition circuit includes an operational amplifier U39, a negative temperature coefficient resistor R33, a resistor R34, a capacitor C63, and a bidirectional suppression diode D32. The negative temperature coefficient resistor R33 is located near the full-bridge drive circuit. The non-inverting input of the operational amplifier U39 is connected to a 3.3V power supply voltage through the negative temperature coefficient resistor R33, and the inverting input of the operational amplifier U39 is electrically connected to its output. The positive power supply terminal of the operational amplifier U39 is connected to the 3.3V power supply voltage, and the negative power supply terminal of the operational amplifier U39 is connected to analog ground AGND. The output of the operational amplifier U39 is connected to analog ground through the bidirectional suppression diode D32, and the output of the operational amplifier U39 serves as the output of the temperature acquisition circuit, outputting a temperature sampling signal ADC_T. The current sampling signal ADC_I, the voltage sampling signal ADC_V, and the temperature sampling signal ADC_T are all electrically connected to the AD conversion circuit, and after being converted into digital signals by the AD conversion circuit, they are sent to the MCU unit.

[0036] Furthermore, the remote communication unit includes a wireless communication module and a wireless communication power supply module; the wireless communication power supply module includes a DC / DC power chip U73, resistors R72, R73, and R74, capacitors C22, C23, C24, C25, and C26, and an inductor L2; the IN pin of the chip U73 is connected to the 5V power supply voltage output by the power supply unit, and the IN pin of the chip U73 is also connected to digital ground DGND through capacitor C25; the EN pin of the chip U73 is electrically connected to the MCU unit through resistor R73, and the GND pin of the chip U73 is connected to digital ground DGND;

[0037] The BS pin of chip U73 is electrically connected to its LX pin via capacitor C24. The LX pin of chip U73 is electrically connected to the first end of inductor L2, and the second end of inductor L2 is electrically connected to the power supply terminal of the wireless communication module. The FB pin of chip U73 is connected to digital ground DGND via resistor R72, and the FB pin of chip U73 is also electrically connected to the second end of inductor L2 via resistor R74. The second end of inductor L2 serves as the output terminal of the wireless communication power supply module and is electrically connected to the power supply terminal of the wireless communication module. The second end of inductor L2 is also connected to digital ground DGND via capacitor C26, and capacitors C22 and C26 are connected in parallel.

[0038] Furthermore, the at least one daily algorithm stored in the MCU unit is a time-controlled daily algorithm, which includes the following steps:

[0039] Obtain latitude, longitude, and time information;

[0040] Calculate the Julian days and centuries;

[0041] Calculate the solar ecliptic coordinates;

[0042] Calculate the rectangular coordinates of the sun;

[0043] Calculate the solar horizon coordinates;

[0044] Correct the sun's position and output the current sun's azimuth.

[0045] In this invention, the integrated controller and motor drive circuit of the daily tracking control system significantly reduces equipment installation space and material management costs. Employing a time-controlled daily tracking algorithm based on Julian days and centuries allows for more accurate calculation of the current sun's position, improving tracking precision. Two DC motor drive units enable motor control for either two single-axis daily tracking systems or one dual-axis daily tracking system. The full-bridge drive circuit provides stepless speed regulation of the DC motor, further enhancing tracking precision and adapting to various daily tracking systems. Furthermore, it features motor forward and reverse limit switches, overcurrent protection, and easy integration with external detection signals or control of external devices. Attached Figure Description

[0046] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0047] Figure 1 This is a structural block diagram of a preferred embodiment of the daily control system of the solar thermal collector of the present invention.

[0048] Figure 2 and Figure 3 This is the circuit diagram of the MCU unit.

[0049] Figure 4 This is a flowchart of the time-controlled daily algorithm in this embodiment.

[0050] Figure 5 This is the circuit diagram of a full-bridge drive circuit.

[0051] Figure 6 This is the control timing diagram for the half-bridge driver chip.

[0052] Figure 7 , Figure 8 , Figure 9 This is the circuit diagram for the forward and reverse limit circuit.

[0053] Figure 10 This is a circuit diagram of a current and voltage acquisition circuit.

[0054] Figure 11 This is the circuit diagram for the overcurrent detection circuit.

[0055] Figure 12 This is a circuit diagram of an overcurrent shutdown control circuit.

[0056] Figure 13 This is the circuit diagram of the temperature acquisition circuit.

[0057] Figure 14 Circuit diagram for the power supply module for wireless communication.

[0058] Figure 15 This is the circuit diagram for the RS485 interface circuit. Detailed Implementation

[0059] The following specific examples illustrate the implementation of the present invention. The illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0060] Please see Figure 1 A preferred embodiment of the daily control system for the solar thermal collector of the present invention includes an MCU unit, two DC motor drive units, two status detection units, a remote communication unit, a tilt sensor, a first serial interface unit, a second serial interface unit, an input / output interface unit, and a power supply unit. The MCU unit stores at least one daily algorithm, calculates the sun's position using the algorithm, and outputs a corresponding pulse drive signal.

[0061] The two DC motor drive units are respectively used to generate drive voltages for the two motors based on the pulse drive signals generated by the MCU unit. The status detection unit corresponds one-to-one with the DC motor drive unit and is used to detect the operating status of the corresponding DC motor drive unit. The remote communication unit is used to enable data transmission between the MCU unit and the remote control terminal, allowing the remote control terminal to read the operating data of the MCU unit, issue control commands to the MCU unit, and modify the operating parameters of the MCU unit.

[0062] The tilt sensor measures the angle of the mirror field (the structure of the solar collector always facing the sun) and provides this information to the MCU unit via the first serial interface unit. The second serial interface unit receives data from a weather station to obtain solar radiation, wind direction, wind speed, ambient temperature, rainfall, and other data, enabling control of the equipment's operation based on weather conditions. For example, it activates a pre-set wind-resistant mode when the wind speed is too high, or a pre-set cleaning mode when it rains. The input / output interface unit provides an interface for the MCU unit to connect to external devices. The power supply unit converts the external power supply voltage VCC_IN into the voltages required by each unit, including an 11V power supply voltage, a 5V power supply voltage, a 3.3V power supply voltage, and a 1.25V reference voltage.

[0063] Please see Figure 2 and Figure 3 The MCU unit includes an MCU system comprised of an MCU chip U1 and its peripheral circuitry. The chip U1 can be an STM32H7B0VBT6 chip. Capacitors C1, C5, C6, C8, and C9 are all filter capacitors, and Y1 uses a 25MHz crystal oscillator. The STM32H7B0VBT6 chip stores a program for a daily tracking algorithm. At least one daily tracking algorithm stored in the MCU unit is a time-controlled daily tracking algorithm that calculates the relative angle between the sun and its actual location based on real-time time (24-hour format) and the actual geographical location (latitude and longitude). Please refer to [link / reference]. Figure 4 The time-controlled daily algorithm includes the following steps:

[0064] S1. Obtain latitude, longitude, and time information.

[0065] S2. Calculate the Julian days and centuries based on latitude, longitude and time information.

[0066] S3. Calculate the solar ecliptic coordinates based on the Julian day number, century number, and current time.

[0067] S4. Calculate the solar rectangular coordinates based on the solar ecliptic coordinates.

[0068] S5. Calculate the sun's horizontal coordinates based on the sun's rectangular coordinates.

[0069] S6. Correct the sun's position based on the sun's rectangular coordinates and output the current sun's azimuth.

[0070] Then, the MCU unit can calculate the required horizontal and vertical offset angles based on the sun's position, and output corresponding pulse drive signals to control the motor to work based on the required horizontal and vertical offset angles.

[0071] Each of the aforementioned DC motor drive units includes a full-bridge drive circuit and a forward and reverse limit circuit. The full-bridge drive circuit is used to generate the motor drive voltage according to the pulse drive signal from the MCU unit; the forward and reverse limit circuit is used to limit the forward rotation angle and the reverse rotation angle of the motor.

[0072] Please see Figure 5 The full-bridge drive circuit includes a half-bridge drive chip U13, resistors R18 and R19, current sampling resistors U42 and U43, capacitor C34, diodes D12, D14, D15, D24, and D25, and MOSFETs 16 and 17. Chip U13 can be an EG2104S chip. The IN pin (pin 2) of chip U13 is connected to the first pulse drive signal from the MCU unit, the VCC pin (pin 1) of chip U13 is connected to the 11V power supply voltage, and the SD# pin (pin 3) of chip U13 is connected to the shutdown signal. Please refer to [link to relevant documentation]. Figure 6This is a timing diagram showing the control of the output of chip U13 via the SD# pin to control the shutdown signal. The COM pin (pin 4) of chip U13 is grounded. The VB pin (pin 8) of chip U13 is electrically connected to its VS pin (pin 6) through capacitor C34. The VB pin of chip U13 is also electrically connected to the negative terminal of diode D12, and the positive terminal of diode D12 is connected to an 11V power supply. The HO pin (pin 7) of chip U13 is electrically connected to the negative terminal of diode D14, and the positive terminal of diode D14 is electrically connected to the gate of MOSFET U16. Resistor R18 is connected in parallel with diode D14. The drain of MOSFET U16 is connected to the external power supply voltage VCC_IN. The drain of MOSFET U16 is also electrically connected to the negative terminal of diode D25, and the positive terminal of diode D25 is electrically connected to the VS pin of chip U13. The LO pin (pin 5) of chip U13 is electrically connected to the negative terminal of diode D15, and the positive terminal of diode D15 is electrically connected to the gate of field-effect transistor U17. Resistor R19 is connected in parallel with diode D15. The drain of field-effect transistor U17 is connected to the external power supply voltage VCC_IN, and the drain of field-effect transistor U17 is also electrically connected to the negative terminal of diode D24. The negative terminal of diode D24 is connected to sampling ground MGND. Sampling ground MGND is grounded through current sampling resistor U42, and current sampling resistor U43 is connected in parallel with current sampling resistor U42. The positive terminal of diode D24 is electrically connected to the VS pin (pin 6) of chip U13. The VS pin of chip U13 is used to output the motor drive voltage MO+, which is used to connect to the positive terminal of the DC motor.

[0073] Please continue reading. Figure 5The full-bridge drive circuit also includes a half-bridge drive chip U15, resistors R20 and R21, capacitor C35, diodes D13, D16, D17, D22, and D23, and MOSFETs 18 and 19. Chip U15 can be an EG2104S chip. The IN pin (pin 2) of chip U15 is connected to the second pulse drive signal from the MCU unit, the VCC pin (pin 1) of chip U15 is connected to the 11V power supply voltage, and the SD# pin (pin 3) of chip U15 is connected to the shutdown signal. The principle of controlling chip U15 through the SD# pin with the shutdown signal is the same as that of chip U13. The COM pin (pin 4) of chip U15 is grounded. The VB pin (pin 8) of chip U15 is electrically connected to its VS pin (pin 6) through capacitor C35. The VB pin of chip U15 is also electrically connected to the negative terminal of diode D13, and the positive terminal of diode D13 is connected to an 11V power supply. The HO pin (pin 7) of chip U15 is electrically connected to the negative terminal of diode D16, and the positive terminal of diode D16 is electrically connected to the gate of MOSFET U18. Resistor R20 is connected in parallel with diode D16. The drain of MOSFET U18 is connected to the external power supply voltage VCC_IN. The drain of MOSFET U18 is also electrically connected to the negative terminal of diode D23, and the positive terminal of diode D23 is electrically connected to the VS pin of chip U15. The LO pin (pin 5) of chip U15 is electrically connected to the negative terminal of diode D17, and the positive terminal of diode D17 is electrically connected to the gate of field-effect transistor U19. Resistor R21 is connected in parallel with diode D17. The drain of field-effect transistor U19 is connected to the external power supply voltage VCC_IN, and the drain of field-effect transistor U19 is also electrically connected to the negative terminal of diode D22. The negative terminal of diode D22 is connected to sampling ground MGND, and the positive terminal of diode D22 is electrically connected to the VS pin (pin 6) of chip U15. The VS pin of chip U15 is used to output the motor drive voltage MO-, which is used to connect to the negative terminal of the DC motor.

[0074] In the full-bridge driver circuit, D22, D23, D24, and D25 are all freewheeling diodes, which absorb the impact of the electromotive force generated by the motor during sudden changes on the MOSFETs. Simultaneously, logic optocoupler U14 is used for signal isolation to ensure the safe operation of the MCU unit. This circuit uses two half-bridge driver chips, U13 and U15, to drive four MOSFETs U16, U17, U18, and U19, thus forming a single full-bridge circuit.

[0075] The forward and reverse limit circuit includes a forward limit switch (not shown in the figure), a reverse limit switch (not shown in the figure), a first NOR gate, and a second NOR gate. Please refer to [link / reference]. Figure 7The first and second NOR gates are both integrated into the NOR gate chip U17, which can be a four-channel NOR gate chip SN74HCT02DR. The first pulse signal from the MCU unit (PA4_IN1 and PB2_IN3 output from the MCU unit are the first pulse signals of the two DC motor drive units, respectively) and the second pulse signal (PA5_IN2 and PE4_IN4 output from the MCU unit are the second pulse signals of the two DC motor drive units, respectively) are opto-isolated and output as pulse drive signals APWM1 and APWM2, respectively. For the opto-isolation circuit, please refer to [link to circuit diagram]. Figure 8 The limit signal Q1 (i.e., the first limit signal) from the positive limit switch and the limit signal Q2 (i.e., the second limit signal) from the reverse limit switch are opto-isolated and then output as limit signals SQ1 and SQ2, respectively.

[0076] Pulse drive signals APWM1 and APWM2 are electrically connected to the first input terminals of the two NOR gates (i.e., pins 1A and 2A of chip U17), respectively. Limit signals SQ1 and SQ2 are electrically connected to the second input terminals of the two NOR gates (i.e., pins 1B and 2B of chip U17), respectively. The output terminals of the two NOR gates (i.e., pins 1Y and 2Y of chip U17) output pulse drive signals PWM_1 and PWM_2 to the IN pins of chips U13 and U15 in the full-bridge drive circuit, respectively. The truth table of the NOR gates is as follows:

[0077] A(1A / 2A) B(1B / 2B) Y(1Y / 2Y) H X L X H L L L H

[0078] In the table, H represents high level, L represents low level, and X represents any level. When the limit signal of the input NOR gate is high, the NOR gate continuously outputs a low level, thereby stopping the DC motor from driving.

[0079] To send the operating status of the forward and reverse limit switches to the MCU unit, the forward and reverse limit circuit also includes two opto-isolation circuits. One opto-isolation circuit is used to photoisolate the limit signal Q1 to obtain the limit signal SQ1, which is then sent to the second input terminal of a NOR gate. The other opto-isolation circuit processes the limit signal Q2 in the same way, photoisolerating it twice to obtain the signal MCU_Q2, which is then sent to the MCU unit.

[0080] Please see Figure 9This is a circuit diagram of an opto-isolation circuit for opto-isolating the limit signal Q1. The circuit includes a dual-channel opto-isolation chip U63, resistors R70, R73, R83, and R84, and capacitor C152. The Anode1 pin (pin 1) of chip U63 is connected to a 5V power supply through resistor R83, and the Cathode1 pin (pin 2) of chip U63 is connected to the limit signal Q1. The Collector1 pin (pin 8) of chip U63 outputs the limit signal SQ1. The Collector1 pin of chip U63 is connected to a 5V power supply through resistor R70 and is also grounded through capacitor C152. The Emitter1 pin (pin 7) of chip U63 is grounded, the Anode2 pin (pin 3) of chip U63 is connected to a 5V power supply through resistor R84, and the Cathode2 pin (pin 4) of chip U63 is electrically connected to its Collector1 pin. The Collector2 pin (pin 6) of the chip U63 is connected to a 3.3V power supply through resistor R73. The Collector2 pin of the chip U63 is also electrically connected to the MCU unit. The Emitter2 pin (pin 5) of the chip U63 is connected to digital ground DGND.

[0081] The status detection unit includes a current and voltage acquisition circuit, a hardware overcurrent detection circuit, an overcurrent shutdown control circuit, a temperature acquisition circuit, and an AD conversion circuit. The current and voltage acquisition circuit samples the output current of the full-bridge drive circuit to obtain a current sampling signal ADC_I, and samples the externally input supply voltage to obtain a voltage sampling signal ADC_V. The hardware overcurrent detection circuit detects the current sampling signal ADC_I and outputs a valid overcurrent signal when ADC_I exceeds a predetermined value. The overcurrent shutdown control circuit outputs a valid shutdown signal when both the overcurrent signal and the overcurrent shutdown control signals from the MCU unit (PA7_ENB1 and PB0_ENB2 from the two hardware overcurrent detection circuits) are valid. The temperature acquisition circuit acquires the operating temperature of the full-bridge drive circuit to obtain a temperature sampling signal ADC_T. The AD conversion circuit performs AD conversion on the current sampling signal ADC_I, the voltage sampling signal ADC_V, and the temperature sampling signal ADC_T, converting them into digital signals before sending them to the MCU unit. By detecting the power supply voltage and temperature, functions such as overvoltage protection, undervoltage protection, and overtemperature protection can also be achieved.

[0082] Please see Figure 10The current and voltage acquisition circuit includes an isolation amplifier chip U25, a precision amplifier chip U30, current sampling resistors U26, U27, U29, U31, U32, and U33, a resistor R27, and capacitors C41, C42, and C43. Chip U25 can be an AMC1200BDWVR chip, and chip U30 can be a GS8552-SR chip. Pin VDD1 (pin 1) of chip U25 is connected to a 5V power supply, pin VDD2 (pin 8) is connected to a 3.3V power supply, pin GND1 (pin 4) is grounded, and pin GND2 (pin 5) is connected to analog ground AGND. The VINP pin (pin 2) of chip U25 is connected to the sampling ground MGND through current sampling resistor U26. The VINP pin of chip U25 is grounded through capacitor C43. The VINP pin of chip U25 is also electrically connected to its VINN pin (pin 3) through capacitor C41. The VINN pin of chip U25 is also grounded through capacitor C42. The current sampling resistor U27 is connected in parallel with capacitor C42. The VOUTP pin (pin 7) of chip U25 is electrically connected to the INA+ pin (pin 3) of chip U30 through current sampling resistor U29. The INA+ pin of chip U30 is connected to a 1.25V reference voltage through current sampling resistor U31. The VOUTN pin (pin 6) of chip U25 is electrically connected to the INA- pin (pin 2) of chip U30 through current sampling resistor U32. The INA- pin of chip U30 is electrically connected to its OUTA pin (pin 1) through current sampling resistor U33. The OUTA pin of chip U30 outputs a current sampling signal ADC_I through resistor R27. The current sampling signal ADC_I is then sent to the MCU unit after AD conversion. The VDD pin (i.e., pin 8) of chip U30 is connected to a 3.3V power supply voltage, and the VSS pin (i.e., pin 4) of chip U30 is connected to analog ground.

[0083] Please continue reading. Figure 10The current and voltage acquisition circuit also includes an isolation amplifier chip U34, current sampling resistors U35, U36, U37, and U38, resistors R28, R29, R30, R31, and R32, and a capacitor C59. Chip U34 can be an AMC1200BDWVR chip. The VDD1 pin (pin 1) of chip U34 is connected to a 5V power supply, the VDD2 pin (pin 8) is connected to a 3.3V power supply, the GND1 pin (pin 4) is grounded, and the GND2 pin (pin 5) is connected to analog ground AGND. The VINP pin (pin 2) of chip U34 is electrically connected to the first end of resistor R31. The second end of resistor R31 is connected to the external power supply voltage VCC_IN via resistors R28 and R29, and is also grounded via resistor R30. The VINP pin of chip U34 is grounded through capacitor C59, and the VINN pin (pin 3) of chip U34 is also grounded. The VOUTP pin (pin 7) of chip U34 is electrically connected to the INB+ pin (pin 5) of chip U30 through current sampling resistor U35. The INB+ pin of chip U30 is connected to a 1.25V reference voltage through current sampling resistor U36. The VOUTN pin (pin 6) of chip U34 is electrically connected to the INB- pin (pin 6) of chip U30 through current sampling resistor U37. The INB- pin of chip U30 is electrically connected to its OUTB pin (pin 7) through current sampling resistor U38. The OUTB pin of chip U30 outputs a voltage sampling signal ADC_V through resistor R32. This voltage sampling signal ADC_V is then converted by an AD converter and sent to the MCU unit.

[0084] In the current and voltage acquisition circuit, the current is acquired by measuring the voltage across two 20mΩ resistors connected in parallel between the motor's negative terminal and ground. This voltage is amplified by an 8x fixed-gain isolation chip U25 and then output to an adder circuit built with a high-precision operational amplifier U30. This adds a reference voltage of 1.25V to the output voltage, which is then output to the MCU unit. D33 is a suppression diode, ensuring the voltage input to the MCU unit is below 3.3V. The voltage acquisition circuit operates on a similar principle. The voltage input to the isolation amplifier is the voltage divided by R28, R29, R30 and the power supply voltage. This voltage is then passed through a 1x fixed-gain isolation amplifier U24 and input to the adder circuit before finally being output to the MCU unit.

[0085] Please see Figure 11The overcurrent detection circuit includes an operational amplifier chip U40, resistors R37, R38, R39, R40, R41, R42, and capacitor C66. Chip U40 can be an LMV331TP-TR chip. The V+ pin (pin 5) of chip U40 is connected to a 3.3V supply voltage, and the V- pin (pin 2) of chip U40 is connected to analog ground AGND. The IN+ pin (pin 1) of chip U40 is electrically connected to the first end of resistor R37. The second end of resistor R37 is connected to the 3.3V supply voltage through resistor R40, and the second end of resistor R37 is also connected to analog ground AGND through resistor R39. The IN- pin (pin 3) of chip U40 is electrically connected to resistor R27 of the current and voltage acquisition circuit through resistor R38, thereby receiving the current sampling signal ADC_I. The IN+ pin (i.e., pin 1) of the chip U40 is electrically connected to its Out pin (i.e., pin 4) through resistor R41. The Out pin of the chip U40 is connected to a 3.3V power supply voltage through resistor R42. The Out pin of the chip U40 also outputs an overcurrent signal OC_OUT to the overcurrent shutdown control circuit.

[0086] The overcurrent detection circuit uses an operational amplifier chip U40 to build a hysteresis voltage comparator. The comparison voltage is 3V divided by R40 and R39. When the voltage at the inverting input terminal of the comparator is higher than that at the non-inverting input terminal, the comparator outputs a low level. Then, the output terminal of the comparator is connected to the overcurrent shutdown circuit for processing. C66 is a filter capacitor to prevent fluctuations in the input comparison voltage.

[0087] Please see Figure 12The overcurrent shutdown control circuit includes an optocoupler chip U41, resistors R43, R44, R45, R46, R47, R48, R49, and R50, an LED3, a field-effect transistor Q1, a transistor Q2, and a transistor Q3. The optocoupler chip U41 can be an EL357N(C)(TA)-G chip, and the transistors Q2 and Q3 can be bipolar transistors BC847PN. The source of the field-effect transistor Q1 is connected to analog ground AGND, and the gate of the field-effect transistor Q1 is electrically connected to the Out pin of the chip U40 to receive the overcurrent signal OC_OUT. The gate of the field-effect transistor Q1 is also electrically connected to the negative terminal of the LED3, and the positive terminal of the LED3 is connected to a 3.3V power supply voltage through resistor R45. The negative terminal of the LED3 is also electrically connected to the collector of the transistor Q2 through resistor R46. The collector of the transistor Q2 is electrically connected to the base of the transistor Q3 through resistor R47. The emitter of the transistor Q2 is connected to analog ground AGND, and the base of the transistor Q2 is electrically connected to the collector of the transistor Q3 through resistor R50. The collector of the transistor Q3 is connected to analog ground AGND through resistor R49, and the emitter of the transistor Q3 is connected to the overcurrent shutdown control signal of the MCU unit. The drain of the field-effect transistor Q1 is electrically connected to the Cathode pin (i.e., pin 2) of the chip U41. The Anode pin (i.e., pin 1) of the chip U41 is electrically connected to the first end of resistor R44. The second end of resistor R44 is connected to the overcurrent shutdown control signal of the MCU unit, and the second end of resistor R44 is also connected to analog ground AGND through resistor R43. The Collector pin (pin 4) of chip U41 is connected to a 5V power supply; the Emitter pin (pin 3) of chip U41 is grounded through resistor R48. The Emitter pin of chip U41 also serves as the output terminal of the overcurrent shutdown control circuit and is electrically connected to the SD# pins of chip U13 and chip U15 in the full-bridge drive circuit.

[0088] The overcurrent shutdown control circuit uses an optocoupler isolation circuit and a latching circuit. When the overcurrent shutdown control signal is high, the overcurrent signal OC_OUT is high, which turns on the field-effect transistor Q1 and the full-bridge circuit works normally. When an overcurrent occurs, the overcurrent signal OC_OUT is low (i.e., the overcurrent signal is valid), LED3 lights up, the field-effect transistor Q1 is turned off, the SD output is low, the half-bridge chip is disabled, and the full-bridge circuit is turned off, thus achieving the purpose of overcurrent shutdown.

[0089] Please see Figure 13The temperature acquisition circuit includes an operational amplifier U39, a negative temperature coefficient resistor R33, a resistor R34, a capacitor C63, and a bidirectional suppression diode D32. The negative temperature coefficient resistor R33 is located near chips U25 and U34 in the full-bridge driver circuit and is used to measure the chip temperature during controller operation. The non-inverting input of operational amplifier U39 is connected to a 3.3V power supply through the negative temperature coefficient resistor R33, and the inverting input of operational amplifier U39 is electrically connected to its output. The positive power supply terminal of operational amplifier U39 is connected to the 3.3V power supply, and the negative power supply terminal is connected to analog ground AGND. The output of operational amplifier U39 is connected to analog ground through the bidirectional suppression diode D32. The output of operational amplifier U39 serves as the output of the temperature acquisition circuit, outputting a temperature sampling signal ADC_T. The temperature sampling signal ADC_T is then converted from an analog to an analog signal and sent to the MCU unit.

[0090] The temperature acquisition circuit uses operational amplifier U39 to build a voltage follower. The positive input voltage is the voltage divider value of resistors R33 and R34. Capacitor C63 acts as a filter to smooth the input signal, and diode D32 is a suppressor diode to prevent the input voltage from operating at 3.3V to the MCU. When the temperature rises, the resistance of the negative temperature coefficient resistor R33 decreases. The signal is amplified by operational amplifier U39 and then sent to the MCU unit. The corresponding temperature can be found by calculating the resistance of R33.

[0091] Please see Figure 14The remote communication unit includes a wireless communication module and a wireless communication power supply module. The wireless communication module can be a LoRa module. Alternatively, the remote communication unit also includes a wired communication module to supplement the wireless communication module. The wireless communication power supply module includes a DC / DC power chip U73, resistors R72, R73, and R74, capacitors C22, C23, C24, C25, and C26, and an inductor L2. The chip U73 can be a TP6327GS6 chip. The IN pin (pin 3) of the chip U73 is connected to a 5V power supply voltage, and the IN pin of the chip U73 is also connected to digital ground (DGND) through capacitor C25. The EN pin (pin 5) of the chip U73 is connected to the control signal PA8_POW of the MCU unit through resistor R731, and the GND pin (pin 1) of the chip U73 is connected to digital ground (DGND). The BS pin (pin 6) of chip U73 is electrically connected to its LX pin (pin 2) via capacitor C24. The LX pin of chip U73 is electrically connected to the first end of inductor L2, and the second end of inductor L2 outputs a supply voltage of 5V_PR, which is electrically connected to the power supply terminal of the wireless communication module. The FB pin (pin 4) of chip U73 is connected to digital ground (DGND) via resistor R72, and the FB pin of chip U73 is also electrically connected to the second end of inductor L2 via resistor R74. The second end of inductor L2 serves as the output terminal of the wireless communication power supply module and is electrically connected to the power supply terminal of the wireless communication module; the second end of inductor L2 is also connected to digital ground (DGND) via capacitor C26, and capacitors C22 and C26 are connected in parallel. In the circuit, C25 and C23 are input filter capacitors, R74 and R72 are output feedback resistors, C26 and C22 are output filter capacitors, and R73 is a current-limiting resistor; thus, the MCU unit can control whether to supply power to the LORA module through the EN pin of chip U73, thereby controlling the operation of the LORA module.

[0092] In this embodiment, the two serial interface units have the same circuit structure, both using RS485 interface circuits. Please refer to [link / reference]. Figure 15 This is a circuit diagram of one of the RS485 interface circuits. The RS485 interface circuit includes an isolated RS485 chip U8 for converting TTL signals to RS485 signals, resistors RT3, RT4, and RT5, and fuses F1 and F2; the chip U8 can be an ADM2582E chip. Resistors RT3, RT4, and RT5 are varistors, and fuses F1 and F2 are resettable fuses, together providing protection for chip U8. This interface circuit has functions such as anti-static and high-voltage discharge. The RXD and TXD pins of chip U8 are electrically connected to the MCU unit, and pins A and B are used to connect external devices.

[0093] The input / output interface unit includes a multi-channel analog signal input interface (AI interface) circuit, a multi-channel digital signal input interface (DI interface) circuit, and a multi-channel digital signal output interface (DO interface) circuit. In this embodiment, the input / output interface unit includes 16 AI interface circuits, 16 DI interface circuits, and 16 DO interface circuits. The AI ​​interface circuits are used to connect 4mA-20mA sensors, such as pipeline pressure gauges, flow meters, and equipment inlet / outlet temperatures. The DI interface circuits are used to receive external button control signals and protection device detection signals, such as light curtains and fence gate opening / closing detection signals. The DO interface circuits are used to output control signals to control external devices, such as alarms and water pumps.

[0094] In this embodiment, the integrated controller and motor drive circuit of the daily tracking control system significantly reduces equipment installation space and material management costs. The time-based daily tracking algorithm, based on Julian days and centuries, can more accurately calculate the current sun's position, improving tracking accuracy. Two DC motor drive units can be used to control either two single-axis daily tracking systems or one dual-axis daily tracking system. The full-bridge drive circuit enables stepless speed regulation of the DC motor, further improving tracking accuracy and adapting to various daily tracking systems. Additionally, it features motor forward and reverse limit switches and overcurrent hardware protection; multiple AI, DI, and DO interfaces facilitate the connection of external detection signals or the control of external devices.

[0095] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A daily control system for a solar thermal collector, characterized in that: include The MCU unit is used to store at least one day-by-day algorithm, calculate the sun's position using the day-by-day algorithm, and output the corresponding pulse drive signal; Two DC motor drive units are provided, which are used to generate motor drive voltage according to the pulse drive signal of the MCU unit. Two status detection units are provided, each corresponding to a DC motor drive unit, and are used to detect the working status of the corresponding DC motor drive unit. The remote communication unit is used for data transmission between the MCU unit and the remote control terminal. An inclinometer is used to measure the angle of the mirror field and provide it to the MCU unit through the first serial interface unit; The second serial interface unit is used to access meteorological station data; Input / output interface unit, used to provide an interface for connecting the MCU unit to external devices; as well as The power supply unit is used to provide power supply voltage to each unit; The DC motor drive unit includes a full-bridge drive circuit, which generates the motor drive voltage based on the pulse drive signal from the MCU unit; the status detection unit includes a current and voltage acquisition circuit, a hardware overcurrent detection circuit, and an overcurrent shutdown control circuit. The current and voltage acquisition circuit is used to sample the output current of the full-bridge drive circuit to obtain the current sampling signal ADC_I, and to sample the externally input power supply voltage to obtain the voltage sampling signal ADC_V; the hardware overcurrent detection circuit is used to detect the current sampling signal ADC_I, and output a valid overcurrent signal when the current sampling signal ADC_I exceeds a predetermined value; the overcurrent shutdown control circuit is used to output a valid shutdown signal when the overcurrent signal is valid and the overcurrent shutdown control signal sent by the MCU unit is valid.

2. The daily control system for the solar thermal collector according to claim 1, characterized in that: The full-bridge drive circuit includes a half-bridge drive chip U13, resistors R18 and R19, current sampling resistors U42 and U43, capacitor C34, diodes D12, D14, D15, D24, D25, MOSFET 16, and MOSFET 17. The IN pin of chip U13 is connected to the first pulse drive signal from the MCU unit; the VCC pin of chip U13 is connected to the 11V power supply voltage output by the power supply unit; the SD# pin of chip U13 is connected to the shutdown signal; the COM pin of chip U13 is grounded; the VB pin of chip U13 is electrically connected to its VS pin through capacitor C34; the VB pin of chip U13 is also electrically connected to the negative terminal of diode D12; the positive terminal of diode D12 is connected to the 11V power supply voltage. The HO pin of chip U13 is electrically connected to the negative terminal of diode D14, and the positive terminal of diode D14 is electrically connected to the gate of field-effect transistor U16. Resistor R18 is connected in parallel with diode D14. The drain of field-effect transistor U16 is connected to an external power supply voltage. The drain of field-effect transistor U16 is also electrically connected to the negative terminal of diode D25, and the positive terminal of diode D25 is electrically connected to the VS pin of chip U13. The LO pin of chip U13 is electrically connected to the negative terminal of diode D15, and the positive terminal of diode D15 is electrically connected to the gate of field-effect transistor U17. Resistor R19 is connected in parallel with diode D15. The drain of field-effect transistor U17 is connected to the external power supply voltage, and the drain of field-effect transistor U17 is also electrically connected to the negative terminal of diode D24. The negative terminal of diode D24 is connected to sampling ground MGND. The sampling ground MGND is grounded through the current sampling resistor U42, and the current sampling resistor U43 is connected in parallel with the current sampling resistor U42; the positive terminal of the diode D24 is electrically connected to the VS pin of the chip U13, and the VS pin of the chip U13 is used to output the motor drive voltage MO+; The full-bridge drive circuit also includes a half-bridge drive chip U15, resistors R20 and R21, capacitor C35, diodes D13, D16, D17, D22, D23, MOSFET 18, and MOSFET 19. The IN pin of chip U15 is connected to the second pulse drive signal from the MCU unit; the VCC pin of chip U15 is connected to the 11V power supply voltage; the SD# pin of chip U15 is connected to the shutdown signal; the COM pin of chip U15 is grounded; the VB pin of chip U15 is electrically connected to its VS pin through capacitor C35; the VB pin of chip U15 is also electrically connected to the negative terminal of diode D13; the positive terminal of diode D13 is connected to the 11V power supply voltage. The HO pin of chip U15 is electrically connected to the negative terminal of diode D16, and the positive terminal of diode D16 is electrically connected to the gate of field-effect transistor U18. Resistor R20 is connected in parallel with diode D16. The drain of field-effect transistor U18 is connected to the external power supply voltage. The drain of field-effect transistor U18 is also electrically connected to the negative terminal of diode D23. The positive terminal of diode D23 is electrically connected to the VS pin of chip U15. The LO pin of chip U15 is electrically connected to the negative terminal of diode D17, and the positive terminal of diode D17 is electrically connected to the gate of field-effect transistor U19. Resistor R21 is connected in parallel with diode D17. The drain of field-effect transistor U19 is connected to the external power supply voltage, and the drain of field-effect transistor U19 is also electrically connected to the negative terminal of diode D22. The negative terminal of diode D22 is connected to sampling ground MGND, and the positive terminal of diode D22 is electrically connected to the VS pin of chip U15. The VS pin of chip U15 is used to output the motor drive voltage MO-.

3. The daily control system for the solar thermal collector according to claim 2, characterized in that: The DC motor drive unit also includes a forward and reverse limit circuit, which is used to limit the forward rotation angle and the reverse rotation angle of the motor. The forward and reverse limit circuit includes a forward limit switch, a reverse limit switch, a first NOR gate, and a second NOR gate. The first pulse drive signal and the second pulse drive signal from the MCU unit are electrically connected to the first input terminals of the two NOR gates after photoelectric isolation. The first limit signal from the forward limit switch and the second limit signal from the reverse limit switch are electrically connected to the second input terminals of the two NOR gates after photoelectric isolation. The output terminals of the two NOR gates are electrically connected to the IN pin of chip U13 and the IN pin of chip U15, respectively.

4. The daily control system for the solar thermal collector according to claim 3, characterized in that: The forward and reverse limit circuit also includes two opto-isolation circuits. The opto-isolation circuits are used to send the first limit signal or the second limit signal to the second input terminal of the NOR gate after opto-isolation, and to send the opto-isolated signal to the MCU unit after opto-isolation again. The opto-isolation circuit includes a dual-channel opto-isolation chip U63, resistors R70, R73, R83, R84, and capacitor C152. The Anode1 pin of chip U63 is connected to a 5V power supply through resistor R83, and the Cathode1 pin of chip U63 is connected to a limit signal Q1. The Collector1 pin of chip U63 outputs a limit signal SQ1, and the Collector1 pin of chip U63 is connected to a 5V power supply through resistor R70. The pin is also grounded through capacitor C152; the Emitter1 pin of the U63 chip is grounded, the Anode2 pin of the U63 chip is connected to a 5V power supply voltage through resistor R84, the Cathode2 pin of the U63 chip is electrically connected to its Collector1 pin; the Collector2 pin of the U63 chip is connected to a 3.3V power supply voltage through resistor R73, the Collector2 pin of the U63 chip is also electrically connected to the MCU unit; the Emitter2 pin of the U63 chip is connected to digital ground DGND.

5. The daily control system for the solar thermal collector according to claim 2, characterized in that: The current and voltage acquisition circuit includes an isolation amplifier chip U25, a precision amplifier chip U30, current sampling resistors U26, U27, U29, U31, U32, and U33, a resistor R27, and capacitors C41, C42, and C43. The VDD1 pin of chip U25 is connected to the 5V power supply voltage output by the power supply unit, the VDD2 pin of chip U25 is connected to the 3.3V power supply voltage output by the power supply unit, the GND1 pin of chip U25 is grounded, and the GND2 pin of chip U25 is connected to analog ground AGND. The VINP pin of chip U25 is connected to the sampling ground MGND through the current sampling resistor U26, and the VINP pin of chip U25 is grounded through the capacitor C43. The VINP pin of chip U25 is also electrically connected to its VINN pin through the capacitor C41. The VINN pin of chip U25 is also grounded through the capacitor C42. The current sampling resistor U27 is connected in parallel with the capacitor C42. The VOUTP pin of chip U25 is electrically connected to the INA+ pin of chip U30 through current sampling resistor U29. The INA+ pin of chip U30 is connected to the 1.25V reference voltage output by the power supply unit through current sampling resistor U31. The VOUTN pin of chip U25 is electrically connected to the INA- pin of chip U30 through current sampling resistor U32. The INA- pin of chip U30 is electrically connected to its OUTA pin through current sampling resistor U33. The OUTA pin of chip U30 outputs the current sampling signal ADC_I through resistor R27. The VDD pin of chip U30 is connected to the 3.3V supply voltage output by the power supply unit, and the VSS pin of chip U30 is connected to analog ground. The current and voltage acquisition circuit also includes an isolation amplifier chip U34, a current sampling resistor U35, a current sampling resistor U36, a current sampling resistor U37, a current sampling resistor U38, a resistor R28, a resistor R29, a resistor R30, a resistor R31, a resistor R32, and a capacitor C59. The VDD1 pin of chip U34 is connected to the 5V power supply voltage output by the power supply unit, the VDD2 pin of chip U34 is connected to the 3.3V power supply voltage output by the power supply unit, the GND1 pin of chip U34 is grounded, and the GND2 pin of chip U34 is connected to analog ground AGND. The VINP pin of chip U34 is electrically connected to the first end of resistor R31, the second end of resistor R31 is connected to the external power supply voltage through resistors R28 and R29 in sequence, and the second end of resistor R31 is also grounded through resistor R30. The VINP pin of chip U34 is grounded through capacitor C59, and the VINN pin of chip U34 is grounded. The VOUTP pin of chip U34 is electrically connected to the INB+ pin of chip U30 through current sampling resistor U35. The INB+ pin of chip U30 is connected to the 1.25V reference voltage output by the power supply unit through current sampling resistor U36. The VOUTN pin of chip U34 is electrically connected to the INB- pin of chip U30 through current sampling resistor U37. The INB- pin of chip U30 is electrically connected to its OUTB pin through current sampling resistor U38. The OUTB pin of chip U30 outputs the voltage sampling signal ADC_V through resistor R32.

6. The daily control system for the solar thermal collector according to claim 5, characterized in that: The overcurrent detection circuit includes an operational amplifier chip U40, resistors R37, R38, R39, R40, R41, R42, and capacitor C66. The V+ pin of chip U40 is connected to the 3.3V power supply voltage output by the power supply unit, and the V- pin of chip U40 is connected to analog ground AGND. The IN+ pin of chip U40 is electrically connected to the first end of resistor R37, and the second end of resistor R37 is connected to the 3.3V power supply voltage through resistor R40. The second end of resistor R37 is also connected to analog ground AGND through resistor R39. The IN- pin of chip U40 is connected to the current sampling signal ADC_I through resistor R38. The IN+ pin of chip U40 is electrically connected to its Out pin through resistor R41, and the Out pin of chip U40 is connected to the 3.3V power supply voltage through resistor R42. The Out pin of chip U40 is also electrically connected to the overcurrent shutdown control circuit. The overcurrent shutdown control circuit includes an optocoupler chip U41, resistors R43, R44, R45, R46, R47, R48, R49, and R50, an LED3, a field-effect transistor Q1, a transistor Q2, and a transistor Q3. The source of the field-effect transistor Q1 is connected to analog ground AGND, and the gate of the field-effect transistor Q1 is electrically connected to the Out pin of the chip U40. The gate of the field-effect transistor Q1 is also electrically connected to the negative terminal of the LED3, and the positive terminal of the LED3... The terminal of the LED3 is connected to a 3.3V power supply via resistor R45; the negative terminal of the LED3 is also electrically connected to the collector of the transistor Q2 via resistor R46, and the collector of the transistor Q2 is electrically connected to the base of the transistor Q3 via resistor R47; the emitter of the transistor Q2 is connected to analog ground AGND, and the base of the transistor Q2 is electrically connected to the collector of the transistor Q3 via resistor R50; the collector of the transistor Q3 is connected to analog ground AGND via resistor R49, and the emitter of the transistor Q3 is electrically connected to the MCU unit; The drain of the field-effect transistor Q1 is electrically connected to the Cathode pin of the chip U41. The Anode pin of the chip U41 is electrically connected to the first end of the resistor R44. The second end of the resistor R44 is electrically connected to the MCU unit. The second end of the resistor R44 is also connected to analog ground AGND through the resistor R43. The Collector pin of the chip U41 is connected to the 5V power supply voltage. The Emitter pin of the chip U41 is grounded through the resistor R48. The Emitter pin of the chip U41 also serves as the output terminal of the overcurrent shutdown control circuit and is electrically connected to the SD# pins of the chips U13 and U15 in the full-bridge drive circuit.

7. The daily control system for the solar thermal collector according to claim 2, characterized in that: The status detection unit further includes a temperature acquisition circuit and an AD conversion circuit. The temperature acquisition circuit includes an operational amplifier U39, a negative temperature coefficient resistor R33, a resistor R34, a capacitor C63, and a bidirectional suppression diode D32. The negative temperature coefficient resistor R33 is located near the full-bridge drive circuit. The non-inverting input of the operational amplifier U39 is connected to a 3.3V power supply voltage through the negative temperature coefficient resistor R33, and the inverting input of the operational amplifier U39 is electrically connected to its output. The positive power supply terminal of the operational amplifier U39 is connected to the 3.3V power supply voltage, and the negative power supply terminal of the operational amplifier U39 is connected to analog ground AGND. The output of the operational amplifier U39 is connected to analog ground through the bidirectional suppression diode D32, and the output of the operational amplifier U39 serves as the output of the temperature acquisition circuit, outputting a temperature sampling signal ADC_T. The current sampling signal ADC_I, the voltage sampling signal ADC_V, and the temperature sampling signal ADC_T are all electrically connected to the AD conversion circuit, and after being converted into digital signals by the AD conversion circuit, they are sent to the MCU unit.

8. The daily control system for the solar thermal collector according to claim 1, characterized in that: The remote communication unit includes a wireless communication module and a wireless communication power supply module. The wireless communication power supply module includes a DC / DC power chip U73, resistors R72, R73, and R74, capacitors C22, C23, C24, C25, and C26, and an inductor L2. The IN pin of the chip U73 is connected to the 5V power supply voltage output by the power supply unit, and the IN pin of the chip U73 is also connected to digital ground DGND through capacitor C25. The EN pin of the chip U73 is electrically connected to the MCU unit through resistor R73, and the GND pin of the chip U73 is connected to digital ground DGND. The BS pin of chip U73 is electrically connected to its LX pin via capacitor C24. The LX pin of chip U73 is electrically connected to the first end of inductor L2, and the second end of inductor L2 is electrically connected to the power supply terminal of the wireless communication module. The FB pin of chip U73 is connected to digital ground DGND via resistor R72, and the FB pin of chip U73 is also electrically connected to the second end of inductor L2 via resistor R74. The second end of inductor L2 serves as the output terminal of the wireless communication power supply module and is electrically connected to the power supply terminal of the wireless communication module. The second end of inductor L2 is also connected to digital ground DGND via capacitor C26, and capacitors C22 and C26 are connected in parallel.

9. The daily control system for the solar thermal collector according to any one of claims 1 to 8, characterized in that: The MCU unit stores at least one daily algorithm, which is a time-controlled daily algorithm, and the time-controlled daily algorithm includes the following steps: Obtain latitude, longitude, and time information; Calculate the Julian days and centuries; Calculate the solar ecliptic coordinates; Calculate the Sun's rectangular coordinates; Calculate the solar horizon coordinates; Correct the sun's position and output the current sun's azimuth.

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